FPGA-based optical computing communication and control module

Abstract

The application provides an FPGA-based optical computing communication and control module and belongs to the technical field of optical computing.The development board comprising an FPGA chip, an AD / DA module, an output input interface module, a clock module and a memory module is adopted, so that the module can perform four-channel AD / DA signal processing and has rich interfaces to support high-speed information processing and transmission, thereby providing an ideal communication platform for the optical computing module and the neural network and providing the ability of real-time high-speed weight updating of the optical computing module.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence technology, and in particular to an FPGA-based optical computing communication and control module. Background Technology

[0002] Currently, the computing power required for neural network algorithm models mainly relies on GPU servers and electronic neural network chips. However, electronic chips are limited by Moore's Law, with an update and iteration cycle of 12-18 months, which cannot keep up with the growth rate of computing power demand. Moreover, electronic chips suffer from the von Neumann bottleneck, meaning that the hardware framework of electronic chips causes neural networks to repeatedly read and move stored data during operation, increasing additional energy consumption and time costs.

[0003] Photonic AI chips can overcome these two bottlenecks and build neural networks in the field of optics. Photonic neural networks based on analog frameworks can successfully avoid the von Neumann bottleneck and have the high bandwidth advantage that electronic signals do not have. They can make full use of the parallel processing capabilities of light to solve the problems of electronic neural networks.

[0004] Photonic AI chips cannot achieve the function of a complete neural network on their own, and all-optical AI chips are difficult to implement and have high costs.

[0005] Field-programmable gate arrays (FPGAs) have emerged as a type of semi-custom circuit in the field of application-specific integrated circuits (ASICs). They address the shortcomings of custom circuits while overcoming the limitation of the limited gate count of traditional programmable devices. They can enable communication between optical computing modules and neural networks. Summary of the Invention

[0006] To overcome the shortcomings of the prior art, this invention provides an FPGA-based optical computing communication and control module, which, together with the optical computing module and the computer, realizes a complete neural network function, thereby enabling the practical application of neural network operations using photonic chips and fully leveraging the advantages of photonic chips such as high-speed parallelism, large bandwidth, low power consumption, and low heat generation.

[0007] The FPGA-based optical computing, communication, and control module provided by this invention includes:

[0008] The FPGA chip is used to process the input signal according to the preset parallelism and complete the real-time high-speed communication between the optical computing module and the neural network.

[0009] The AD / DA module is connected to the FPGA chip, clock module, and input / output interface module, providing four-channel AD / DA conversion for digital-to-analog and analog-to-digital conversion between the optical computing module and the FPGA.

[0010] The input / output interface module is connected to the FPGA chip and the AD / DA module, and is used to expand the interface of the FPGA chip, providing a high-speed PCIe 3.0 interface, a network port and an SFP fiber optic interface;

[0011] A clock module, connected to the FPGA chip module and the AD / DA module, is used to provide a working clock to the FPGA chip;

[0012] The memory module is connected to the FPGA chip and is used to exchange stored data with the FPGA.

[0013] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: The present invention employs a computing, communication and control module including an FPGA chip, an AD / DA module, an input / output interface module, a clock module and a memory module, which enables the computing, communication and control module to perform four-channel AD / DA signal processing and has rich interfaces to support various communication and control functions. This provides real-time high-speed data input for the optical computing module to adjust weights and enables data exchange between the optical computing module and the neural network, thereby solving the drawback that photonic artificial intelligence chips cannot independently realize the function of a complete neural network. Attached Figure Description

[0014] Figure 1 System diagram of FPGA-based optical computing, communication and control module;

[0015] Figure 2 Flowchart of FPGA-based optical computing, communication and control module; Detailed Implementation

[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Unless otherwise specifically stated, the relative arrangement of the components and steps described in these embodiments does not limit the scope of the present invention. To make the objectives, technical solutions, and advantages of the present invention more apparent, exemplary embodiments according to the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of the present invention, and not all of the embodiments of the present invention. It should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described herein, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0017] Compared to other processors, FPGAs offer advantages such as high computational parallelism, flexible design, and low power consumption. They also allow for targeted optimization of neural networks. Therefore, optical computing communication and control modules designed based on FPGA devices can fully leverage the advantages of FPGAs to achieve real-time, high-speed communication between the optical computing module and the neural network. The neural networks described in this invention include, but are not limited to, ResNet, VGG, or GoogleNet.

[0018] Reference Figure 1 The present invention provides an FPGA-based optical computing communication and control module, which is connected to the optical computing module and the neural network module to realize real-time high-speed communication between the optical computing module and the neural network module and to realize real-time weight updates of the optical computing module. The module includes: FPGA chip 10, AD / DA module 12, input / output interface module 11, clock module 13, and memory module 14.

[0019] The FPGA chip 10 receives the output information of the optical computing module according to the preset parallelism, performs preprocessing and transmits it to the neural network, and receives the weight modulation information output by the neural network and transmits this weight modulation information to the optical computing module, thereby realizing real-time high-speed communication between the optical computing unit and the neural network.

[0020] The AD / DA module 12 is connected to the FPGA chip, clock module and input / output interface module 11, and provides four-channel AD / DA signal conversion for digital-to-analog conversion between the optical computing module and the FPGA;

[0021] The input / output interface module 11 includes an input / output interface unit and a low-voltage differential signal interface unit. The input / output interface unit is connected to the FPGA chip and the AD / DA module, and is used to expand the interface of the FPGA chip, providing a high-speed PCIe 3.0 interface, a network port, and an SFP fiber optic interface. The low-voltage differential signal interface unit is connected to the FPGA chip and is used to provide a differential signal interface for users to evaluate the differential signal transmission of the FPGA chip. The input / output interface unit is a fourteen-pin dual-row connector with a preset spacing.

[0022] The clock module 13, connected to the FPGA chip module and the AD / DA module, provides a differential 200MHz clock source to supply the system clock for the FPGA. The differential output of the crystal oscillator is connected to the FPGA chip; this clock can be used to drive the operating clock of the DDR controller within the FPGA and other user logic circuits.

[0023] The memory module 14, connected to the FPGA chip, comprises four Micron 1GB DDR4 chips, model MT40A512M16LY-062EIT. The four DDR4 SDRAM chips form a 64-bit bus width. The four DDR4 memory chips are directly connected to the FPGA chip's interface.

[0024] The implementation process of this invention is as follows: Figure 2 As shown, the procedure is as follows:

[0025] Step 11: The analog electrical signal output by the optical computing module is used as a signal input and transmitted to the AD / DA module 12 through the input / output interface module 11 for analog-to-digital conversion.

[0026] Step 12: The digital electrical signal converted by the AD / DA module 12 is transmitted to the FPGA chip 10. The FPGA chip 10 preprocesses the signal and stores it in the memory module 14.

[0027] Step 13: The FPGA chip 10 transmits the preprocessed signal from step 12 to the neural network module 15 via the input / output interface module 11.

[0028] Step 14: The neural network module 15 transmits the network input and weight information to the FPGA chip 10 through the input / output interface module 11.

[0029] Step 15: The FPGA chip 10 transmits the network input and weight information to the AD / DA module 12. After digital-to-analog conversion, the weight information is transmitted to the optical computing module through the output-input interface module 11, thereby realizing high-speed weight updates.

[0030] The FPGA-based optical computing communication and control module of the present invention also includes a debugging module, which is connected to the FPGA chip 10 and is used to control the mode switching and debugging result display of the FPGA chip 10 during debugging.

[0031] The debugging module in this embodiment of the invention includes, but is not limited to, debugging buttons, debugging switches, and debugging LEDs. The debugging buttons and switches allow manual control of program jumps in the FPGA chip 10, while the debugging LEDs display the debugging results for user convenience.

[0032] In this embodiment of the invention, a sliding switch or a key switch is used as the implementation structure of the debugging module, which allows users to manually control program jumps during the FPGA chip development and testing process through buttons and switches. The operation is simple, fast and diverse.

[0033] This invention is not limited to the embodiments described above. The above description of specific embodiments is intended to illustrate and explain the technical solutions of this invention. The specific embodiments described above are merely illustrative and not restrictive. Without departing from the spirit and scope of the claims, those skilled in the art can make many specific modifications based on the teachings of this invention, and these modifications all fall within the scope of protection of this invention.

Claims

1. An FPGA-based optical computing, communication, and control system, characterized in that: The FPGA chip is used to process the input signal according to the preset parallelism and complete the real-time high-speed communication between the optical computing module and the neural network. The AD / DA module is connected to the FPGA chip, clock module, and input / output interface module, providing four-channel AD / DA conversion for digital-to-analog and analog-to-digital conversion between the optical computing module and the FPGA. The input / output interface module is connected to the FPGA chip and the AD / DA module, and is used to expand the interface of the FPGA chip, providing a high-speed PCIe 3.0 interface, a network port and an SFP fiber optic interface; A clock module, connected to the FPGA chip module and the AD / DA module, is used to provide a working clock for the FPGA chip; A memory module, connected to the FPGA chip, is used to exchange stored data with the FPGA; The FPGA chip implements the following functions: according to the preset parallelism, it receives the output information of the optical computing module, performs preprocessing and transmits it to the neural network, and receives the weight modulation information output by the neural network and transmits this weight modulation information to the optical computing module, so as to realize real-time high-speed communication between the optical computing module and the neural network.

2. The optical computing, communication, and control system according to claim 1, characterized in that, The AD / DA module includes: The high-speed AD chip provides four channels of AD conversion, which is used to convert the analog electrical signals output by the optical computing module into digital electrical signals for data input to the FPGA; The high-speed DA chip provides four-channel DA conversion to convert the digital electrical signals output by the FPGA into analog electrical signals for data input to the optical computing module.

3. The optical computing, communication, and control system according to claim 1, characterized in that, The input / output interface module includes: The input / output interface unit is connected to the FPGA chip and is used to provide an expansion interface to the FPGA chip, providing a high-speed PCIe 3.0 interface, a network port, and an SFP fiber optic interface; The low-voltage differential signal interface unit is connected to the FPGA chip and is used to provide a differential signal interface for users to evaluate the differential signal transmission of the FPGA chip.

4. The optical computing, communication, and control system according to claim 3, characterized in that, The input / output interface unit is a fourteen-pin double-row connector with a preset spacing.

5. The optical computing, communication, and control system according to claim 1, characterized in that, The clock module provides a differential 200MHz clock source to provide the system clock for the FPGA. The differential output of the crystal oscillator is connected to the FPGA chip. This clock can be used to drive the operating clock of the DDR controller in the FPGA and other user logic circuits.

6. The optical computing, communication, and control system according to claim 1, characterized in that, The memory module includes: four Micron 1GB DDR4 chips, model MT40A512M16LY-062EIT; four DDR4 SDRAM chips forming a 64-bit bus width; and the four DDR4 storage systems are directly connected to the interface of the FPGA chip.

7. The optical computing, communication, and control system according to any one of claims 1 to 6, characterized in that, The optical computing communication and control module further includes a debugging module, which is connected to the FPGA chip and is used to control the mode switching and debugging result display during FPGA chip debugging.

8. The optical computing, communication, and control system according to claim 7, characterized in that, The optical computing, communication and control module controls the optical computing module to complete high-speed computation of the neural network on the photonic chip.

9. The optical computing, communication, and control system according to claim 8, characterized in that, The neural networks include, but are not limited to, ResNet, VGG, or GoogleNet.

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