An electronic device

Abstract

The present application discloses an electronic device belonging to the field of communication technology. The electronic device comprises: a processor, a radio frequency circuit, and a storage circuit; the storage circuit comprises a memory and a transmission path, the memory being connected to the processor via the transmission path; the radio frequency circuit comprises an antenna and a radio frequency chip, the antenna being connected to the processor via the radio frequency chip, and the distance between the antenna and the memory being less than a first threshold; wherein, when the antenna's transmission power is less than a first preset power, the signal transmitted between the processor and the memory is a first signal; when the antenna's transmission power is greater than the first preset power, the signal transmitted between the processor and the memory is a second signal, the high-level voltage of the second signal being higher than the high-level voltage of the first signal.

Description

Technical Field

[0001] The present application belongs to the field of communication technology, and specifically relates to an electronic device. Background Art

[0002] To meet user needs, the distance between the antenna in smart terminals and the DDR (Double Data Rate) memory on the motherboard is constantly decreasing. As a result, when the antenna transmits a signal of a certain power, it is easy for the antenna to interfere with the communication between the DDR memory and the CPU (central processing unit). In severe cases, it may even cause the terminal to crash.

[0003] Currently, in order to solve the above problems, the existing technology adds grounding foam or springs to the mainboard on the one hand; on the other hand, it sacrifices the performance of the antenna in exchange for reducing interference with the above communication.

[0004] There are at least the following problems in the existing technology: adding grounding foam or shrapnel will still cause interference, and ultimately result in a solution that sacrifices antenna performance, which leads to a decrease in antenna performance and affects the user experience. Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide an electronic device that can solve the problem in the prior art of sacrificing antenna performance to reduce communication interference between the CPU and the DDR memory.

[0006] In a first aspect, an embodiment of the present application provides an electronic device, including:

[0007] Processor, radio frequency circuit and storage circuit;

[0008] The storage circuit includes a memory and a transmission path, the memory is connected to the processor via the transmission path; the radio frequency circuit includes an antenna and a radio frequency chip, the antenna is connected to the processor via the radio frequency chip, and the distance between the antenna and the memory is less than a first threshold;

[0009] In which, when the transmission power of the antenna is less than the first preset power, the signal transmitted between the processor and the memory is a first signal; when the transmission power of the antenna is greater than the first preset power, the signal transmitted between the processor and the memory is a second signal, and the high-level voltage of the second signal is higher than the high-level voltage of the first signal.

[0010] In an embodiment of the present application, the processor of the electronic device first obtains the power of the radio frequency signal, and then the processor determines whether the power of the radio frequency signal is greater than a first preset power. If it is not greater than, the processor may not adopt an anti-interference strategy and use the first signal to communicate between the processor and the storage circuit; if it is greater than, the processor will adopt an anti-interference strategy, that is, increase the high-level voltage value of the second signal between the processor and the storage circuit, so that the high-level voltage of the second signal is higher than the high-level voltage of the first signal, so that when the processor and the storage circuit identify the high level of the communication signal, it is not easy to confuse it with the radio frequency signal, thereby avoiding misjudgment and preventing communication from being interfered with by the radio frequency signal. This can avoid the problem of the processor making misjudgments due to the high level being close to the radio frequency signal, avoid the interference of the radio frequency signal on the communication between the processor and the storage circuit, and do not sacrifice the performance of the radio frequency circuit, thereby improving the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a circuit diagram of an electronic device according to an embodiment of the present application;

[0012] Figure 2 This is a schematic diagram of high-level processing of a communication signal according to an embodiment of the present application;

[0013] Figure 3 This is a flowchart of a method for preventing radio frequency signal interference according to an embodiment of the present application;

[0014] Figure 4 This is a flowchart of another method for preventing radio frequency signal interference according to an embodiment of the present application;

[0015] Figure 5 This is a flowchart of another method for preventing radio frequency signal interference according to an embodiment of the present application;

[0016] Figure 6 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application;

[0017] Figure 7 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0018] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0019] Figure 1This is a circuit diagram of an electronic device of an embodiment of the present application, including: a processor 10, a radio frequency circuit 20 and a storage circuit 30; the storage circuit 30 includes a memory 31 and a transmission path 32, and the memory 31 is connected to the processor 10 through the transmission path 32; the radio frequency circuit 20 includes an antenna and a radio frequency chip, the antenna is connected to the processor through the radio frequency chip, and the distance between the antenna and the memory 31 is less than a first threshold; wherein, when the transmission power of the antenna is less than the first preset power, the signal transmitted between the processor 10 and the memory 31 is a first signal; when the transmission power of the antenna is greater than the first preset power, the signal transmitted between the processor 10 and the memory 31 is a second signal, and the high-level voltage of the second signal is higher than the high-level voltage of the first signal.

[0020] For example, the embodiments of the present application are based on Figure 1 An electronic device provides a method for preventing radio frequency signal interference. The method can be applied to a processor 10 in the electronic device, and the processor 10 can be a processor of a mobile phone, tablet computer, laptop computer or other device.

[0021] The processor first obtains the power of the radio frequency signal transmitted by the radio frequency circuit, and then the processor can determine whether to execute the anti-interference strategy based on the power.

[0022] Specifically, when the processor 10 determines that the power of the RF signal is less than the first preset power, it can be considered that even if the distance between the antenna and the memory 10 is less than the first threshold, the RF signal emitted by the RF circuit 20 will not interfere with the communication between the processor 10 and the storage circuit 30, and the processor does not need to execute the anti-interference strategy. In this case, the signal transmitted between the processor 10 and the memory 31 is the first signal, and the first signal is transmitted on the transmission path 32.

[0023] When the processor 10 determines that the power of the RF signal is greater than or equal to the first preset power, it can be considered that because the distance between the antenna and the memory 10 is less than the first threshold, the RF signal at this time will interfere with the communication between the processor 10 and the storage circuit 30. The processor 10 needs to implement an anti-interference strategy to prevent interference with the above communication. The processor 10 can set a voltage value and use this voltage value as the high-level voltage value of the second signal for communication between the processor 10 and the storage circuit 30. This voltage value is higher than the high-level voltage value of the first signal. Then, the processor 10 and the storage circuit 30 communicate according to the second signal with the increased high-level voltage value, and the second signal is transmitted on the transmission path 32. In this way, the difference between the high-level voltage value of the second signal and the RF signal voltage is large, so that the waveforms presented by the second signal and the RF signal are significantly different. The processor 10 and the storage circuit 30 can distinguish the second signal from the RF signal based on this difference, thereby accurately identifying and separating the second signal, greatly reducing the interference of the second signal with the RF signal.

[0024] It should be noted that in an embodiment of the present application, it is possible to first determine through testing which antennas of the RF circuit will interfere with the communication between the processor and the storage circuit, or which antennas cause greater interference. Then, the processor can only obtain the power of the RF signals transmitted by these antennas to determine whether it is necessary to execute an anti-interference strategy, thereby reducing energy consumption to a certain extent.

[0025] To more clearly illustrate the anti-interference strategy of this application, please refer to Figure 2 , Figure 2 This is a schematic diagram of high-level processing of communication signals in an embodiment of the present application.

[0026] Take the processor receiving the signal as an example, refer to Figure 2 State (a) shows the high and low level waveforms of the normal first signal. Further referring to state (b), when the normal first signal is mixed with the radio frequency signal, the high level of the first signal is close to the radio frequency signal, and it is difficult for the processor to distinguish the first signal and the radio frequency signal in the received signal, so that the radio frequency signal interferes with the signal processing of the processor; referring to state (c), when the processor increases the high level voltage value of the communication signal to obtain the second signal, the high level of the second signal can be clearly distinguished from the radio frequency signal, so that the processor can accurately identify the second signal and will not be interfered by the radio frequency signal.

[0027] Thus, in an embodiment of the present application, the processor of the electronic device will first obtain the power of the radio frequency signal, and then the processor will determine whether the power of the radio frequency signal is greater than a first preset power. If it is not greater than, the processor may not adopt an anti-interference strategy and use the first signal to communicate between the processor and the storage circuit; if it is greater than, the processor will adopt an anti-interference strategy, that is, to increase the high-level voltage value of the second signal between the processor and the storage circuit, so that the high-level voltage of the second signal is higher than the high-level voltage of the first signal, so that when the processor and the storage circuit identify the high level of the communication signal, it is not easy to confuse it with the radio frequency signal, thereby avoiding misjudgment and thus preventing communication from being interfered with by the radio frequency signal. In this way, the problem of misjudgment by the processor due to the high level being close to the radio frequency signal is avoided, and the interference of the radio frequency signal on the communication between the processor and the storage circuit is avoided without sacrificing the performance of the radio frequency circuit, thereby improving the user experience.

[0028] Optionally, refer to Figure 1 , the transmission path 32 includes a bypass branch 321, a filter branch 322 and a switch 323;

[0029] The bypass branch 321 and the filter branch 322 are arranged in parallel and are respectively connected to the switching switch 323. When the transmission power of the antenna is less than or equal to the second preset power, the processor 10 and the memory 31 communicate through the bypass branch 321, wherein the second preset power is greater than the first preset power; the switching switch 323 is respectively connected to the processor 10 and the memory 31. The switching switch 323 is used to switch to the filtering branch 322 when the transmission power of the antenna is greater than the second preset power, so that the processor 10 and the memory 31 communicate through the filtering branch 322.

[0030] In an embodiment of the present application, when the transmission power of the antenna is less than or equal to the second preset power (the second preset power is greater than the first preset power), it can be considered that the interference of the antenna's radio frequency signal on the communication signal between the processor and the memory can be solved by increasing the second signal with a high-level voltage. The processor 10 can communicate with the storage circuit 31 through the bypass branch 321. The bypass branch 321 does not process the transmitted signal. The receiving end can distinguish between the second signal and the radio frequency signal through the waveforms with large differences between the two, and easily filter out the radio frequency signal in the second signal.

[0031] Optional, see Figure 1 The filtering branch 322 includes a filter 3221; both ends of the filter 3221 are respectively connected to the switch 323, and the filter 3221 is used to filter out the radio frequency signal mixed in the second signal.

[0032] In an embodiment of the present application, when the transmission power of the antenna is greater than the second preset power (the second preset power is greater than the first preset power), it can be considered that the interference of the antenna's RF signal on the communication signal between the processor and the memory cannot be perfectly solved by increasing the second signal with a high-level voltage. In this case, the switching switch can be switched to the filtering branch to communicate between the processor 10 and the storage circuit 30. The RF signal mixed in the second signal can be filtered by the filter of the filtering branch on the basis of distinguishing the difference between the two waveforms, and the RF signal therein can be further filtered out to obtain a filtered signal, thereby more effectively avoiding the interference of the RF signal.

[0033] Therefore, in an embodiment of the present application, after increasing the high-level voltage value of the communication signal to obtain the second signal, if the transmission power of the antenna is less than or equal to the second preset power, the processor can first communicate with the storage circuit through the bypass branch. On this basis, when the power of the RF signal transmitted by the RF circuit increases to greater than the second preset power, its amplitude also increases, and then the voltage value increases, thus approaching the high-level voltage value of the second signal. This will make it difficult for the processor and the storage circuit to identify the high level of the second signal. In this case, the processor can further abandon communicating with the storage circuit through the bypass branch and instead communicate with the storage circuit through the filtering branch, thereby filtering out the RF signal in the second signal through the filtering branch to achieve an anti-interference effect.

[0034] Figure 3 This is a flowchart of the steps of a method for preventing radio frequency signal interference in an embodiment of the present application.

[0035] Exemplarily, when the storage circuit and the antenna work simultaneously, the processor will first determine whether the power of the RF signal is greater than a first preset power. If not, no measures need to be taken. When it is greater, the processor starts the first anti-interference strategy, that is, increasing the high-level voltage value of the communication signal to obtain a second signal. At the same time, the processor monitors in real time whether the communication between it and the storage circuit is normal. When an abnormality occurs, it means that the power of the RF signal has increased. The processor further controls the storage circuit to turn on the filter of the filter branch, and communicates with the storage circuit through the filter branch to filter out the RF signal, and adjusts the filter gear in real time according to the power of the RF signal to avoid unnecessary energy consumption.

[0036] Optional, see Figure 1 The transmission path 32 also includes: an isolation plate 324; the isolation plate 324 is arranged between the bypass branch 321 and the filter branch 322, and is connected to the processor 10. The isolation plate 324 is used to prevent the RF signal of the filter branch 322 from entering the bypass branch 321 after power is turned on.

[0037] In an embodiment of the present invention, an isolation plate 324 can be provided between the filter branch 322 and the bypass branch 321. After receiving the voltage signal sent by the processor, the isolation plate 324 can increase its own impedance to form a signal isolation barrier. In this way, when the processor 10 and the storage circuit 30 communicate through the filter branch 322, the isolation plate 324 can prevent the radio frequency signal generated in the filter branch 322 from entering the bypass branch 321, thereby further reducing the interference of the radio frequency signal.

[0038] It should be noted that when the processor detects that the RF circuit is not transmitting an RF signal, that is, the antenna of the RF circuit is not working, the processor does not need to adopt an anti-interference strategy. The processor can communicate with the storage circuit through a bypass branch, and the communication signal is the first signal.

[0039] Figure 4 This is a flowchart of another method for preventing radio frequency signal interference according to an embodiment of the present application.

[0040] Exemplarily, when the processor detects that the antenna of the RF circuit does not transmit a RF signal, that is, the antenna of the RF circuit is not working, the processor does not need to adopt an anti-interference strategy and communicates with the storage circuit through the bypass branch.

[0041] Figure 5 This is a flowchart of another method for preventing radio frequency signal interference according to an embodiment of the present application.

[0042] Exemplarily, when the processor detects that the antenna of the RF circuit does not transmit a RF signal, that is, the antenna of the RF circuit is not working, the processor does not need to adopt an anti-interference strategy and communicates with the storage circuit through the bypass branch.

[0043] For example, in an embodiment of the present application, when the antenna of the RF circuit is working normally, the processor can first determine whether it is currently communicating with the storage circuit. If not, the storage circuit can be connected to the ground terminal so that the RF signal reaching the storage circuit can be introduced into the ground terminal, thereby not affecting the storage circuit.

[0044] Optional, see Figure 1The switching switch 323 includes: a first switching switch 3231 and a second switching switch 3232; the common end of the first switching switch 3231 is connected to the processor 10, the normally closed end of the first switching switch 3231 is connected to the bypass branch 321, and the normally open end of the first switching switch 3231 is connected to the filter branch 322; the common end of the second switching switch 3232 is connected to the memory 31, the normally closed end of the second switching switch 3232 is connected to the bypass branch 321, and the normally open end of the second switching switch 3232 is connected to the filter branch 322; the first switching switch 3231 and the second switching switch 3232 are used to switch to the normally open end of the first switching switch 3231 and the normally open end of the second switching switch 3232 when the transmission power of the antenna is greater than the second preset power.

[0045] Specifically, when communication between the processor 10 and the storage circuit 30 is required through the bypass branch 321, the paddle at the common end in the first switching switch 3231 will be connected to the normally closed end, and the paddle at the common end in the second switching switch 3232 will be connected to the normally closed end, so that the processor 10 and the storage circuit 30 are connected through the bypass branch 321, and the processor 10 and the storage circuit 30 can communicate through the bypass branch 321; when communication between the processor 10 and the storage circuit 30 is required through the filter branch 322, the paddle at the common end in the first switching switch 3231 will be connected to the normally open end, and the paddle at the common end in the second switching switch 3232 will be connected to the normally open end, so that the processor 10 and the storage circuit 30 are connected through the filter branch 322, and the processor 10 and the storage circuit 30 can communicate through the filter branch 322. By setting the first switching switch 3231 and the second switching switch 3232, when it is necessary to execute the anti-interference strategy, the filter branch 322 is switched to filter the radio frequency signal to prevent interference, and when the function of the filter branch 322 is not needed, it is switched to the bypass branch 321 for use, thereby reducing energy consumption.

[0046] Optionally, refer to Figure 1 The switch 323 further includes a ground path 3234 and a third switch 3233; the common end of the third switch 3233 is connected to the memory 31, the normally closed end of the third switch 3233 is connected to the second switch 3232, and the normally open end of the third switch 3233 is connected to the ground path 3234. The third switch 3233 is configured to switch to the normally open end of the third switch 3233 when no communication is taking place between the processor 10 and the memory 31; the other end of the ground path 3234 connected to the third switch 3233 is grounded, and the ground path 3234 is configured to direct radio frequency signals that interfere with the storage circuit 30 to the ground end. Optionally, the ground path includes a grounding resistor; the input end of the grounding resistor is connected to the normally open end of the third switch, and the output end of the grounding resistor is grounded.

[0047] Specifically, when communication is required between the processor 10 and the storage circuit 30, the paddle at the common end of the third switching switch 3233 will be connected to the normally closed end, so that the processor 10 and the storage circuit 30 are connected and can communicate; when there is no communication between the processor 10 and the storage circuit 30, the paddle at the common end of the third switching switch 3233 can be connected to the normally open end, so that the storage circuit 30 is connected to the grounding resistor 3234, and the radio frequency signal reaching the storage circuit 30 can be introduced into the grounding end via the grounding resistor, thereby avoiding interference of the radio frequency signal to the storage circuit.

[0048] Optionally, the electronic device also includes: a directional coupler 21; the directional coupler 21 is arranged at the transmitting end of the antenna and is connected to the RF circuit 20, and the directional coupler 21 is used to obtain the transmitting power of the antenna of the RF circuit and send the transmitting power of the antenna to the RF circuit 20, so that the RF circuit 20 sends the transmitting power of the antenna to the processor 10.

[0049] Specifically, the transmitting end of the RF signal is provided with a directional coupler 21, which can obtain the power of the RF signal transmitted by the antenna of the RF circuit 10 in real time, and send the obtained power information to the RF circuit 20, and then the RF circuit 20 sends the above-mentioned obtained power information to the processor 10, so that the processor 10 can judge the power size of the RF signal in real time and then take corresponding response strategies.

[0050] Optionally, refer to Figure 1 , the storage circuit 12 is provided with a plurality of transmission paths 32 ( Figure 1 A plurality of transmission paths 32 are arranged in parallel with each other and are connected to the processor 10 and the memory 31 respectively.

[0051] Specifically, in an embodiment of the present application, in the storage circuit 30, multiple transmission paths 32 (one transmission path includes at least one bypass branch and one filtering branch) can be set between the memory 31 and the processor 10. In this way, while achieving the anti-interference effect, multi-threaded interactive communication can be carried out simultaneously between the processor 10 and the storage circuit 30, thereby improving the communication efficiency between the processor 10 and the storage circuit 30.

[0052] Optionally, the electronic device further includes a circuit board, and the processor 10, the memory 31 and the antenna are arranged on the circuit board, and the memory and the antenna are arranged adjacent to each other.

[0053] In summary, in the embodiment of the present application, when the storage circuit is working normally, the processor can first determine whether the antenna of the RF circuit is working, that is, whether the RF circuit is transmitting a RF signal. When the antenna is not working, the processor can communicate with the storage circuit through the bypass branch; when the processor detects that the antenna is working, the processor can further determine whether it is communicating with the storage circuit. When no communication is taking place, the storage circuit can be connected to the ground terminal, thereby introducing the RF signal that interferes with the storage circuit into the ground terminal; when the processor and the storage circuit are communicating, the processor can obtain the power of the RF signal obtained by the directional coupler through the RF circuit. When the power does not exceed the preset power, the processor continues to communicate with the storage circuit through the bypass branch; and when the above When the power is greater than the preset power, the processor can increase the high-level voltage value of the communication signal between the processor and the storage circuit so that it can be distinguished from the radio frequency signal. Then, the processor communicates with the storage circuit according to the second signal with the increased high-level voltage value. At this time, the processor can still communicate with the storage circuit through the bypass branch. When the power of the radio frequency signal increases, the voltage value of the radio frequency signal is close to the high-level voltage value of the communication signal, making it difficult for the processor and the storage circuit to be distinguished. In this case, the processor can abandon communicating with the storage circuit through the bypass branch and instead communicate with the storage circuit through the filter branch. The filter branch can filter the communication signal and filter out the radio frequency signal therein, thereby preventing the radio frequency signal from reaching the processor 10 or the storage circuit and causing interference. In the above process, by increasing the high-level voltage value of the communication signal or further using the filter branch for communication, it is possible to effectively avoid the radio frequency signal from interfering with the communication between the processor and the storage circuit without sacrificing the antenna performance of the radio frequency circuit, thereby improving the user experience.

[0054] The anti-radio frequency signal interference device in the embodiment of the present application can be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other device other than a terminal. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile Internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc. It can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM or a self-service machine, etc., and the embodiment of the present application does not specifically limit it.

[0055] Alternatively, as Figure 6 As shown, an embodiment of the present application also provides an electronic device 300, including a processor 301 and a memory 302, wherein the memory 302 stores a program or instruction that can be run on the processor 301, and when the program or instruction is executed by the processor 301, the various steps of the above embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0056] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0057] Figure 7 A schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.

[0058] The electronic device 2000 includes but is not limited to components such as a radio frequency unit 2001 , a network circuit 2002 , an audio output unit 2003 , an input unit 2004 , a sensor 2005 , a display unit 2006 , a user input unit 2007 , an interface unit 2008 , a memory 2009 , and a processor 2010 .

[0059] Those skilled in the art will understand that the electronic device 2000 may also include a power source (such as a battery) to supply power to each component, and the power source may be logically connected to the processor 2010 through a power management system, thereby implementing functions such as charging, discharging, and power consumption management through the power management system. Figure 7The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be repeated here.

[0060] It should be understood that in an embodiment of the present application, the input unit 2004 may include a graphics processing unit (GPU) 20041 and a microphone 20042, and the graphics processing unit 20041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 2006 may include a display panel 20061, and the display panel 20061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 2007 includes a touch panel 20071 and at least one of the other input devices 20072. The touch panel 20071 is also called a touch screen. The touch panel 20071 may include two parts: a touch detection device and a touch controller. Other input devices 20072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and an operating stick, which will not be repeated here.

[0061] The memory 2009 can be used to store software programs and various data. The memory 2009 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 2009 may include a volatile memory or a non-volatile memory, or the memory 2009 may include both volatile and non-volatile memory. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DRRAM). The memory 2009 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0062] Processor 2010 may include one or more processing units. Optionally, processor 2010 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 2010.

[0063] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0064] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0065] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above embodiments and achieve the same technical effects. To avoid repetition, they will not be described here.

[0066] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0067] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above embodiments and can achieve the same technical effects. To avoid repetition, it will not be repeated here.

[0068] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0069] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0070] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. An electronic device, characterized in that: Including processor, radio frequency circuit and storage circuit; The storage circuit includes a memory and a transmission path, the memory is connected to the processor via the transmission path; the radio frequency circuit includes an antenna and a radio frequency chip, the antenna is connected to the processor via the radio frequency chip, and the distance between the antenna and the memory is less than a first threshold; In which, when the transmission power of the antenna is less than the first preset power, the signal transmitted between the processor and the memory is a first signal; when the transmission power of the antenna is greater than the first preset power, the signal transmitted between the processor and the memory is a second signal, and the high-level voltage of the second signal is higher than the high-level voltage of the first signal.

2. The electronic device according to claim 1, wherein The transmission path includes a bypass branch, a filter branch and a switch; The bypass branch and the filter branch are arranged in parallel and are respectively connected to the switch, and when the transmission power of the antenna is less than or equal to a second preset power, the processor and the memory communicate through the bypass branch, wherein the second preset power is greater than the first preset power; The switching switch is connected to the processor and the memory respectively, and is used to switch to the filtering branch when the transmission power of the antenna is greater than the second preset power, so that the processor and the memory communicate through the filtering branch.

3. The electronic device according to claim 2, wherein: The filtering branch includes a filter; Two ends of the filter are respectively connected to the switch, and the filter is used to filter out the radio frequency signal mixed in the second signal.

4. The electronic device according to claim 2, wherein: The transmission path further includes: an isolation plate; The isolation board is arranged between the bypass branch and the filter branch and is connected to the processor. The isolation board is used to prevent the radio frequency signal of the filter branch from entering the bypass branch after power is turned on.

5. The electronic device according to claim 3, wherein: The switch includes: a first switch and a second switch; The common end of the first switch is connected to the processor, the normally closed end of the first switch is connected to the bypass branch, and the normally open end of the first switch is connected to the filter branch; The common terminal of the second switch is connected to the memory, the normally closed terminal of the second switch is connected to the bypass branch, and the normally open terminal of the second switch is connected to the filter branch; The first switch and the second switch are used to switch to the normally open end of the first switch and the normally open end of the second switch when the transmission power of the antenna is greater than the second preset power.

6. The electronic device according to claim 5, characterized in that The switch further includes: a ground path and a third switch; The common end of the third switch is connected to the memory, the normally closed end of the third switch is connected to the second switch, and the normally open end of the third switch is connected to the ground path. The third switch is configured to switch to the normally open end of the third switch when no communication is performed between the processor and the memory. The other end of the ground path connected to the third switch is grounded, and the ground path is used to guide the radio frequency signal that interferes with the storage circuit into the ground end.

7. The electronic device according to claim 6, wherein: The grounding path includes a grounding resistor; An input end of the grounding resistor is connected to a normally-open end of the third switch, and an output end of the grounding resistor is grounded.

8. The electronic device according to claim 1, wherein: Also includes: Directional coupler; The directional coupler is arranged at the transmitting end of the antenna and is connected to the radio frequency circuit. The directional coupler is used to obtain the transmitting power of the antenna of the radio frequency circuit and send the transmitting power of the antenna to the radio frequency circuit, so that the radio frequency circuit sends the transmitting power of the antenna to the processor.

9. The electronic device according to claim 1, wherein: A plurality of transmission paths are provided in the storage circuit; The plurality of transmission paths are arranged in parallel with each other and are connected to the processor and the memory respectively.

10. The electronic device according to claim 1, wherein It also includes a circuit board, on which the processor, the memory and the antenna are arranged, and the memory and the antenna are arranged adjacent to each other.

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