Optical proximity correction method of layout, storage medium

Abstract

This invention discloses an optical proximity correction method and storage medium for a layout. The optical proximity correction method includes: establishing extended blocks corresponding to the initial blocks, wherein each extended block includes a core region smaller than the initial block and an inner buffer surrounding the core region; performing OPC iterative calculations on the extended blocks corresponding to the initial blocks according to the priority of the initial blocks; if the OPC iterative calculation has not reached its final iteration, averaging the vertex positions of the geometric figures within the overlapping calculation area of ​​two adjacent extended blocks before performing the next iteration; otherwise, averaging the vertex positions of the geometric figures within the overlapping calculation area of ​​two adjacent extended blocks, using the inner buffer as the boundary condition of the core region, and performing the final OPC iterative calculation only on the core region. This invention can achieve edge convergence of the blocks.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a method for processing OPC operations on a layout. Background Technology

[0002] To transfer a pattern from a photomask to the surface of a silicon wafer, the process typically involves an exposure step, a development step following the exposure step, and an etching step following the development step. In the exposure step, light passes through the light-transmitting areas of the photomask and shines onto the silicon wafer coated with photoresist, causing a chemical reaction in the photoresist. In the development step, the different solubility of the developer in the photoresist and the unphotoresisted photoresist creates a photolithographic pattern, transferring the pattern from the photomask to the photoresist. In the etching step, the silicon wafer is etched based on the photolithographic pattern formed by the photoresist layer, further transferring the pattern from the photomask onto the silicon wafer.

[0003] In semiconductor manufacturing, as design dimensions continue to shrink and approach the limits of photolithography imaging systems, the diffraction effect of light becomes increasingly pronounced, leading to optical image degradation of the final design pattern. The actual photolithographic pattern formed is severely distorted relative to the pattern on the mask, resulting in a difference between the actual pattern formed on the silicon wafer and the design pattern. This phenomenon is called the Optical Proximity Effect (OPE).

[0004] To correct the optical proximity effect, Optical Proximity Correction (OPC) was developed. The core idea of ​​OPC is to establish an OPC model based on the consideration of counteracting the optical proximity effect. The photomask pattern is designed according to this model. Although the lithographic pattern exhibits an optical proximity effect relative to the corresponding photomask pattern, this phenomenon is already considered when designing the photomask pattern based on the OPC model. Therefore, the lithographic pattern after photolithography is close to the target pattern actually desired by the user. Currently, mainstream technology nodes (65nm and below manufacturing processes) use model-based OPC correction. First, the Hopkins equation is used to optically simulate the photomask, obtaining the atmospheric light intensity distribution (aerial image). Then, a photoresist compaction model is used to transform the atmospheric light intensity distribution into the photoresist resist distribution (resist image). The photoresist pattern after resist removal can be directly obtained from the photoresist resist distribution.

[0005] Model-based OPC correction itself requires significant computational resources. In particular, advanced nodes often feature individual chip sizes on the centimeter scale with high pattern density (pitch <100nm). Performing model-based OPC correction on such chips necessitates distributed computing to reduce turnaround time (TAT) to an acceptable level. Current approaches involve dividing the entire layout into numerous 20-30 micrometer-sized blocks (e.g., ...). Figure 1 As shown). Figure 3 As shown, current OPC-based distributed processing leads to inconsistencies in the graphical representation of block edge regions. Figure 3 In this model, the central tile has a priority of 1. The central tile can only begin its OPC calculation after the OPC calculations of the surrounding tiles with a priority of 0 have finished. During the central tile's OPC calculation, the geometry of its eight neighboring tiles (two with priority 0, two with priority 3, and four with priority 2) remains unchanged and serves as the reference geometry (boundary condition) for the central tile. The edge geometry of the central tile is influenced by the eight adjacent tiles. When an adjacent tile, such as a tile with priority 3, begins its OPC calculation, its edge geometry is again influenced by the central tile. This repeated cycle makes it difficult for the edge geometry of the tiles to converge. Summary of the Invention

[0006] To address the technical problem of edge convergence failure during OPC correction processing in existing technologies, this invention proposes an optical proximity correction method and a storage medium for layouts.

[0007] The optical proximity correction method for a layout proposed in this invention includes:

[0008] The layout is divided into blocks to obtain initial blocks, and the priority of the initial blocks is defined;

[0009] Based on the initial block, an extended block corresponding to the initial block is established. The size of the extended block is larger than that of the initial block. The extended block includes a core area with a size smaller than that of the initial block, and an inner buffer zone surrounding the core area.

[0010] Based on the priority of the initial block, perform OPC iterative calculations on the extended blocks corresponding to the initial block;

[0011] When the OPC iterative operation has not reached the last round of iterative operation, after each round of OPC iterative operation is completed, the average value of the vertex positions of the geometric figures in the overlapping operation area of ​​two adjacent extended blocks is taken, and then the next round of iterative operation is performed.

[0012] When the OPC iterative operation is in its last iteration, the vertex positions of the geometric figures in the overlapping operation area of ​​two adjacent extended blocks are averaged, and the inner buffer is used as the boundary condition of the core area. The last OPC iterative operation is performed only on the core area.

[0013] Furthermore, the vertical distance from each boundary of the core area to the center of the initial block is equal.

[0014] Furthermore, the vertical distance from each boundary of the inner buffer zone to the center of the core zone is equal.

[0015] Furthermore, the width of the core area is WL, the width of the inner buffer is 2L, and W is the width of the initial block.

[0016] Furthermore, when the extended blocks perform iterative OPC operations, an outer buffer is set around the inner buffer of each extended block, and the extended block and the corresponding outer buffer are treated as a block for iterative OPC operations. The part of the inner buffer close to the outer buffer and the outer buffer are the overlapping operation areas of two adjacent extended blocks.

[0017] Furthermore, when defining the priority of the initial blocks, the priority of each block is different from the priority of the blocks around it.

[0018] Furthermore, the initial block has a total of 4 priority levels.

[0019] The present invention proposes a computer-readable storage medium for storing a computer program, which, when executed, performs the optical proximity correction method for the layout described in the above technical solution.

[0020] This invention expands the initial block in the prior art to form an expanded block. By performing OPC operations on the expanded block, the edges of the original initial block can also converge smoothly. The expanded block of this invention includes a core area and an inner buffer. The inner buffer is used to maintain the consistency of the boundary region graphics. When performing operations, an outer buffer is also set around the expanded block. The outer buffer can ensure the correctness of geometric operations in the inner buffer and core area. Attached Figure Description

[0021] The present invention will now be described in detail with reference to the embodiments and accompanying drawings, wherein:

[0022] Figure 1 This is a flowchart of an embodiment of the present invention.

[0023] Figure 2 This is a schematic diagram illustrating the generation of extended blocks according to an embodiment of the present invention.

[0024] Figure 3 This is a schematic diagram illustrating the generation of the extended block computation area according to an embodiment of the present invention. Detailed Implementation

[0025] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0026] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0027] like Figure 1 As shown, the optical proximity correction method for the layout of the present invention includes the following steps.

[0028] First, the layout is divided into blocks to obtain multiple initial blocks, and the priority of these initial blocks is defined;

[0029] Based on these initial blocks, corresponding extended blocks are created, that is, the size of the initial blocks is expanded to obtain extended blocks, and the size of the extended blocks is larger than that of the initial blocks. This transforms the initial blocks, which originally had no overlapping areas, into extended blocks that have overlapping areas.

[0030] like Figure 2 As shown, the extended block area is further divided so that the extended area includes a core area and an inner buffer. The size of the core area is smaller than the initial block, and the inner buffer is set around the core area. That is to say, the part of the inner buffer near the core area has no overlapping area with the adjacent extended block, while the part of the inner buffer near the edge has an overlapping area with the adjacent extended block.

[0031] Each extended region has the same priority as its corresponding initial block. Based on the priority of the initial block, the extended blocks corresponding to the initial block are subjected to iterative OPC operations.

[0032] After each extended block undergoes one OPC iteration, the vertex positions of the geometric figures within the extended block's computation area may change. Adjacent extended blocks may have overlapping computation areas. This invention refers to the overlapping portion of the computation areas of two adjacent extended blocks as the overlapping computation area. For example, extended block 1 and extended block 2 are adjacent extended blocks. After one OPC operation, the vertex position of a certain geometric figure within the computation area of ​​extended block 1 may change to 'a'. The same geometric figure also exists in the computation area of ​​extended block 2, and after one OPC operation, this geometric figure changes to 'b', resulting in inconsistent vertex positions for the same geometric figure. In this case, this invention uses (a+b) / 2 as the vertex position of the same geometric figure in extended block 1 and extended block 2. Furthermore, if four initial blocks are adjacent at their vertex positions, then for such vertices, after one OPC operation, there will be four possible computation results: a, b, c, and d. The average of these is (a+b+c+d) / 4.

[0033] When the OPC iterative operation has not reached the last round of iterative operation, after each round of OPC iterative operation is completed, the vertex positions of the geometric figures in the overlapping operation area of ​​two adjacent extended blocks are averaged according to the above method, and then the next round of iterative operation is performed.

[0034] When the OPC loop iteration operation is in its last iteration, the vertex positions of the geometry in the overlapping operation area of ​​two adjacent extended blocks are averaged. This average value is then fixed and no longer changes. The inner buffer of each extended block is used as the boundary condition of its core area. The last OPC loop iteration operation is performed only on the core area of ​​each extended block.

[0035] In each round of iterative computation of the present invention (except for the last round of iterative computation), all extended blocks are computed according to priority. Assuming there are 4 priority levels, the highest priority extended blocks are computed in parallel first. After all the highest priority extended blocks have been computed, the second highest priority extended blocks are computed in parallel, and so on, until the lowest priority extended blocks are processed in parallel.

[0036] In one embodiment, the vertical distance from each boundary of the core region to the center of the initial block is equal. That is, the core region is a square area located at the exact center of the initial block, which simplifies the computation. In other embodiments, the core region may not be located at the exact center, which correspondingly increases the computational complexity.

[0037] In one embodiment, the vertical distance from each boundary of the inner buffer to the center of the core region is equal. That is, the outer boundary of the inner buffer is also a square when viewed from its outer boundary, and its center coincides with the center of the initial block and the core region. This setting is also to simplify the calculation. In other embodiments, the outer boundary of the inner buffer may not be a square, and its center may not coincide with the center of the initial block.

[0038] In one embodiment, the width of the core area is WL, and the width of the inner buffer is 2L, where W is the width of the initial block. The size of L is typically 1-5 micrometers. The 2L width of the inner buffer is merely an example and is not intended to limit the scope of this invention. In other embodiments, it can also be set to 2L±n, as long as it is within a reasonable range, i.e., larger than the size of the initial block. The further outward its outer boundary expands, the more computational work is required; therefore, those skilled in the art can adjust it as needed.

[0039] The following describes the specific process of performing OPC iterative operations on the extended blocks. In each iteration, the extended blocks are not directly subjected to OPC operations. Instead, the edges of the extended blocks are made easier to converge. Figure 3 As shown, this invention sets an outer buffer around the inner buffer of each extended block. The outer buffer is set adjacent to the inner buffer, meaning that the extended block includes a core area, an inner buffer, and an outer buffer from the inside out. The extended block and its corresponding outer buffer are treated as a computation area for OPC iterative computation, so that the inner buffer and the outer buffer are overlapping computation areas of two adjacent extended blocks.

[0040] In one embodiment, the outer buffer is obtained by extending outward from the outer boundary of the inner buffer by an example d, where the size of d can be 1-5 micrometers. Then, the size of the computation area of ​​an extended block is W+L+d.

[0041] In one embodiment, the rule for defining the priority of the initial blocks is that the priority of each block is different from the priority of the blocks surrounding it. For example, if the priority of the initial block located at the center of a certain eight initial blocks (hereinafter referred to as the center block) is defined as 0, then the priorities of the eight initial blocks surrounding the center block are all not 0. Similarly, when any one of the eight initial blocks is used as the center block, its priority is also different from that of the initial blocks surrounding it.

[0042] In one embodiment, there are four priority levels, which can be represented by the numbers 0-3. For example, the initial block labeled 0 can be defined as having the highest priority, the initial block labeled 1 as having the second highest priority, the initial block labeled 2 as having the third highest priority, and the initial block labeled 3 as having the lowest priority.

[0043] The present invention provides a computer-readable storage medium for storing a computer program that, when executed, performs an optical proximity correction method for a layout of the above-described technical solution.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for optical proximity correction of a layout, characterized in that, include: The layout is divided into blocks to obtain initial blocks, and the priority of the initial blocks is defined so that the priority of each block is different from the priority of the blocks around it. Based on the initial block, an extended block corresponding to the initial block is established. The size of the extended block is larger than that of the initial block. The extended block includes a core area with a size smaller than that of the initial block, and an inner buffer zone surrounding the core area. Based on the priority of the initial block, the extended blocks corresponding to the initial block are subjected to OPC iterative calculation. When the extended blocks are subjected to OPC iterative calculation, an outer buffer is set around the inner buffer of each extended block. The extended block and the outer buffer corresponding to the extended block are treated as a block for OPC iterative calculation. The part of the inner buffer close to the outer buffer and the outer buffer are the overlapping calculation area of ​​two adjacent extended blocks. When the OPC iterative operation has not reached the last round of iterative operation, after each round of OPC iterative operation is completed, the average value of the vertex positions of the geometric figures in the overlapping operation area of ​​two adjacent extended blocks is taken, and then the next round of iterative operation is performed. When the OPC iterative operation is in its last iteration, the vertex positions of the geometric figures in the overlapping operation area of ​​two adjacent extended blocks are averaged, and the inner buffer is used as the boundary condition of the core area. The last OPC iterative operation is performed only on the core area.

2. The optical proximity correction method for a layout as described in claim 1, characterized in that, The vertical distance from each boundary of the core area to the center of the initial block is equal.

3. The optical proximity correction method for a layout as described in claim 2, characterized in that, The vertical distance from each boundary of the inner buffer zone to the center of the core zone is equal.

4. The optical proximity correction method for a layout as described in claim 3, characterized in that, The width of the core area is WL, the width of the inner buffer is 2L, and W is the width of the initial block.

5. The optical proximity correction method for a layout as described in claim 1, characterized in that, There are a total of 4 priority levels for the initial blocks.

6. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program is executed, it performs the optical proximity correction method for the layout as described in any one of claims 1 to 5.

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