Fault recovery method, computer device and readable storage medium

By using the interaction between the main control chip and the programmable logic gate in the motor controller of the new energy vehicle, the fault recovery method is designed, and the problem of too slow response and high error detection rate in hardware failure detection is solved, achieving faster and more accurate Failure protection improves the stability and user experience of the entire vehicle.

CN115755711BActive Publication Date: 2025-02-11ZHEJIANG LEAPPOWER TECH CO LTD +1
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Patent Information

Application Number
CN202211493531.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-11-25
Publication Date
2025-02-11
Estimated Expiration
2042-11-25

AI Technical Summary

Technical Problem

The prior art in hardware failure detection and protection of new energy vehicle motor controllers has too slow response and high error detection rate, resulting in irreversible damage or loss of power.

Method used

Through the interaction between the main control chip and the programmable logic gate, a fault recovery method is designed, fault-tolerant reset of hardware fault error detection is performed, and the authenticity of the fault is predicted, and false alarms are avoided.

Benefits of technology

It improves the timeliness of fault protection, reduces the loss of power of the vehicle caused by false alarm faults, and improves the stability of the vehicle operation and the user's car use comfort.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a fault recovery method, a computer device and a readable storage medium, which relates to the technical field of new energy vehicles, and is used for fault recovery of the electric drive assembly of new energy vehicles, including the following steps: MCU determines whether there is a fault that needs to maintain a protection action, whether the judgment time reaches an upper limit, and whether the number of recovery times reaches an upper limit; determines whether the fault is latched, if so, executes or maintains the corresponding protection action, sets the strategy action pin, starts the judgment time timing, and sends a clear instruction; if not, determines whether the strategy action pin is set, if not, ends the method, if yes, sends an exit protection instruction for feedforward compensation; determines whether the motor control state is restored to normal, if yes, the whole vehicle power is restored, if not, maintains the current state until it is restored to normal. The method provided by the present invention improves the timeliness of fault protection, performs fault-tolerant reset on hardware fault misdetection, predicts the authenticity of the fault, and avoids false alarm faults.
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Description

Technical Field

[0001] The present invention relates to the technical field of new energy vehicles, and in particular to a fault recovery method, a computer device and a readable storage medium. Background Art

[0002] With the popularization of charging piles and the strong support of national policies, the development of new energy vehicles is becoming increasingly rapid, the market continues to grow at a high speed, and technology continues to develop and innovate. More and more people choose new energy vehicles as their means of transportation, which can not only save energy and reduce emissions, but also save vehicle costs. Under such a development situation, the driving safety, stability, comfort and user satisfaction of new energy vehicles are increasingly receiving attention. The electric drive assembly is the core component of new energy vehicles and provides them with operating power. As the control unit of the electric drive assembly, the motor controller plays a major role in safety and stability. Fault detection and fault protection are important functions in terms of safety.

[0003] Timeliness is an important indicator in the fault protection of motor controllers. Under certain serious faults, slow protection may cause irreversible damage to the motor controller, while timely protection can effectively reduce the risk of motor controller damage. Programmable logic gate arrays are used in the design of hardware fault detection and protection due to their programmable and fast response characteristics. They can be used as an independent working device to design fault detection and protection logic and perform fault protection at a nanosecond response speed.

[0004] Hardware failure is a serious failure that affects the power and driving safety of the entire vehicle. Therefore, the logic design of its fault detection and protection needs to be timely and accurate, with a certain degree of compatibility. However, most of the existing technologies design hardware fault detection and protection logic in the controller main control chip, which cannot respond quickly due to the limitations of the main control chip execution cycle. At the same time, the existing technology mostly uses direct level judgment for hardware fault detection, and the vehicle will shut down when a fault occurs. This is too harsh and does not fully consider the situation of false detection of hardware faults. In addition, during driving, due to low voltage fluctuations, electromagnetic interference and other reasons, the hardware fault detection circuit may sometimes falsely detect a fault. Summary of the invention

[0005] To solve the above problems, the present invention provides a fault recovery method to improve the timeliness of fault protection; through the interaction between the main control chip and the programmable logic gate, fault-tolerant reset is performed on the false detection of hardware faults, the authenticity of the fault is predicted, and false fault reports are avoided.

[0006] In order to achieve the above object, the present invention adopts the following technical solution:

[0007] A fault recovery method is used to recover the fault of an electric drive assembly of a new energy vehicle, comprising the following steps:

[0008] The MCU determines whether there is a fault that requires maintaining the protection action. If so, the current protection action is maintained and the fault recovery method is terminated. If not, the next step is entered.

[0009] The MCU determines whether the judgment time reaches the upper limit and whether the number of recovery times reaches the upper limit. If one or both of them reach the upper limit, the fault recovery method is terminated. If both do not reach the upper limit, the next step is entered.

[0010] The MCU determines whether the programmable logic gate array has latched faults. If the fault is latched, the MCU sends a fault protection instruction to the programmable logic gate array. The programmable logic gate array executes or maintains the corresponding protection action in response to the fault protection instruction. At the same time, the strategy action pin of the MCU is set, the judgment time is started, and a fault clearing instruction is sent to the programmable logic gate array; if the fault is not latched, the next step is entered;

[0011] Determine whether the strategy action pin of the MCU is set, if not, end the operation of the fault recovery method, if it is set, the MCU sends an exit protection instruction to the programmable logic gate array, and performs feedforward compensation;

[0012] Determine whether the motor control state has returned to normal. If the motor control state has returned to normal, the power of the whole vehicle is restored, the number of recovery times is accumulated, the judgment time is cleared, and the strategy action pin is cleared. If the motor control state has not returned to normal, maintain the current motor control state until the motor control state returns to normal or the fault recovery method is terminated after the judgment time exceeds the upper limit.

[0013] The fault recovery method provided by the present invention can achieve rapid response fault protection and determine whether the hardware fault actually exists. When the hardware fault is determined to be a real fault, the fault protection action of the real fault is maintained; when the hardware fault is determined to be a false detection, the fault recovery method provided by the present application exits the fault protection of the programmable logic gate array and restores control, thereby reducing the power loss of the whole vehicle caused by the false alarm fault and improving the running stability of the whole vehicle.

[0014] Optionally, the fault recovery method runs in the interrupt cycle of the MCU along with the interrupt cycle.

[0015] The fault recovery method provided by the present invention runs along with the interrupt cycle of the MCU, that is, as long as the new energy vehicle is powered on and started, the fault recovery method will always run. Therefore, during the driving of the vehicle, the fault detection and recovery status is always maintained. Once a hardware failure or false alarm occurs, the controller can respond immediately and handle it quickly, ensuring safe and smooth driving.

[0016] Optionally, performing feedforward compensation includes the following steps:

[0017] The MCU determines whether it is currently in the motor control state recovery. If not, it obtains and records the torque slope command T_ref and the current loop output variables vd and vq in real time. If yes, it proceeds to the next step

[0018] After the motor control state returns to normal, turn off the power tube and clear all current loop control variables;

[0019] Turn on the power tube and feed the current loop feedforward values ​​vd_fwd and vq_fwd into the current loop output variable as the initial value of the current loop output to restore the current loop to the state before the fault.

[0020] Optionally, when the current loop feedforward values ​​vd_fwd and vq_fwd are fed into the current loop output variable as the initial value of the current loop output, the feedforward ratio is adjusted by the feedforward coefficient K.

[0021] The recovery method provided by the present invention uses a feedforward compensation control strategy after a false fault is reported and recovered, so that after the whole vehicle falsely reports a fault and recovers successfully, the power is quickly restored, the abnormal physical sensation of the whole vehicle is reduced, and the user's comfort in using the vehicle is improved.

[0022] Optionally, the programmable logic gate array is FPGA or CPLD.

[0023] In addition, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements any of the above-mentioned methods when executing the computer program.

[0024] At the same time, the present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, any of the above-mentioned methods is implemented.

[0025] These features and advantages of the present invention will be disclosed in detail in the following specific embodiments and drawings. The best embodiments or means of the present invention will be described in detail in conjunction with the drawings, but they are not intended to limit the technical solutions of the present invention. In addition, there are multiple features, elements, and components that appear in each of the following texts and drawings, and different symbols or numbers are marked for convenience, but they all represent components with the same or similar structures or functions. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The present invention will be further described below in conjunction with the accompanying drawings:

[0027] Figure 1 The figure is a flow chart of a fault recovery method in an embodiment of the present invention. DETAILED DESCRIPTION

[0028] The technical solutions of the embodiments of the present invention are explained and described below in conjunction with the drawings of the embodiments of the present invention, but the following embodiments are only preferred embodiments of the present invention, not all. Based on the embodiments in the implementation mode, other embodiments obtained by those skilled in the art without creative work are all within the protection scope of the present invention.

[0029] References in this specification to "one embodiment" or "an example" or "an example" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment itself may be included in at least one embodiment of the present patent disclosure. The appearance of the phrase "in one embodiment" in various places in the specification does not necessarily refer to the same embodiment.

[0030] Example:

[0031] like Figure 1 As shown, this embodiment provides a fault recovery method for performing fault recovery on the electric drive assembly of a new energy vehicle. This embodiment targets circuit faults in the controller of a new energy vehicle. The MCU of the vehicle has an interrupt cycle, so the fault recovery method provided in this embodiment runs with the interrupt cycle in the interrupt cycle of the MCU. In other words, as long as the new energy vehicle is powered on and started, the fault recovery method will always run. Therefore, during the driving of the vehicle, the fault detection and recovery state is always maintained. Once a hardware fault or a false alarm fault occurs, the controller can respond immediately and handle it quickly, ensuring safe and smooth driving.

[0032] The MCU interacts with the programmable logic gates through some IO pins. The fault recovery method includes the following steps:

[0033] The MCU determines whether there is a fault that needs to maintain the protection action. In this embodiment, the fault that needs to maintain the protection action refers to a collision fault, a drive undervoltage fault, a suspension fault, etc. If these faults exist and these faults are in fault protection, it is necessary to maintain the current protection action without entering the fault recovery method provided in this embodiment. Therefore, the current protection action is maintained and the fault recovery method is terminated. If it does not exist, enter the next step;

[0034] The MCU determines whether the judgment time has reached the upper limit and whether the number of recovery times has reached the upper limit. Set the upper limit of the judgment time. If the fault still exists after the timing reaches the time upper limit, it is determined that the fault is a real fault, so the fault protection action is maintained and the fault recovery method is terminated. Set the upper limit of the number of recovery times. After the number of recovery times reaches the upper limit, the relevant hardware fault is triggered again. It is determined that the environment is abnormal at this time and the protection is frequently mistakenly triggered. Therefore, the fault state is maintained to stop the operation of the whole vehicle and the fault recovery method is terminated. In this embodiment, the judgment time is preferably 20 milliseconds, and the number of recovery times is preferably 10 times. In other embodiments, the judgment time and the number of recovery times can be flexibly selected by technical personnel in this field according to actual conditions, and are not limited here. Recovery here refers only to power recovery, not fault recovery. If neither of them reaches the upper limit, proceed to the next step;

[0035] In this step, the MCU determines whether the programmable logic gate array has latched faults. The programmable logic gate array is an FPGA or a CPLD, which is not limited here. In this embodiment, CPLD is preferably used. If a latch fault occurs, the MCU sends a fault protection instruction to the CPLD, and the CPLD executes or maintains a corresponding protection action in response to the fault protection instruction. The CPLD has several pins, and fault signals of different types of faults are received by different pins; the CPLD determines the type of fault according to the pin receiving the signal, including overvoltage fault, overcurrent fault, and drive bridge fault, and executes a corresponding protection action according to the type of fault. The entire protection framework of the CPLD is based on a state machine, and the step-by-step processing of the fault is realized through state jumps. In this embodiment, the protection action performed by the CPLD is mainly a combination of the IGBT gate protection of the power device and the ASC protection. In other embodiments, other protection actions may also be used, which are not limited here.

[0036] After the first three steps are completed and the number of recovery times has not reached the upper limit, the judgment time has not reached the upper limit, there is no fault that needs to maintain the protection action, and the CPLD has latched the fault, the CPLD executes or maintains the corresponding protection action. At the same time, the MCU's policy action pin is set, the judgment time is started, and a fault clearing instruction is sent to the CPLD. If the fault is not recovered after the CPLD actively executes ASC protection once, ASC cannot be performed again. Therefore, if there is a fault that does not require exiting protection, the fault protection action should be maintained during the operation of the fault recovery method to avoid the failure of ASC protection when the fault is a real fault.

[0037] In this embodiment, setting is a common meaning in the art and will not be described here. Fault latching is to take the result after filtering and the fault state of the previous moment as the current fault state output, so as to achieve the purpose of fault latching. Fault latching includes two judgment conditions, which are divided into four combinations. The two judgment conditions are the result after filtering and the fault clearing instruction issued by the MCU, but there are only three output states in the end:

[0038] The fault clearing instruction is superimposed on the fault-free state, and the current fault state output is fault-free;

[0039] In the no-fault state, no fault clearing instruction is superimposed, and the current fault state output is the fault state of the previous moment;

[0040] There is a fault state, and the current fault state output is a fault state.

[0041] Before latching the fault, the fault signal needs to be filtered according to the following steps to filter out the false detection fault caused by the glitch signal. The filtering process is to determine whether the level of the current fault signal is a valid level. If not, the count is reset to zero and the level opposite to the current fault signal is output. If it is, determine whether the count is greater than the set value. If so, the same level as the current fault signal is output; if not, the count is increased by 1 and the level opposite to the current fault signal is output. In this embodiment, the set value is preferably 32 times. In other embodiments, the set value of the count can be flexibly selected by those skilled in the art according to actual conditions, and is not limited here.

[0042] If the CPLD does not latch the fault, go to the next step;

[0043] Determine whether the MCU's strategy action pin is set. If not, end the fault recovery method. If it is set, the MCU sends an exit protection instruction to the CPLD. At this time, the prerequisites for allowing recovery have been met, that is, there is no fault that does not require exit protection, the number of recovery times has not reached the upper limit, and the judgment time has not reached the upper limit. At this time, the MCU determines the authenticity of the fault latched by the CPLD and attempts to reset the fault. If the fault is successfully reset, it is a false alarm fault. The MCU runs protection exit and fault recovery, and performs feedforward compensation according to the following sub-steps to restore the power of the entire vehicle:

[0044] MCU determines whether it is currently in the recovery state of motor control. If not, it obtains and records the torque slope command T_ref and the current loop output variables vd and vq in real time. If yes, it proceeds to the next step.

[0045] After the motor control state returns to normal, turn off the power tube and clear all current loop control variables;

[0046] Turn on the power tube, and feed the current loop feedforward values ​​vd_fwd and vq_fwd into the current loop output variable as the initial value of the current loop output. Adjust the feedforward ratio through the feedforward coefficient K to restore the current loop to the state before the fault, shorten the transient process time, and avoid overshoot or transient overcurrent. Through feedforward compensation, use the feedforward compensation control strategy after the false alarm fault is restored, so that the power of the whole vehicle can be quickly restored after the false alarm fault is successfully restored, reduce the abnormal body feeling of the whole vehicle, and improve the user's comfort.

[0047] Because there is a forced shutdown time when the CPLD fault protection exits, this is not the control recovery time, so it is still in the fault judgment link. The judgment time continues to accumulate to judge whether the motor control state has returned to normal. If the motor control state has returned to normal, it is considered that the fault recovery method has been successfully executed, the power of the whole vehicle has been restored, the number of recovery times is accumulated, the judgment time is cleared, and the strategy action pin is cleared. The setting of clearing the number of recovery times, if the number of recovery times does not reach the upper limit of the count within a certain period of time, it is determined that the working conditions are not bad enough to cause the whole vehicle to stop, and the number of recovery times is cleared. The upper limit of the number of recovery times is reached only within a fixed time, and it is determined that the abnormality will not be restored. If the motor control state has not returned to normal, the current motor control state is maintained until the motor control state returns to normal or the fault recovery method is terminated after the judgment time exceeds the upper limit.

[0048] The fault recovery method provided by the present invention can achieve rapid response fault protection and determine whether the hardware fault actually exists. When the hardware fault is determined to be a real fault, the fault protection action of the real fault is maintained; when the hardware fault is determined to be a false detection, the fault recovery method provided by the present application exits the fault protection of the CPLD and restores control, thereby reducing the power loss of the whole vehicle caused by the false alarm fault and improving the running stability of the whole vehicle.

[0049] At the same time, the present embodiment provides a computer device, including a memory and a processor, a computer program is stored in the memory, and the processor implements the method in any of the above embodiments when executing the computer program. It can be understood by a person of ordinary skill in the art that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program. Accordingly, the computer program can be stored in a non-volatile computer-readable storage medium, and the computer program can implement the method of any of the above-mentioned embodiments when executed. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0050] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that the present invention includes but is not limited to the contents described in the drawings and the above specific embodiments. Any modification that does not deviate from the functional and structural principles of the present invention will be included in the scope of the claims.

Claims

1. A fault recovery method for performing fault recovery on an electric drive assembly of a new energy vehicle, characterized in that: The fault recovery method comprises the following steps: The MCU determines whether there is a fault that requires maintaining the protection action. If so, the current protection action is maintained and the fault recovery method is terminated. If not, the next step is entered. The MCU determines whether the judgment time reaches the upper limit and whether the number of recovery times reaches the upper limit. If one or both of them reach the upper limit, the fault recovery method is terminated. If both do not reach the upper limit, the next step is entered. The MCU determines whether the programmable logic gate array has latched faults. If the fault is latched, the MCU sends a fault protection instruction to the programmable logic gate array. The programmable logic gate array executes or maintains the corresponding protection action in response to the fault protection instruction. At the same time, the strategy action pin of the MCU is set, the judgment time is started, and a fault clearing instruction is sent to the programmable logic gate array; if the fault is not latched, the next step is entered; Determine whether the strategy action pin of the MCU is set, if not, end the operation of the fault recovery method, if it is set, the MCU sends an exit protection instruction to the programmable logic gate array, and performs feedforward compensation; Determine whether the motor control state has returned to normal. If the motor control state has returned to normal, the power of the whole vehicle is restored, the number of recovery times is accumulated, the judgment time is cleared, and the strategy action pin is cleared. If the motor control state has not returned to normal, maintain the current motor control state until the motor control state returns to normal or the fault recovery method is terminated after the judgment time exceeds the upper limit.

2. The fault recovery method according to claim 1, characterized in that: The fault recovery method runs along with the interruption cycle in the interruption cycle of the MCU.

3. The fault recovery method according to claim 1, characterized in that: The feedforward compensation includes the following steps: MCU determines whether it is currently in the recovery state of motor control. If not, it obtains and records the torque slope command T_ref and the current loop output variables vd and vq in real time. If yes, it proceeds to the next step. After the motor control state returns to normal, turn off the power tube and clear all current loop control variables; Turn on the power tube and feed the current loop feedforward values ​​vd_fwd and vq_fwd into the current loop output variable as the initial value of the current loop output to restore the current loop to the state before the fault.

4. The fault recovery method according to claim 3, characterized in that: When the current loop feedforward values ​​vd_fwd and vq_fwd are fed into the current loop output variable as the initial value of the current loop output, the feedforward ratio is adjusted by the feedforward coefficient K.

5. The fault recovery method according to any one of claims 1 to 4, characterized in that: The programmable logic gate array is FPGA or CPLD.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 5 is implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 5 is implemented.

Citation Information

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