Graphene short channel preparation method based on lateral etching and high-speed photoelectric detector

Abstract

The application discloses a graphene short channel preparation method based on lateral etching, which comprises the following steps: firstly, forming a graphene layer and a metal layer on a substrate, and then forming a hard sacrificial mask on the metal layer; then, removing the metal layer outside the hard mask area by a chemical etching method, and etching the metal layer laterally at the edge of the mask area to form a graphene short channel; and finally, depositing metal based on the hard sacrificial mask to form a metal electrode on the other side. The preparation method of the application can obtain a graphene channel length which is not limited by the minimum line width of a patterning process equipment, and the graphene is not in contact with organic contaminants such as photoresist throughout the whole process, so that a higher channel carrier speed and a lower ohmic contact resistance are realized, the types of electrodes on both sides can be independently changed to construct an internal potential field, a high-speed and low-recombination-rate graphene channel is obtained, and then a high-speed photoelectric detector is realized, and the process is easy to control and has an array potential.

Description

Technical Field

[0001] This invention relates to a method for preparing graphene short channels, and more particularly to a method for preparing graphene short channels based on lateral etching and a high-speed photodetector. Background Technology

[0002] Graphene, due to its high mobility and broad-spectrum response characteristics, has enormous application potential in high-speed optoelectronic devices. Shortening the channel length is a major way to reduce photogenerated carrier recombination and improve the operating speed of optoelectronic devices. However, due to the sensitive characteristics caused by the single atomic layer, traditional processing techniques are difficult to apply. How to realize high-quality graphene short-channel devices and unleash the potential of high-speed photodetection remains a technical challenge.

[0003] Traditional patterning processes for directly fabricating closely spaced electrodes on graphene have a dimensional limit heavily dependent on the minimum linewidth of the patterning equipment. Furthermore, contact between photoresist and graphene can leave organic residues, significantly impacting ohmic contact resistance and channel carrier velocity. Conversely, fabricating closely spaced electrodes on a substrate first also requires high-precision patterning equipment. During graphene transfer to the electrodes, steps on the electrodes prevent the graphene from adhering smoothly, leading to unavoidable mechanical damage and difficulty in achieving low ohmic contact resistance. Both approaches make photogenerated carriers prone to recombination, limiting the photodetector's responsivity and operating speed.

[0004] Therefore, graphene requires a protective layer. Chemical etching is the most selective method for removing the protective layer, but it faces the problem of lateral etching, which causes the etched area to be wider than the mask pattern. The minimum channel length that can be formed is determined by the pattern linewidth and the lateral etching distance, making it difficult to prepare short-channel graphene with a diameter of less than 100 nm. Summary of the Invention

[0005] Purpose of the invention: The purpose of this invention is to provide a method for preparing short-channel graphene based on lateral etching and a high-speed photodetector, so as to avoid the technical problems faced by existing graphene device preparation technologies, such as the difficulty in shortening the channel, easy contamination and damage of graphene, and the difficulty in realizing dissimilar electrode materials on both sides, to achieve high-speed, low recombination rate graphene channel and promote the realization of high-speed photodetector potential.

[0006] Technical solution: The method for preparing graphene short channels of the present invention includes the following steps:

[0007] S1, a graphene layer and a metal layer are sequentially formed on the substrate;

[0008] S2, a hard sacrificial layer is formed on the metal layer, and the hard sacrificial layer is processed into a hard sacrificial mask based on a patterning process;

[0009] S3, the metal layer outside the hard sacrificial mask area is selectively removed by chemical etching, and the metal layer is laterally etched at the edge of the hard sacrificial mask area to form a first metal electrode and a hollow area above the graphene channel; a second metal electrode is formed by depositing metal based on the hard sacrificial mask; the length of the graphene channel is the distance between the first metal electrode and the second metal electrode.

[0010] Furthermore, in step S1, the method for forming a graphene layer on the substrate is as follows: the graphene layer is directly formed on the substrate by epitaxy or mechanical exfoliation; or, it is formed on other substrates by epitaxy or mechanical exfoliation and then transferred to the substrate by dry or wet methods.

[0011] The methods for forming a metal layer on a graphene layer are as follows: the metal layer is deposited directly on the graphene layer; or, the metal layer is deposited on a graphene layer on another substrate, and then transferred to the substrate together with the graphene layer by a dry or wet method.

[0012] Furthermore, in step S2, the method for processing the hard sacrificial layer into a hard sacrificial mask is as follows: the hard sacrificial layer material outside the mask pattern is removed by a patterning process combined with dry etching or wet etching process, and what is finally retained is the hard sacrificial mask.

[0013] Furthermore, in step S3, the boundary of the first metal electrode is controlled by the chemical etching time, and the final length of the graphene channel is 20nm-500nm; the chemical etching time is adjusted by the concentration of the etching solution.

[0014] Furthermore, the material of the metal layer is one or more combinations of gold, palladium, platinum, silver, aluminum, and nickel, and the thickness of the metal layer is 20nm-500nm.

[0015] Furthermore, the material of the hard sacrificial layer is a compound insulating layer composed of two or more of silicon, aluminum, hafnium, oxygen, and nitrogen, and the thickness of the hard sacrificial layer is greater than the thickness of the metal layer.

[0016] Furthermore, the material of the second metal electrode is one or more combinations of gold, chromium, titanium, palladium, platinum, silver, aluminum, and nickel, and the thickness of the second metal electrode is less than the thickness of the hard sacrificial layer.

[0017] A high-speed graphene photodetector is fabricated using any of the graphene short-channel fabrication methods described above. Its structure, from bottom to top, includes: a substrate, a graphene layer, a first metal electrode, and a hard sacrificial mask. It also includes a hollowed-out region above the graphene channel, which is on the same layer as the first metal electrode, and a second metal electrode. The hard sacrificial mask only covers the first metal electrode and the hollowed-out region above the graphene channel. The length of the graphene channel is the distance between the first and second metal electrodes. The graphene layer between the first and second metal electrodes is the photosensitive area.

[0018] Furthermore, the graphene channels are either zigzag-shaped or multiple.

[0019] Furthermore, the graphene channel is integrated on a substrate having a waveguide, which is located directly below the graphene channel.

[0020] Compared with the prior art, the significant advantages of this invention are as follows:

[0021] 1. In this invention, the length of the graphene channel is controlled by the chemical etching time, which can easily obtain short graphene channels; and the equipment requirements are low, not limited by the minimum line width of the patterning, and can be achieved with manual photolithography equipment with a minimum line width of 1 micrometer and without precise focusing, to achieve graphene short channels below 100nm; the process is easy to control, the production cost is low, and it has the potential for widespread application.

[0022] 2. Through integrated process design, this invention enables graphene to remain completely free from organic contaminants such as photoresist and avoid mechanical damage, thereby achieving higher channel carrier velocity and lower ohmic contact resistance. Simultaneously, it allows for independent modification of the electrode types on both sides to construct an internal potential field, further reducing photogenerated carrier recombination. Combined with short spacing, it obtains a high-speed, low-recombination-rate graphene channel, thus realizing a high-performance high-speed photodetector with an operating bandwidth of over 40 GHz.

[0023] 3. The preparation method of the present invention has low requirements for substrate and is easy to integrate; it has the potential for arraying and can realize wafer-level large-scale preparation; based on the overlay alignment of patterning process, graphene channels can be formed at specified positions on the substrate; it can be integrated with silicon waveguides, and compared with compound system view detectors, it has significant advantages in high performance, easy integration and low cost, and has great application prospects in high-speed communication. Attached Figure Description

[0024] Figure 1 This is a flowchart of the preparation method of the present invention;

[0025] Figure 2 This is a schematic diagram of the structure of the graphene high-speed photodetector of the present invention;

[0026] Figure 3 This is a schematic diagram of a short-channel scanning electron microscope image of graphene obtained in an embodiment of the present invention.

[0027] Figure 4 The graph shows the test results of the photoelectric detection working bandwidth of the graphene high-speed photodetector prepared in the embodiment of the present invention for the 1550nm communication band.

[0028] Figure 5 This is a top view schematic diagram of the tortuous graphene channel of the present invention;

[0029] Figure 6 This is a schematic diagram of the integrated graphene high-speed photodetector and waveguide structure of the present invention. Detailed Implementation

[0030] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0031] like Figure 1 As shown, the graphene short channel fabrication method of the present invention is as follows: First, a graphene layer 20 and a metal layer 30 are formed on a substrate 10; then, a hard sacrificial layer 40 is formed on the metal layer 30; the hard sacrificial layer 40 is processed into a hard sacrificial mask 41 based on a patterning process; then, the metal layer 30 outside the region of the hard sacrificial mask 41 is selectively removed by chemical etching, and the metal layer 30 is laterally etched at the edge of the hard sacrificial mask 41 to form a first metal electrode 31 and a hollow region 32 above the graphene channel 50; a second metal electrode 33 is formed by depositing metal based on the hard sacrificial mask 41.

[0032] The detailed preparation steps are as follows:

[0033] Step S1: Form a graphene layer 20 and a metal layer 30 on the substrate 10. The specific formation methods are as follows: The graphene layer 20 is formed directly on the substrate 10 by epitaxy or mechanical exfoliation, or it is formed on another substrate by epitaxy or mechanical exfoliation and then transferred to the substrate 10 by dry or wet methods; The metal layer 30 is deposited directly on the graphene layer 20, or the metal layer 30 is deposited on the graphene layer 20 on another substrate and then transferred to the substrate 10 together with the graphene layer 20 by dry or wet methods.

[0034] Because graphene is easy to integrate and the substrate can be chosen arbitrarily, the method of this invention has universality.

[0035] Preferably, the metal layer 30 is one or a combination of gold, palladium, platinum, silver, aluminum, and nickel. The metal layer 30 serves both as a protective layer and as the first metal electrode 31. Therefore, the metal layer 30 needs to be capable of selective etching, form good ohmic contact with the graphene layer 20, and not possess excessively strong diffusivity to prevent damage to the graphene lattice. Furthermore, in conjunction with the selection of the second metal electrode 33, an internal potential field can be constructed in the graphene layer 20 based on the work function difference, further reducing photogenerated carrier recombination.

[0036] Preferably, the thickness of the metal layer 30 is 20nm-500nm. Due to the isotropic corrosion of the metal layer 30, its thickness directly affects the length of the channels generated by lateral corrosion. However, as a protective layer, the metal layer 30 should not be too thin.

[0037] Preferably, the graphene layer 20 does not come into direct contact with organic matter during the dry or wet transfer process to avoid organic contamination. More preferably, the graphene layer is formed on the original substrate, the metal layer 30 is deposited directly on the graphene layer, and then the metal layer 30 and the graphene layer 20 are transferred together to the target substrate by dry or wet methods, which is relatively simpler.

[0038] Step S2: A hard sacrificial layer 40 is formed on the metal layer 30; the hard sacrificial layer 40 is processed into a hard sacrificial mask 41 based on a patterning process. The specific formation method is as follows: the hard sacrificial layer 40 is used to remove the sacrificial layer material outside the mask pattern by a patterning process combined with a dry etching or wet etching process, and finally the hard sacrificial mask 41 is retained.

[0039] Preferably, the hard sacrificial layer 40 is a compound insulating layer composed of two or more of silicon, aluminum, hafnium, oxygen, and nitrogen, and the thickness of the hard sacrificial layer 40 is greater than the thickness of the metal layer 30. Since the hard sacrificial layer 40 will eventually partially cover the hollow area 32 above the graphene channel 50, the hard sacrificial layer 40 needs to have low light absorption, and a wide bandgap insulating material is more suitable for the hard sacrificial mask 41. More preferably, the hard sacrificial layer 40 is prepared by chemical vapor deposition, atomic layer deposition, or sputtering deposition.

[0040] Preferably, the overlay alignment based on patterning technology enables the design of forming the mask pattern boundary, i.e., the graphene channel 50, at a specified location on the substrate. This process has the potential for application-oriented expansion, such as enabling integration with waveguides at specific locations on a silicon substrate.

[0041] Step S3: Selectively remove the metal layer outside the region of the hard sacrificial mask 41 by chemical etching; and laterally etch the metal layer at the edge of the region of the hard sacrificial mask 41 to form the first metal electrode 31 and the hollowed-out region 32 above the graphene channel 50; deposit metal based on the hard sacrificial mask 41 to form the second metal electrode 33.

[0042] The first metal electrode 31 of the graphene short channel 50 is formed by lateral etching of the metal layer 30 based on a hard sacrificial mask 41, with its boundary controlled by the chemical etching time. With the assistance of the hard sacrificial mask 41, and due to the isotropic nature of metal layer etching, the channel length generated by lateral etching is approximately equal to the longitudinal etching thickness. Therefore, the etching of the metal layer outside the mask area can be monitored using optical microscopy, allowing control over the degree of lateral etching. When the monitoring area is just fully etched, the length of the graphene channel 50 is slightly less than the thickness of the metal layer 30, and the etching rate can be calculated using the etching time. By further increasing the etching time, the length of the graphene channel 50 can be controllably increased. The etching rate can also be fine-tuned by the concentration of the etching solution, typically adjusted to complete the etching of the monitoring area within 20-120 seconds. The deposition of the second metal electrode 33 is also based on the hard sacrificial mask 41, and the deposition boundary is determined by the boundary of the hard sacrificial mask 41. Therefore, the length of the graphene channel 50 is the distance between the first metal electrode 31 and the second metal electrode 33. Based on the above two-step process (lateral etching of the metal layer 30 and deposition of the second metal electrode 33), by controlling the chemical etching time (usually controlled to be 100%-120% of the time required for complete etching of the monitoring area), graphene short channels 50 with lengths of 20nm-500nm can be easily obtained. Since the length of the graphene channel 50 is independent of the minimum linewidth and overlay alignment accuracy of the patterning equipment, the equipment requirements are extremely low. For example, a manual lithography device with a minimum linewidth accuracy of 1 micrometer can be used to achieve graphene short channels below 100nm without precise focusing. Figure 3 The obtained graphene channel is approximately 50 nm long.

[0043] Preferably, the second metal electrode 33 is one or more combinations of gold, chromium, titanium, palladium, platinum, silver, aluminum, and nickel. The selection range of the second metal electrode 33 is wider than that of the first metal electrode 31. Based on the difference in work function between the two sides, an internal potential field can be constructed in the graphene, promoting the separation of photogenerated carriers along the potential field and further reducing photogenerated carrier recombination. More preferably, the difference in work function between the two metal electrodes is greater than 1 eV, resulting in a strong internal potential field in the graphene, thereby improving the detector responsivity.

[0044] Preferably, the thickness of the second metal electrode 33 is less than the thickness of the hard sacrificial layer 40. To prevent the sidewall metal from climbing over the hard sacrificial layer 40 and blocking the trench, the thickness of the second metal electrode 33 needs to be controlled.

[0045] like Figure 2 The diagram shows the structure of a high-speed graphene photodetector. From bottom to top, it includes: a substrate 10, a graphene layer 20, a first metal electrode 31, a hollowed-out region 32 above the graphene channel 50, a second metal electrode 33, and a hard sacrificial mask 41 that only covers the first metal electrode 31 and the hollowed-out region 32 above the graphene channel 50; wherein, the graphene layer between the first metal electrode 31 and the second metal electrode 33 is the photosensitive area.

[0046] Preferably, the operating bandwidth of the graphene high-speed photodetector reaches over 40 GHz. This invention, through integrated process design, ensures that the graphene remains completely free from organic contaminants such as photoresist throughout the process, avoiding mechanical damage and achieving higher channel carrier velocities and lower ohmic contact resistance. Simultaneously, the types of electrodes on both sides can be independently changed to construct the internal potential field, further reducing photogenerated carrier recombination. Combined with short spacing, a high-speed, low-recombination-rate graphene channel can be obtained, thereby realizing a high-performance high-speed photodetector, such as… Figure 4 As shown, the operating bandwidth can reach over 40GHz.

[0047] Preferably, the graphene channels 50 are tortuous lines and multiple in number. The fabrication method and device provided by this invention have enormous potential for expansion: they possess arraying potential, enabling wafer-level large-scale fabrication; the channel linearity and arrangement can be designed according to actual needs, for example, increasing the photosensitive area through a circuitous arrangement, such as... Figure 5 As shown.

[0048] Preferably, the graphene channel 50 can be integrated onto the waveguide 11, such as... Figure 6 As shown. Based on the aforementioned patterning process and alignment, graphene channels can be formed at designated locations on the substrate, possessing the potential for practical application, especially integration with silicon waveguides.

[0049] Compared with compound system photodetectors, the graphene high-speed photodetector has significant advantages in terms of high performance, easy integration, and low cost, and has great application prospects in high-speed communication.

[0050] Example 1

[0051] Step a1 involves growing graphene on a copper substrate using chemical vapor deposition, depositing 40 nm of gold on the graphene, and then transferring the graphene and gold layer together onto a silicon substrate with a 300 nm silicon oxide layer, a thickness of 675 μm, and no deliberate doping by etching the copper with ammonium persulfate solution.

[0052] Step a2: A 70nm hard sacrificial silicon oxide layer is grown on the gold layer at 300℃ by low-pressure chemical vapor deposition; a square photoresist mask pattern is prepared on the hard sacrificial silicon oxide layer using a manual ultraviolet lithography device with a minimum linewidth of 1μm to cover one side of the gold / graphene, and the silicon oxide is etched by a trifluoromethane reactive ion beam to form a silicon oxide hard sacrificial mask on one side.

[0053] Step a3 involves selectively etching gold outside the silicon oxide mask area by diluting potassium iodide solution, repeating the etching process and microscopic observation until no obvious gold residue is found outside the mask area after 60 seconds, and then stopping the etching process after 70 seconds. Based on the current photoresist pattern, 40nm gold is thermally evaporated and stripped to form the metal electrode on the other side.

[0054] The final obtained graphene channel width is approximately 50 nm, and the scanning electron microscopy image is as follows: Figure 3 As shown. In contrast, using traditional processes, manual UV lithography equipment with a minimum linewidth precision of 1μm can only obtain graphene channels with a width of 1μm. This embodiment fully demonstrates the low equipment requirements of the method of the present invention and has the potential for widespread application.

[0055] Example 2

[0056] Step b1: Obtain a single layer of graphene directly on the prepared marked sapphire substrate by mechanical exfoliation, and deposit 50 nm palladium on the graphene.

[0057] Step b2: An 80nm hard sacrificial aluminum oxide layer is grown on the palladium layer at 200°C by atomic layer deposition; using an electron beam lithography device, a photoresist mask pattern is overlaid on the hard sacrificial aluminum oxide layer to prepare palladium / graphene on one side according to the graphene position; the aluminum oxide is then etched by boron trichloride reactive ion beam to form an aluminum oxide hard sacrificial mask on one side.

[0058] Step b3 involves selectively etching palladium outside the alumina mask area by diluting the ferric chloride / copper sulfate solution, repeating the etching process and microscopic observation until no obvious palladium residue is found outside the mask area after 20 seconds; then, based on the current photoresist pattern, electron beam evaporation and stripping of 5nm titanium / 10nm platinum / 30nm gold / 5nm titanium are performed to form the other metal electrode.

[0059] Ultimately, high-quality mechanically exfoliated graphene short channels were also obtained. This embodiment further demonstrates the universality of the method of the present invention.

[0060] Example 3

[0061] Step c1 involves growing graphene on a copper substrate using chemical vapor deposition, depositing 40 nm of gold on the graphene, and then wet-transferring the graphene and gold layer together onto a silicon substrate with a 300 nm silicon oxide layer, 675 μm thick, and undoped surface using ammonium persulfate solution etching. Based on photolithography, potassium iodide etching, and oxygen plasma treatment, the graphene is then processed into a square pattern array with 50 μm sides and alignment marks.

[0062] Step c2: A 60nm hard sacrificial silicon nitride layer is grown on the gold layer by plasma-enhanced chemical vapor deposition at 300°C; using an electron beam lithography device, a zigzag pattern corresponding to one side of the square pattern hard sacrificial silicon nitride is overlaid according to the layout to form a photoresist mask, and the silicon nitride is etched by a trifluoromethane focused ion beam to form a silicon nitride hard sacrificial mask on one side.

[0063] Step c3 involves selectively etching gold outside the silicon nitride mask area using a diluted potassium iodide solution. This etching process is repeated, followed by microscopic observation, until no significant gold residue is observed outside the mask area after 60 seconds. The etching process continues for 70 seconds. Based on the current photoresist pattern, 10nm titanium / 30nm gold is thermally evaporated and stripped to form the other metal electrode. The electrode is then led out using photolithography to form an electrode pack that matches the high-speed testing system.

[0064] A high-speed, low-recombination-rate graphene channel was obtained, leading to a high-performance high-speed photodetector with a responsivity of 50 A / W under 1mW 650nm light. The working bandwidth of the photodetector in the 1550nm communication band was tested, and the results are as follows: Figure 4 As shown, the response time drops by only 2.16 dB to 40 GHz, indicating that its 3 dB operating bandwidth is much greater than 40 GHz, demonstrating significant potential for high-speed operation. In contrast, traditional methods of evaporating and exfoliating graphene channels onto graphene rarely achieve a responsivity exceeding 10 A / W, and the 3 dB operating bandwidth rarely exceeds 10 GHz. This embodiment fully demonstrates the superior performance of the method and device of this invention.

[0065] Example 4

[0066] Step d1 involves growing graphene on a germanium substrate using chemical vapor deposition (CVD), depositing 20 nm of nickel on the graphene, and spin-coating with thermal adhesive. The graphene is then peeled off the substrate using the weak interaction between germanium and graphene. The graphene and nickel layer are then dry-transferred onto a 4-inch high-resistivity silicon substrate with waveguide structures and registration marks on its surface. Using automated photolithography, nitric acid etching, and oxygen plasma processing, the graphene is fabricated into a square pattern array centered on the waveguide.

[0067] Step d2: A 50nm hard sacrificial silicon oxide layer is grown on the nickel layer at 300°C by plasma-enhanced chemical vapor deposition; using a 500nm precision automated photolithography equipment, a photoresist mask array is formed by overlaying the hard sacrificial silicon oxide layer according to the layout, with the mask boundary located above the waveguide; the silicon oxide is etched by a trifluoromethane focused ion beam to form a silicon oxide hard sacrificial mask on one side.

[0068] Step d3 involves selectively etching nickel outside the silicon oxide mask area using nitric acid solution. This process is repeated, followed by microscopic observation, until no significant nickel residue is observed outside the mask area after 30 seconds. The etching process continues for 33 seconds. Based on the current photoresist pattern, 5nm titanium / 30nm gold is thermally evaporated and stripped to form the other metal electrode. The electrode is then led out using photolithography to form a test electrode pack.

[0069] The final dicing yields batches of graphene high-speed photodetector chips, which simultaneously possess on-chip optical transmission and high-speed photoelectric conversion capabilities. This embodiment fully demonstrates the scalability and application potential of the method and device of this invention.

[0070] This invention utilizes the transverse etched region as a channel, which can overcome the limitation of minimum linewidth accuracy of patterned process equipment, realize graphene short channels, and thus form a complete set of graphene non-destructive transfer and short-channel heteroelectrode preparation process schemes that avoid organic contact. This achieves low ohmic contact resistance and high channel carrier velocity, fully utilizes the high-speed photoelectric detection potential of graphene, and lays the foundation for high-speed communication applications.

[0071] In summary, the graphene short-channel fabrication method and high-speed photodetector of the present invention can circumvent the technical problems faced by existing graphene device fabrication technologies, such as the difficulty in shortening the channel, easy contamination and damage of graphene, and the difficulty in realizing dissimilar electrode materials on both sides. It realizes a high-speed, low-recombination-rate graphene channel, promotes the realization of the potential of high-speed photodetection, and has significant advantages such as low equipment requirements, easy process control, high device performance, easy integration, and low cost. It has great application prospects in high-speed communication and can promote the further development of on-chip high-speed communication systems.

[0072] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for preparing graphene short channels based on lateral etching, characterized in that, The steps include the following: S1, a graphene layer (20) and a metal layer (30) are sequentially formed on a substrate (10). S2, a hard sacrificial layer (40) is formed on the metal layer (30), and the hard sacrificial layer (40) is processed into a hard sacrificial mask (41) based on a patterning process. S3, the metal layer outside the region of the hard sacrificial mask (41) is selectively removed by chemical etching, and the metal layer is laterally etched at the edge of the region of the hard sacrificial mask (41) to form the first metal electrode (31) and the hollowed-out region (32) above the graphene channel (50); the second metal electrode (33) is formed by depositing metal based on the hard sacrificial mask (41); the length of the graphene channel (50) is the distance between the first metal electrode (31) and the second metal electrode (33); In step S2, the method for processing the hard sacrificial layer (40) into a hard sacrificial mask (41) is as follows: the material of the hard sacrificial layer (40) outside the mask pattern is removed by patterning process combined with dry etching or wet etching process, and what is finally retained is the hard sacrificial mask (41).

2. The method for preparing graphene short channels based on lateral etching according to claim 1, characterized in that, In step S1, the method for forming a graphene layer (20) on the substrate (10) is as follows: the graphene layer (20) is directly formed on the substrate (10) by epitaxial method or mechanical exfoliation method; or, it is formed on other substrates by epitaxial method or mechanical exfoliation method, and then transferred to the substrate (10) by dry method or wet method. The method for forming a metal layer (30) on a graphene layer (20) is as follows: the metal layer (30) is deposited directly on the graphene layer (20); or, the metal layer (30) is deposited on the graphene layer (20) on another substrate, and then transferred together with the graphene layer (20) to the substrate (10) by a dry or wet method.

3. The method for preparing graphene short channels based on lateral etching according to claim 1, characterized in that, In step S3, the boundary of the first metal electrode (31) is controlled by the chemical etching time, and the final length of the graphene channel (50) is 20nm-500nm; the chemical etching time is adjusted by the concentration of the etching solution.

4. The method for preparing graphene short channels based on lateral etching according to any one of claims 1-3, characterized in that, The material of the metal layer (30) is one or more combinations of gold, palladium, platinum, silver, aluminum and nickel, and the thickness of the metal layer (30) is 20nm-500nm.

5. The method for preparing graphene short channels based on lateral etching according to any one of claims 1-3, characterized in that, The material of the hard sacrificial layer (40) is a compound insulating layer composed of two or more of silicon, aluminum, hafnium, oxygen and nitrogen, and the thickness of the hard sacrificial layer (40) is greater than the thickness of the metal layer (30).

6. The method for preparing graphene short channels based on lateral etching according to any one of claims 1-3, characterized in that, The material of the second metal electrode (33) is one or more combinations of gold, chromium, titanium, palladium, platinum, silver, aluminum and nickel, and the thickness of the second metal electrode (33) is less than the thickness of the hard sacrificial layer (40).

7. A high-speed photodetector, characterized in that, It is fabricated using the graphene short-channel fabrication method based on lateral etching as described in any one of claims 1-3; its structure from bottom to top includes: a substrate (10), a graphene layer (20), a first metal electrode (31), a hard sacrificial mask (41), and also includes a hollow area (32) above the graphene channel (50) in the same layer as the first metal electrode (31) and a second metal electrode (33); the hard sacrificial mask (41) only covers the first metal electrode (31) and the hollow area (32) above the graphene channel (50); the length of the graphene channel (50) is the distance between the first metal electrode (31) and the second metal electrode (33); wherein, the graphene layer between the first metal electrode (31) and the second metal electrode (33) is the photosensitive area.

8. The high-speed photodetector according to claim 7, characterized in that, The graphene channels (50) are either zigzag lines or multiple channels.

9. The high-speed photodetector according to claim 7, characterized in that, The graphene channel (50) is integrated on a substrate having a waveguide located directly below the graphene channel (50).

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