Light emitting diode with improved electrode coverage and method of making the same

Abstract

The present disclosure provides a light emitting diode with improved electrode covering property and a preparation method thereof, and belongs to the technical field of optoelectronic manufacturing. The preparation method of the light emitting diode comprises the following steps: providing an epitaxial wafer, the surface of the epitaxial wafer having a to-be-evaporated area; forming a composite glue layer on the surface of the epitaxial wafer, the composite glue layer having an opening exposing the to-be-evaporated area, and the composite glue layer comprising a negative photoresist layer and a positive photoresist layer stacked in sequence; and evaporating to form an electrode in the opening. The present disclosure can improve the covering property of the electrode to the current blocking layer and the transparent conductive layer.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved electrode coating and a method for its fabrication. Background Technology

[0002] Light-emitting diodes (LEDs) are highly influential new products in the optoelectronics industry. They are characterized by their small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys, and other fields.

[0003] In related technologies, when fabricating light-emitting diodes, an epitaxial layer is typically grown on a substrate first; then, a current blocking layer and a transparent conductive layer are sequentially stacked on a portion of the surface of the epitaxial layer; finally, an electrode is deposited on the transparent conductive layer, and the electrode extends to the surface of the epitaxial layer.

[0004] Before depositing the electrode, a mask needs to be made on the epitaxial layer. The mask has an opening that exposes the transparent conductive layer. If the opening size is too small, the metal formed during the evaporation process will not easily cover the surface of the metal deposited in the previous layer, which will lead to poor coverage of the electrode. Summary of the Invention

[0005] This disclosure provides a light-emitting diode with improved electrode coating properties and a method for fabricating the same, which can improve the coating properties of the electrode on the current blocking layer and the transparent conductive layer. The technical solution is as follows:

[0006] This disclosure provides a method for fabricating a light-emitting diode (LED), the method comprising: providing an epitaxial wafer having a region to be deposited on its surface; forming a composite resist layer on the surface of the epitaxial wafer, the composite resist layer having an opening exposing the region to be deposited, the composite resist layer comprising a negative photoresist layer and a positive photoresist layer stacked sequentially; and depositing an electrode in the opening.

[0007] In one implementation of this disclosure, forming a composite resist layer on the surface of the epitaxial wafer includes: coating a negative photoresist layer on the surface of the epitaxial wafer and exposing the negative photoresist; coating a positive photoresist layer on the surface of the negative photoresist and exposing the positive photoresist; developing the negative photoresist layer and the positive photoresist layer to remove the areas on the negative photoresist layer and the positive photoresist layer opposite to the area to be vaporized, thereby obtaining the composite resist layer.

[0008] In another implementation of the present disclosure, the thickness of the positive photoresist layer is less than the thickness of the negative photoresist.

[0009] In another implementation of the present disclosure, coating the surface of the epitaxial wafer with a negative photoresist layer includes: coating the surface of the epitaxial wafer with a negative photoresist layer based on the thickness of the electrode to be formed, wherein the thickness of the negative photoresist layer is not less than the thickness of the electrode.

[0010] In another implementation of the present disclosure, after developing the negative photoresist layer, the area of ​​the first surface of the negative photoresist layer is smaller than the area of ​​the second surface. The first surface and the second surface are two opposing surfaces of the negative photoresist layer, and the first surface is close to the epitaxial wafer.

[0011] In another implementation of the present disclosure, after developing the positive photoresist layer, the area of ​​the third surface of the positive photoresist layer is greater than the area of ​​the fourth surface. The third surface and the fourth surface are two opposing surfaces of the positive photoresist layer, and the third surface coincides with the second surface.

[0012] In another implementation of the present disclosure, the electrode formation by vapor deposition in the opening includes: sequentially vapor-depositing a Cr film, an Al film, a Ti film, a Pt film, and an Au film through the opening to form the electrode.

[0013] In another implementation of the present disclosure, the deposition of the electrode in the opening includes: depositing a Cr film, an Al film, a Ti film, a Ni film, a Pt film and an Au film sequentially through the opening to form the electrode.

[0014] In another implementation of the embodiments of this disclosure, fabricating the epitaxial wafer includes: providing a substrate; forming an epitaxial layer on the surface of the substrate, the epitaxial layer including a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially; and forming a current blocking layer and a transparent conductive layer stacked sequentially on the surface of the second semiconductor layer.

[0015] This disclosure provides a light-emitting diode (LED) fabricated using the LED fabrication method described above.

[0016] The beneficial effects of the technical solutions provided in this disclosure include at least the following:

[0017] The method for fabricating a light-emitting diode provided in this disclosure first involves fabricating an epitaxial layer, and then fabricating a composite adhesive layer on the surface of the epitaxial layer. The composite adhesive layer has openings that expose the areas to be deposited. This allows electrodes to be deposited onto the areas of the epitaxial wafer to be deposited through the openings in the composite adhesive layer.

[0018] During the vapor deposition process, as the deposition time increases, the temperature inside the reaction chamber gradually increases. Since both the negative and positive photoresist layers shrink with increasing temperature, the size of the openings on the photoresist gradually increases during the shrinkage process. That is, the area of ​​the openings gradually increases with the increase of temperature. Therefore, as the vapor deposition proceeds, the area of ​​the openings gradually increases, resulting in a larger deposition area. Consequently, the electrode is more easily vapor-deposited onto the surface of the previously vapor-deposited metal layer, thereby improving the electrode's own encapsulation properties.

[0019] Because the temperature-dependent changes of positive and negative photoresists are inconsistent, and negative photoresists are more sensitive to temperature—at lower temperatures, negative photoresists shrink more while positive photoresists shrink less, and at higher temperatures, negative photoresists shrink less while positive photoresists shrink more—as the temperature gradually changes, the lower negative photoresist layer in the composite resist layer begins to shrink first with increasing temperature. This causes the opening area of ​​the composite resist layer to gradually increase. Meanwhile, the upper positive photoresist layer changes more slowly, thus limiting the shrinkage deformation of the negative photoresist layer and causing the opening area of ​​the composite resist layer to increase gradually and slowly, thereby preventing the opening from becoming too large at once. When the temperature increases to the critical value, the change in the negative photoresist layer is too small, while the positive photoresist layer will shrink with the temperature change. At this time, the positive photoresist layer drives the negative photoresist layer below to continue to deform, so that the area of ​​the opening continues to increase, thereby further improving the coverage of the electrode. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure;

[0022] Figure 2 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure;

[0023] Figure 3 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure;

[0024] Figure 4 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure.

[0025] The markings in the diagram are explained as follows:

[0026] 10. Substrate;

[0027] 20. Epitaxial layer; 21. First semiconductor layer; 22. Light-emitting layer; 23. Second semiconductor layer; 24. Groove;

[0028] 30. Electrode; 31. Current blocking layer; 32. Transparent conductive layer;

[0029] 40. Composite resist layer; 41. Negative photoresist layer; 42. Positive photoresist layer; 401. First surface; 402. Second surface; 403. Third surface; 404. Fourth surface. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0031] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0032] Figure 1 This is a flowchart illustrating a method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. Figure 1 As shown, the preparation method includes:

[0033] S11: Provide an epitaxial wafer.

[0034] The surface of the epitaxial wafer has an area to be vapor-deposited.

[0035] S12: A composite adhesive layer 40 is formed on the surface of the epitaxial wafer.

[0036] The composite photoresist layer 40 has an opening that exposes the area to be vaporized. The composite photoresist layer 40 includes a negative photoresist layer 41 and a positive photoresist layer 42 sequentially stacked on the surface of the epitaxial wafer, with the opening located on the surface of the positive photoresist layer 42 and exposing the area to be vaporized.

[0037] S13: Electrode 30 is formed by vapor deposition in the opening.

[0038] The method for fabricating a light-emitting diode provided in this embodiment first involves fabricating an epitaxial layer 20, and then fabricating a composite adhesive layer 40 on the surface of the epitaxial layer 20. The composite adhesive layer 40 has an opening that exposes the area to be vapor-deposited. In this way, an electrode 30 can be vapor-deposited onto the area to be vapor-deposited on the epitaxial wafer through the opening of the composite adhesive layer 40.

[0039] During the vapor deposition process, the temperature inside the reaction chamber gradually increases with the deposition time. Both the negative and positive photoresist layers shrink with increasing temperature, causing the openings on the photoresist to gradually enlarge. In other words, the area of ​​the openings gradually increases with temperature. Therefore, as the vapor deposition continues, the opening area gradually increases, resulting in a larger deposition area. Consequently, electrode 30 is more easily deposited onto the surface of the previously vapor-deposited metal layer, thus improving the encapsulation properties of electrode 30.

[0040] Because the temperature-dependent changes of positive and negative photoresists are inconsistent, and negative photoresists are more sensitive to temperature—at lower temperatures, negative photoresists shrink more while positive photoresists shrink less, and at higher temperatures, negative photoresists shrink less while positive photoresists shrink more—as the temperature gradually changes, the lower negative photoresist layer in the composite resist layer begins to shrink first with increasing temperature. This causes the opening area of ​​the composite resist layer to gradually increase. Meanwhile, the upper positive photoresist layer changes more slowly, thus limiting the shrinkage deformation of the negative photoresist layer and causing the opening area of ​​the composite resist layer to increase gradually and slowly, thereby preventing the opening from becoming too large at once. When the temperature increases to the critical value, the change in the negative photoresist layer is too small, while the positive photoresist layer will shrink with the temperature change. At this time, the positive photoresist layer drives the negative photoresist layer below to continue to deform, so that the area of ​​the opening continues to increase, thereby further improving the coverage of the electrode.

[0041] Step S11, in which the epitaxial wafer is fabricated, may include the following steps:

[0042] The first step is to provide a substrate 10.

[0043] The substrate 10 is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate 10 can be a flat substrate or a patterned substrate.

[0044] As an example, in this embodiment of the disclosure, the substrate 10 is a sapphire substrate. Sapphire substrates are a commonly used substrate 10, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a flat sapphire substrate.

[0045] The sapphire substrate can be pretreated by placing it in an MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber and baking it for 12 to 18 minutes. As an example, in this embodiment, the sapphire substrate is baked for 15 minutes.

[0046] Specifically, the baking temperature can be from 1000℃ to 1200℃, and the pressure inside the MOCVD reaction chamber during baking can be from 100mbar to 200mbar.

[0047] The second step is to form an epitaxial layer 20 on the surface of the substrate 10.

[0048] Figure 2 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure. For example... Figure 2 As shown, the epitaxial layer 20 includes a first semiconductor layer 21, a light-emitting layer 22, and a second semiconductor layer 23 stacked sequentially.

[0049] For example, the epitaxial layer 20 may be a blue light epitaxial layer 20.

[0050] Among them, the first semiconductor layer 21 of the blue light epitaxial layer 20 can be an n-type layer, and the n-type layer can be an n-type GaN layer.

[0051] The luminescent layer 22 of the blue epitaxial layer 20 may include alternating InGaN quantum well layers and GaN quantum barrier layers. Among them, the multiple quantum well layers may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0052] As an example, in an embodiment of this disclosure, the light-emitting layer 22 includes five alternating periods of InGaN quantum well layers and GaN quantum barrier layers.

[0053] As an example, the thickness of the light-emitting layer 22 can be from 150 nm to 200 nm.

[0054] Among them, the second semiconductor layer 23 of the blue light epitaxial layer 20 can be a p-type layer, and the p-type layer can be a p-type GaN layer.

[0055] Optionally, the thickness of the epitaxial layer 20 is 3 μm to 5 μm. For example, the thickness of the epitaxial layer 20 is 4 μm.

[0056] like Figure 2 As shown, the surface of the second semiconductor layer 23 has a groove 24 that exposes the first semiconductor layer 21.

[0057] In this process, the surfaces of the first semiconductor layer 21 and the second semiconductor layer 23 within the groove 24 are both used for evaporating electrodes 30. This allows the electrodes 30 to be electrically connected to the first semiconductor layer 21 and the second semiconductor layer 23, respectively, thereby enabling the transmission of electricity to different semiconductor layers of the epitaxial layer 20 to control the light emission of the light-emitting diode.

[0058] In the second step, the epitaxial layer 20 may specifically include: forming a first semiconductor layer 21, a light-emitting layer 22, and a second semiconductor layer 23 sequentially on a sapphire substrate using MOCVD technology.

[0059] The first semiconductor layer 21 is an n-type layer, and the second semiconductor layer 23 is a p-type layer.

[0060] Optionally, the first semiconductor layer 21 is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer can be from 0.5 μm to 3 μm.

[0061] The growth temperature of the n-type GaN layer can be from 1000℃ to 1100℃, and the growth pressure of the n-type GaN layer can be from 100 torr to 300 torr.

[0062] Optionally, the light-emitting layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. Specifically, the light-emitting layer 22 may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0063] During the growth of the light-emitting layer 22, the MOCVD reaction chamber pressure was controlled at 200 torr. During the growth of the InGaN quantum well layer, the reaction chamber temperature was 760℃ to 780℃. During the growth of the GaN quantum barrier layer, the reaction chamber temperature was 860℃ to 890℃.

[0064] As an example, in an embodiment of this disclosure, the light-emitting layer 22 includes five alternating periods of InGaN quantum well layers and GaN quantum barrier layers.

[0065] Optionally, the thickness of the light-emitting layer 22 can be from 150 nm to 200 nm.

[0066] Optionally, the second semiconductor layer 23 is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer can be from 0.5 μm to 3 μm.

[0067] When growing p-type GaN layers, the growth pressure of p-type GaN layers can be from 200 Torr to 600 Torr, and the growth temperature of p-type GaN layers can be from 800℃ to 1000℃.

[0068] After the epitaxial layer 20 is grown, the process may further include: etching the second semiconductor layer 23 using a dry etching method to form a groove 24 that exposes the first semiconductor layer 21.

[0069] The third step is to form a current blocking layer 31 and a transparent conductive layer 32 stacked sequentially on the surface of the second semiconductor layer 23.

[0070] Figure 3 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure. For example... Figure 3 As shown, a current blocking layer 31 and a transparent conductive layer 32 are stacked on the surface of the second semiconductor layer 23.

[0071] By providing a current blocking layer 31 between the transparent conductive layer 32 and the second semiconductor layer 23, current transmission can be blocked, allowing more current to be transmitted through the transparent conductive layer 32 to various regions of the second semiconductor layer 23.

[0072] For example, the current blocking layer 31 may be a SiO2 layer.

[0073] Among them, such as Figure 3 As shown, the transparent conductive layer 32 can cover the current blocking layer 31 so that the current can be extended to various regions of the second semiconductor layer 23 through the transparent conductive layer 32.

[0074] For example, the transparent conductive layer 32 can be an indium tin oxide (ITO) film. Indium tin oxide film has good transmittance and low resistivity. Using an indium tin oxide film as the transparent conductive layer 32 allows more light to be transmitted from the transparent conductive layer 32, thus ensuring the effect. At the same time, due to its low resistivity, it also facilitates carrier conduction and improves injection efficiency.

[0075] For example, the thickness of the transparent conductive layer 32 can be from 800 angstroms to 1200 angstroms.

[0076] In this embodiment, the electrode 30 is deposited outside the current blocking layer 31 and the transparent conductive layer 32, meaning the electrode 30 needs to cover the outer surface of the transparent conductive layer 32. Therefore, the area to be deposited on the epitaxial layer 20 is the area on the second semiconductor layer 23 used for stacking the current blocking layer 31 and the transparent conductive layer 32.

[0077] The orthographic projection of the transparent conductive layer 32 onto the substrate 10 lies within the orthographic projection of the area to be vaporized onto the substrate 10. This ensures that when the electrode 30 is vaporized into the area to be vaporized, the electrode 30 can cover the sidewalls of the transparent conductive layer 32.

[0078] In some other implementations, the third step may include forming a Cr electrode and an Al electrode stacked sequentially on the surface of the second semiconductor layer 23.

[0079] In this implementation, the electrode 30 located on the Cr electrode and the Al electrode can be a multilayer stacked metal, for example, the electrode 30 includes a stacked Ti layer and a Pt layer.

[0080] It should be noted that the Cr electrode and Al electrode formed on the surface of the second semiconductor layer 23 before forming electrode 30 can also be other metal electrodes, and this embodiment does not limit them.

[0081] In step S12, a composite adhesive layer 40 is formed on the surface of the epitaxial wafer.

[0082] Figure 4 This is a fabrication state diagram of a light-emitting diode provided in an embodiment of this disclosure. For example... Figure 4 As shown, the composite photoresist layer 40 includes a negative photoresist layer 41 and a positive photoresist layer 42 sequentially stacked on the surface of the epitaxial wafer, with an opening located on the surface of the positive photoresist layer 42, exposing the area to be vaporized.

[0083] Since the negative and positive photoresist layers shrink as the temperature increases, the size of the openings on the photoresist gradually increases during the shrinkage process, meaning the area of ​​the openings gradually increases with the increase of temperature.

[0084] In this embodiment of the disclosure, during the deposition of the electrode 30 using the composite adhesive layer 40, the reaction chamber is at room temperature at the beginning of the deposition process, at which time the opening area of ​​the composite adhesive layer 40 is relatively small. As the deposition time increases, the temperature inside the reaction chamber gradually increases, and the opening of the composite adhesive layer 40 shrinks with the increase in temperature.

[0085] Because positive and negative photoresists exhibit different trends with temperature, and negative photoresists are more sensitive to temperature, negative photoresists shrink more at lower temperatures, while positive photoresists shrink less. Conversely, negative photoresists shrink less at higher temperatures, while positive photoresists shrink more.

[0086] Therefore, as the temperature gradually changes, the negative photoresist layer at the bottom of the composite adhesive layer 40 begins to shrink as the temperature increases, which causes the area of ​​the opening in the composite adhesive layer 40 to gradually increase. Meanwhile, the positive photoresist layer 42 at the top of the composite adhesive layer 40 changes slowly. At this time, the positive photoresist layer 42 restricts the shrinkage and deformation of the negative photoresist layer, causing the area of ​​the opening in the composite adhesive layer 40 to gradually and slowly increase, thereby avoiding an excessively large opening at once.

[0087] When the temperature increases to the critical value, the change in the negative photoresist layer 41 is too small, while the positive photoresist layer 42 will shrink with the change in temperature. At this time, the positive photoresist layer 42 drives the negative photoresist layer 41 below to continue to deform, so that the area of ​​the opening continues to increase, thereby further improving the coverage of the electrode 30.

[0088] Optionally, such as Figure 4 As shown, the negative photoresist has an opposite first surface 401 and a second surface 402. The first surface 401 is close to the epitaxial wafer, and the area of ​​the first surface 401 is smaller than the area of ​​the second surface 402. The positive photoresist is located on the second surface 402.

[0089] In this embodiment, the cross-section of the negative photoresist layer 41 is an inverted trapezoid in the direction perpendicular to the substrate 10. This configuration of the negative photoresist layer 41 as narrow at the bottom and wide at the top ensures that when the electrode 30 is deposited, the electrode 30 has sufficient space to cover the transparent conductive layer 32 at the junction of the second semiconductor layer 23 and the transparent conductive layer 32.

[0090] Optionally, such as Figure 4 As shown, the positive photoresist has a third surface 403 and a fourth surface 404 that are opposite to each other. The third surface 403 coincides with the second surface 402. The area of ​​the third surface 403 is larger than the area of ​​the fourth surface 404, and the area of ​​the third surface 403 is the same as the area of ​​the second surface 402.

[0091] In this embodiment, the positive photoresist layer 42 has a trapezoidal cross-section in the direction perpendicular to the substrate 10. This design makes the positive photoresist layer 42 wider at the bottom and narrower at the top, and the area of ​​the third surface 403 is the same as the area of ​​the second surface 402. This increases the contact area between the positive photoresist layer 42 and the negative photoresist layer 41. As a result, when the positive photoresist layer 42 shrinks due to heat, the area on which it exerts a force on the negative photoresist layer 41 is also larger. This makes it easier for the positive photoresist layer 42 to drive the negative photoresist layer 41 to shrink, thereby increasing the rate of opening expansion of the composite adhesive layer 40.

[0092] Optionally, the thickness of the positive photoresist layer 42 is not greater than the thickness of the negative photoresist layer 41.

[0093] Since the negative photoresist layer 41 is more sensitive to temperature, it is more likely to shrink and deform when the temperature changes. Therefore, it is necessary to avoid setting the thickness of the positive photoresist layer 42 to be too large, which would affect the expansion rate of the opening of the composite photoresist layer 40.

[0094] Step S12, forming the composite adhesive layer 40 on the surface of the epitaxial wafer, may include the following steps:

[0095] The first step is to coat the surface of the epitaxial wafer with a negative photoresist layer and expose the area on the negative photoresist layer that is opposite to the surface of the epitaxial wafer.

[0096] When coating a negative photoresist layer, the negative photoresist layer is coated on the surface of the epitaxial wafer based on the thickness of the electrode to be formed, and the thickness of the negative photoresist layer is not less than the thickness of the electrode.

[0097] Since the negative photoresist layer is sensitive to temperature, it is more likely to shrink and deform when the temperature changes. Therefore, setting the thickness of the negative photoresist layer to be larger than the thickness of the electrode to be formed allows the electrode 30 to be vapor-deposited within the negative photoresist layer. Furthermore, the deformation of the negative photoresist layer provides a larger space for vapor deposition, making it easier for the electrode 30 to be covered with the transparent conductive layer 32.

[0098] In this embodiment, the cross-section of the negative photoresist layer to be formed is an inverted trapezoid. When exposing the negative photoresist layer, the transmittance of the mask can be adjusted by changing the thickness of the corresponding sidewall region of the negative photoresist layer on the mask, so that the negative photoresist layer exposed using this mask can form inclined sidewalls.

[0099] The second step is to coat a positive photoresist layer on the surface of the negative photoresist layer and expose the area on the positive photoresist layer opposite to the transparent conductive layer 32.

[0100] In this embodiment, the cross-section of the positive photoresist layer to be formed is a trapezoid. When exposing the positive photoresist layer, the transmittance of the mask can be adjusted by changing the thickness of the corresponding sidewall region of the positive photoresist layer on the mask, so that the positive photoresist layer exposed using this mask can form inclined sidewalls.

[0101] The third step involves developing the negative and positive photoresist layers to remove the areas on the negative and positive photoresist layers that are opposite to the area to be deposited, thus obtaining a composite photoresist layer.

[0102] In the process of forming the composite adhesive layer 40, the photoresist layer is first formed and exposed separately, and then the two photoresist layers are developed together to obtain the composite adhesive layer 40, thereby improving the fabrication efficiency of the composite adhesive layer 40.

[0103] Step S13, forming the electrode 30 in the area to be vapor-deposited by the composite adhesive layer 40, may include: sequentially vapor-depositing multiple layers of metal films through the opening to form the electrode 30.

[0104] Optionally, the multilayer metal layer includes a Cr film, an Al film, a Ti film, a Pt film, and an Au film deposited sequentially.

[0105] For example, the thickness of the Cr film can be from 30 angstroms to 1000 angstroms; for instance, the thickness of the Cr film can be 30 angstroms.

[0106] For example, the thickness of the Al film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Al film can be 1,000 angstroms.

[0107] For example, the thickness of the Ti film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Ti film can be 1,000 angstroms.

[0108] For example, the thickness of the Pt film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Pt film can be 1,000 angstroms.

[0109] For example, the thickness of the Au film can be from 5,000 angstroms to 30,000 angstroms; for instance, the thickness of the Au film can be 5,000 angstroms.

[0110] Optionally, the multilayer metal layer includes a Cr film, an Al film, a Ti film, a Ni film, a Pt film, and an Au film deposited sequentially.

[0111] For example, the thickness of the Cr film can be from 30 angstroms to 1000 angstroms; for instance, the thickness of the Cr film can be 30 angstroms.

[0112] For example, the thickness of the Al film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Al film can be 1,000 angstroms.

[0113] For example, the thickness of the Ti film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Ti film can be 1,000 angstroms.

[0114] For example, the thickness of the Ni film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Ni film can be 5,000 angstroms.

[0115] For example, the thickness of the Pt film can be from 1,000 angstroms to 10,000 angstroms; for instance, the thickness of the Pt film can be 1,000 angstroms.

[0116] For example, the thickness of the Au film can be from 5,000 angstroms to 30,000 angstroms; for instance, the thickness of the Au film can be 3,000 angstroms.

[0117] Step S13 may further include forming an electrode 30 on the first semiconductor layer 21.

[0118] In this embodiment of the disclosure, after the electrode 30 is fabricated, the following steps may also be included:

[0119] The first step is to fabricate a passivation layer on the epitaxial wafer. The passivation layer is located at least on the surface of the second semiconductor layer 23, the electrode 30, the surface of the first semiconductor layer 21, and the groove 24.

[0120] The passivation layer can be a distributed Bragg mirror layer, which can include multiple periodically alternating layers of SiO2 and TiO2. The number of periods in the distributed Bragg mirror layer can be between 20 and 50. For example, the number of periods in a distributed Bragg mirror layer is 32.

[0121] The thickness of the SiO2 layer in the distributed Bragg mirror layer can be from 800 angstroms to 1200 angstroms, and the thickness of the TiO2 layer can be from 500 angstroms to 900 angstroms.

[0122] The second step is to form two vias on the passivation layer, with each via corresponding to an electrode 30.

[0123] The third step is to fabricate two solder blocks on the surface of the passivation layer. Each solder block corresponds to a via. One solder block is connected to the electrode 30 on the surface of the first semiconductor layer 21 through a via, and the other solder block is connected to the electrode 30 on the surface of the second semiconductor layer 23 through a via.

[0124] Finally, the sapphire can be invisibly cut to reduce brightness loss. Then, the resulting LED chip is obtained through testing.

[0125] The above is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A method for fabricating a light-emitting diode, characterized in that, The method for fabricating the light-emitting diode includes: An epitaxial wafer is provided, the surface of which has an area to be vapor-deposited; A composite resist layer is formed on the surface of the epitaxial wafer. The composite resist layer has an opening exposing the area to be vaporized. The composite resist layer includes a negative photoresist layer and a positive photoresist layer stacked sequentially. The opening area of ​​the negative photoresist layer near the positive photoresist layer is equal to the opening area of ​​the positive photoresist layer near the negative photoresist layer, and the opening area of ​​the positive photoresist layer near the epitaxial wafer is smaller than the opening area of ​​the negative photoresist layer near the epitaxial wafer. When the temperature of the reaction chamber where the epitaxial wafer is located is below a critical value, the shrinkage degree of the negative photoresist layer is greater than that of the positive photoresist layer; when the temperature of the reaction chamber is not lower than the critical value, the shrinkage degree of the negative photoresist layer is less than that of the positive photoresist layer. Electrodes are deposited in the opening by vapor deposition.

2. The method for fabricating a light-emitting diode according to claim 1, characterized in that, The formation of the composite adhesive layer on the surface of the epitaxial wafer includes: A negative photoresist layer is coated on the surface of the epitaxial wafer, and the negative photoresist is exposed. A positive photoresist layer is coated on the surface of the negative photoresist, and the positive photoresist is exposed. The negative photoresist layer and the positive photoresist layer are developed to remove the areas on the negative photoresist layer and the positive photoresist layer that are opposite to the area to be deposited, thereby obtaining the composite photoresist layer.

3. The method for fabricating a light-emitting diode according to claim 2, characterized in that, The thickness of the positive photoresist layer is less than the thickness of the negative photoresist.

4. The method for fabricating a light-emitting diode according to claim 2, characterized in that, The process of coating the surface of the epitaxial wafer with a negative photoresist layer includes: Based on the thickness of the electrode to be formed, a negative photoresist layer is coated on the surface of the epitaxial wafer, the thickness of the negative photoresist layer being not less than the thickness of the electrode.

5. The method for fabricating a light-emitting diode according to claim 2, characterized in that, After developing the negative photoresist layer, the area of ​​the first surface of the negative photoresist layer is smaller than the area of ​​the second surface. The first surface and the second surface are two opposing surfaces of the negative photoresist layer, and the first surface is close to the epitaxial wafer.

6. The method for fabricating a light-emitting diode according to claim 5, characterized in that, After developing the positive photoresist layer, the area of ​​the third surface of the positive photoresist layer is greater than the area of ​​the fourth surface. The third surface and the fourth surface are two opposite surfaces of the positive photoresist layer, and the third surface coincides with the second surface.

7. The method for fabricating a light-emitting diode according to any one of claims 1 to 6, characterized in that, The electrode formation by vapor deposition in the opening includes: The electrode is formed by sequentially depositing Cr, Al, Ti, Pt, and Au films through the opening.

8. The method for fabricating a light-emitting diode according to any one of claims 1 to 6, characterized in that, The electrode formation by vapor deposition in the opening includes: The electrode is formed by sequentially depositing Cr, Al, Ti, Ni, Pt, and Au films through the opening.

9. The method for fabricating a light-emitting diode according to any one of claims 1 to 6, characterized in that, Fabrication of the epitaxial wafer includes: Provide a substrate; An epitaxial layer is formed on the surface of the substrate, the epitaxial layer comprising a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially; A current blocking layer and a transparent conductive layer are formed sequentially on the surface of the second semiconductor layer.

10. A light-emitting diode, characterized in that, The light-emitting diode is prepared using the light-emitting diode preparation method as described in any one of claims 1 to 9.

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