Radio frequency switch circuit and method of formation
By classifying the MOSFETs in the RF switch circuit into different categories and adjusting the capacitor structure, the breakdown problem caused by uneven MOSFET bias was solved, achieving more stable RF switch operation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI HUAHONG GRACE SEMICON MFG CORP
- Filing Date
- 2022-11-29
- Publication Date
- 2026-06-26
AI Technical Summary
In RF switching circuits, the MOSFETs located at the front have a higher bias voltage, which increases the risk of MOSFET breakdown and causes uneven bias voltage.
MOSFETs are divided into Class I and Class II. Class I MOSFETs have a larger capacitance than Class II MOSFETs. By forming a groove in the gate structure of Class II MOSFETs and filling it with a dielectric layer, the parasitic capacitance between the metal lines is reduced, and an air gap is formed to make the capacitance uniform.
The bias voltage of the first type of MOSFET was reduced, which reduced the risk of MOSFET breakdown and improved the performance of the RF switch.
Smart Images
Figure CN115863344B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a radio frequency switch circuit and its fabrication method. Background Technology
[0002] In radio frequency (RF) front-end circuits, RF switches are essential components. RF switches are used to electrically connect antennas to the transmit or receive paths of an RF system, allowing multiple components to be connected to the antenna. Typically, RF switches are configured using a stack of multiple transistors (such as field-effect transistors (FETs)). When an RF switch is in the OFF state, it can be considered as acting as a shunt "high" impedance about ground. Such an OFF stacked RF switch generally presents both capacitance and impedance. With the development of mobile communication technology, multiple communication standards coexist. Therefore, it is necessary to integrate RF power amplifiers of multiple modes and different frequency bands, and to select the required RF power amplifier through RF switch circuits to establish RF signal reception and transmission channels, enabling switching between different communication networks.
[0003] However, when the RF switch is turned off, it was found that the bias voltage (Vds) of some MOSFETs located at the front of the stack is higher. For example, the first two or three MOSFETs, or even more, are significantly higher than the bias voltage (Vds) of the remaining MOSFETs in the later stages, resulting in uneven bias voltage across all MOSFETs. Consequently, when the voltage is increased in the RF switch circuit, it is possible for the first few MOSFETs to break down. Summary of the Invention
[0004] The purpose of this invention is to provide a radio frequency switch circuit and its formation method, which makes the bias voltage of all MOSFETs uniform and reduces the probability of MOSFET breakdown.
[0005] To achieve the above objectives, the present invention provides a radio frequency switching circuit, comprising:
[0006] Multiple MOS gate structures are divided into first to Nth level MOS gate structures starting from the signal input terminal. The first few levels of MOS gate structures are classified as first-class MOS gate structures, and the remaining MOS gate structures are classified as second-class MOS gate structures, where N is an integer greater than 1.
[0007] The first oxide layer is located on the plurality of MOS gate structures;
[0008] A first metal layer is located on the first oxide layer. The first metal layer includes a plurality of spaced metal lines, with the first oxide layer exposed between the metal lines. Each MOS gate structure corresponds to two metal lines, and the source and drain are respectively connected to a metal line. In the second type of MOS gate structure, the first oxide layer between two adjacent metal lines has a groove.
[0009] A dielectric layer covering all the first metal layers, the first oxide layer, and the filling grooves, wherein air gaps are formed between adjacent metal lines in the dielectric layer, and the volume of the air gaps formed above the first type of MOS gate structure is smaller than the volume of the air gaps formed above the second type of MOS gate structure.
[0010] Optionally, the radio frequency switching circuit further includes a semiconductor substrate, wherein the plurality of MOS gate structures are partially formed on the surface of the semiconductor substrate and partially formed inside the semiconductor substrate.
[0011] Optionally, in the aforementioned radio frequency switching circuit, the semiconductor substrate includes:
[0012] Substrate;
[0013] A parasitic capacitance wiring layer is located on the surface of the substrate;
[0014] The second oxide layer is located on the surface of the parasitic capacitance wiring layer. The plurality of MOS gate structures are partially formed on the surface of the second oxide layer and partially formed inside the second oxide layer.
[0015] Optionally, in the aforementioned RF switch circuit, each of the MOS gate structures corresponds to two metal lines, with the source and drain each connected to a metal line via a connector.
[0016] This invention provides a radio frequency switch circuit, comprising: a plurality of MOS transistors, wherein the plurality of MOS transistors are divided into first to Nth level MOS transistors according to the direction of signal input to the radio frequency switch, the first few levels of MOS transistors are classified into first type MOS transistors, and the remaining MOS transistors are classified into second type MOS transistors, wherein the capacitance of the first type MOS transistors is greater than the capacitance of the second type MOS transistors.
[0017] This invention provides a method for forming a radio frequency switch circuit, comprising:
[0018] Multiple MOS gate structures are formed. Starting from the signal input terminal, the multiple MOS gate structures are divided into first to Nth level MOS gate structures. The first few levels of MOS gate structures are classified as first type MOS gate structures, and the remaining MOS gate structures are classified as second type MOS gate structures.
[0019] A first oxide layer is formed on the plurality of MOS gate structures;
[0020] A first metal layer is formed on the first oxide layer. The first metal layer includes a plurality of spaced metal lines, with the first oxide layer exposed between the metal lines. Each MOS gate structure corresponds to two metal lines, and the source and drain are respectively connected to a metal line. In the second type of MOS gate structure, a groove is formed in the first oxide layer between two adjacent metal lines.
[0021] A dielectric layer is formed, which covers all the first metal layers, the first oxide layer, and the filling grooves. Air gaps are formed between adjacent metal lines in the dielectric layer. The volume of the air gaps formed above the first type of MOS gate structure is smaller than the volume of the air gaps formed above the second type of MOS gate structure.
[0022] Optionally, the method for forming the radio frequency switch circuit further includes providing a semiconductor substrate, the semiconductor substrate comprising:
[0023] Substrate;
[0024] A parasitic capacitance wiring layer is located on the surface of the substrate;
[0025] The second oxide layer is located on the surface of the parasitic capacitance wiring layer. The plurality of MOS gate structures are partially formed on the surface of the second oxide layer and partially formed inside the second oxide layer.
[0026] Optionally, in the method of forming the radio frequency switch circuit, forming a first metal layer on the first oxide layer, wherein the first metal layer includes a plurality of spaced metal lines, includes: forming a metal layer on the first oxide layer and etching the metal layer to form a plurality of metal lines.
[0027] Optionally, in the method for forming the radio frequency switch circuit, the method for forming grooves in the first oxide layer between two adjacent metal lines in the second type of MOS gate structure includes:
[0028] The first type of MOS gate structure is covered with photoresist;
[0029] The first oxide layer between the two metal lines corresponding to the second type of MOS gate structure is etched to form a groove.
[0030] Optionally, in the method for forming the radio frequency switch circuit, the depth of the groove is 180nm to 220nm.
[0031] In the RF switch circuit and formation method provided by this invention, the formed dielectric layer has an air gap. The air gap can reduce the parasitic capacitance between metal lines; the larger the volume of the air gap, the greater the reduction in parasitic capacitance. The volume of the air gap formed above the gate structure of the first type of MOSFET is smaller than the volume of the air gap formed above the gate structure of the second type of MOSFET. This results in the parasitic capacitance generated by the metal lines in the first type of MOSFET being larger than that in the second type of MOSFET. Consequently, the capacitance of the first type of MOSFET is greater than that of the second type of MOSFET, reducing the bias voltage of the first type of MOSFET and making the voltage of all MOSFETs more even, thus reducing the risk of breakdown of the first type of MOSFET. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of the structure of the radio frequency switch circuit according to an embodiment of the present invention;
[0033] Figure 2 This is a circuit diagram of the radio frequency switch circuit according to an embodiment of the present invention;
[0034] Figure 3 This is a flowchart of a method for forming a radio frequency switch circuit according to an embodiment of the present invention;
[0035] Figures 4 to 8 This is a schematic diagram of forming a radio frequency switch circuit according to an embodiment of the present invention;
[0036] In the figure: 110-substrate, 120-parasitic capacitance wiring layer, 130-second oxide layer, 140-MOS gate structure, 141-source, 142-drain, 143-third oxide layer, 144-gate, 145-sidewall, 146-ONO layer, 150-first oxide layer, 151-groove, 160-connector, 171-metal layer, 170-metal line, 180-dielectric layer, 190-air gap, 200-photoresist. Detailed Implementation
[0037] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0038] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.
[0039] Please refer to Figure 1 This invention provides a radio frequency switching circuit, comprising: a plurality of MOS gate structures 140, wherein the plurality of MOS gate structures 140 are divided into first to Nth level MOS gate structures starting from the signal input terminal, the first few levels of MOS gate structures 140 are classified as first type MOS gate structures, and the remaining MOS gate structures 140 are classified as second type MOS gate structures, wherein N is an integer greater than 1; a first oxide layer 150 located on the plurality of MOS gate structures 140; and a first metal layer located on the first oxide layer 150, the first metal layer comprising a plurality of spaced metal lines 170, with the first oxide layer exposed between the metal lines 170. The circuit includes a first oxide layer 150, with each MOS gate structure 140 corresponding to two metal lines 170. The source and drain are each connected to a metal line 170. In the second type of MOS gate structure, a groove is formed in the first oxide layer 150 between adjacent metal lines 170. A dielectric layer 180 covers the first metal layer, the first oxide layer 150, and fills the grooves. Air gaps 190 are formed between adjacent metal lines 170 in the dielectric layer 180. The volume of the air gaps 190 formed above the first type of MOS gate structure is smaller than the volume of the air gaps 190 formed above the second type of MOS gate structure. The RF switching circuit also includes a semiconductor substrate, with multiple MOS gate structures 140 partially formed on the surface of the semiconductor substrate and partially formed inside the semiconductor substrate. The semiconductor substrate includes: a substrate 110; a parasitic capacitance wiring layer 120 located on the surface of the substrate 110; a second oxide layer 130 located on the surface of the parasitic capacitance wiring layer 120; and multiple MOS gate structures 140 partially formed on the surface of the second oxide layer 130 and partially formed inside the second oxide layer 130. The source and drain are each connected to a metal line via a connector 160.
[0040] This invention provides a radio frequency (RF) switch circuit, comprising: multiple MOSFETs, which are divided into first to Nth stages according to the direction of signal input to the RF switch; the first few stages of MOSFETs are classified as first-class MOSFETs, and the remaining MOSFETs are classified as second-class MOSFETs; the capacitance of the first-class MOSFETs is greater than that of the second-class MOSFETs. The first-class MOSFETs may be two or three stages located in the first stage, depending on the actual number of MOSFETs used in the RF switch circuit.
[0041] Please refer to Figure 2 The present invention provides a method for forming a radio frequency switch circuit, comprising:
[0042] S11: Form multiple MOS gate structures. Starting from the signal input terminal, divide the multiple MOS gate structures into first to Nth level MOS gate structures. Divide the first few levels of MOS gate structures into first-class MOS gate structures, and the remaining MOS gate structures into second-class MOS gate structures.
[0043] S12: Forming the first oxide layer, which is located on multiple MOS gate structures;
[0044] S13: Form a first metal layer. The first metal layer is located on the first oxide layer. The first metal layer includes multiple spaced metal lines. The first oxide layer is exposed between the metal lines. Each MOS gate structure corresponds to two metal lines. The source and drain are connected to a metal line respectively. In the second type of MOS gate structure, a groove is formed in the first oxide layer between two adjacent metal lines.
[0045] S14: Form a dielectric layer that covers all the first metal layers, the first oxide layer, and the filling grooves. The dielectric layer forms air gaps between adjacent metal lines. The volume of the air gaps formed above the first type of MOS gate structure is smaller than the volume of the air gaps formed above the second type of MOS gate structure.
[0046] For details, please refer to Figure 3 First, a semiconductor substrate is provided, comprising: a substrate 110; a parasitic capacitance wiring layer 120 located on the surface of the substrate 110; and a second oxide layer 130 located on the surface of the parasitic capacitance wiring layer 120. The semiconductor substrate can be formed by: providing a substrate 110, which may be a wafer; forming the parasitic capacitance wiring layer 120 on the surface of the substrate 110; and forming a second oxide layer 130 on the surface of the parasitic capacitance wiring layer 120, which may be formed by depositing a layer of silicon dioxide.
[0047] Next, please continue to refer to Figure 3 and Figure 4 Within the second oxide layer 130, a well region is formed by implanting ions. Within the well region, source and drain regions are formed by implanting ions, thereby forming source 141 and drain 142. A third oxide layer 143 is formed on the surface of the second oxide layer, along with a gate 144 located on the third oxide layer 143, sidewalls 145 located on both sides of the gate 144, and an ONO layer 146 located on the gate 144 and sidewalls 145, completing the fabrication of the MOS gate structure. The specific formation method is prior art and will not be elaborated here.
[0048] Next, please continue to refer to Figure 3 A first oxide layer 150 is formed on the ONO layer, which can be formed by depositing silicon dioxide. Next, the first oxide layer 150 and the ONO layer are etched starting from the surface of the first oxide layer 150, forming vias on both the source and drain terminals. Each MOSFET has vias formed on both the source and drain terminals, with the radial direction of the vias perpendicular to the surface of the first oxide layer. Then, metal is filled into the vias to form connectors 160.
[0049] Next, please continue to refer to Figure 3 and Figure 5 A metal layer 171 is formed on the first oxide layer 150, and the connector 160 is in contact with and connected to the metal layer 171. The metal layer 171 is etched to form a plurality of metal lines 170, such that each connector 160 corresponds to a metal line 170, and different connectors 160 correspond to different metal lines 170.
[0050] Next, please refer to Figure 6 and Figure 7 On the first metal layer, a first-type MOS gate structure is covered with photoresist 200; the first oxide layer 150 between the two metal lines 170 corresponding to the second-type MOS gate structure is etched to form a groove 151. Theoretically, in the second-type MOS gate structure, the first oxide layer 150 between any two corresponding metal lines 170 will be etched to form a groove 151, with a depth of 180nm to 220nm. Then, the photoresist 200 is removed.
[0051] Next, please refer to Figure 8A dielectric layer 180 is formed, covering all the first metal layers, the first oxide layer 150, and the filling grooves 151. In this embodiment of the invention, the dielectric layer 180 is formed using the HDP method. Since the surface of the first oxide layer 150 between the metal lines 170 is lower than the surface of the metal layers, air gaps 190 are formed within the dielectric layer 180 between the metal lines 170 during deposition. In the second type of MOS gate structure, there are also grooves between the metal lines, so after depositing the dielectric layer 180, a larger air gap 190 is formed above the grooves. Therefore, the volume of the air gap 190 formed in the first type of MOS gate structure is smaller than that formed in the second type of MOS gate structure. The air gap 190 helps reduce the parasitic capacitance between the metal lines 170; the larger air gap 190 reduces parasitic capacitance more significantly. Therefore, ultimately, the parasitic capacitance of the metal lines above the second type of MOS gate structure is smaller than that of the metal lines above the second type of MOS gate structure. Since both the gate structure and metal lines of the MOSFET are formed from MOSFETs, the parasitic capacitance generated by the internal metal lines of the second type of MOSFET is smaller than that of the first type of MOSFET. Therefore, after the RF switch circuit is formed, when the RF switch is off, the overall capacitance of the first type of MOSFET is greater than that of the second type of MOSFET. This causes the bias voltage (Vds) of the first type of MOSFET to decrease, approaching the bias voltage of the second type of MOSFET. In the entire RF switch, the bias voltage of all MOSFETs is averaged, so when the voltage is increased, the MOSFETs at the front will not break down, thus improving the operating capability of the RF switch. The gate structure of the first type of MOSFET may be a two-stage MOSFET gate structure or a three-stage MOSFET gate structure at the front, depending on the actual number of MOSFETs used in the RF switch circuit.
[0052] In summary, in the RF switch circuit and formation method provided in this embodiment of the invention, the formed dielectric layer has an air gap. This air gap can reduce the parasitic capacitance between metal lines; the larger the volume of the air gap, the greater the reduction in parasitic capacitance. The volume of the air gap formed above the gate structure of the first type of MOSFET is smaller than the volume of the air gap formed above the gate structure of the second type of MOSFET. This results in the parasitic capacitance generated by the metal lines in the first type of MOSFET being larger than that in the second type of MOSFET. Consequently, the capacitance of the first type of MOSFET is greater than that of the second type of MOSFET, reducing the bias voltage of the first type of MOSFET and making the voltage of all MOSFETs more even, thus reducing the risk of breakdown of the first type of MOSFET.
[0053] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.
Claims
1. A radio frequency switching circuit, characterized in that, include: Multiple MOS gate structures are divided into first to Nth level MOS gate structures starting from the signal input terminal. The first few levels of MOS gate structures are classified as first-class MOS gate structures, and the remaining MOS gate structures are classified as second-class MOS gate structures, where N is an integer greater than 1. The first oxide layer is located on the gate structures of the plurality of MOS transistors; A first metal layer is located on the first oxide layer. The first metal layer includes a plurality of spaced metal lines, with the first oxide layer exposed between the metal lines. Each MOS gate structure corresponds to two metal lines, and the source and drain are respectively connected to a metal line. In the second type of MOS gate structure, the first oxide layer between two adjacent metal lines has a groove. A dielectric layer covers all the first metal layers, the first oxide layer, and the filling grooves. Air gaps are formed between adjacent metal lines in the dielectric layer. The volume of the air gap formed above the gate structure of the first type of MOS transistor is smaller than the volume of the air gap formed above the gate structure of the second type of MOS transistor. When the RF switch is off, the capacitance of the first type of MOS transistor is greater than the capacitance of the second type of MOS transistor.
2. The radio frequency switching circuit as described in claim 1, characterized in that, Also includes: A semiconductor substrate, wherein multiple MOS gate structures are partially formed on the surface of the semiconductor substrate and partially formed inside the semiconductor substrate.
3. The radio frequency switching circuit as described in claim 2, characterized in that, The semiconductor substrate includes: Substrate; A parasitic capacitance wiring layer is located on the surface of the substrate; The second oxide layer is located on the surface of the parasitic capacitance wiring layer. The plurality of MOS gate structures are partially formed on the surface of the second oxide layer and partially formed inside the second oxide layer.
4. The radio frequency switching circuit as described in claim 1, characterized in that, Each of the aforementioned MOS gate structures corresponds to two metal lines, with the source and drain each connected to a metal line via a connector.
5. A method for forming a radio frequency switching circuit as described in any one of claims 1 to 4, characterized in that, include: Multiple MOS gate structures are formed. Starting from the signal input terminal, the multiple MOS gate structures are divided into first to Nth level MOS gate structures. The first few levels of MOS gate structures are classified as first type MOS gate structures, and the remaining MOS gate structures are classified as second type MOS gate structures. A first oxide layer is formed on the plurality of MOS gate structures; A first metal layer is formed on the first oxide layer. The first metal layer includes a plurality of spaced metal lines, with the first oxide layer exposed between the metal lines. Each MOS gate structure corresponds to two metal lines, and the source and drain are respectively connected to a metal line. In the second type of MOS gate structure, a groove is formed in the first oxide layer between two adjacent metal lines. A dielectric layer is formed, which covers all the first metal layers, the first oxide layer, and the filling grooves. An air gap is formed between adjacent metal lines in the dielectric layer. The volume of the air gap formed above the gate structure of the first type of MOS transistor is smaller than the volume of the air gap formed above the gate structure of the second type of MOS transistor. When the RF switch is off, the capacitance of the first type of MOS transistor is greater than the capacitance of the second type of MOS transistor.
6. The method for forming the radio frequency switch circuit as described in claim 5, characterized in that, It also includes providing a semiconductor substrate, the semiconductor substrate comprising: Substrate; A parasitic capacitance wiring layer is located on the surface of the substrate; The second oxide layer is located on the surface of the parasitic capacitance wiring layer. The plurality of MOS gate structures are partially formed on the surface of the second oxide layer and partially formed inside the second oxide layer.
7. The method for forming the radio frequency switch circuit as described in claim 5, characterized in that, A method for forming a first metal layer on a first oxide layer, the first metal layer comprising a plurality of spaced metal lines, includes: forming a metal layer on the first oxide layer and etching the metal layer to form a plurality of metal lines.
8. The method for forming the radio frequency switch circuit as described in claim 5, characterized in that, In the second type of MOS gate structure, the method of forming grooves in the first oxide layer between two adjacent metal lines includes: The first type of MOS gate structure is covered with photoresist; The first oxide layer between the two metal lines corresponding to the second type of MOS gate structure is etched to form a groove.
9. The method for forming the radio frequency switch circuit as described in claim 5, characterized in that, The depth of the groove is 180nm~220nm.