Nanopore sequencing circuit unit and gene sequencing device

Abstract

The disclosed embodiment provides a nanopore sequencing circuit unit and a gene sequencing device, which is implemented by a CMOS circuit and is used to detect the bidirectional microcurrent signal of the nanopore, and includes: a nanopore clamping circuit, which is used to stabilize the voltage of the detection electrode located on one side of the nanopore, and generate a fixed voltage difference with the common electrode located on the other side of the nanopore at both ends of the nanopore, and drive single nucleotide molecules to pass through the nanopore one by one by means of the voltage difference; the nanopore clamping circuit includes a charging path composed of a first operational amplifier circuit and a first clamping tube, and a discharge path composed of a second operational amplifier circuit and a second clamping tube; an integral reset circuit, which is used to integrate and amplify the bidirectional microcurrent signal of the nanopore when the charging path and the discharge path of the nanopore clamping circuit are respectively turned on, and convert it into a voltage signal; an output circuit, which is used to receive and output the voltage signal converted by the integral reset circuit. The disclosed embodiment constructs a high-throughput gene sequencing device with bidirectional detection capability based on a small-area sequencing circuit unit, which can improve detection accuracy and efficiency.

Description

Technical Field

[0001] The present disclosure belongs to the field of electronic circuit technology, and specifically, relates to a nanopore sequencing circuit unit and a gene sequencing device, which can be used for the detection of biological microcurrent signals for gene sequencing and pA-level microcurrents in other application fields. Background Art

[0002] Nanopore sequencing uses electrophoresis technology to drive individual molecules through nanopores one by one to achieve sequencing. At present, nanopore sequencing technology has gradually been widely used in research on DNA sequencing, disease detection, drug screening and environmental monitoring. In the existing nanopore sequencing technology, according to the power supply method, it can be simply divided into DC power supply and AC power supply, and the corresponding nanopore electrodes can also be divided into DC electrodes and AC electrodes. DC electrodes generally undergo redox reactions with the solution, provide electrons or capture electrons in the reaction, so they can only provide current in one direction, and the electrodes will slowly consume over time, and there is a problem with service life; AC electrodes do not undergo redox reactions with the solution, and mainly achieve the purpose of power supply by adsorbing ions in the solution or releasing ions. They will not be consumed, but they need to be charged or discharged to work normally. According to the characteristics of nanopore electrode materials, the use of AC power supply is conducive to reducing the area of ​​the electrode and increasing its life.

[0003] The currently known Roche gene sequencing solution only performs sequencing in one direction, and only charges the electrodes in the other direction, so there is still much room for improvement in sequencing efficiency and accuracy. In addition, the known gene sequencing device can integrate more sequencing units to work synchronously, and this high-throughput gene sequencing device requires the sequencing unit to have a smaller area. Summary of the invention

[0004] In view of this, the present disclosure provides a nanopore sequencing circuit unit and a gene sequencing device, which are used to construct a high-throughput gene sequencing device with bidirectional detection capability based on a small-area sequencing circuit unit, thereby improving detection accuracy and efficiency.

[0005] In a first aspect, the present disclosure provides a nanopore sequencing circuit unit, which is implemented by a CMOS circuit and is used to detect a bidirectional microcurrent signal of a nanopore, and includes:

[0006] A nanopore clamp circuit, used to stabilize the voltage of a detection electrode located on one side of the nanopore, generate a fixed voltage difference between the detection electrode and the common electrode located on the other side of the nanopore at both ends of the nanopore, and drive single nucleotide molecules to pass through the nanopore one by one by means of the voltage difference; the nanopore clamp circuit includes a charging path composed of a first operational amplifier circuit and a first clamp tube, and a discharging path composed of a second operational amplifier circuit and a second clamp tube;

[0007] An integral reset circuit, used to integrate and amplify the bidirectional microcurrent signal of the nanopore and convert it into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively turned on;

[0008] The output circuit is used to receive and output the voltage signal converted by the integration reset circuit.

[0009] In an optional embodiment, the source of the first clamp tube is connected to the source of the second clamp tube and connected to the detection electrode; the drain of the first clamp tube is connected to the drain of the second clamp tube and connected to the integration reset circuit.

[0010] In an optional embodiment, the negative input terminal of the first operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the first clamp tube; the negative input terminal of the second operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the second clamp tube.

[0011] In an optional embodiment, the first clamp tube includes a first transistor and a second transistor, and the second clamp tube includes a third transistor and a fourth transistor; wherein the drain of the first transistor is connected to the source of the second transistor, and the drain of the third transistor is connected to the source of the fourth transistor; the source of the first transistor is connected to the source of the third transistor, and is connected to the detection electrode; the drain of the second transistor is connected to the drain of the fourth transistor, and is connected to the integral reset circuit; the control end of the second transistor is connected to the control end of the fourth transistor, and is connected to a first switching control signal; the first switching control signal controls the nanopore clamp circuit to switch between a charging path and a discharging path.

[0012] In an optional embodiment, the negative input terminal of the first operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the first transistor; the negative input terminal of the second operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the third transistor.

[0013] In an optional embodiment, the first operational amplifier circuit includes a fifth transistor, the second operational amplifier circuit includes a sixth transistor, and the control ends of the fifth transistor and the sixth transistor are connected to a second switching control signal; the fifth transistor and the sixth transistor are used to control the power on and off of the first operational amplifier circuit and the second operational amplifier circuit respectively under the action of the second switching control signal, and to control the nanopore clamp circuit to switch between a charging path and a discharging path.

[0014] In an optional embodiment, the first operational amplifier circuit and the second operational amplifier circuit further include bias voltage input terminals, wherein the bias voltage input terminal of the first operational amplifier circuit inputs a first bias voltage, and the bias voltage input terminal of the second operational amplifier circuit inputs a second bias voltage.

[0015] In an optional embodiment, the integration reset circuit includes an integration capacitor and a first reset switch, the first end of the integration capacitor is connected to the first end of the first reset switch, and is also connected to the drain of the second transistor and the drain of the fourth transistor, and the second end of the integration capacitor is connected to the ground potential; the second end of the first reset switch is connected to a pre-charge voltage, which is used to periodically reset the voltage of the integration capacitor.

[0016] In an optional embodiment, the integration reset circuit includes an integration capacitor and a first reset switch, the first end of the integration capacitor is connected to the first end of the first reset switch, and is also connected to the drains of the first clamp tube and the second clamp tube, and the second end of the integration capacitor is connected to the ground potential; the second end of the first reset switch is connected to a pre-charge voltage, which is used to periodically reset the voltage of the integration capacitor.

[0017] In an optional embodiment, the output circuit includes a second source follower and a selection switch, the input end of the second source follower is connected to the first end of the integration capacitor, the output end is connected to the first end of the selection switch, and the second end of the selection switch outputs the voltage signal converted by the integration reset circuit to the common signal line.

[0018] In an optional embodiment, the nanopore sequencing circuit unit further includes a second reset switch, a first end of which is connected to the detection electrode, and a second end of which is connected to the common level, for fixing the voltage of the detection electrode at the common level when the nanopore clamp circuit switches between a charging path and a discharging path.

[0019] In a second aspect, the present disclosure also provides a gene sequencing device, comprising a chip integrating multiple micropore structure units and multiple nanopore sequencing circuit units as described in any of the aforementioned embodiments, wherein the micropore structure unit comprises a nanopore, a common electrode located on both sides of the nanopore, and a detection electrode; the multiple nanopore sequencing circuit units are correspondingly connected to the multiple micropore structure units for measuring the bidirectional microcurrent signals of the nanopores in the corresponding micropore structure units.

[0020] In an optional embodiment, it also includes a common signal line and an analog-to-digital conversion circuit connected to the common signal line, wherein the common signal line is used to receive the voltage signal output by the nanopore sequencing circuit unit, and the analog-to-digital conversion circuit is used to convert the voltage signal into a digital signal.

[0021] In an optional implementation, a common tail current source is further included, one end of the common tail current source is connected to the common signal line, and the other end is connected to the ground potential.

[0022] In an optional embodiment, the chip includes a MEMS chip that implements the microporous structure unit.

[0023] The nanopore sequencing circuit unit disclosed in the present invention has an extremely small circuit area and has a bidirectional microcurrent detection capability, and is suitable for integrated construction of nanopore gene sequencing devices with a throughput of millions or even tens of millions, which can greatly improve the integration level, thereby achieving high throughput and high detection efficiency. Furthermore, the nanopore sequencing circuit unit and its gene sequencing device can perform detection in one direction and error correction in another direction, which can further correct errors, reduce error rates, and improve detection accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0025] Figure 1 A schematic diagram of the structure and electrical model of a nanopore test chamber 101 used in an embodiment of the present disclosure;

[0026] Figure 2 Schematic diagram of a circuit of a nanopore sequencing circuit unit 200 according to the first embodiment of the present disclosure;

[0027] Figure 3 Schematic diagram of a circuit of a nanopore sequencing circuit unit 300 according to the second embodiment of the present disclosure;

[0028] Figure 4 Schematic diagram of a circuit of a nanopore sequencing circuit unit 400 according to the third embodiment of the present disclosure;

[0029] Figure 5A for Figure 4 A schematic diagram of a first circuit operating state of the nanopore sequencing circuit unit 400 of the illustrated embodiment;

[0030] Figure 5B for Figure 4 A schematic diagram of a second circuit operating state of the nanopore sequencing circuit unit 400 of the illustrated embodiment;

[0031] Figure 6Schematic diagram of a circuit of a nanopore sequencing circuit unit 600 according to a fourth embodiment of the present disclosure;

[0032] Figure 7 Schematic diagram of the structure of a gene sequencing device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0034] In the present disclosure, it should be understood that terms such as "include" or "have" are intended to indicate the presence of features, numbers, steps, behaviors, components, parts, or a combination thereof disclosed in the present specification, and are not intended to exclude the possibility that one or more other features, numbers, steps, behaviors, components, parts, or a combination thereof exist or are added.

[0035] In a nanopore sequencing device, a voltage applied to both ends of a test chamber is usually used to drive nucleotide molecules through the nanopore, and the type of nucleotide molecules passing through the nanopore is detected by detecting the characteristic microcurrent signal output by the nanopore, thereby achieving gene sequencing.

[0036] Figure 1 FIG. 1 is a schematic diagram of the structure and electrical model of a nanopore test chamber 101 used in an embodiment of the present disclosure. Figure 1 As shown, the nanopore test chamber 101 includes a first compartment and a second compartment separated by a phospholipid bilayer membrane 105, and an electrode 103 connected to the first compartment and an electrode 102 connected to the second compartment. The phospholipid bilayer membrane 105 has a nanopore 104, and a nucleotide molecule 106 connected to a linker 107 is located in the first compartment and passes through the nanopore 104 under the action of a voltage applied to the electrodes 102 and 103. Figure 1 In the embodiment, the nanopore equivalent capacitor 108 and the nanopore equivalent resistor 109 may be used to simulate the electrical characteristics of the nanopore 104 . For the convenience of description, the nanopore test chamber 101 is simplified into a nanopore equivalent circuit model 113 in the embodiment of the present disclosure.

[0037] Figure 2 FIG. 2 is a circuit diagram of a nanopore sequencing circuit unit 200 according to Embodiment 1 of the present disclosure. Figure 2 As shown, the nanopore sequencing circuit unit 200 is implemented using a CMOS circuit, including a nanopore clamping circuit, an integral reset circuit, and an output circuit.

[0038] The nanopore clamp circuit is used to stabilize the detection electrode voltage of the nanopore 201, generate a fixed voltage difference between the two ends of the nanopore 201 and the common electrode VCMD 202 located on the other side of the nanopore 201, and form a charging and discharging path with the integral reset circuit, and drive single nucleotide molecules to pass through the nanopore one by one by means of the voltage difference between the two ends of the nanopore 201. The nanopore clamp circuit includes a charging path composed of a first operational amplifier circuit (OP1) 205 and a first clamp tube 214, and a discharging path composed of a second operational amplifier circuit (OP2) 204 and a second clamp tube 215.

[0039] The integral reset circuit is used to integrate and amplify the bidirectional microcurrent signal of the nanopore 201 and convert it into a voltage signal when the charging path and the discharging path of the nanopore clamp circuit are respectively turned on. The output circuit is used to receive and output the voltage signal converted by the integral reset circuit.

[0040] In some embodiments, the source of the first clamp tube 214 is connected to the source of the second clamp tube 215, and is connected to the detection electrode of the nanopore 201; the drain of the first clamp tube 214 is connected to the drain of the second clamp tube 215, and is connected to the integral reset circuit. The negative input terminal of the first operational amplifier circuit (OP1) 205 is connected to the detection electrode of the nanopore 201, and the positive input terminal is connected to the common level VCM 203; the output terminal of the first operational amplifier circuit (OP1) 205 is connected to the control terminal of the first clamp tube 214. The negative input terminal of the second operational amplifier circuit (OP2) 204 is connected to the detection electrode of the nanopore 201, and the positive input terminal is connected to the common level VCM 203; the output terminal of the second operational amplifier circuit (OP2) 204 is connected to the control terminal of the second clamp tube 215.

[0041] In some implementations, the first clamping transistor 214 may be a PMOS transistor, and the second clamping transistor 215 may be an NMOS transistor.

[0042] In some embodiments, the integral reset circuit may include an integral capacitor 208 and a reset switch 207. The first end (i.e., charging end) of the integral capacitor 208 is connected to the first end of the reset switch 207, the other end of the integral capacitor 208 is connected to the ground potential, and the second end of the reset switch 207 is connected to the pre-charge voltage Vpre 206. The charging end of the integral capacitor 208 is simultaneously connected to the drain of the first clamp tube 214 and the drain of the second clamp tube 215, which is used to integrate and amplify the microcurrent signal to be measured of the nanopore and convert it into a voltage signal. The reset switch 207 is used to periodically clear and reset the voltage of the integral capacitor 208 under the action of the reset signal Rst.

[0043] In some embodiments, when the output terminals of the first operational amplifier circuit (OP1) 205 and the second operational amplifier circuit (OP2) 204 output a low level, the first clamping tube 214 is turned on and the second clamping tube 215 is turned off. At this time, the charging path is turned on and the discharging path is turned off. When the output terminals of the first operational amplifier circuit (OP1) 205 and the second operational amplifier circuit (OP2) 204 output a high level, the first clamping tube 214 is turned off and the second clamping tube 215 is turned on. At this time, the charging path is turned off and the discharging path is turned on. The charging and discharging paths transfer the nanopore current to the integrating capacitor 208, and after a fixed time of integration and amplification, it is output through the output circuit.

[0044] In some embodiments, the output circuit includes a source follower 216 and a selection switch 209. The input end of the source follower 216 is connected to the first end (i.e., the charging end) of the integral capacitor 208, receives the voltage signal output by the integral reset circuit, and is connected to the common signal line 211 through the selection switch 209.

[0045] In some embodiments, the common signal line 211 is connected in parallel to the tail current source 213 and to the analog-to-digital converter 212. The analog-to-digital converter 212 is used to receive the output voltage signal of the source follower 216 and convert it into a digital code value. It has a multiplexing function and can be multiplexed between multiple nanopore sequencing circuit units.

[0046] The nanopore sequencing circuit unit of the disclosed embodiment is implemented using a CMOS circuit, has an extremely small circuit area, is convenient for high-throughput integration, and has a bidirectional detection capability for charging and discharging. It can be used in a high-throughput gene sequencing device to significantly improve the accuracy and efficiency of sequencing.

[0047] Figure 3 FIG. 1 is a circuit diagram of a nanopore sequencing circuit unit 300 according to the second embodiment of the present disclosure. Figure 3 As shown, the nanopore sequencing circuit unit 300 of this embodiment is based on the circuit structure of the first embodiment, and a reset switch Rst_cmd317 is connected in series between the detection electrode of the nanopore 301 and the common level VCM 303. The addition of the reset switch 317 can fix the detection electrode of the nanopore 301 at the common level when the circuit performs charge and discharge direction detection switching, which is conducive to the rapid establishment of the circuit working point and improves the response speed of the circuit when bidirectional detection switching is performed.

[0048] Figure 4 FIG. 4 is a circuit diagram of a nanopore sequencing circuit unit 400 according to the third embodiment of the present disclosure. Figure 4 As shown, the nanopore sequencing circuit unit 400 of this embodiment further improves the design of the nanopore clamping circuit based on the solutions of the previous embodiments.

[0049] Wherein, the first operational amplifier circuit (OP1) 408 and the second operational amplifier circuit (OP2) 409 are implemented by a five-transistor (5T) operational amplifier. The first clamp tube 410 includes a first transistor and a second transistor connected in series, and the second clamp tube 411 includes a third transistor and a fourth transistor connected in series. The drain of the first transistor is connected to the source of the second transistor, and the drain of the third transistor is connected to the source of the fourth transistor. The source of the first transistor is connected to the source of the third transistor and is connected to the detection electrode of the nanopore 401. The drain of the second transistor is connected to the drain of the fourth transistor and is connected to the charging end of the integral capacitor 414. The control end of the second transistor is connected to the control end of the fourth transistor and is connected to the switching control signal CMD.

[0050] The positive input terminal of the first operational amplifier circuit (OP1) 408 is connected to the common level VCM404, and the negative input terminal is connected to the detection electrode of the nanopore 401. Similarly, the positive input terminal of the second operational amplifier circuit (OP2) 409 is also connected to the common level VCM404, and the negative input terminal is also connected to the detection electrode of the nanopore 401. The output terminal of the first operational amplifier circuit (OP1) 408 is connected to the control terminal of the first transistor of the first clamp tube 410, and the output terminal of the second operational amplifier circuit (OP2) 409 is connected to the control terminal of the third transistor of the second clamp tube 411.

[0051] The bias voltage VP 403 is input to the bias voltage input terminal of the first operational amplifier circuit (OP1) 408, and the bias voltage VN 406 is input to the bias voltage input terminal of the second operational amplifier circuit (OP2) 409.

[0052] In some embodiments, the nanopore sequencing circuit unit 400 of this embodiment may also connect a reset switch 407 in series between the detection electrode of the nanopore 401 and the common level VCM 404, so as to fix the detection electrode of the nanopore 401 at the common level when the circuit performs charge and discharge direction detection switching, which is beneficial to quickly establish the circuit operating point and improve the response speed of the circuit during bidirectional detection switching.

[0053] Figure 5A and Figure 5B for Figure 4 The schematic diagram of the circuit working state of the nanopore sequencing circuit unit 400 of the embodiment shown. Figure 5AAs shown, when the switching control signal CMD is '0', the second transistor of the first clamping tube 410 is turned on, and the fourth transistor of the second clamping tube 411 is turned off. At this time, the circuit works in the charging state, and the charging path composed of the first operational amplifier circuit (OP1) 408 and the first clamping tube 410 is selected and starts to work. At this time, the current flows from the nanopore 401 to the integration capacitor 414, and is converted into a voltage signal after integration and amplification, and is output through the source follower 416 and sampled analog-to-digital conversion is performed.

[0054] When the switching control signal CMD is '1', the second transistor of the first clamping tube 410 is turned off, and the fourth transistor of the second clamping tube 411 is turned on. At this time, the circuit works in the discharge state, and the discharge path composed of the second operational amplifier circuit (OP2) 409 and the second clamping tube 411 is selected and starts to work. At this time, the current flows from the integrating capacitor 414 to the nanopore 401, and is converted into a voltage signal after integration and amplification, and is output through the source follower 416 and sampled analog-to-digital conversion is performed.

[0055] The pre-charge voltage Vpre is VL in the charging state and VH in the discharging state. VL and VH are on the upper and lower sides of the common voltage VCM. The reference voltage VCMD of the common electrode of the nanopore varies up and down by a fixed voltage difference △V around the common voltage VCM. The reset signal Rst of the reset switch 412 periodically resets the integral capacitor 414. The reset voltage value is the pre-charge voltage Vpre. Therefore, the voltage of the integral capacitor 414 will be based on the pre-charge voltage Vpre. It will start to rise from VL when charging and start to drop from VH when discharging. It should be noted that although Figure 5A The reference voltage VCMD of the common electrode of the nanopore is schematically described as a symmetrical voltage. In other embodiments, the reference voltage VCMD may also be an asymmetrical voltage. Figure 5A The voltage signals shown can be flexibly adjusted according to system requirements.

[0056] like Figure 5B As shown, if the circuit system needs to be quickly stabilized, the RST_CMD signal of the reset switch 407 can be enabled, and the RST_CMD signal can be turned on at the jump point of the switching control signal CMD to turn on the reset switch 407, directly connecting the detection electrode of the nanopore to the common level VCM, which can quickly stabilize the clamping end voltage of the nanopore.

[0057] Figure 6 FIG. 6 is a circuit diagram of a nanopore sequencing circuit unit 600 according to Embodiment 4 of the present disclosure. Figure 6 As shown, the nanopore sequencing circuit unit 600 of this embodiment further improves the design of the nanopore clamping circuit based on the solutions of the previous embodiments.

[0058] Compared with the third embodiment, the first clamp tube 610 of this embodiment only includes the first transistor, and the second clamp tube 611 only includes the third transistor. The source of the first transistor is connected to the source of the third transistor and is connected to the detection electrode of the nanopore 601; the drain of the first transistor is connected to the drain of the third transistor and is connected to the charging end of the integral capacitor 614. The output end of the first operational amplifier circuit (OP1) 608 is connected to the control end of the first transistor of the first clamp tube 610, and the output end of the second operational amplifier circuit (OP2) 609 is connected to the control end of the third transistor of the second clamp tube 611.

[0059] The first operational amplifier circuit (OP1) 608 further adds a fifth transistor 620 on the basis of the five-transistor (5T) operational amplifier, and the second operational amplifier circuit (OP2) 609 further adds a sixth transistor 621 on the basis of the five-transistor (5T) operational amplifier. The control end of the fifth transistor is connected to the control end of the sixth transistor, and is connected to the switching control signal CMDN. The switching control signal CMDN is an inverted signal of the control signal CMD in the above embodiment, which is used to control the conduction and disconnection of the fifth transistor and the sixth transistor, and switch the working state of the first operational amplifier circuit (OP1) 608 and the second operational amplifier circuit (OP2) 609. At the same time, it can be realized that only one operational amplifier circuit is working in the charging and discharging states, thereby reducing the power consumption of the entire circuit unit.

[0060] When the switching control signal CMDN is "0", the fifth transistor 620 is turned off, the sixth transistor 621 is turned on, the second operational amplifier circuit (OP2) 609 is working, the power supply of the first operational amplifier circuit (OP1) 608 is cut off, and the control terminal of the first clamping tube 610 is pulled to a high level, the charging path is closed, and the circuit works in a discharge state. When the switching control signal CMDN is "1", the fifth transistor 620 is turned on, the sixth transistor 621 is turned off, the first operational amplifier circuit (OP1) 608 is working, the power supply of the second operational amplifier circuit (OP2) 609 is cut off, and the control terminal of the second clamping tube 611 is pulled down to a low level, the discharge path is closed, and the circuit works in a charging state, thereby realizing the selection of the circuit detection direction. Compared with the previous embodiment, in this embodiment, only one operational amplifier (OP1 or OP2) is working, which can reduce the power consumption of the entire unit by about 50%, and can achieve the same circuit area, and greatly reduce the overall power consumption in high-throughput integration. Compared with the working timing of the circuit in the present embodiment and the third embodiment, the switching control signal CMDN is an inverted signal of CMD, and other control signals are the same.

[0061] Figure 7 FIG. 1 is a schematic diagram of the structure of a gene sequencing device according to an embodiment of the present disclosure. Figure 7As shown, the gene sequencing device of this embodiment includes multiple integrated micropore structure units 702 and multiple nanopore sequencing circuit units 706 described in any of the above embodiments, and the micropore structure units 702 correspond to the nanopore sequencing circuit units 706 one by one. Each micropore structure unit 702 includes a nanopore 704, a common electrode 701 located on both sides of the nanopore 704, and a detection electrode 703. The device can realize the micropore structure unit 702 through MEMS technology, and integrate the micropore structure unit 702 and the corresponding nanopore sequencing circuit unit 706 on the same chip, thereby forming a high-throughput gene sequencing device.

[0062] In some embodiments, multiple micropore structure units 702 can share a common electrode 701, and the output voltages of multiple nanopore sequencing circuit units 706 can be output to the shared common signal line 707 through a selection switch, and converted into digital signals by an analog-to-digital converter 709 and then output, thereby realizing the multiplexing of the analog-to-digital conversion function of the output voltage signal of the nanopore sequencing circuit unit 706.

[0063] In some embodiments, the gene sequencing device further includes a common tail current source 708 , one end of the common tail current source 708 is connected to the common signal line 707 , and the other end is connected to the ground potential.

[0064] The nanopore sequencing circuit unit of the disclosed embodiment can be implemented using CMOS circuits, which have a very small circuit area and are suitable for integrating and constructing nanopore gene sequencing devices with a throughput of millions or even tens of millions, which can greatly improve the integration level, thereby achieving high throughput and high detection efficiency. In addition, the nanopore sequencing circuit unit of the disclosed embodiment has a bidirectional detection capability, which can further reduce the error rate and improve the detection accuracy of sequencing.

[0065] It should be noted that the above embodiments can be freely combined as needed. In addition, the devices involved in the circuit are described as CMOS devices, and other devices, such as BJT, JFET, etc., can also implement the technical solution of the present disclosure. The above is only a preferred implementation of the present disclosure. It should be pointed out that for ordinary technicians in this technical field, several changes and improvements can be made without departing from the principles of the present disclosure, and these changes and improvements should also be regarded as falling within the scope of protection of the present disclosure.

Claims

1. A nanopore sequencing circuit unit, characterized in that: The nanopore sequencing circuit unit is implemented using a CMOS circuit and is used to detect the bidirectional microcurrent signal of the nanopore, and includes: A nanopore clamp circuit, used to stabilize the voltage of a detection electrode located on one side of the nanopore, generate a fixed voltage difference between the detection electrode and the common electrode located on the other side of the nanopore at both ends of the nanopore, and drive single nucleotide molecules to pass through the nanopore one by one by means of the voltage difference; the nanopore clamp circuit includes a charging path composed of a first operational amplifier circuit and a first clamp tube, and a discharging path composed of a second operational amplifier circuit and a second clamp tube; An integral reset circuit, used to integrate and amplify the bidirectional microcurrent signal of the nanopore and convert it into a voltage signal when the charging path and the discharging path of the nanopore clamping circuit are respectively turned on; an output circuit, used to receive and output the voltage signal converted by the integral reset circuit, The source of the first clamp tube is connected to the source of the second clamp tube and connected to the detection electrode; the drain of the first clamp tube is connected to the drain of the second clamp tube and connected to the integration reset circuit.

2. The nanopore sequencing circuit unit according to claim 1, characterized in that: The negative input terminal of the first operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the first clamp tube; the negative input terminal of the second operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the second clamp tube.

3. The nanopore sequencing circuit unit according to claim 1, characterized in that: The first clamp tube includes a first transistor and a second transistor, and the second clamp tube includes a third transistor and a fourth transistor; wherein the drain of the first transistor is connected to the source of the second transistor, and the drain of the third transistor is connected to the source of the fourth transistor; the source of the first transistor is connected to the source of the third transistor and is connected to the detection electrode; the drain of the second transistor is connected to the drain of the fourth transistor and is connected to the integration reset circuit; the control end of the second transistor is connected to the control end of the fourth transistor and is connected to a first switching control signal; the first switching control signal controls the nanopore clamp circuit to switch between a charging path and a discharging path.

4. The nanopore sequencing circuit unit according to claim 3, characterized in that: The negative input terminal of the first operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the first transistor; the negative input terminal of the second operational amplifier circuit is connected to the detection electrode, the positive input terminal is connected to the common level, and the output terminal is connected to the control terminal of the third transistor.

5. The nanopore sequencing circuit unit according to claim 2, wherein: The first operational amplifier circuit includes a fifth transistor, and the second operational amplifier circuit includes a sixth transistor. The control ends of the fifth transistor and the sixth transistor are connected to a second switching control signal. The fifth transistor and the sixth transistor are used to control the power on and off of the first operational amplifier circuit and the second operational amplifier circuit respectively under the action of the second switching control signal, and to control the nanopore clamp circuit to switch between a charging path and a discharging path.

6. The nanopore sequencing circuit unit according to claim 4 or 5, characterized in that: The first operational amplifier circuit and the second operational amplifier circuit further include bias voltage input terminals, wherein the bias voltage input terminal of the first operational amplifier circuit inputs a first bias voltage, and the bias voltage input terminal of the second operational amplifier circuit inputs a second bias voltage.

7. The nanopore sequencing circuit unit according to claim 4, characterized in that: The integration reset circuit includes an integration capacitor and a first reset switch, wherein the first end of the integration capacitor is connected to the first end of the first reset switch and is also connected to the drain of the second transistor and the drain of the fourth transistor, and the second end of the integration capacitor is connected to the ground potential; the second end of the first reset switch is connected to a precharge voltage for periodically resetting the voltage of the integration capacitor.

8. The nanopore sequencing circuit unit according to claim 5, characterized in that: The integration reset circuit includes an integration capacitor and a first reset switch, wherein the first end of the integration capacitor is connected to the first end of the first reset switch and is also connected to the drains of the first clamp tube and the second clamp tube, and the second end of the integration capacitor is connected to the ground potential; the second end of the first reset switch is connected to a pre-charge voltage for periodically resetting the voltage of the integration capacitor.

9. The nanopore sequencing circuit unit according to claim 7 or 8, characterized in that: The output circuit includes a second source follower and a selection switch, wherein the input end of the second source follower is connected to the first end of the integration capacitor, the output end is connected to the first end of the selection switch, and the second end of the selection switch outputs the voltage signal converted by the integration reset circuit to the common signal line.

10. The nanopore sequencing circuit unit according to claim 9, characterized in that: The nanopore sequencing circuit unit also includes a second reset switch, a first end of which is connected to the detection electrode, and a second end of which is connected to the common level, for fixing the voltage of the detection electrode at the common level when the nanopore clamp circuit switches between the charging path and the discharging path.

11. A gene sequencing device, characterized in that: A chip comprising a plurality of micropore structural units and a plurality of nanopore sequencing circuit units as described in any one of claims 1 to 10, wherein the micropore structural unit comprises a nanopore, a common electrode located on both sides of the nanopore, and a detection electrode; the plurality of nanopore sequencing circuit units are correspondingly connected to the plurality of micropore structural units for measuring bidirectional microcurrent signals of the nanopores in the corresponding micropore structural units.

12. The gene sequencing device according to claim 11, characterized in that: It also includes a common signal line and an analog-to-digital conversion circuit connected to the common signal line, wherein the common signal line is used to receive the voltage signal output by the nanopore sequencing circuit unit, and the analog-to-digital conversion circuit is used to convert the voltage signal into a digital signal.

13. The gene sequencing device according to claim 12, characterized in that: It also includes a common tail current source, one end of which is connected to the common signal line, and the other end of which is connected to the ground potential.

14. The gene sequencing device according to claim 11, characterized in that: The chip includes a MEMS chip that implements the microporous structure unit.

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