A control method for Vienna rectifier topology based on SiC power devices

Abstract

This invention discloses a control method for a Vienna rectifier topology based on SiC power devices. First, a mathematical model of a three-phase Vienna rectifier is established; then, the expressions for the Vienna rectifier's midpoint voltage and current are derived; an inner current loop is designed; an outer voltage loop is designed; and finally, midpoint potential balance control is performed. This invention can reduce the size of the Vienna rectifier system, improve the power factor, and reduce system losses.

Description

Technical Field

[0001] This invention belongs to the field of nonlinear control technology, specifically relating to a control method for a Vienna rectifier topology based on SiC power devices. Background Technology

[0002] The Vienna rectifier is a rectifier device constructed using a three-phase, three-level VIENNA rectifier topology. It boasts advantages such as high output power density, low component stress, low grid-side current harmonics, and a high power factor, and has been widely used in civil and industrial fields. However, compared to traditional three-level rectifier circuits, the VIENNA circuit also suffers from inherent midpoint voltage fluctuations. Furthermore, during steady-state operation, the VIENNA rectifier, employing traditional Si power components, is limited by the material characteristics of these Si-based components.

[0003] Due to the tail current during turn-off, the turn-off loss of Si-based IGBTs cannot be effectively reduced, limiting their operating switching speed. Because Si-based IGBTs have a positive temperature coefficient, their internal on-resistance increases with junction temperature, resulting in higher conduction losses at higher junction temperatures. Furthermore, due to the conductance modulation effect during forward conduction, Si-based IGBTs cannot maintain low on-resistance over a wide power range, especially at lower power ratings where conduction losses are significant.

[0004] In summary, the low switching speed and high power loss of Si-based IGBTs have limited their high-frequency development and the miniaturization of heat sinks, making it difficult for VIENNA rectifier circuits using Si transistors to be made into miniaturized products with higher efficiency and higher frequency.

[0005] Compared to Si-based power devices, SiC power devices have significant advantages in material properties. To overcome the inherent midpoint current fluctuation problem of VIENNA rectifier circuits and the product upgrade bottlenecks caused by the special material characteristics of Si-based devices, research on VIENNA rectifier circuit topologies based on SiC power devices has become a development trend. Summary of the Invention

[0006] The purpose of this invention is to provide a control method for the Vienna rectifier topology based on SiC power devices. This method can reduce the size of the VIENNA rectifier system, improve the power factor, and reduce system losses.

[0007] The technical solution adopted in this invention is a control method based on the Vienna rectifier topology of SiC power devices, which is implemented according to the following steps:

[0008] Step 1: Establish a mathematical model of the three-phase VIENNA rectifier;

[0009] Step 2: Derivation of the expressions for the midpoint voltage and current of the VIENNA rectifier;

[0010] Step 3: Design the inner current loop;

[0011] Step 4: Design the voltage outer loop;

[0012] Step 5: Midpoint potential balance control.

[0013] The invention is further characterized in that,

[0014] Step 1 is implemented in the following steps:

[0015] Step 1: The equations for the three-phase, three-level VIENNA rectifier circuit are as follows:

[0016]

[0017] In equation (1): ia, ib, and ic are inductor currents; U ON Ua, Ub, and Uc are the voltages from the capacitor neutral point to the grid neutral point; Ua, Ub, and Uc are the three-phase input voltages of the rectifier; U ao U bo U co These are the three-phase input voltages to the neutral point of the capacitor.

[0018] The derivation of the expressions for the midpoint voltage and current of the VIENNA rectifier in step 2 is as follows:

[0019] As phase a, when switch Sa is in the on state, the input terminal of phase a of the rectifier is clamped at the DC midpoint voltage O; when switch Sa is in the off state, the output terminal voltage of phase a of the rectifier is +U. c1 or -U c2 The sign of the voltage depends on the polarity of the phase a current. The voltage signal is sampled and normalized using power factor correction to obtain a unit sinusoidal signal in phase with the input voltage. Then, the specific value of the current signal is taken as the gain and superimposed with the unit sinusoidal signal to obtain a current signal with the same polarity as the voltage. Finally, each phase voltage has three levels, and the relative DC side midpoint potential voltage of each phase input terminal is expressed as follows:

[0020]

[0021] In equation (2) U c1 and U c2 These are the voltages of the DC-side filter capacitors C1 and C2, respectively.

[0022] When the DC side midpoint potential is balanced, U c1 =U c2 =Udc / 2, U dc For the DC-side output voltage, in a three-phase balanced system, from equation (2) we get:

[0023]

[0024] Midpoint current i O It is the sum of the currents flowing through the three-phase power dual-switch transistors, expressed as follows:

[0025] i O =S a i a +S b i b +S c i c (4).

[0026] Step 3 is as follows:

[0027] First, adjust the outer voltage loop, using the reference voltage V. dref With actual voltage V dc The difference between the two signals is compared and then output after adjustment by a PI controller. Next, the inner current loop is adjusted by converting the acquired grid-side voltage signal into a unit sine wave using an SPLL controller and then comparing it with the outer voltage loop output signal i. dref Multiplication is performed, and the output signal, serving as the setpoint for the current loop, is in phase with the grid-side voltage, achieving power factor correction. Simultaneously, the current loop compares the setpoint with the actual input current and calculates the difference to obtain the error signal. Furthermore, to achieve midpoint potential balance control, the voltage U across the upper and lower capacitors on the DC output side is... C1 U C2 The difference between the samples is calculated, and the result is adjusted and limited before participating in the inner current loop regulation to obtain Δi. Δi is compared and output by the current hysteresis controller and then driven by PWM to realize the control of the VIENNA rectifier.

[0028] The formula for calculating the minimum loop width of rectifier hysteresis control is as follows:

[0029]

[0030] Where: h is the hysteresis width of the hysteresis circuit, T is the sampling period, and L is the input-side inductance;

[0031] Equation (5) is used to calculate the minimum loop width required to meet the control requirements. Since the VIENNA rectifier uses a bidirectional switch, the inner loop controller will have different output logic when the current direction is different. The switching transistor operation logic is as follows:

[0032]

[0033] As phase a, bidirectional switch Sa One end is connected to the output terminal of the grid-side inductor, and the other end is connected to the midpoint of the DC output-side filter capacitor. The current i is selected as... a With the direction from the grid side to the load side being positive, the following analysis is performed on the operating status of the VIENNA rectifier under normal line conditions:

[0034] (1) When Ua>0, the bidirectional switch Sa is turned on. At this time, the AC side inductor La is in the energy storage state, the input current ia increases, and ia rises to the upper limit of the hysteresis loop. After Sa is turned off, the AC-side inductor La charges the DC-side filter capacitor C1 through the upper bridge arm diode of phase a and discharges to the load at the same time. The current ia on the AC-side inductor La decreases until it reaches the lower hysteresis limit. Afterwards, Sa resumed conduction;

[0035] (2) When Ua<0, the bidirectional switch Sa is turned on. At this time, the AC side inductor La is in the energy storage state, and the input current ia decreases until it reaches the lower limit of the hysteresis loop. Afterwards, the bidirectional switch Sa is turned off, and the AC-side inductor La charges the DC-side filter capacitor C2 through the lower bridge arm diode of phase a, while discharging to the load. At this time, the current ia in the AC-side inductor La rises, and waits until ia rises to the upper limit of the hysteresis loop. After that, Sa was reconnected.

[0036] Step 4 is as follows:

[0037] The open-loop transfer function of the outer voltage loop is derived as follows:

[0038]

[0039] In the formula, T ev It is the inertial time constant T cv and the small time constant T of the inner current loop s Add three times the sum;

[0040] Voltage loop intermediate frequency bandwidth:

[0041] h v =T v / T ev (8)

[0042] By tuning the controller parameters of a typical Type II system, the corresponding parameters are obtained:

[0043]

[0044] Take the intermediate frequency bandwidth h v =T v / T ev=5, substituting into equation (9), the calculated parameters of the voltage outer loop PI controller are as follows:

[0045]

[0046] In the formula, τ v This represents the small inertial time constant of the voltage outer loop sampling.

[0047] Step 5 is as follows:

[0048] When the DC-side capacitor voltage is unbalanced, let

[0049] ΔU O =U C1 -U C2 (11)

[0050] Where ΔU O This refers to the voltage deviation between the upper and lower DC side capacitors.

[0051] Introducing midpoint potential compensation into the current control loop, and adding midpoint bias compensation to the three-phase given current amplitude, the expression is as follows:

[0052] i Ob =K O (U C1 -U C2 (12)

[0053] In the formula, K O It is the compensation coefficient at the neutral point, if U C1 Greater than U C2 i * Superimposing a DC component containing midpoint information onto a given current reference value makes U C2 Get bigger, i * in U C1 Less than U C2 When the DC component containing midpoint information is subtracted, U C1 Get smaller;

[0054] The current is given after incorporating midpoint potential information as follows:

[0055]

[0056] to i Ob Apply amplitude limiting.

[0057] The beneficial effects of the present invention are: (1) Using the control method of the present invention, the capacity of the grid-side filter inductor and the DC-side filter capacitor in the Vienna rectifier topology based on SiC power devices can be reduced accordingly; (2) Using the control method of the present invention, only the hysteresis width needs to be adjusted to achieve stable operation under different load conditions; (3) The control method of the present invention has midpoint potential balance control, which can greatly improve the power quality of the input and output sides; (4) The control method of the present invention is a general control method. By adjusting the control circuit and control strategy, the control method can be applied to Vienna rectifiers with different topologies and different power levels; (5) The control method of the present invention can greatly improve the switching frequency. The Vienna rectifier based on SiC power devices controlled by it can improve the utilization rate of power devices and increase power density; (6) Under different operating conditions, the grid-side inductor of the Vienna rectifier in the present invention can effectively reduce the current spikes in the charging and discharging circuits. The input current is a continuous current, which can effectively reduce EMI noise and improve the energy conversion efficiency of the converter. Attached Figure Description

[0058] Figure 1 This is a simplified equivalent circuit diagram of the VIENNA rectifier;

[0059] Figure 2 is a schematic diagram of the eight switching mode currents of the present invention; wherein, Figure 2(a) is S a S b S c The current path diagram when S = 000 is shown in Figure 2(b). a S b S c The current path diagram when =001, Figure 2(c) is the current path diagram of S. a S b S c The current path diagram when S = 010 is shown in Figure 2(d). a S b S c The current path diagram when =011, Figure 2(e) is the current path diagram of S. a S b S c The current path diagram when S = 100 is shown in Figure 2(f). a S b S c The current path diagram when S = 101 is shown in Figure 2(g). a S b S c The current path diagram when S = 110 is shown in Figure 2(h). a S b S c Current path diagram when =111;

[0060] Figure 3 This is a schematic diagram of the control method in this invention;

[0061] Figure 4 This is a diagram of the external conditioning circuit for the current acquisition module in this invention;

[0062] Figure 5 This is a diagram of the external conditioning circuit for the voltage acquisition module in this invention. Detailed Implementation

[0063] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0064] The present invention relates to a control method for a Vienna rectifier topology based on SiC power devices, the flowchart of which is shown below. Figure 3 As shown, please follow these steps:

[0065] Step 1: Establish a mathematical model of the three-phase VIENNA rectifier;

[0066] Step 1 is implemented in the following steps:

[0067] Step 1: The equations for the three-phase, three-level VIENNA rectifier circuit are as follows:

[0068]

[0069] In equation (1): ia, ib, and ic are inductor currents; U ON Ua, Ub, and Uc are the voltages from the capacitor neutral point to the grid neutral point; Ua, Ub, and Uc are the three-phase input voltages of the rectifier; U ao U bo U co These are the three-phase input voltages to the neutral point of the capacitor.

[0070] Step 2: Derivation of the expressions for the midpoint voltage and current of the VIENNA rectifier;

[0071] The derivation of the expressions for the midpoint voltage and current of the VIENNA rectifier in step 2 is as follows:

[0072] As phase a, when switch Sa is in the on state, the input terminal of phase a of the rectifier is clamped at the DC midpoint voltage O; when switch Sa is in the off state, the output terminal voltage of phase a of the rectifier is +U. c1 or -U c2 The sign of the voltage depends on the polarity of the phase a current. The voltage signal is sampled and normalized using power factor correction to obtain a unit sinusoidal signal in phase with the input voltage. Then, the specific value of the current signal is taken as the gain and superimposed with the unit sinusoidal signal to obtain a current signal with the same polarity as the voltage. Finally, each phase voltage has three levels, and the relative DC side midpoint potential voltage of each phase input terminal is expressed as follows:

[0073]

[0074] In equation (2) U c1 and U c2 These are the voltages of the DC-side filter capacitors C1 and C2, respectively.

[0075] When the DC side midpoint potential is balanced, U c1 =U c2 =U dc / 2, U dc For the DC-side output voltage, in a three-phase balanced system, from equation (2) we get:

[0076]

[0077] Midpoint current i O It is the sum of the currents flowing through the three-phase power dual-switch transistors, expressed as follows:

[0078] i O =S a i a +S b i b +S c i c (4).

[0079] Step 3: Design the inner current loop;

[0080] Step 3 is as follows:

[0081] Control methods such as Figure 3 As shown, first, the outer voltage loop is adjusted, with the reference voltage V. dref With actual voltage V dc The difference between the two signals is compared and then output after adjustment by a PI controller. Next, the inner current loop is adjusted by converting the acquired grid-side voltage signal into a unit sine wave using an SPLL controller and then comparing it with the outer voltage loop output signal i. dref Multiplication is performed, and the output signal, serving as the setpoint for the current loop, is in phase with the grid-side voltage, achieving power factor correction. Simultaneously, the current loop compares the setpoint with the actual input current and calculates the difference to obtain the error signal. Furthermore, to achieve midpoint potential balance control, the voltage U across the upper and lower capacitors on the DC output side is... C1 U C2 The difference between the samples is calculated, and the result is adjusted and limited before participating in the inner current loop regulation to obtain Δi. Δi is compared and output by the current hysteresis controller and then driven by PWM to realize the control of the VIENNA rectifier.

[0082] This invention employs hysteresis current control for the VIENNA rectifier current loop. Structurally, this current controller eliminates the need for a conventional current regulator, utilizing a nonlinear hysteresis loop to regulate the input current. The hysteresis width is set to h. When the current deviation exceeds +h or falls below -h, the power switch in the main circuit opens or closes according to preset logic, forcing the current deviation to decrease, thereby achieving input current control. The selection of the loop width h requires balancing the relationship between grid-side current harmonics and the switching frequency. A smaller h results in a higher switching frequency and lower current harmonics; however, due to the constraints of the power switch, the switching frequency should not be too high. Conversely, a larger h results in a lower switching frequency and higher current harmonics, causing significant current fluctuations and switching losses, thus affecting power factor improvement. Selecting an appropriate loop width h is crucial for achieving this method while ensuring output stability.

[0083] The formula for calculating the minimum loop width of rectifier hysteresis control is as follows:

[0084]

[0085] Where: h is the hysteresis width of the hysteresis circuit, T is the sampling period, and L is the input-side inductance;

[0086] Equation (5) is used to calculate the minimum loop width required to meet the control requirements. Since the VIENNA rectifier uses a bidirectional switch, the inner loop controller will have different output logic when the current direction is different. The switching transistor operation logic is as follows:

[0087]

[0088] As phase a, bidirectional switch S a One end is connected to the output terminal of the grid-side inductor, and the other end is connected to the midpoint of the DC output-side filter capacitor. The current i is selected as... a With the direction from the grid side to the load side being positive, the following analysis is performed on the operating status of the VIENNA rectifier under normal line conditions:

[0089] (1) When Ua>0, the bidirectional switch Sa is turned on. At this time, the AC side inductor La is in the energy storage state, the input current ia increases, and ia rises to the upper limit of the hysteresis loop. After Sa is turned off, the AC-side inductor La charges the DC-side filter capacitor C1 through the upper bridge arm diode of phase a and discharges to the load at the same time. The current ia on the AC-side inductor La decreases until it reaches the lower hysteresis limit. Afterwards, Sa resumed conduction;

[0090] (2) When Ua<0, the bidirectional switch Sa is turned on. At this time, the AC side inductor La is in the energy storage state, and the input current ia decreases until it reaches the lower limit of the hysteresis loop. Afterwards, the bidirectional switch Sa is turned off, and the AC-side inductor La charges the DC-side filter capacitor C2 through the lower bridge arm diode of phase a, while discharging to the load. At this time, the current ia in the AC-side inductor La rises, and waits until ia rises to the upper limit of the hysteresis loop. After that, Sa was reconnected.

[0091] Step 4: Design the voltage outer loop;

[0092] Step 4 is as follows:

[0093] Voltage outer loop controller such as Figure 3 As shown, the voltage signal acquired by the AD7606 voltage Hall element is compared with the given voltage, and the voltage error is adjusted using a PI controller. The voltage outer loop adjustment result, used as the reference for the current inner loop, requires strong anti-interference capabilities. Considering the characteristics of Type I and Type II systems, this design follows a typical Type II system, resulting in the following open-loop transfer function for the voltage outer loop:

[0094]

[0095] In the formula, T ev It is the inertial time constant T cv and the small time constant T of the inner current loop s Add three times the sum;

[0096] Voltage loop intermediate frequency bandwidth:

[0097] h v =T v / T ev (8)

[0098] By tuning the controller parameters of a typical Type II system, the corresponding parameters are obtained:

[0099]

[0100] Considering that voltage loop control systems need to take into account characteristics such as disturbance rejection and tracking performance, the intermediate frequency bandwidth h is usually chosen in engineering. v =T v / T ev =5, substituting into equation (9), the calculated parameters of the voltage outer loop PI controller are as follows:

[0101]

[0102] In the formula, τ v This represents the small inertial time constant of the voltage outer loop sampling.

[0103] The output logic of the hysteresis comparator is known to be 1 when the error signal is greater than the upper hysteresis width and 0 when the error signal is less than the lower hysteresis width. Since the output logic of the current controller is related to the direction of the grid-side current, and the grid-side current direction should be consistent with the grid-side voltage waveform, the grid-side voltage waveform and the voltage zero point are compared using a comparator to determine the current direction. When the grid-side voltage Ui (i = a, b, c) > 0, the voltage comparator outputs logic 1; when the grid-side voltage Ui (i = a, b, c) < 0, the voltage comparator outputs logic 0. To obtain the set logic output, the output of the hysteresis comparator and the output of the voltage comparator should be XORed. The resulting logic control signal is the logic signal that satisfies the set parameters.

[0104] Step 5: Midpoint potential balance control.

[0105] Step 5 is as follows:

[0106] When the DC-side capacitor voltage is unbalanced, let

[0107] ΔU O =U C1 -U C2 (11)

[0108] Where ΔU O This refers to the voltage deviation between the upper and lower DC side capacitors.

[0109] To address the issue of compensating for midpoint potential fluctuations caused by DC-side capacitor voltage imbalance, midpoint potential compensation is introduced into the current control loop, and a midpoint bias compensation is added to the three-phase given current amplitude, as expressed below:

[0110] i Ob =K O (U C1 -U C2 (12)

[0111] In the formula, K O It is the compensation coefficient at the neutral point, if U C1 Greater than U C2 i * Superimposing a DC component containing midpoint information onto a given current reference value makes U C2 Get bigger, i * in U C1 Less than U C2 When the DC component containing midpoint information is subtracted, U C1 Get smaller;

[0112] The current is given after incorporating midpoint potential information as follows:

[0113]

[0114] To avoid the DC side neutral point being at the command current i * A large DC bias is superimposed on the input current quality, affecting i Ob Apply amplitude limiting.

[0115] Description of the current Hall element (model CC6920SO-30A) and the voltage Hall element (model AD7606):

[0116] (1) CC6920SO-30A

[0117] The CC6920 is a high-performance Hall effect current sensor that integrates a high-precision, low-noise linear Hall circuit and a low-impedance main current conductor. It can more effectively measure DC or AC current and has high accuracy, excellent linearity and temperature stability. It is widely used in industrial, consumer and communication equipment.

[0118] The pin definitions for CC6920SO-30A are shown in Table 1:

[0119] Table 1. CC6920SO-30A Pin Definitions

[0120] name serial number Function name serial number Function IP+ 1 Sampling current positive terminal GND 5 land IP+ 2 Sampling current positive terminal VZCR 6 Zero current reference signal output IP- 3 negative terminal of sampling current OUT 7 signal output terminal IP- 4 negative terminal of sampling current VCC 8 power supply voltage

[0121] The specific usage of CC6920 is as follows: leave the ZVCR pin of CC6920 floating, connect its VCC pin and GND pin to power and ground respectively, the current signal enters CC6920 through IP+ and IP-, is processed and output on the OUT pin, and then after RC filtering, a stable signal is obtained, which is provided to the controller as the result of current acquisition.

[0122] (2)AD7606

[0123] The AD7606 is an eight-channel, bipolar input, synchronous sampling 16-bit ADC. It has a built-in 2.5V reference voltage. After configuring the AD7606, data acquisition begins. Because the AD7606's data lines are DB[0:15], it is equivalent to having 16 bits. The actual range of the obtained value is 0 to 32767. The input voltage range is then selected using the RANGE pin, and the actual measured voltage value is obtained according to the conversion algorithm.

[0124] The specific usage of AD7606 is as follows: Powered by a single 5V supply, each of the four AVCC power pins of AD7606 is decoupled using a 100nF capacitor, and a 10uF capacitor is used for decoupling on the power supply side. The REFIN / REFOUT pins are decoupled using a 10uF capacitor. Since the required range selection for this design is ±10V, RANGE needs to be connected to a high level. VI0 is the communication interface, and DB[0:15] serves as the data bus, connecting to the MCU for data transmission. Since AD7606 is used as a parallel communication external voltage reference in this design, the PAR / SER port and REF_SELECT port are grounded via 10k resistors according to the manual, and the remaining ports are connected sequentially according to their physical meaning.

[0125] This invention focuses on the Vienna rectifier circuit topology based on SiC power devices and proposes a control method for this topology. This research addresses two key issues: first, by utilizing SiC power devices, the Vienna rectifier system can achieve small size, light weight, and high integration; second, by employing a midpoint potential balance control method, the harmonic content of the input current can be reduced, improving grid-side power quality.

[0126] The simplified equivalent circuit of the VIENNA rectifier is as follows: Figure 1 As shown, the switching states of a double switch are defined as follows:

[0127]

[0128] Taking 0° to 60° as an example, U a >0, U b <0, U c >0, if the S corresponding to the three-phase switch a S b S c Analyzing the circuit's operating state under eight switching states (000-001-010-011-100-101-110-111) yields eight operating modes, such as... Figures 2(a) to 2(h) As shown in the figure, the current path is illustrated under different switching modes.

[0129] The block diagram of the VIENNA rectifier control structure of the present invention is as follows: Figure 3 As shown. Based on power calculations, the input current does not exceed 30A, therefore, the current acquisition module uses a CC6920SO-30A current Hall element. The specific current acquisition circuit design is as follows. Figure 4 As shown. The voltage acquisition module uses the AD7606 module for acquisition. The AD7606 module is as follows: Figure 5 As shown, the AD sampling frequency is 25kHz.

[0130] In this design, the PCB size is 20×20cm. 2 The PCB design uses trace widths based on a maximum current of 10A, and the operating current during normal operation is 5.67A. The voltage rating is 1000V DC, meeting the 700V operating voltage requirement on the output side, while also providing a 300V safety margin. The DC output side filter capacitors are designed to withstand 900V.

[0131] The prototype mainly consists of four parts: auxiliary power supply and drive circuit, input-side filter inductor, power devices and their heat sinks, and DC-side filter capacitor. The prototype measures 20×20×7cm. 3 The power density can reach 17.56 W / in 3 .

[0132] This invention employs hysteresis current control as the current loop for the VIENNA rectifier. Structurally, this current controller eliminates the need for a conventional current regulator, instead utilizing a nonlinear hysteresis loop to regulate the input current. The hysteresis width is set to h. When the current deviation exceeds +h or falls below -h, the power switch in the main circuit opens or closes according to preset logic, forcing the current deviation to decrease, thereby achieving input current control.

Claims

1. A control method for a Vienna rectifier topology based on SiC power devices, characterized in that, The specific steps are as follows: Step 1: Establish a mathematical model of the three-phase VIENNA rectifier; Step 1 is implemented in the following steps: Step 1: The equations for the three-phase, three-level VIENNA rectifier circuit are as follows: In formula (1): , , It is the inductor current; It is the voltage from the neutral point of the capacitor to the neutral point of the power grid; , , It is the three-phase input voltage of the rectifier; These are the three-phase input voltages to the neutral point of the capacitor; Step 2: Derivation of the expressions for the midpoint voltage and current of the VIENNA rectifier; The expressions for the midpoint voltage and current of the VIENNA rectifier in step 2 are derived as follows: As phase a, switch When in the ON state, the input terminal of phase a of the rectifier is clamped at the DC midpoint voltage O; the switch When the rectifier is in the off state, the output voltage of phase a of the rectifier is or The sign of the voltage depends on the polarity of the phase a current. The voltage signal is sampled and normalized using power factor correction to obtain a unit sinusoidal signal in phase with the input voltage. Then, the specific value of the current signal is taken as the gain and superimposed with the unit sinusoidal signal to obtain a current signal with the same polarity as the voltage. Finally, each phase voltage has three levels, and the relative DC side midpoint potential voltage of each phase input terminal is expressed as follows: （2） In formula (2) and These are the DC-side filter capacitors. and Voltage; When the DC side midpoint potential is balanced, , For the DC-side output voltage, in a three-phase balanced system, from equation (2) we get: （3） Midpoint current It is the sum of the currents flowing through the three-phase power dual-switch transistors, expressed as follows: （4）； Step 3: Design the inner current loop; Step 4: Design the voltage outer loop; Step 5: Midpoint potential balance control; Step 5 is described in detail below: When the DC-side capacitor voltage is unbalanced, let （11） in This refers to the voltage deviation between the upper and lower DC side capacitors. Introducing midpoint potential compensation into the current control loop, and adding midpoint bias compensation to the three-phase given current amplitude, the expression is as follows: （12） In the formula, It is the compensation coefficient at the neutral point, if Greater than , Superimposing a DC component containing midpoint information onto a given current reference value makes Get bigger exist Less than Subtracting the DC component containing midpoint information at the time makes Get smaller; The current is given after incorporating midpoint potential information as follows: （13） right Apply amplitude limiting.

2. The control method for the Vienna rectifier topology based on SiC power devices according to claim 1, characterized in that, Step 3 is described in detail below: First, adjust the outer voltage loop, using the reference voltage. With actual voltage The difference between the two signals is calculated, and the error signal is output after being adjusted by a PI controller. Secondly, the inner current loop is adjusted. The acquired grid-side voltage signal is sinusoidally converted by the SPLL controller and then compared with the outer voltage loop output signal. Multiplication is performed, and the output signal, serving as the setpoint for the current loop, is in phase with the grid-side voltage, achieving power factor correction. Simultaneously, the current loop compares the setpoint with the actual input current and calculates the difference to obtain the error signal. Furthermore, to achieve midpoint potential balance control, the voltage across the upper and lower capacitors on the DC output side is... The difference between the samples is calculated, and the result, after adjustment and limiting, is also used in the inner current loop regulation. , The VIENNA rectifier is controlled by comparing the output through a current hysteresis controller and then driving it with PWM. The formula for calculating the minimum loop width of rectifier hysteresis control is as follows: （5） In the formula: Where L is the hysteresis width of the hysteresis circuit, T is the sampling period, and L is the input-side inductance. The minimum loop width required to meet the control requirements is calculated using equation (5). Since the VIENNA rectifier uses a bidirectional switch, the inner loop controller will have different output logic when the current direction is different. The switching transistor operation logic is as follows: （6） As phase a, bidirectional switch One end is connected to the output terminal of the grid-side inductor, and the other end is connected to the midpoint of the DC output-side filter capacitor. The current is selected... With the direction from the grid side to the load side being positive, the following analysis is performed on the operating status of the VIENNA rectifier under normal line conditions: (1) When At that time, two-way switch When the circuit is turned on, the AC side inductor... In energy storage state, input current Increase Rise to the upper limit of hysteresis back, Off, AC side inductor The DC-side filter capacitor is connected via the upper bridge arm diode of phase a. While charging, it also discharges to the load, AC side inductor Current on Decrease, decrease to the lower limit of hysteresis. back, Restore conduction; (2) When At that time, two-way switch When the circuit is turned on, the AC side inductor... In energy storage state, input current Decrease, decrease to the lower limit of hysteresis. Afterwards, two-way switch Off, AC side inductor The DC-side filter capacitor is connected via the lower bridge arm diode of phase a. During charging and discharging to the load, the AC side inductor... Current on Rise, waiting Rise to the upper limit of hysteresis back, It was reconnected.

3. The control method for the Vienna rectifier topology based on SiC power devices according to claim 2, characterized in that, Step 4 is as follows: The open-loop transfer function of the outer voltage loop is derived as follows: （7） In the formula, It is the inertial time constant and small time constant of the inner current loop Add three times the sum; Voltage loop intermediate frequency bandwidth: （8） By tuning the controller parameters of a typical Type II system, the corresponding parameters are obtained: （9） Take the intermediate frequency bandwidth Substituting into equation (9), the calculated parameters of the voltage outer loop PI controller are as follows: （10） In the formula, This represents the small inertial time constant of the voltage outer loop sampling.

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