PCBA carrier board model generation method and system, electronic device, and storage medium

Abstract

The present application relates to a PCBA carrier plate model generation method, system, electronic equipment and storage medium, the method comprises: obtaining basic data; the final clearance contour line of the to-be-tested panel is obtained based on the clearance contour line of all components on the to-be-tested panel and the PCBA outer contour line; the clearance depth of the to-be-tested panel is obtained based on the clearance depth of the components and the minimum clearance depth of the to-be-tested panel; the corresponding clearance groove is generated on the carrier plate based on the final clearance contour line of the to-be-tested panel, the clearance depth of the to-be-tested panel and the layout data of the to-be-tested panel; the second support area is obtained based on the final clearance contour line of the to-be-tested panel, the to-be-tested panel data and the layout data of the to-be-tested panel; the first plate surface support is generated on the carrier plate based on the second support area and the clearance depth of the to-be-tested panel; the radio frequency via, the handle position and the surrounding block slot are generated on the carrier plate, and the final carrier plate model is generated. The method improves the work efficiency and the accuracy of generating the carrier plate model, and saves the design cost for the enterprise.

Description

Technical Field

[0001] This invention belongs to the field of electronic manufacturing technology and relates to a method, system, electronic device and storage medium for generating PCBA carrier board models. Specifically, it relates to a method, system, electronic device and storage medium for automatically generating a three-dimensional model of a PCBA test fixture carrier board. Background Technology

[0002] PCBA (Printed Circuit Board Assembly) test fixtures are essential equipment in PCBA manufacturing plants. They are specialized testing devices primarily used to test various performance characteristics of PCBAs on the PCBA production line.

[0003] Among all the components of a PCBA test fixture, the carrier board is an indispensable main component because it mainly serves the functions of positioning and support.

[0004] Because the test panel (PTB) needs to be placed upside down on the carrier board, sufficient clearance must be provided during carrier board design to avoid damaging the precision components on the PTB. However, due to the large number and variety of components on the PTB, existing manual clearance methods are time-consuming, labor-intensive, and prone to errors. Furthermore, the carrier board design must provide sufficient support for the PTB to prevent excessive deformation of the PCBA during testing by the RF probes. This could cause some test points to deviate from their original positions, hindering proper testing and even damaging the PCBA. The support design on the carrier board requires manual work and demands high skill from the designers; therefore, the support design on the carrier board is a key and challenging aspect of carrier board design.

[0005] Therefore, considering the design requirements of the carrier board and the shortcomings of the existing technologies mentioned above, how to provide a method for generating PCBA carrier board models has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0006] To address the aforementioned problems in the prior art, this invention provides a method, system, electronic device, and storage medium for generating PCBA carrier board models. The technical problem to be solved by this invention is achieved through the following technical solution:

[0007] This invention provides a method for generating PCBA carrier board models, comprising:

[0008] Acquire basic data, which includes a carrier board template file and panel data to be tested; the carrier board template file includes panel layout data to be tested, which includes the number, coordinates and angles of the panels to be tested, and the panel data to be tested includes the PCBA outer contour line, PCBA layout data, component data on the PCBA, and safety distance between the carrier board and the components;

[0009] Based on the component data on the PCBA, the avoidance contour lines of all components on the panel under test are obtained. Based on the avoidance contour lines of all components on the panel under test and the outer contour line of the PCBA, the final avoidance contour line of the panel under test is obtained.

[0010] The component clearance depth is obtained based on the component data on the PCBA and the safe distance between the carrier board and the component. The clearance depth of the panel under test is obtained based on the component clearance depth and the preset minimum clearance depth of the panel under test. Based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test, a corresponding clearance groove is generated on the carrier board.

[0011] A first support region is obtained based on the final clearance contour line of the panel to be tested and the panel data. A second support region is obtained based on the first support region and the panel layout data. Taking the bottom of the clearance groove of the carrier plate as the starting surface and the stretching height as the clearance depth of the panel to be tested, the second support region is additively stretched to generate a first panel support on the carrier plate. The number M of the panels to be tested is obtained according to the panel layout data. If M > 1, the first support region is transformed by coordinates and angles according to the panel layout data to obtain the second support region. If M = 1, the first support region is the second support region. The first support region is all the support regions of a single panel to be tested, and the second support region is all the support regions corresponding to all panels to be tested.

[0012] Radio frequency vias, handles, and surrounding slots are generated on the carrier board to create the final carrier board model.

[0013] This invention provides a PCBA carrier board model generation system, comprising:

[0014] The acquisition module is used to acquire basic data, which includes a carrier board template file and panel data to be tested. The carrier board template file includes panel layout data to be tested, which includes the number, coordinates and angles of the panels to be tested. The panel data to be tested includes the PCBA outer contour line, PCBA layout data, component data on the PCBA, and safety distance between the carrier board and the components.

[0015] The avoidance contour line generation module is used to obtain the avoidance contour lines of all components on the panel under test based on the component data on the PCBA, and to obtain the final avoidance contour line of the panel under test based on the avoidance contour lines of all components on the panel under test and the outer contour line of the PCBA.

[0016] The clearance groove generation module is used to obtain the clearance depth of the components based on the component data on the PCBA and the safe distance between the carrier board and the components, obtain the clearance depth of the panel under test based on the clearance depth of the components and the preset minimum clearance depth of the panel under test, and generate a corresponding clearance groove on the carrier board based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test.

[0017] The first panel support generation module is used to obtain a first support area based on the final clearance contour line of the panel to be tested and the panel data, and to obtain a second support area based on the first support area and the panel layout data. Taking the bottom of the clearance groove of the carrier plate as the starting surface and the stretching height as the clearance depth of the panel to be tested, the second support area is additively stretched to generate the first panel support on the carrier plate. The module obtains the number M of panels to be tested based on the panel layout data. If M > 1, the first support area is transformed by coordinates and angles based on the panel layout data to obtain the second support area. If M = 1, the first support area is the second support area. The first support area represents all support areas of a single panel to be tested, and the second support area represents all support areas corresponding to all panels to be tested.

[0018] The carrier board model generation module is used to generate RF vias, handles, and surrounding slots on the carrier board to generate the final carrier board model.

[0019] The present invention provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; the memory is used to store a computer program; and the processor is used to implement the steps of the method described above when executing the computer program.

[0020] The present invention provides a storage medium storing a computer program, which, when executed by a processor, implements the steps of the method described above.

[0021] The beneficial effects of this invention are:

[0022] Currently, PCBA carrier board design is done manually, which is labor-intensive, inefficient, and requires highly skilled designers. To address these issues, this invention provides a PCBA carrier board model generation method. This method first determines the final clearance outline of the panel to be tested. Then, based on the final clearance outline, clearance depth, and layout data of the panel to be tested, corresponding clearance grooves are generated on the carrier board. Next, a second support area is obtained based on the final clearance outline of the panel to be tested. Finally, RF vias, handles, and surrounding slots are generated on the carrier board, thus generating the final carrier board model. This carrier board model generation method significantly improves work efficiency, increases the accuracy of the generated carrier board model, and saves enterprises substantial design costs, demonstrating high economic value.

[0023] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0024] Figure 1 This is a flowchart illustrating a PCBA carrier board model generation method provided in an embodiment of the present invention;

[0025] Figure 2 This is a flowchart illustrating another PCBA carrier model generation method provided in an embodiment of the present invention;

[0026] Figure 3 This is a schematic diagram of a method for regularizing the outline of a panel to be tested, according to an embodiment of the present invention.

[0027] Figure 4 This is a schematic diagram of a method for regularizing the outer contour line of the support area of ​​a panel to be tested, according to an embodiment of the present invention.

[0028] Figure 5 This is a schematic diagram of the gap within the inner contour line of a filling shield support area provided in an embodiment of the present invention;

[0029] Figure 6 This is a schematic diagram of a method for filling support gaps according to an embodiment of the present invention;

[0030] Figure 7 This is a schematic diagram of a reinforcing rib treatment method provided in an embodiment of the present invention;

[0031] Figure 8 for Figure 7 A schematic diagram showing the region that can be strengthened by extending the region that needs to be strengthened upwards.

[0032] Figure 9 This is a schematic diagram of another reinforcing rib processing procedure provided in an embodiment of the present invention;

[0033] Figure 10 for Figure 9 A schematic diagram showing the region that can be strengthened by extending the region that needs to be strengthened to the right.

[0034] Figure 11 This is a schematic diagram of another reinforcing rib processing method provided in an embodiment of the present invention;

[0035] Figure 12 for Figure 11 A schematic diagram showing the region that can be strengthened by extending the region that needs to be strengthened upwards.

[0036] Figure 13 This is a schematic diagram of a radio frequency via support provided in an embodiment of the present invention;

[0037] Figure 14 This is a schematic diagram of a three-dimensional model of a carrier plate template provided in an embodiment of the present invention;

[0038] Figure 15 This is a schematic diagram of a carrier plate template layout provided in an embodiment of the present invention;

[0039] Figure 16 This is a schematic diagram of the dimensions of the hand-grabbing position provided in an embodiment of the present invention;

[0040] Figure 17 This is a schematic diagram of the dimensions of a surrounding groove provided in an embodiment of the present invention;

[0041] Figure 18 This is a schematic diagram of the outline of a PCBA board provided in an embodiment of the present invention;

[0042] Figure 19 This is a schematic diagram of a shielding cover provided in an embodiment of the present invention;

[0043] Figure 20 This is a schematic diagram of the outer contour line and the clearance contour line of a component provided in an embodiment of the present invention;

[0044] Figure 21 This is a schematic diagram of the initial avoidance contour line (left side) and the final avoidance contour line (right side) of a panel to be tested according to an embodiment of the present invention;

[0045] Figure 22 This is a schematic diagram of generating clearance grooves on a carrier plate according to an embodiment of the present invention;

[0046] Figure 23 This is a schematic diagram of the inward and outward expansion of a contour line provided in an embodiment of the present invention;

[0047] Figure 24 This is a schematic diagram of the initial supportable area (left side), the area to be supported (middle), and the first support area (right side) of a panel to be tested, provided by an embodiment of the present invention.

[0048] Figure 25 This is a schematic diagram of the first plate surface support of a carrier plate for a test panel provided in an embodiment of the present invention;

[0049] Figure 26 This is a schematic diagram of the support outline (left side), initial support area (middle), and filled support area (right side) of a shielding cover provided in an embodiment of the present invention.

[0050] Figure 27 This is a schematic diagram of a carrier plate supporting the second plate surface of a shielding cover according to an embodiment of the present invention;

[0051] Figure 28 This is a schematic diagram of a support gap region provided in an embodiment of the present invention;

[0052] Figure 29 This is a schematic diagram of filling support gaps on a carrier plate according to an embodiment of the present invention;

[0053] Figure 30 This is a schematic diagram of the first support area (left side), the area to be reinforced (middle), and the area that can be reinforced (right side) of a panel to be tested according to an embodiment of the present invention;

[0054] Figure 31 This is a schematic diagram of generating reinforcing ribs on a carrier plate according to an embodiment of the present invention;

[0055] Figure 32 This is a schematic diagram of generating radio frequency vias on a carrier board according to an embodiment of the present invention;

[0056] Figure 33 This is a schematic diagram of a radio frequency via support inspection provided in an embodiment of the present invention;

[0057] Figure 34 This is a schematic diagram of generating a grab position on a carrier board according to an embodiment of the present invention;

[0058] Figure 35 This is a schematic diagram of generating a surrounding groove on a carrier plate according to an embodiment of the present invention;

[0059] Figure 36 This is a schematic diagram of a PCBA carrier board model generation system provided in an embodiment of the present invention;

[0060] Figure 37 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0061] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0062] Example 1

[0063] Please see Figure 1 and Figure 2 , Figure 1 This is a flowchart illustrating a PCBA carrier board model generation method provided in an embodiment of the present invention. Figure 2 This is a flowchart illustrating another PCBA carrier model generation method provided by an embodiment of the present invention. The embodiment of the present invention provides a PCBA carrier model generation method, which may include:

[0064] Step 1: Obtain basic data, which includes the carrier board template file, the data of the panel to be tested, and the 3D CAD file of the shielding cover.

[0065] Specifically, the carrier board template file may include: a 3D model of the carrier board template (geometric data of points, lines, and surfaces), with the origin of the coordinate system at the center of the upper surface of the model and the Z-axis of the coordinate system pointing vertically upwards; one or more test panels that the carrier board can support; layout data of the test panels; and layout data of the handle position and the surrounding block groove. A test panel is formed by splicing several PCBA boards. The layout data of the test panel includes the position (coordinates of the center of the test panel relative to the carrier board coordinate system), quantity, and rotation angle of the test panel. The handle position is a groove structure used to facilitate the retrieval of the test panel located above the handle position. The layout data of the handle position includes the overlap dimension d1, quantity, size, and groove depth. The surrounding block groove is a groove structure used to fix the position of the test panel by placing surrounding blocks within it. The layout data of the surrounding block groove includes the gap dimension d2, quantity, size, and groove depth.

[0066] Wherein, the overlap dimension d1 is the width of the overlapping part between the handle position and the panel to be tested; the gap dimension d2 is the width of the gap between the surrounding groove and the panel to be tested.

[0067] The specific data of the panel under test may include: the dimensions of the panel under test (including length and width), the outline of each PCBA board (including the inner and outer outlines of the PCBA), PCBA layout data, component data on each PCBA, the center coordinates of all RF vias on each PCBA board (coordinates of the center relative to the center of the PCBA board, the center coordinates of the RF vias are the center coordinates of the RF vias) and the radius of the RF vias, the position coordinates of the shielding cover on each PCBA board (coordinates of the origin of the shielding cover coordinate system relative to the center of the PCBA board), and the rotation angle. The PCBA layout data includes the number of PCBA boards (one or more), the position coordinates of each PCBA board (coordinates of the PCBA board center relative to the center of the panel to be tested), rotation angle, and whether it is mirrored. The component data on each PCBA includes the position coordinates of each component (coordinates of the component center relative to the PCBA board center), rotation angle, component height after installation, outer contour line, and safety distance between the carrier board and the component. The safety distance includes lateral clearance distance and depth clearance distance. The lateral clearance distance is the minimum distance between the carrier board and the component on the horizontal plane, and the vertical clearance distance is the minimum distance between the carrier board and the component in the vertical direction.

[0068] When a single panel under test includes multiple PCBAs, the multiple PCBAs can be the same or different. When preparing PCBA data, the corresponding PCBA data can be prepared according to the type of PCBA.

[0069] The 3D CAD file of the shielding cover includes a 3D model of the shielding cover (geometric data of points, lines, and surfaces).

[0070] In this embodiment, the above basic data can be obtained from the ECAD design file and configuration file. The configuration file is obtained according to the carrier board layout rules. Based on the ECAD design file and configuration file, it can be determined whether the PCBA board includes a shield. When the PCBA includes a shield, the basic data corresponds to a 3D CAD file containing the shield. When the PCBA does not include a shield, the basic data does not contain a 3D CAD file containing the shield.

[0071] It should be noted that in this embodiment, the descriptions related to "region," such as "support area" and "gap area," in the following steps all refer to planar regions. Furthermore, each contour line involved in the following steps is formed by sequentially connecting several line segments. Each line segment has two endpoints and can be a curve, a straight line, or other types of lines. The bounding box is the smallest bounding rectangle of the enclosed object. For example, if the bounding box is used to enclose a line segment, then the bounding box is the smallest bounding rectangle of the line segment.

[0072] Step 2: Obtain the clearance contour lines of all components on the panel under test based on the component data on the PCBA. Obtain the final clearance contour lines of the panel under test based on the clearance contour lines of all components on the panel under test and the outer contour line of the PCBA.

[0073] Specifically, the outer contour of each component on the test panel can be determined first by using the component data on the PCBA. Therefore, based on the outer contour of each component on the test panel, the avoidance contour of each component on the test panel can be obtained. The avoidance contour of the component is used to limit the component from colliding with other positions on the test panel. Therefore, after obtaining the avoidance contour of each component on the test panel, the final avoidance contour of the test panel can be obtained by merging the avoidance contours of all components on the test panel and the outer contour of the PCBA. The final avoidance contour is the contour of the test panel used to generate the avoidance groove.

[0074] In one specific embodiment, step 2 may specifically include steps 2.1 to 2.3, wherein:

[0075] Step 2.1: Expand the outer contour line of each component on the panel to be tested by a first preset value to obtain the avoidance contour line of all components on the panel to be tested.

[0076] Optionally, the first preset value D is the lateral clearance distance in the safety distance between the carrier board and the components.

[0077] Step 2.2: Merge the area enclosed by the avoidance contour lines of all components on the panel to be tested with the area enclosed by the outer contour line of the PCBA, and take the outer contour line of the merged area as the initial avoidance contour line of the panel to be tested.

[0078] Step 2.3: Based on the concavity and convexity of the initial avoidance contour line of the panel to be tested, the initial avoidance contour line of the panel to be tested is regularized to obtain the final avoidance contour line of the panel to be tested. Each line segment in the final avoidance contour line of the panel to be tested is a horizontal or vertical line segment, and the final avoidance contour line of the panel to be tested is rounded.

[0079] Specifically, such as Figure 3 As shown, by regularizing each line segment on the initial avoidance contour line, each segment becomes either horizontal or vertical. This eliminates outward-convex and inward-concave lines in the final avoidance contour line, facilitating subsequent steps using the final avoidance contour line of the panel to be tested. Furthermore, to facilitate manufacturing, the final avoidance contour line is rounded at the corners.

[0080] Optionally, the preset value of the rounded corner of the final avoidance contour line is C1, and the value of C1 ranges from 0.5 to 2.0, with 0.5 being preferred.

[0081] To better understand how to make each line segment in the final avoidance contour line a horizontal or vertical line segment, this embodiment illustrates a regularization method, but it should be noted that this embodiment is not limited to the method of this example.

[0082] Furthermore, the initial avoidance contour line is used as the first contour line to be processed for explanation. The specific methods for regularizing the initial avoidance contour line include:

[0083] S1. Along the preset direction, determine the shape of each line segment in the first outline to be processed. For each line segment, if it is a horizontal or vertical straight line, no processing is performed. If it is an arc, continue to determine whether the arc is convex or concave. Regularize the convex arc outward and the concave arc inward. If the line segment is a line segment other than a horizontal or vertical straight line or an arc, regularize the other line segment outward. When regularizing outward, merge the area enclosed by the bounding box of the line segment with the area enclosed by the line segment. When regularizing inward, remove the area enclosed by the bounding box of the line segment from the area enclosed by the line segment. (To retain the safety clearance and facilitate processing, regularize outward or inward according to the actual situation along the direction of increasing the safety clearance. For example, the initial avoidance outline of the panel to be tested is regularized outward, and the area to be supported of the panel to be tested is regularized inward.)

[0084] Optionally, the preset direction can be either counterclockwise or clockwise.

[0085] S2. Delete line segments in the first contour line to be processed whose length is less than twice the radius of the fillet C1. At the same time, delete the two line segments adjacent to the deleted line segments. Connect the gaps formed by the deleted line segments with straight line segments to form a closed second contour line to be processed. Iterate through steps S1-S2 on the second contour line to be processed until the length of all line segments is greater than or equal to the set value to obtain the final regular contour line. The final regular contour line obtained here is the final avoidance contour line.

[0086] Step 3: Based on the component data on the PCBA and the safe distance between the carrier board and the components, obtain the component clearance depth. Based on the component clearance depth and the preset minimum clearance depth of the panel under test, obtain the clearance depth of the panel under test. Based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test, generate the corresponding clearance groove on the carrier board.

[0087] Specifically, the clearance depth for the corresponding component can be determined by using the component height after installation in the component data on the PCBA and the depth clearance distance in the safety distance between the carrier board and the component. Then, by comparing the clearance depth of the component with the preset minimum clearance depth of the panel under test, a suitable clearance depth can be selected as the clearance depth of the panel under test. Therefore, after determining the final clearance outline and clearance depth of the panel under test, the corresponding clearance groove can be directly generated on the carrier board by combining the layout data of the panel under test.

[0088] In one specific embodiment, step 3 may specifically include steps 3.1 to 3.2, wherein:

[0089] Step 3.1: Add the height of each component after installation to the corresponding depth clearance spacing of the component to obtain the clearance depth of each component.

[0090] Step 3.2: Take the larger of the maximum value of the clearance depth among all components and the preset minimum clearance depth of the panel to be tested as the clearance depth of the panel to be tested.

[0091] Optionally, the preset minimum avoidance depth H is in the range of 3.0 to 6.0 mm, preferably 4.5 mm.

[0092] Step 4: Based on the final clearance contour line of the panel to be tested and the panel data, a first support area is obtained. Based on the first support area and the layout data of the panel to be tested, a second support area is obtained. Taking the bottom of the clearance groove of the carrier plate as the starting surface, the stretching height is the clearance depth of the panel to be tested. The second support area is additively stretched to generate a first panel support on the carrier plate. The number M of the panels to be tested is obtained according to the layout data of the panels to be tested. If M > 1, the first support area is transformed by coordinates and angles according to the layout data of the panels to be tested to obtain the second support area. If M = 1, the first support area is the second support area. The first support area is all the support areas of a single panel to be tested, and the second support area is all the support areas corresponding to all panels to be tested.

[0093] Specifically, based on the final clearance contour line of the panel to be tested obtained from the above steps, the area enclosed by the final clearance contour line can be determined. The area within this area that does not require the generation of a carrier plate for the panel surface support of the panel to be tested is removed, resulting in the remaining area. Each line segment in the outer contour line of the remaining area is either horizontal or vertical, thus obtaining the first support area. The number M of the panels to be tested is then obtained based on the panel layout data. If M > 1, the first support area is transformed by coordinates and angles according to the panel layout data to obtain the second support area; if M = 1, the first support area is the second support area. The first support area comprises all support areas for a single panel to be tested, and the second support area comprises all support areas corresponding to all panels to be tested. Then, using the bottom of the clearance groove on the carrier plate as the starting surface and the stretching height as the clearance depth of the panel to be tested, the second support area is additively stretched to generate the first panel surface support on the carrier plate.

[0094] In one specific embodiment, the steps of obtaining a first support region based on the final avoidance contour line of the panel to be tested and the panel data, and obtaining a second support region based on the first support region and the panel layout data, may specifically include steps 4.1 to 4.4, wherein:

[0095] Step 4.1: In the area surrounded by the final clearance outline of the panel to be tested, remove the area surrounded by the clearance outline of all components and the area surrounded by the inner outline of the PCBA, so as to obtain the initial support area of ​​the panel to be tested based on the remaining area. The remaining area is the initial support area of ​​the panel to be tested.

[0096] Step 4.2: Reduce the initial supportable area of ​​the panel to be tested. Specifically, remove areas with an area smaller than the second preset value and / or areas with a set distance smaller than the third preset value from the initial supportable area of ​​the panel to be tested, thus obtaining the area to be supported of the panel to be tested. The set distance is the distance between any two sides of the outline within the initial supportable area. Areas with an area smaller than the second preset value and a set distance smaller than the third preset value in the initial supportable area are areas that are difficult to process or lack sufficient strength.

[0097] Optionally, the second preset value S can be in the range of 0.5 to 2.0 mm. 2 .

[0098] Optionally, the third preset value W can be in the range of 0.5 to 1.0 mm.

[0099] Step 4.3, as follows Figure 4As shown, based on the concavity and convexity of the outer contour line of the area to be supported of the panel to be tested, the outer contour line of the area to be supported of the panel to be tested is regularized to obtain the first support area. Each line segment in the outer contour line of the first support area is a horizontal or vertical line segment. In order to facilitate production and processing, the outer contour line of the first support area is rounded, that is, all line segments in the outer contour line of the first support area are rounded. The preset value of the rounding is C1.

[0100] Furthermore, the outer contour line of the first support region is used as the first contour line to be processed for explanation. The method for regularizing the outer contour line of the first support region specifically includes:

[0101] S1. Along the preset direction, determine the shape of each line segment in the first outline to be processed. For each line segment, if it is a horizontal or vertical straight line, no processing is done. If it is an arc, continue to determine whether the arc is convex or concave. Regularize the convex arc outward and the concave arc inward. If the line segment is a line segment other than a horizontal or vertical straight line or an arc, regularize the other line segment inward (the setting here is that the maximum support needs to be determined inside the first support area, so regularize inward to avoid support in places where it should not be supported).

[0102] S2. Delete line segments in the first contour line to be processed whose length is less than twice the radius of the fillet C1. At the same time, delete the two line segments adjacent to the deleted line segments. Connect the gaps formed by the deleted line segments with straight line segments to form a closed second contour line to be processed. Iterate through steps S1-S2 on the second contour line to be processed until the length of all line segments is greater than or equal to the set value to obtain the final regular contour line. The final regular contour line obtained here is the final avoidance contour line.

[0103] Step 4.4: Based on the final avoidance contour line of the panel to be tested and the panel data, obtain the first support area. Based on the first support area and the panel layout data, obtain the second support area. The number M of the panels to be tested is obtained according to the panel layout data. If M > 1, the first support area is transformed by coordinates and angles according to the panel layout data to obtain the second support area. If M = 1, the first support area is the second support area. The first support area is all the support areas of a single panel to be tested, and the second support area is all the support areas corresponding to all panels to be tested.

[0104] When the PCBA board includes a shielding cover, meaning a support for the shielding cover needs to be generated on the carrier board, then step 5 is executed; otherwise, step 5 is not executed. When step 5 is required, step 5 can specifically be:

[0105] Step 5: Obtain the shielding cover support outline and the height of the shielding cover support area based on the 3D CAD file of the shielding cover; obtain the shielding cover support area based on the shielding cover support outline; determine the first shielding cover support area based on the shielding cover support area; obtain the second shielding cover support area based on the first shielding cover support area; take the bottom of the clearance groove of the carrier plate as the starting surface, and the stretching height is the height of the shielding cover support area; perform additive stretching on the second shielding cover area to generate the second plate surface support on the carrier plate; wherein, the first shielding cover support area is all the shielding cover support areas of a single panel to be tested, and the second shielding cover support area is all the shielding cover support areas corresponding to all panels to be tested.

[0106] Specifically, after obtaining the shielding cover support outline and the height of the shielding cover support area through the 3D CAD file of the shielding cover, the shielding cover support area in the carrier board used to support the shielding cover can be determined according to the shielding cover support outline and the height of the shielding cover support area. Thus, the same and / or different PCBA data can be obtained from the panel data to be tested. Based on this, a first shielding cover support area including all shielding cover support areas of a single panel to be tested is obtained according to the shielding cover support area, and a second shielding cover support area including all shielding cover support areas corresponding to all panels to be tested is obtained according to the first shielding cover support area. Then, taking the bottom of the clearance groove of the carrier board as the starting surface, the stretching height is the height of the shielding cover support area, and the second shielding cover area is additively stretched to generate a second board surface support on the carrier board.

[0107] In one specific embodiment, step 5 may specifically include steps 5.1 to 5.6, wherein:

[0108] Step 5.1: Obtain the top surface of the shielding cover based on the three-dimensional model of the shielding cover, and obtain the height value H1 of the top surface of each shielding cover from the mounting surface (i.e., the bottom surface).

[0109] Step 5.2: Project the top surface of each shield onto the mounting surface to obtain the shield support outline at the corresponding height.

[0110] Step 5.3: Shrink the shield support outline inward by a fourth preset value to obtain the inner outline of the support area corresponding to the top surface of the shield.

[0111] Optionally, the fourth preset value D1 can be in the range of 1.0 to 2.0 mm, with 2.0 mm being the preferred value.

[0112] Step 5.4: Obtain the initial support area of ​​the shielding cover based on the annular area enclosed by the shielding cover support outline and the inner outline of the shielding cover support area. The height of the initial support area of ​​the shielding cover is the depth of the relief groove minus the corresponding height value H1.

[0113] Specifically, the shielding cover support outline and the inner outline of the shielding cover support area form a ring-shaped area, which is the initial support area of ​​the shielding cover.

[0114] Step 5.5: By filling in areas where the gap within the inner contour line of the initial support area of ​​the shielding cover is less than the fifth preset value, the support area of ​​the shielding cover is obtained. The height of the support area of ​​the shielding cover is the same as the height of the corresponding initial support area of ​​the shielding cover. The areas where the gap within the inner contour line of the initial support area of ​​the shielding cover is less than the fifth preset value are areas that are difficult to process.

[0115] Specifically, the area with a gap smaller than a fifth preset value within the inner contour line of the initial support area of ​​the shield is removed from the inner contour line, and this area is then filled into part of the initial support area, thus using the filled initial support area as the shield support area. For example, Figure 5 As shown.

[0116] Optionally, the fifth preset value W1 can be in the range of 0.5 to 1.0 mm.

[0117] Step 5.6: Determine the first shielding support area based on the data of the panel to be tested and the shielding support area, and obtain the second shielding support area based on the first shielding support area.

[0118] There are three scenarios for PCBA data in a single panel under test: (1) PCBA data in the panel under test are completely identical; (2) PCBA data in the panel under test are completely different; (3) PCBA data in the panel under test are partially identical and partially different.

[0119] Therefore, in an optional embodiment, step 5.6 may specifically include:

[0120] Based on the test panel data, for identical PCBA data within a single test panel, the shielding support areas corresponding to the identical PCBA data are transformed by coordinates, angles, and mirror images according to the PCBA layout data to obtain the third shielding support area. For different PCBA data within a single test panel, the number of PCBA types is N, and the sum of the shielding support areas corresponding to N PCBA data is the third shielding support area. The third shielding support areas obtained for identical PCBA data are combined with the third shielding support areas obtained for different PCBA data to obtain the first shielding support area. Here, the shielding support area is the shielding support area corresponding to a single PCBA data; the third shielding support area is the shielding support area corresponding to multiple PCBA data.

[0121] It should be noted that when the number of PCBAs is 1, the relevant steps for processing can be referred to the above "Different PCBA Data in a Single Panel Under Test".

[0122] The number M of the panels to be tested is obtained based on the layout data of the panels to be tested. If M > 1, the coordinates and angles of the first shielding cover support area are transformed according to the layout data of the panels to be tested to obtain the second shielding cover support area. If M = 1, the first shielding cover support area is the second shielding cover support area.

[0123] It should be noted that the execution order of steps 4 and 5 can be set according to the actual situation: step 4 can be executed first and then step 5, step 5 can be executed first and then step 4, or they can be executed simultaneously.

[0124] When it is necessary to fill the support gap, step 6 is executed; otherwise, step 6 is not executed. When step 6 is required, it may specifically include steps 6.1 to 6.3, wherein:

[0125] Step 6.1: Determine the relationship between the minimum distance between any two shielding support areas in the first shielding support area and the fifth preset value W1. If the minimum distance is less than the fifth preset value W1, then obtain the first gap area based on the corresponding two shielding support areas using the gap area calculation method, such as... Figure 6 As shown, the stretching height of the first gap region is the smaller value of the heights corresponding to the two shield support regions.

[0126] Step 6.2: Determine the relationship between the minimum distance between the shield support area or the first gap area and the first support area in the first shield support area and the fifth preset value. If the minimum distance is less than the fifth preset value W1, then based on the corresponding shield support area (area A) or the corresponding first gap area (area B) and the corresponding first support area (area C), the second gap area is obtained by the gap area calculation method. The stretching height of the second gap area is the smaller value of the heights of the two corresponding areas (area A and area C, area B and area C).

[0127] Specifically, the relationship between the minimum distance between the shield support area and the first support area in the first shield support area and the fifth preset value is determined, or the relationship between the minimum distance between the first gap area and the first support area and the fifth preset value is determined. If the minimum distance is less than the fifth preset value W1, then the second gap area is obtained by the gap area calculation method based on the corresponding shield support area (area A) or the corresponding first gap area (area B) and the corresponding first support area (area C).

[0128] Step 6.3: Obtain the third gap region based on the first and second gap regions. Obtain the fourth gap region based on the third gap region and the layout data of the panels to be tested. Perform additive stretching with the bottom of the clearance groove of the carrier plate as the starting surface. The stretching height is the stretching height of the corresponding first or second gap region. Perform additive stretching on the fourth gap region to complete the filling of all gap regions. The number M of the panels to be tested is obtained according to the layout data of the panels to be tested. If M > 1, the third gap region is transformed by coordinates and angles according to the layout data of the panels to be tested to obtain the fourth gap region. If M = 1, the third gap region is the fourth gap region. The third gap region is all the gap regions of a single panel to be tested, and the fourth gap region is all the gap regions corresponding to all panels to be tested.

[0129] In this embodiment, a gap region calculation method is provided; for ease of understanding, this embodiment provides a gap region calculation method, but the gap region calculation method is not limited to the method exemplified.

[0130] In one optional embodiment, the method for determining the gap region specifically includes:

[0131] S1. Expand the first region and the second region outward by W1 / Q to obtain the third region and the fourth region, where W1 is the fifth preset value, 1≤Q≤2, and the first region and the second region are the gap regions to be filled.

[0132] Wherein, when the gap region is the first gap region, the first region and the second region are each of two shield support regions in the first shield support region in step 6.1; when the gap region is the second gap region, the first region and the second region are the shield support region and the first support region in the first shield support region in step 6.2; or, the first region and the second region are the first gap region and the first support region in step 6.2.

[0133] S2. Merge the third and fourth regions using Boolean operations to obtain the outer contour of the merged region.

[0134] S3. Based on the concavity and convexity of the outer contour of the merged region, the outer contour of the merged region is regularized to obtain the first contour regularization line, wherein each line segment in the first contour regularization line is a horizontal or vertical line segment.

[0135] It should be noted that the regularization process in this step is based on the same principle as the regularization process of the initial avoidance contour line described in step 2, and will not be repeated here.

[0136] S4. Shrink the first contour regularization line inward by W1 / Q, and round the corners of the shrunken first contour regularization line to obtain the second contour regularization line.

[0137] S5. In the area enclosed by the second contour regularization line, the first and second regions are removed by Boolean operation to obtain the gap region based on the remaining region.

[0138] If reinforcing ribs need to be generated, then step 7 is executed; otherwise, step 7 is not executed. When step 7 needs to be executed, step 7 can specifically be as follows:

[0139] Step 7: Determine the final reinforcement region based on the parallel relationship between the line segments of each pair of support regions in the first support region, and generate reinforcing ribs according to the final reinforcement region. The final reinforcement region is the area that is ultimately determined to require reinforcement.

[0140] Specifically, by judging the parallel relationship between the two pairs of straight line segments in each support region of the first support region, it is determined whether two parallel straight line segments in the support region need to be reinforced. If so, the region that needs to be reinforced (i.e. the final reinforcement region) is further determined, and a reinforcing rib is generated in the corresponding region to achieve the reinforcement treatment.

[0141] In one specific embodiment, step 7 may specifically include steps 7.1 to 7.5, wherein:

[0142] Step 7.1: Traverse all straight line segments in each support area of ​​the first support area. For any straight line segment, if there is a rounded corner at the endpoint of the straight line segment, extend the straight line segment from the endpoint along the straight line segment by a preset length, where the preset length is the radius of the corresponding rounded corner.

[0143] Specifically, for each support area in the first support area, all its straight line segments are traversed. For each straight line segment, if there is a rounded corner at the endpoint, the straight line segment is extended from the endpoint along the line containing the straight line by a length corresponding to the rounded corner radius. Figure 7 As shown in the magnified portion of the middle section, Figure 9 , Figure 11 The situation is similar in China.

[0144] Step 7.2: After extending all line segments with rounded corners, for all the resulting line segments, determine whether there are two parallel line segments, the distance between these two parallel line segments is less than the sixth preset value, the projections of these two parallel line segments overlap in the vertical direction, and the area enclosed by the overlapping part intersects with the first support area. If so, the area to be reinforced is obtained based on the area enclosed by the overlapping part; that is, the area enclosed by the overlapping part is the area to be reinforced, and the projection direction is the extension direction of the area to be reinforced. Figure 7 , Figure 9 , Figure 11 As shown in the figure, the rectangular area of ​​the cross-section is the area that needs to be reinforced. This area needs to be reinforced because its strength is insufficient.

[0145] Specifically, when the areas requiring reinforcement are completely identical, only one of them should be retained, such as... Figure 11 As shown, this area requiring reinforcement has four extending directions.

[0146] Optionally, the sixth preset value W2 can be in the range of 1.0 to 2.0 mm.

[0147] Step 7.3: Based on the reinforcement areas obtained in the above steps, extend each reinforcement area along its respective extension direction by a seventh preset value. The rectangular area formed by the extension is the reinforceable area, where the extension direction is the projection direction. The height of the reinforceable area is equal to the depth of the clearance groove minus the maximum value of the clearance depth of all components within the reinforceable area. Specifically, if the height of the reinforceable area is less than 1 / 3 of the depth of the clearance groove, this reinforceable area is removed. For example, ... Figure 7 The area to be reinforced shown (i.e. Figure 7 The rectangular area of ​​the cross-section line in the middle is extended upwards to obtain Figure 8 The reinforceable area shown (i.e.) Figure 8 (the rectangular area of ​​the cross-section line in the text) Figure 9 The area to be reinforced shown (i.e. Figure 9 Extending the rectangular area of ​​the cross-section line to the right yields... Figure 10 The reinforceable area shown (i.e.) Figure 10 (the rectangular area of ​​the cross-section line in the text) Figure 11 The area to be reinforced shown (i.e. Figure 11 The rectangular area of ​​the cross-section line in the middle is extended upwards to obtain Figure 12 The reinforceable area shown (i.e.) Figure 12 The rectangular area of ​​the cross-section (in the text) and the extension results in other directions of each area that needs to be strengthened are similar to the above situation.

[0148] Optionally, the seventh preset value D2 can be set in the range of 2.0 to 3.0 mm.

[0149] Step 7.4: For each area that needs to be reinforced, select one of the all reinforceable areas corresponding to that area as the reinforced area according to the preset rules, and summarize all the reinforced areas corresponding to all areas that need to be reinforced to obtain the final reinforced area.

[0150] Specifically, according to priority, the preset rules, from highest to lowest, include A1, A2, A3, and A4, where:

[0151] A1 represents the bounding box formed by the reinforceable region and the region that needs to be reinforced. The smaller the area of ​​the bounding box, the higher the priority.

[0152] A2 indicates that the higher the height of the reinforceable area, the higher the priority.

[0153] A3 indicates that the greater the distance between the reinforceable area and the first support area and / or the second shielding support area, the higher the priority.

[0154] A4 indicates that the greater the distance between the reinforced area and the final avoidance outline of the panel to be tested, the higher the priority.

[0155] Step 7.5: Based on the final reinforcement area and the layout data of the panel to be tested, the first reinforcement area is obtained. Taking the bottom of the recessed groove of the carrier plate as the starting surface, the stretching height is the height of the corresponding reinforcement area. The first reinforcement area is subjected to additive stretching treatment to generate reinforcing ribs on the carrier plate. The corners of the reinforcing ribs are rounded, and the preset value of the rounding is C1.

[0156] Step 8: Generate RF vias, grab positions, and surrounding slots on the carrier board to generate the final carrier board model.

[0157] In one specific embodiment, step 8 may specifically include steps 8.1 to 8.3, wherein:

[0158] Step 8.1: Based on the RF via parameters on the PCBA, the layout data of the panel under test, and the PCBA layout data, generate RF vias on the carrier board.

[0159] Specifically, a first RF via is obtained based on the position, radius, and PCBA layout data. A second RF via is obtained based on the first RF via and the layout data of the panel under test. For identical PCBA data within a single panel under test, the RF vias corresponding to the identical PCBA data are transformed by coordinates, angles, and mirroring based on the PCBA layout data to obtain a third RF via. For different PCBA data within a single panel under test, the number of PCBA types is N, and the sum of the RF vias corresponding to the N PCBA data is the third RF via. The third RF vias obtained from identical PCBA data are combined with the third RF vias obtained from different PCBA data to obtain the first RF via. The RF vias represent all RF vias corresponding to a single PCBA, the first RF vias represent all RF vias corresponding to a single panel under test, and the third RF vias represent all RF vias corresponding to multiple PCBA data.

[0160] The number M of the panels to be tested is obtained according to the layout data of the panels to be tested. If M > 1, the first RF via is transformed by coordinates and angles according to the layout data of the panels to be tested to obtain the second RF via. If M = 1, the first RF via is the second RF via, and the second RF via is all the corresponding RF vias generated on the carrier board. The stability of the second RF via is checked.

[0161] In this embodiment, the stability of the RF via support can also be checked. The steps for checking the stability of the RF via support include:

[0162] S1. For each RF via in the second RF via, draw a circle with the center of the RF via as the center and R1 as the radius. The area enclosed by this circle is the first supportable circular inspection area of ​​the RF via. Figure 13 As shown, R1 = R0 + R, R0 is the radius of the radio frequency via, and R is the eighth preset value.

[0163] Optionally, the value range of the eighth preset value R is 0.5 to 5.0 mm.

[0164] S2. Determine whether a preset fan-shaped area exists in the first supportable circular inspection area of ​​the RF via. If not, do not remove it. If it exists, remove the fan-shaped area and use the first supportable circular inspection area with the fan-shaped area removed as the second supportable circular inspection area. The preset fan-shaped area includes the fan-shaped area occupied by the shielding support area in the first support area and / or the shielding support area in the first shielding support area corresponding to the PCBA data where the RF via is located in the first supportable circular inspection area, and the fan-shaped area occupied by the area outside the clearance groove of the carrier board corresponding to the PCBA data where the RF via is located in the first supportable circular inspection area.

[0165] S3. Determine whether there are continuous fan-shaped areas with a fan-shaped angle greater than 180° in the second supportable circular inspection area. If so, it means that the support of this RF via is unstable, and the corresponding RF via is marked as unstable. Otherwise, the corresponding RF via is marked as stable. After all RF vias have been inspected, an inspection report is output.

[0166] Step 8.2: Based on the layout data of the handle position, the coordinates of the panel to be tested in the layout data of the panel to be tested, and the length and width of the panel to be tested, a groove is generated on the carrier plate with the top surface as the starting surface to serve as the handle position. In order to facilitate production and processing, the corners of the handle position are rounded. The layout data of the handle position includes: overlap size, quantity, size, and groove depth.

[0167] Optionally, the preset value of the rounded corner of the handle is C2, and the value of C2 ranges from 0.5 to 2.0, with 1.5 being preferred.

[0168] Step 8.3: Based on the layout data of the surrounding groove, the coordinates of the panel to be tested in the layout data of the panel to be tested, and the length and width of the panel to be tested, a groove is generated on the carrier plate with the top surface as the starting surface to serve as the surrounding groove. In order to facilitate production and processing, the corners of the surrounding groove are rounded. The layout data of the surrounding groove includes: gap size, quantity, size, and groove depth.

[0169] Optionally, the preset value for the rounded corner of the surrounding groove is C3, and the value of C3 ranges from 1.0 to 3.0, with 2.0 being the preferred value.

[0170] Step 9: After completing the above steps, output the final generated carrier plate model file, such as a 3D CAD file in STEP format.

[0171] Regarding the positioning function of the carrier board, this invention can automatically generate surrounding slots according to the design files during the carrier board design process. These slots serve to position the PCBA board (in practice, positioning holes can also be used instead of surrounding slots to achieve the positioning function). This achieves the goal of positioning the PCBA board by automatically generating surrounding slots, resulting in fast and accurate positioning.

[0172] Regarding the support function of the carrier board, the method designed in this invention establishes as many supports as possible while ensuring avoidance of components. If insufficient support is identified, shielding supports can be added at the locations of component shielding covers. Furthermore, this invention connects closely spaced supports to improve stability and strength. Locations where insufficient strength is caused by excessively narrow supports are identified; since these locations do not meet support requirements, reinforcing ribs are added to their sides to compensate for the weakness. Therefore, the method of this invention can automatically address areas requiring support or reinforcement, thereby meeting the stability and strength requirements of the carrier board.

[0173] Currently, PCBA carrier board design is done manually, which is labor-intensive, inefficient, and requires highly skilled designers. To address these issues, this invention provides a method for generating PCBA carrier board models. This method first determines the final clearance outline of the panel to be tested. Then, based on the final clearance outline, clearance depth, and layout data of the panel to be tested on the carrier board, corresponding clearance grooves are generated on the carrier board. Next, a second support area is obtained based on the final clearance outline of the panel to be tested. It can also fill gap areas, generate reinforcing ribs in the first reinforcement area, and finally generate RF vias, handles, and surrounding slots on the carrier board, thus generating the final carrier board model. This invention significantly improves work efficiency, increases the accuracy of the generated carrier board model, and saves enterprises substantial design costs, demonstrating high economic value.

[0174] Example 2

[0175] Based on Embodiment 1, this embodiment provides a specific method for automatically generating a 3D model of the carrier board of a PCBA test fixture. This method is illustrated using two identical test panels, each containing two identical PCBAs, as an example. The unit of measurement in this embodiment is millimeters. Specifically, the method may include:

[0176] 1. Basic data preparation:

[0177] 1.1. Import the 3D CAD file XXX.step of the carrier template. The model corresponding to this file is as follows: Figure 14 As shown, the basic data includes:

[0178] The carrier model coordinate system Csys (origin is (0.0,0.0,0.0), X-axis direction vector is (1.0,0.0,0.0), Y-axis direction vector is (0.0,1.0,0.0), Z-axis direction vector is (0.0,0.0,1.0));

[0179] Geometric data of points, lines, and surfaces in the carrier model: coordinates, vectors, normal vectors, and other data of all points, lines, and surfaces in this model; the specific data information included in the configuration file is shown in Tables 1 to 8:

[0180] Table 1

[0181]

[0182] Table 2

[0183] Location Rotation angle Mirror PCBA board 1 (0.0,30.0,0.0) 0° no PCBA board 2 (0.0,-30.0,0.0) 180° no

[0184] Table 3

[0185]

[0186] Table 4

[0187]

[0188] Table 5

[0189]

[0190] Table 6

[0191]

[0192] Table 7

[0193]

[0194]

[0195] Table 8

[0196]

[0197] Panel layout data to be tested: such as Figure 15 As shown, the test panel includes two panels to be tested: the left panel (position coordinates Loc1(-60.0,0.0,0.0), rotation angle 0°) and the right panel (position coordinates Loc2(60.0,0.0,0.0), rotation angle 0°).

[0198] Handling position layout data: overlap dimension d1 = 2.0, quantity 7, groove depth 4.5, dimensions as follows Figure 16 As shown;

[0199] Layout data for the surrounding groove: gap dimension d2 = 0.3, quantity 8, groove depth 1.5, dimensions as follows Figure 17 As shown.

[0200] 1.2 The data of the panel to be tested includes:

[0201] The panel to be tested has a length of 76.0 and a width of 120.0. It includes two identical PCBA boards. The layout data of PCBA board 1 is (position coordinates (0.0, 30.0, 0.0), rotation angle 0°, mirroring: no). The layout data of PCBA board 2 is (position coordinates (0.0, -30.0, 0.0), rotation angle 180°, mirroring: no).

[0202] Since the test panel is placed upside down on the carrier board during testing, the following PCBA data needs to be symmetrically processed along the Y-axis of the PCBA coordinate system. The processed result is as follows:

[0203] The outline of a PCBA board includes: inner and outer outlines, such as... Figure 18 As shown.

[0204] The data for PCBA board components includes:

[0205] Taking component J1600 as an example, the position coordinates are (23.4,-8.0,0.0), the rotation angle is 0°, the height of the component after installation is 0.65, the vertices of the outer contour line are (p1(-6.55,-5.8,0.0), p2(6.55,-5.8,0.0), p3(6.55,5.8,0.0), p4(-6.55,5.8,0.0)), and the safety distance between the carrier board and the component is (lateral clearance distance 2.0, depth clearance distance 3.0).

[0206] Taking component J4022 as an example, the position coordinates are (16.11, 10.5, 0.0), the rotation angle is 0°, the height of the component after installation is 0.5, the vertices of the outer contour line are (p1(-0.515,-0.515,0.0), p2(0.515,-0.515,0.0), p3(0.515,0.515,0.0), p4(-0.515,0.515,0.0)), and the safety distance between the carrier board and the component is (lateral clearance distance 1.0, depth clearance distance 1.5).

[0207] Taking component R1824 as an example, the position coordinates are (16.11, 6.6, 0.0), the rotation angle is 0°, the height of the component after installation is 0.15, the vertices of the outer contour line are (p1(-0.215,-0.115,0.0), p2(0.215,-0.115,0.0), p3(0.215,0.115,0.0), p4(-0.215,0.115,0.0)), and the safety distance between the carrier board and the component is (lateral clearance distance 1.0, depth clearance distance 2.0).

[0208] The data for other components is similar.

[0209] The RF via data on the PCBA board includes: hole1(center(28.85,-10.5,0.0),r=1.775),…….

[0210] The position coordinates of the origin of the shielding cover in the XXX-S coordinate system relative to the center of the PCBA board are (-15.9, -3.76, 0.0), with a rotation angle of 0°.

[0211] 1.3. Import the 3D CAD file XXX-S.step of the shielding cover. The model corresponding to this file is as follows: Figure 19 As shown, the geometric data of the model's points, lines, and surfaces includes the coordinates, vectors, normal vectors, and other data of all points, lines, and surfaces in the model.

[0212] 2. Create clearance grooves on the carrier plate:

[0213] 2.1 Calculate the final clearance outline of the panel to be tested:

[0214] 2.1.1 Taking component J1600 as an example, by expanding the outer contour line of the component by a lateral clearance distance of 2.0, the clearance contour line of component J1600 can be obtained: p11(-8.55,-5.8,0.0), p12(-6.55,-7.8,0.0), p21(6.55,-7.8,0.0), p22(8.55,-5.8,0.0), p31(8.55,5.8,0.0), p32(6.55,7.8,0.0), p41(-6.55,7.8,0.0), p42(-8.55,5.8,0.0). Figure 20 As shown, other components are similar.

[0215] 2.1.2. Based on PCBA board 1 and PCBA board 2, a panel to be tested is obtained. Boolean operations are used to merge the area enclosed by the clearance contours of all components on the panel to be tested with the area enclosed by the outer contour of the PCBA. The outer contour of the merged area is taken as the initial clearance contour of the panel to be tested. For example... Figure 21 As shown.

[0216] 2.1.3. The initial avoidance contour line obtained above is regularized according to its concavity and convexity, so that all line segments (including straight lines and curves) are horizontal or vertical. The regularization method is as follows:

[0217] When regularizing outwards, the area enclosed by the bounding box of the corresponding line segment is merged with the area enclosed by the initial avoidance contour line; when regularizing inwards, the area enclosed by the bounding box of the corresponding line segment is removed from the area enclosed by the initial avoidance contour line.

[0218] The specific process of regularizing the initial avoidance contour line according to the above regularization method is as follows:

[0219] 1) Determine the convexity and concavity of the arc based on the counterclockwise direction of the initial avoidance contour line. The convex arc is regular outward, and the concave arc is regular inward.

[0220] 2) Horizontal or vertical straight line segments remain unchanged and are not modified;

[0221] 3) All other line segments (including straight lines and curves other than circular arcs) are regularized outwards.

[0222] 4) Delete the short side whose length is less than twice the chamfer C1 (2*0.5=1.0), and delete the two sides adjacent to the short side. Connect the gap with straight line segments to form a closed outline. Iterate through steps 1) to 4) above until all line segments are greater than or equal to 1.0 to obtain the regularized avoidance outline.

[0223] The clearance outline after the above-mentioned regularization process is rounded with a corner C1 = 0.5 to obtain the final clearance outline of the panel to be tested, as shown below. Figure 21 As shown.

[0224] 2.2 Taking component J1600 as an example, the clearance depth = height of the component after installation + clearance spacing = 0.65 + 3.0 = 3.65. The calculation method for the clearance depth of other components is similar. Finally, the maximum clearance depth of all components is 3.65, which is less than the preset minimum clearance depth H = 4.5 of the panel to be tested. That is, the clearance depth of the panel to be tested is 4.5.

[0225] Based on the layout data of the panels to be tested, the final avoidance contour lines of the panels to be tested are transformed by coordinates and angles to obtain the final avoidance contour lines of the left and right panels to be tested. Taking the final avoidance contour lines of the left and right panels to be tested as sections, avoidance grooves with a depth of 4.5 are generated on the template of the carrier plate. Figure 22 As shown.

[0226] 3. Generate the first plate support on the carrier plate:

[0227] 3.1. Through Boolean difference operations, within the area enclosed by the final clearance contour lines of the panel under test, remove the areas enclosed by the clearance contour lines of all components on the panel under test, and remove the areas enclosed by the inner contour lines of all PCBA boards on the panel under test. The remaining area is the initial supportable area of ​​the panel under test. Figure 24 As shown in the image on the left.

[0228] 3.2 First, based on the point, line, and surface geometric data, obtain the area of ​​each sub-region within the initial supportable area of ​​the panel to be tested. Then, remove sub-regions with an area less than S = 2.0 using Boolean difference operations. Next, set the third preset value W to 1.0 and shrink the outlines of all remaining sub-regions inward by W / 2 = 0.5 (regions with a width less than the third preset value W will disappear through this shrinking). Finally, expand the outlines obtained after the shrinking by W / 2 = 0.5 to achieve the goal of eliminating regions with a width less than the third preset value W. Figure 23 As shown; finally, the area to be supported of the panel to be tested, obtained according to the method described in this step, is as follows. Figure 24 As shown.

[0229] 3.3. The outer contour lines of the support areas of all the panels to be tested obtained in the above steps are regularized according to their concavity and convexity (refer to step 2.1.3) to make all line segments horizontal or vertical. The specific process of regularizing the outer contour lines of the support areas of all the panels to be tested according to the above regularization method is as follows:

[0230] 1) Determine whether the arc is convex or concave based on the counterclockwise direction of the outer contour line. Convex arcs are regular outwards, and concave arcs are regular inwards.

[0231] 2) Horizontal or vertical straight line segments remain unchanged and are not modified;

[0232] 3) All other line segments (including straight lines and curves other than circular arcs) are regularized inwards;

[0233] 4) Delete the short side whose length is less than twice the chamfer C1 (2*0.5=1.0), and delete the two sides adjacent to the short side. Connect the gap with straight line segments to form a closed outer contour line. Iterate through steps 1)-4) on this outer contour line until the length of all line segments is greater than or equal to 1.0, and obtain the outer contour line of the area to be supported of the panel to be tested after regularization.

[0234] The outer contour line of the area to be supported of the panel to be tested after the above-mentioned regularization process is rounded with a corner C1 = 0.5 to obtain the first support area, as shown below. Figure 24 As shown.

[0235] 3.4. Based on the layout data of the panels to be tested, the first support area is transformed by coordinates and angles to obtain the first support area of ​​the left panel and the right panel. The first support areas of the left and right panels are combined into the second support area. The obtained second support area is then subjected to additive stretching with the bottom of the corresponding recess as the starting surface, with a stretching height of 4.5, to generate the first panel support on the carrier plate. Figure 25 As shown.

[0236] 4. Create a support for the shielding cover on the carrier plate:

[0237] 4.1. Obtain the top surface of the shielding cover based on the point, line, and surface geometric data in the 3D CAD file. Project the top surface onto the mounting surface to obtain the corresponding support contour line, such as... Figure 26 As shown, the corresponding height H1 = 1.3 can be obtained at the same time.

[0238] 4.2. The obtained support contour line is regularized according to its concavity / convexity (this is not mandatory and can be chosen based on the actual situation). The specific method is similar to step 2.1.3 and will not be repeated here. The regularized support contour line is shrunk inward by 2.0 to obtain the inner contour line of the support area corresponding to the top surface. Both the regularized support contour line and the shrunk inner contour line are rounded by C1. The annular area formed by the two rounded contour lines is the initial support area of ​​the shielding cover. This initial support area of ​​the shielding cover is as follows: Figure 26 As shown, the initial support area has a height of 4.5 – 1.3 = 3.2.

[0239] 4.3 First, the fifth preset value W1 corresponding to the inner contour line in the initial support area is set to 1.0; then, the inner contour line of the initial support area of ​​the shielding cover obtained in the above steps is regularized according to its concavity and convexity. The specific method of regularization is similar to step 2.1.3; the new inner contour line obtained after regularization replaces the original inner contour line, and the new inner contour line and the original outer contour line form the shielding cover support area after the gap is removed, thus achieving the filling effect, such as... Figure 26 As shown.

[0240] 4.4 In this embodiment, there is only one shielding model, that is, the shielding support area after removing the gaps obtained above is the shielding support area corresponding to the PCBA data.

[0241] 4.5 PCBA board 1 and PCBA board 2 have the same PCBA data. Based on the PCBA layout data, the shielding support area obtained in the above steps is transformed by coordinates, angles and mirrors to obtain the third shielding support area (the sum of the shielding support areas corresponding to PCBA board 1 and PCBA board 2 is the shielding support area corresponding to a panel to be tested). The third shielding support area is the first shielding support area.

[0242] 4.6. Based on the layout data of the panels to be tested, transform the coordinates and angles of the first shielding support area obtained in the above steps to obtain the second shielding support area (multiple support areas of all shielding covers corresponding to all panels to be tested). Perform additive stretching on the second shielding support area, starting from the bottom of the corresponding recess, with a stretching height of 3.2, to generate a second plate surface support on the carrier plate, as shown below. Figure 27 As shown.

[0243] 5. Fill the support gaps:

[0244] Based on the point, line, and surface geometric data of the first shielding cover support area and the first support area obtained in step 4.5, the width between any two pairs of the two shielding cover support areas and the four first plate support areas is obtained, such as... Figure 28As shown, taking the shielding cover support area A_1 as an example:

[0245] The shortest distance from the shield support area A_1 to the first panel support area B_1 is 18.6.

[0246] The shortest distance from the shield support area A_1 to the first plate support area C_1 is 0.8;

[0247] The shortest distance from the shield support area A_1 to the first plate support area A_2 is 38.3.

[0248] The shortest distance from the shield support area A_1 to the first panel support area B_2 is 53.9.

[0249] The shortest distance from the shield support area A_1 to the first plate support area C_2 is 34.2.

[0250] The fifth preset value W1 is 1.0. It can be seen that the area between the screen cover support area A_1 and the first plate support area C_1 with a width less than W1 (0.8) needs to be filled. The specific calculation method for the gap area is as follows:

[0251] 1) Expand the shield support area A_1 and the first plate support area C_1 outward by W1 / 2 respectively;

[0252] 2) Merge the two expanded regions using Boolean operations to obtain the outer contour of the merged region;

[0253] 3) The outer contour obtained above is regularized according to the concavity and convexity. The regularized contour is shrunk inward by W1 / 2, and the shrunk contour is rounded by C1. The specific method of regularization is similar to step 2.1.3.

[0254] 4) In the area enclosed by the contour lines after the inward contraction, remove the screen support area A_1 and the first plate support area C_1 by Boolean operation. The remaining area is the gap area that needs to be filled.

[0255] The height of the gap area is the smaller of the height of the shield support area (3.2) and the height of the first plate support area (4.5) in this step, that is, the stretching height of the gap area is 3.2.

[0256] The calculation method for the gap between any two of the remaining shielding support areas and the first plate support area is similar, and the results are as follows: Figure 28 As shown (the black area is the gap area that needs to be filled).

[0257] Based on the panel layout data to be tested, the coordinates and angles of the obtained gap areas are transformed to obtain all gap areas corresponding to the obtained gap areas. Taking the bottom of the recessed groove as the starting surface, and stretching the obtained gap areas to a height of 3.2, additive stretching is performed on all the gap areas corresponding to the obtained gap areas to complete the filling of all gap areas. The results are as follows: Figure 29 As shown.

[0258] 6. Generate reinforcing ribs:

[0259] 6.1 For the first support region generated in step 3 above, the sixth preset value W2 is set to 2.0. The region calculation process needs to be strengthened as follows:

[0260] Taking the uppermost support area as an example: First, based on its geometric data, its outline coordinates are p1'(16.0,40.0,0.0), p1"(17.5,40.0,0.0), p2'(18.0,40.5,0.0), p2"(18.0,41.15,0.0), p3'(17.5,41.65,0.0), p3"(16.0,41.65,0.0), p4'(15.5,41.15,0.0), p4"(15.5,40.5,0.0). The rounded corner radii at both ends of the straight line segment p1'p1" are 0.5. Extending both ends of the straight line segment p1'p1" yields the straight line segment P1P2, P1(15.5,40.0,0.0). 0), P2(18.0,40.0,0.0), extending both ends of line segment p3'p3” yields line segment P3P4, P3(18.0,41.65,0.0), P4(15.5,41.65,0.0), the calculation method for other line segments is similar; then, based on the coordinates of the endpoints of the line segments, the distance between line segments P1P2 and P3P4 is 1.65, which is less than the sixth preset value W2, and at the same time satisfies that the projections in the vertical direction overlap and the area enclosed by the overlapping part is p1'p1”p2'p2”p3'p3”p4'p4”. The area enclosed by this overlapping part just coincides with the above-mentioned support area, satisfying that the area of ​​the overlapping part intersects with the support area, that is, the resulting rectangle is the area that needs to be strengthened, such as Figure 30 As shown, there are two extension directions, V1(0.0,1.0,0.0) and V2(0.0,-1.0,0.0). The calculation method for other support areas is similar.

[0261] 6.2 Taking the uppermost support area requiring reinforcement as an example: The seventh preset value D2 is set to 2.0. The area requiring reinforcement is extended upwards by 2.0 along direction V1 to obtain the reinforceable areas P1P2P3'P4', where P3'(18.0,43.65,0.0) and P4'(15.5,43.65,0.0). The area requiring reinforcement is extended downwards by 2.0 along direction V2 to obtain the reinforceable areas P1'P2'P3P4, where P1'(15.5,38.0,0.0) and P2'(18.0,38.0,0.0). Figure 30 As shown, the other areas that need reinforcement are similar.

[0262] 6.3 Taking the reinforceable region P1'P2'P3P4 obtained in the previous step as an example, this region contains only one component R1824. The height of this reinforceable region is equal to the depth of the recess (4.5) - the recess depth of R1824 (2.25). The height of this reinforceable region is 2.25.

[0263] Taking the reinforceable region P1P2P3'P4' obtained in the previous step as an example, this region contains only one component J4022. Therefore, the height of this reinforceable region is equal to the depth of the clearance groove (4.5) - the clearance depth of J4022 (2.0), so the height value of this reinforceable region is 2.5.

[0264] The methods for obtaining the height of other reinforceable areas are similar.

[0265] 6.4. Taking the area requiring reinforcement in the uppermost support region as an example:

[0266] 1) Based on the aforementioned point coordinate data, calculate the area of ​​the bounding box formed by the two reinforceable regions P1'P2'P3P4 and P1P2P3'P4' and the supporting region p1'p1”p2'p2”p3'p3”p4'p4” respectively. The area values ​​are both 9.125.

[0267] 2) The height of the reinforceable regions P1'P2'P3P4 is 2.25, and the height of the reinforceable regions P1P2P3'P4' is 2.5. The reinforceable regions P1P2P3'P4' are taken as the final reinforced regions of this support region.

[0268] The calculation method for the remaining enhanced regions is similar.

[0269] 6.5. Based on the layout data of the panels to be tested, the coordinates and angles of the final reinforced areas obtained above are transformed. All the resulting first reinforced areas are then subjected to additive stretching with the bottom of the corresponding recess as the starting surface. The stretching height is 2.5, generating reinforcing ribs on the carrier plate. The corners of the reinforcing ribs are rounded, with a preset rounding value of C1. The generated reinforcing ribs are as follows: Figure 31 As shown.

[0270] 7. Generate radio frequency vias:

[0271] 7.1. Generate RF vias on the carrier board according to their positions and radii. Taking hole1(center(28.85,-10.5,0.0), r=1.775) as an example, based on the PCBA layout data (coordinates, angles, and mirror transformation) and the layout data of the panel under test (coordinates and angles), hole1 is combined and transformed to obtain hole11(center(-31.15,19.5,0.0), r=1.775), hole12(center(-88.85,-19.5,0.0), r=1.775), hole13(center(88.85,19.5,0.0), r=1.775), and hole14(center(31.15,-19.5,0.0), r=1.775). The method for obtaining the remaining holes is similar, as detailed below. Figure 32 As shown.

[0272] 7.2 Check the support stability of the RF vias. Taking hole12 as an example, the calculation method for the other holes is the same.

[0273] 7.2.1. With the center of hole 12 as the center and R1 as the radius, draw circle O0 to obtain the first supportable circular inspection area enclosed by circle O0. The preset value R is 2.0, and R1 = 1.775 + 2.0 = 3.775. The first supportable circular inspection area of ​​hole 12 is shown below. Figure 33 As shown.

[0274] 7.2.2 The calculation method for the support distribution of the circular inspection area supported by the RF via is as follows: Figure 33 As shown:

[0275] 1) Project all the supports obtained in steps 3 and 4, and the area outside the clearance groove of the panel to be tested in step 2, onto the XOY plane respectively;

[0276] 2) Perform a Boolean intersection operation between the first supportable circular inspection area enclosed by circle O0 and the projection result obtained in the previous step to obtain the hole support area;

[0277] 3) Project the above hole support area onto the arc of circle O0 to obtain the arc Arc, and the coordinates of the endpoints of the arc Arc are pnt1 and pnt2.

[0278] 4) Remove the sector area corresponding to the arc Arc obtained above from the area enclosed by circle O0 to obtain the remaining sector area in the first supportable circular inspection area. The remaining sector area is used as the second supportable circular inspection area.

[0279] 7.2.3. Based on the coordinates pnt1 and pnt2 of the arc endpoints obtained in the above steps, the angle of the arc arc is 120°. The angle of the remaining fan-shaped area in the second supportable circular inspection area corresponding to the RF via hole 12 is 360° - 120° = 240°. That is, there are continuous fan-shaped areas with an angle greater than 180° in the remaining fan-shaped area corresponding to hole 12, indicating that the support of this RF via hole 12 is unstable. The calculation method for the support stability of other RF vias is similar.

[0280] After all RF vias have been inspected, the inspection report will be output as shown in Table 9:

[0281] Table 9

[0282] name Support stability RF via hole12 Unstable …… ……

[0283] 8. Generate hand positions:

[0284] Based on the layout data of the handle position: overlap dimension d1 = 2.0, quantity 7, groove depth 4.5, dimensions as follows Figure 16 As shown, where:

[0285] Handles A, B, C, and D are 33.0 mm long and 16.5 mm wide, with their centers located on the vertical center lines of the corresponding panels to be tested.

[0286] Hand positions E and F are 30.0 mm long and 60.0 mm wide, with their centers located on the horizontal center line of the panel to be tested.

[0287] The length of the grab position G is (Loc2.x – Length / 2 + d1) - (Loc1.x + Length / 2 - d1) = 48.0, and the width is 60.0. The center of the grab position is located at the center of the carrier plate. Loc2.x and Loc1.x are the X coordinate values ​​(60) of the right panel to be tested and (-60) of the left panel to be tested, respectively. Length is the length of the panel to be tested, which is 76.

[0288] The preset value for rounded corners is C2 = 1.5;

[0289] Based on the above layout data of the grab positions, a groove is dug starting from the top surface of the carrier plate, and grab positions are generated on the carrier plate as follows. Figure 34 As shown.

[0290] 9. Generate the surrounding groove:

[0291] Layout data for the surrounding groove: gap dimension d2 = 0.3, quantity 8, groove depth 1.5, dimensions as follows Figure 17 As shown, where:

[0292] The length of the surrounding groove is 23.2 mm, and the width is 8.2 mm.

[0293] The hole radius is 1.025, and the positioning dimensions are 8.1 and 4.1 respectively;

[0294] The eight handles are located at the eight corners of the two panels to be tested, such as... Figure 15 As shown.

[0295] The preset value for fillet radius is C3 = 2.0;

[0296] Based on the layout data of the surrounding groove above, a groove is dug starting from the top surface of the carrier plate, and a surrounding groove is generated on the carrier plate as follows. Figure 35 As shown.

[0297] 10. Model Output:

[0298] Output the final generated carrier model XXX.step.

[0299] Example 3

[0300] Please see Figure 36 , Figure 36 This is a schematic diagram of a PCBA carrier board model generation system provided in an embodiment of the present invention. The model generation system includes:

[0301] The acquisition module is used to acquire basic data, which includes a carrier board template file and panel data to be tested. The carrier board template file includes panel layout data to be tested, which includes the number, coordinates and angles of the panels to be tested. The panel data to be tested includes the PCBA outer contour line, PCBA layout data, component data on the PCBA, and safety distance between the carrier board and the components.

[0302] The avoidance contour line generation module is used to obtain the avoidance contour lines of all components on the panel under test based on the component data on the PCBA, and to obtain the final avoidance contour line of the panel under test based on the avoidance contour lines of all components on the panel under test and the outer contour line of the PCBA.

[0303] The clearance groove generation module is used to obtain the clearance depth of the components based on the component data on the PCBA and the safe distance between the carrier board and the components, obtain the clearance depth of the panel under test based on the clearance depth of the components and the preset minimum clearance depth of the panel under test, and generate a corresponding clearance groove on the carrier board based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test.

[0304] The first panel support generation module is used to obtain a first support area based on the final clearance outline of the panel to be tested and the panel data, and to obtain a second support area based on the first support area and the panel layout data. Taking the bottom of the clearance groove of the carrier plate as the starting surface, and with a stretching height equal to the clearance depth of the panel to be tested, the second support area is additively stretched to generate the first panel support on the carrier plate. Specifically, the number M of the panels to be tested is obtained according to the panel layout data. If M > 1, the first support area is transformed by coordinates and angles according to the panel layout data to obtain the second support area. If M = 1, the first support area is the second support area. The first support area represents all support areas of a single panel to be tested, and the second support area represents all support areas corresponding to all panels to be tested.

[0305] The carrier board model generation module is used to generate RF vias, handles, and surrounding slots on the carrier board to generate the final carrier board model.

[0306] The model generation system may further include: a second plate support generation module, used to obtain the shield support outline and the height of the shield support area based on the 3D CAD file of the shield; obtain the shield support area based on the shield support outline; determine a first shield support area based on the shield support area; obtain a second shield support area based on the first shield support area; and perform additive stretching of the second shield area with the bottom of the clearance groove of the carrier plate as the starting surface and the stretching height being the height of the shield support area, thereby generating a second plate support on the carrier plate. The first shield support area comprises all shield support areas of a single panel to be tested, and the second shield support area comprises all shield support areas corresponding to all panels to be tested.

[0307] The model generation system may further include: a gap region filling module, used to determine the relationship between the minimum distance between every two shield support regions in the first shield support region and the fifth preset value; if the minimum distance is less than the fifth preset value, then a first gap region is obtained based on the corresponding two shield support regions using a gap region calculation method, wherein the stretching height of the first gap region is the smaller value of the corresponding heights of the two shield support regions; and to determine the relationship between the minimum distance between the shield support regions in the first shield support region or between the first gap region and the first support region and the fifth preset value; if the minimum distance is less than the fifth preset value, then a second gap region is obtained based on the corresponding shield support region (region A) or the corresponding first gap region (region B) and the corresponding first support region (region C) using a gap region calculation method, wherein the second gap region... The stretching height is the smaller of the heights of two corresponding regions (region A and region C, region B and region C). A third gap region is obtained based on the first and second gap regions. A fourth gap region is obtained based on the third gap region and the layout data of the panels to be tested. Taking the bottom of the recessed groove of the carrier plate as the starting surface, the stretching height is the stretching height of the corresponding first or second gap region. The fourth gap region is then subjected to additive stretching to complete the filling of all gap regions. The number of panels to be tested, M, is obtained based on the layout data. If M > 1, the third gap region is transformed by coordinates and angles based on the layout data to obtain the fourth gap region. If M = 1, the third gap region is the fourth gap region. The third gap region represents all gap regions of a single panel to be tested, and the fourth gap region represents all gap regions corresponding to all panels to be tested.

[0308] The model generation system may further include: a reinforcing rib generation module, used to determine the final reinforcing region based on the parallel relationship between the two straight line segments of each support region in the first support region, obtain the first reinforcing region according to the final reinforcing region and the layout data of the panel to be tested, take the bottom of the clearance groove of the carrier plate as the starting surface, the stretching height is the height of the corresponding reinforcing region, perform additive stretching on the first reinforcing region, and generate reinforcing ribs on the carrier plate.

[0309] The model generation system provided in this embodiment can execute the above method embodiment, and its implementation principle and technical effect are similar, so they will not be described again here.

[0310] Example 4

[0311] Please see Figure 37 , Figure 37This is a schematic diagram of the structure of an electronic device provided in this embodiment. The electronic device 1100 includes: a processor 1101, a communication interface 1102, a memory 1103, and a communication bus 1104, wherein the processor 1101, the communication interface 1102, and the memory 1103 communicate with each other through the communication bus 1104;

[0312] Memory 1103 is used to store computer programs;

[0313] The processor 1101 is used to execute computer programs to implement all or part of the steps in the above-described PCBA carrier board model generation method embodiments. The specific implementation principles and technical effects are similar and will not be repeated here.

[0314] Example 5

[0315] This embodiment provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements all or part of the steps in the above embodiment of PCBA carrier board model generation. The specific implementation principle and technical effect are similar, and will not be repeated here.

[0316] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, devices, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects, all of which are collectively referred to herein as "modules" or "systems." Furthermore, this application can take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The computer program may be stored / distributed in a suitable medium, provided with or as part of other hardware, or may be distributed in other forms, such as via the Internet or other wired or wireless telecommunications systems.

[0317] In the description of this invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly defined.

[0318] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0319] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for generating a PCBA carrier board model, characterized in that, include: Acquire basic data, which includes a carrier board template file and panel data to be tested; the carrier board template file includes panel layout data to be tested, which includes the number, coordinates and angles of the panels to be tested, and the panel data to be tested includes the PCBA outer contour line, PCBA layout data, component data on the PCBA, and safety distance between the carrier board and the components; Based on the component data on the PCBA, the avoidance contour lines of all components on the panel under test are obtained. Based on the avoidance contour lines of all components on the panel under test and the outer contour line of the PCBA, the final avoidance contour line of the panel under test is obtained. The component clearance depth is obtained based on the component data on the PCBA and the safe distance between the carrier board and the component. The clearance depth of the panel under test is obtained based on the component clearance depth and the preset minimum clearance depth of the panel under test. Based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test, a corresponding clearance groove is generated on the carrier board. A first support region is obtained based on the final clearance contour line of the panel to be tested and the panel data. A second support region is obtained based on the first support region and the panel layout data. Taking the bottom of the clearance groove of the carrier plate as the starting surface, and the stretching height as the clearance depth of the panel to be tested, the second support region is additively stretched to generate a first panel support on the carrier plate. The number M of panels to be tested is obtained according to the panel layout data. If M > 1, the first support region is transformed by coordinates and angles according to the panel layout data to obtain the second support region. If M = 1, the first support region is the second support region. The first support region is all the support regions of a single panel to be tested, and the second support region is all the support regions corresponding to all panels to be tested. Radio frequency vias, handles, and surrounding slots are generated on the carrier board to create the final carrier board model.

2. The method for generating a carrier plate model according to claim 1, characterized in that, The component data on the PCBA includes the outer contour lines of the components; The steps of obtaining the clearance contour lines of all components on the panel under test based on the component data on the PCBA, and obtaining the final clearance contour line of the panel under test based on the clearance contour lines of all components on the panel under test and the outer contour line of the PCBA, include: Expand the outer contour line of each component on the panel to be tested outward by a first preset value to obtain the avoidance contour line of all components on the panel to be tested. The area enclosed by the avoidance contour lines of all components on the panel under test is merged with the area enclosed by the outer contour line of the PCBA, and the outer contour line of the merged area is taken as the initial avoidance contour line of the panel under test. Based on the concavity and convexity of the initial avoidance contour line of the panel to be tested, the initial avoidance contour line of the panel to be tested is regularized to obtain the final avoidance contour line of the panel to be tested. Each line segment in the final avoidance contour line of the panel to be tested is a horizontal or vertical line segment, and the final avoidance contour line of the panel to be tested is rounded.

3. The method for generating a carrier plate model according to claim 1, characterized in that, The component data on the PCBA also includes the height of the components after installation, and the safe distance between the carrier board and the components includes the lateral clearance distance and the depth clearance distance of the components. The steps of obtaining the component clearance depth based on the component data on the PCBA and the safety distance between the carrier board and the component, and obtaining the clearance depth of the panel under test based on the component clearance depth and the preset minimum clearance depth of the panel under test, include: The clearance depth of each component is obtained by adding the height of each component after installation to the clearance spacing of that component. The larger of the maximum value of the clearance depth among all the components and the preset minimum clearance depth of the panel under test is taken as the clearance depth of the panel under test.

4. The method for generating a carrier plate model according to claim 1, characterized in that, The panel data to be tested also includes the PCBA inner contour line; The step of obtaining the first support area based on the final avoidance contour line of the panel to be tested and the data of the panel to be tested includes: In the area enclosed by the final clearance contour of the panel under test, the area enclosed by the clearance contours of all the components and the area enclosed by the inner contour of the PCBA are removed, so as to obtain the initial supportable area of ​​the panel under test based on the remaining area. Remove areas with an area smaller than a second preset value and / or areas with a set distance smaller than a third preset value from the initial supportable area of ​​the panel to be tested to obtain the support area of ​​the panel to be tested. Based on the concavity and convexity of the outer contour line of the area to be supported of the panel to be tested, the outer contour line of the area to be supported of the panel to be tested is regularized to obtain the first support area. Each line segment in the outer contour line of the first support area is a horizontal or vertical line segment, and the outer contour line of the first support area is rounded.

5. The method for generating a carrier plate model according to claim 1, characterized in that, The basic data also includes: a 3D CAD file of the shielding cover, and the model generation method further includes: The shield support outline and the height of the shield support area are obtained based on the 3D CAD file of the shield. The shielding support area is obtained based on the shielding support outline. The first shielding support area is determined based on the shielding support area. The second shielding support area is obtained based on the first shielding support area. Taking the bottom of the clearance groove of the carrier plate as the starting surface, the stretching height is the height of the shielding support area. The second shielding area is additively stretched to generate a second plate surface support on the carrier plate. The first shielding support area is all the shielding support areas of a single panel to be tested, and the second shielding support area is all the shielding support areas corresponding to all panels to be tested.

6. The method for generating a carrier plate model according to claim 5, characterized in that, The 3D CAD file of the shielding cover includes a 3D model of the shielding cover; The shield support outline and the height of the shield support area are obtained based on the 3D CAD file of the shield. The steps of obtaining a shield support region based on the shield support contour line, determining a first shield support region based on the shield support region, and obtaining a second shield support region based on the first shield support region include: The top surface of the shield is obtained based on the three-dimensional model of the shield, and the height value H1 from the top surface of each shield to the mounting surface is obtained. The top surface of the shield is projected onto the mounting surface to obtain the support outline of the shield; The shield support contour line is reduced inward by a fourth preset value to obtain the inner contour line of the support area corresponding to the top surface of the shield. The initial support area of ​​the shield is obtained by the annular area enclosed by the shield support outline and the inner outline of the shield support area. The height of the initial support area of ​​the shield is the depth of the relief groove minus the corresponding height value H1. The shield support area is obtained by filling and removing the area where the gap inside the inner contour line of the initial support area of ​​the shield is less than the fifth preset value. The height of the shield support area is the height of the corresponding initial support area of ​​the shield. The first shielding support area is determined based on the data of the panel to be tested and the shielding support area, and the second shielding support area is obtained based on the first shielding support area.

7. The method for generating a carrier plate model according to claim 6, characterized in that, The steps of determining the first shielding cover support area based on the panel data to be tested and the shielding cover support area, and obtaining the second shielding cover support area based on the first shielding cover support area, include: Based on the panel data to be tested, for identical PCBA data in a single panel, according to the PCBA layout data, the shielding support areas corresponding to the identical PCBA data are transformed by coordinates, angles, and mirrors to obtain a third shielding support area; for different PCBA data in a single panel, the number of PCBA types is N, and the sum of the shielding support areas corresponding to the N PCBA data is the third shielding support area; the third shielding support area obtained corresponding to the identical PCBA data is combined with the third shielding support areas obtained corresponding to the different PCBA data to obtain a first shielding support area; wherein, the shielding support area is the shielding support area corresponding to a single PCBA data, and the third shielding support area is the shielding support area corresponding to multiple PCBA data; The number M of the panels to be tested is obtained based on the panel layout data. If M > 1, the coordinates and angles of the first shielding cover support area are transformed according to the panel layout data to obtain the second shielding cover support area. If M = 1, the first shielding cover support area is the second shielding cover support area.

8. The method for generating a carrier plate model according to claim 7, characterized in that, Taking the bottom of the recessed area of ​​the carrier plate as the starting surface, and the stretching height as the height of the shielding cover support area, the second shielding cover area is additively stretched. After generating the second plate surface support on the carrier plate, the process further includes: Determine the relationship between the minimum distance between every two shield support areas in the first shield support area and the fifth preset value. If the minimum distance is less than the fifth preset value, then obtain the first gap area based on the two corresponding shield support areas using the gap area calculation method. The stretching height of the first gap area is the smaller value of the heights corresponding to the two shield support areas. Determine the relationship between the minimum distance between the shield support area or the first gap area and the first support area in the first shield support area and the fifth preset value. If the minimum distance is less than the fifth preset value, then based on the corresponding shield support area or the corresponding first gap area and the corresponding first support area, obtain the second gap area through the gap area calculation method. The stretching height of the second gap area is the smaller value of the heights of the two corresponding areas. A third gap region is obtained based on the first gap region and the second gap region. A fourth gap region is obtained based on the third gap region and the layout data of the panel to be tested. Taking the bottom of the recessed groove of the carrier plate as the starting surface, the stretching height is the stretching height of the corresponding first gap region or second gap region. The fourth gap region is subjected to additive stretching to complete the filling of all gap regions. The number M of the panels to be tested is obtained based on the layout data of the panels to be tested. If M > 1, the third gap region is transformed by coordinates and angles based on the layout data of the panels to be tested to obtain the fourth gap region. If M = 1, the third gap region is the fourth gap region. The third gap region is all the gap regions of a single panel to be tested, and the fourth gap region is all the gap regions corresponding to all the panels to be tested.

9. The method for generating a carrier plate model according to claim 8, characterized in that, The method for calculating the gap region includes: The first and second regions are expanded outward by W1 / Q to obtain the third and fourth regions, respectively, where W1 is the fifth preset value, 1≤Q≤2, and the first and second regions are the gap regions to be filled. The third region and the fourth region are merged using Boolean operations to obtain the outer contour line of the merged region; Based on the concavity and convexity of the outer contour line of the merged region, the outer contour line of the merged region is regularized to obtain a first contour regularization line, wherein each line segment in the first contour regularization line is a horizontal or vertical line segment. The first contour regularization line is reduced inward by W1 / Q, and the reduced first contour regularization line is rounded to obtain the second contour regularization line. In the region enclosed by the second contour regularization line, the first region and the second region are removed by Boolean operation to obtain the gap region based on the remaining region.

10. The method for generating a carrier plate model according to claim 5, characterized in that, The model generation method further includes: The final reinforcement region is determined based on the parallel relationship between the line segments of each pair of support regions in the first support region, and a reinforcing rib is generated according to the final reinforcement region, including: Traverse all straight line segments in each support area of ​​the first support area. For any straight line segment, if there is a rounded corner at the end of the straight line segment, extend the straight line segment from the end along the straight line segment by a preset length, where the preset length is the radius of the corresponding rounded corner. After extending all the line segments with rounded corners, it is determined whether there are two parallel line segments, and the distance between the two parallel line segments is less than a sixth preset value, and the two parallel line segments overlap in the vertical direction, and the area enclosed by the overlapping part intersects with the first support area. If so, the area to be reinforced is obtained based on the area enclosed by the overlapping part. The area to be reinforced is extended along the extension direction by a seventh preset value to obtain a reinforceable area, wherein the extension direction is the projection direction, and the height of the reinforceable area is equal to the depth of the clearance groove minus the maximum value of the clearance depth of all the components in the reinforceable area. For each area that needs to be reinforced, select one of the all reinforceable areas corresponding to the area that needs to be reinforced as the reinforcement area corresponding to the area that needs to be reinforced according to a preset rule, and summarize all the reinforcement areas corresponding to all areas that need to be reinforced to obtain the final reinforcement area; The first reinforcing region is obtained based on the final reinforcing region and the layout data of the panels to be tested. Taking the bottom of the recessed groove of the carrier plate as the starting surface, the stretching height is the height of the corresponding reinforcing region. The first reinforcing region is additively stretched to generate the reinforcing rib on the carrier plate. The number M of the panels to be tested is obtained according to the layout data of the panels to be tested. If M > 1, the coordinates and angles of the final reinforcing region are transformed according to the layout data of the panels to be tested to obtain the first reinforcing region. If M = 1, the final reinforcing region is the first reinforcing region. The final reinforcing region is all the reinforcing regions of a single panel to be tested, and the first reinforcing region is all the reinforcing regions corresponding to all panels to be tested. The corners of the reinforcing rib are rounded.

11. The method for generating a carrier plate model according to claim 10, characterized in that, According to priority, the preset rules, from high to low, include A1, A2, A3, and A4, where: A1 indicates that the smaller the area of ​​the bounding box formed by the reinforceable region and the region to be reinforced, the higher the priority. A2 indicates that the greater the height of the reinforceable region, the higher the priority. A3 indicates that the greater the distance between the reinforceable area and the first support area and / or the second shielding cover support area, the higher the priority. A4 indicates that the greater the distance between the reinforceable area and the final avoidance contour line of the panel to be tested, the higher the priority.

12. The method for generating a carrier plate model according to claim 2, 4, or 9, characterized in that, The regularization process specifically includes: S1. Along a preset direction, determine the shape of each line segment in the first contour line to be processed. For each line segment, if the line segment is a horizontal or vertical straight line, no processing is performed. If the line segment is an arc, continue to determine the convexity and concavity of the arc. Regularize the convex arc outward and the concave arc inward. If the line segment is a line segment other than the horizontal or vertical straight line and the arc, regularize it outward or inward according to the set conditions. When regularizing outward, merge the area enclosed by the bounding box of the line segment with the area enclosed by the first contour line to be processed. When regularizing inward, remove the area enclosed by the bounding box of the line segment from the area enclosed by the first contour line to be processed. S2. Delete line segments in the first contour line to be processed whose length is less than twice the radius of the fillet. At the same time, delete the two line segments adjacent to the deleted line segments. Connect the gaps formed by the deleted line segments with straight line segments to form a closed second contour line to be processed. Iterate through steps S1-S2 on the second contour line to be processed until the length of all the line segments is greater than or equal to the set value to obtain the final regular contour line.

13. The method for generating a carrier plate model according to claim 5, characterized in that, The carrier board template file also includes layout data of the handle position and layout data of the surrounding slot. The panel data to be tested also includes RF via parameters on the PCBA, length and width of the panel to be tested, and the RF via parameters include the center coordinates and radius of all RF vias on the PCBA. The step of generating RF vias, grab positions, and surrounding slots on the carrier board includes: A first RF via is obtained based on the RF via parameters on the PCBA and the PCBA layout data. A second RF via is obtained based on the first RF via and the layout data of the panel under test. Specifically, for identical PCBA data within a single panel under test, the RF vias corresponding to the identical PCBA data are transformed by coordinates, angles, and mirroring according to the PCBA layout data to obtain a third RF via. For different PCBA data within a single panel under test, the number of PCBA types is N, and the sum of the RF vias corresponding to the N PCBA data is the third RF via. The third RF via obtained from the identical PCBA data is then compared with the RF vias obtained from the different PCBA data. The third RF via is summarized to obtain the first RF via; wherein, the RF via is all the RF vias corresponding to a single PCBA, the first RF via is all the RF vias corresponding to a single panel under test, and the third RF via is all the RF vias corresponding to multiple PCBA data; the number M of the panel under test is obtained according to the layout data of the panel under test; if M>1, the first RF via is transformed by coordinates and angles according to the layout data of the panel under test to obtain the second RF via; if M=1, the first RF via is the second RF via, and the second RF via is the RF via generated on the carrier board corresponding to all the panels under test; the stability of the second RF via is checked; Based on the layout data of the handle position, the coordinates of the panel to be tested in the layout data of the panel to be tested, and the length and width of the panel to be tested, the handle position is generated on the carrier plate with the top surface of the carrier plate as the starting surface, and the corners of the handle position are rounded. The layout data of the handle position includes: overlap size, quantity, and groove depth. Based on the layout data of the surrounding groove, the coordinates of the panel to be tested in the layout data of the panel to be tested, and the length and width of the panel to be tested, the surrounding groove is generated on the carrier plate with the top surface of the carrier plate as the starting surface, and the corners of the surrounding groove are rounded. The layout data of the surrounding groove includes: gap size, quantity, and groove depth.

14. The method for generating a carrier plate model according to claim 13, characterized in that, The step of performing a stability check on the second radio frequency via includes: For each of the second radio frequency vias, a circle is drawn with the center of the radio frequency via as the center and R1 as the radius. The first supportable circular inspection area of ​​the radio frequency via is obtained according to the area enclosed by the circle, where R1 = R0 + R, R0 is the radius of the radio frequency via, and R is the eighth preset value. Determine whether a preset fan-shaped area exists in the first supportable circular inspection area of ​​the RF via. If it does not exist, it is not removed. If it exists, the fan-shaped area is removed, and the first supportable circular inspection area with the fan-shaped area removed is used as the second supportable circular inspection area. The preset fan-shaped area includes the fan-shaped area occupied by the shielding support area in the first support area and / or the shielding support area in the first shielding support area corresponding to the PCBA data where the RF via is located in the first supportable circular inspection area, and the fan-shaped area occupied by the area other than the clearance groove of the carrier board corresponding to the PCBA data where the RF via is located in the first supportable circular inspection area. Determine whether there are continuous fan-shaped areas with an angle greater than 180° in the second supportable circular inspection area. If so, mark the corresponding RF via as unstable support; otherwise, mark the corresponding RF via as stable support. After all RF vias have been inspected, output an inspection report.

15. A PCBA carrier board model generation system, characterized in that, include: The acquisition module is used to acquire basic data, which includes a carrier board template file and panel data to be tested. The carrier board template file includes panel layout data to be tested, which includes the number, coordinates and angles of the panels to be tested. The panel data to be tested includes the PCBA outer contour line, PCBA layout data, component data on the PCBA, and safety distance between the carrier board and the components. The avoidance contour line generation module is used to obtain the avoidance contour lines of all components on the panel under test based on the component data on the PCBA, and to obtain the final avoidance contour line of the panel under test based on the avoidance contour lines of all components on the panel under test and the outer contour line of the PCBA. The clearance groove generation module is used to obtain the clearance depth of the components based on the component data on the PCBA and the safe distance between the carrier board and the components, obtain the clearance depth of the panel under test based on the clearance depth of the components and the preset minimum clearance depth of the panel under test, and generate a corresponding clearance groove on the carrier board based on the final clearance outline of the panel under test, the clearance depth of the panel under test, and the layout data of the panel under test. The first panel support generation module is used to obtain a first support area based on the final clearance outline of the panel to be tested and the panel data, and to obtain a second support area based on the first support area and the panel layout data. Taking the bottom of the clearance groove of the carrier plate as the starting surface, and with a stretching height equal to the clearance depth of the panel to be tested, the second support area is additively stretched to generate the first panel support on the carrier plate. The module obtains the number M of panels to be tested based on the panel layout data. If M > 1, the first support area is transformed by coordinates and angles based on the panel layout data to obtain the second support area. If M = 1, the first support area is the second support area. The first support area represents all support areas for a single panel to be tested, and the second support area represents all support areas corresponding to all panels to be tested. The carrier board model generation module is used to generate RF vias, handles, and surrounding slots on the carrier board to generate the final carrier board model.

16. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, configured to execute the computer program, implement the steps of the method according to any one of claims 1-14.

17. A storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in any one of claims 1-14.

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