Method for determining the fidelity of bit quantum gates in quantum chips and storage media

Abstract

The present application discloses a method and storage medium for determining the fidelity of a bit quantum gate in a quantum chip. The method includes: determining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; determining a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix. The present application solves the technical problem of being unable to determine the fidelity of a two-bit quantum gate.

Description

Technical Field

[0001] The present application relates to the field of superconducting quantum, and in particular, to a method for determining the fidelity of a bit quantum gate in a quantum chip and a storage medium. Background Art

[0002] In the design process of quantum chips, usually only the fidelity of isolated two-bit quantum gates is considered. In the use of quantum chips, two-bit quantum gates will inevitably interact with quantum bits in the environment. However, there is currently no relevant technology to characterize the fidelity of two-bit quantum gates in a multi-bit environment, so there is a technical problem that the fidelity of two-bit quantum gates cannot be determined.

[0003] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention

[0004] The embodiments of the present application provide a method and storage medium for determining the fidelity of a bit quantum gate in a quantum chip, so as to at least solve the technical problem that the fidelity of a two-bit quantum gate cannot be determined.

[0005] According to one aspect of an embodiment of the present application, a method for determining the fidelity of a bit quantum gate in a quantum processor is provided. The method may include: determining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; determining a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix.

[0006] According to another aspect of the embodiment of the present application, another method for the fidelity of a bit quantum gate in a quantum processor is provided. The method may include: obtaining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip by calling a first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environmental bit quantum gate, and the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determining a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, determining the fidelity of the two-bit quantum gate; outputting the fidelity of the two-bit quantum gate by calling a second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0007] According to another aspect of the embodiment of the present application, another method for the fidelity of a bit quantum gate in a quantum processor is provided. The method may include: obtaining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip from a quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determining a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix; and returning the fidelity of the two-bit quantum gate to the quantum platform.

[0008] According to one aspect of an embodiment of the present application, a device for determining the fidelity of a bit quantum gate in a quantum processor is provided. The device may include: a first determination unit, used to determine an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; a second determination unit, used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; a third determination unit, used to determine the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix.

[0009] According to another aspect of the embodiment of the present application, a device for the fidelity of a bit quantum gate in another quantum processor is provided. The device may include: a first acquisition unit, used to acquire an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip by calling a first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environmental bit quantum gate, and the two-bit quantum gate and the environmental bit quantum gate interact in the quantum chip; a fourth determination unit, used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; a fifth determination unit, used to determine the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix; an output unit, used to output the fidelity of the two-bit quantum gate by calling a second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0010] According to another aspect of the embodiment of the present application, another device for the fidelity of a bit quantum gate in a quantum processor is provided. The device may include: a second acquisition unit, used to acquire an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip from a quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; a sixth determination unit, used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; a seventh determination unit, used to determine the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix; a return unit, used to return the fidelity of the two-bit quantum gate to the quantum platform.

[0011] According to another aspect of an embodiment of the present application, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored program, wherein when the program is running, the device where the storage medium is located is controlled to execute any of the above-mentioned methods for determining the fidelity of a bit quantum gate in a quantum processor.

[0012] According to another aspect of an embodiment of the present application, a processor is further provided, and the processor is used to run a program, wherein any one of the above methods for determining the fidelity of a bit quantum gate in a quantum processor is executed when the program is running.

[0013] In an embodiment of the present application, an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip is obtained by calling a first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environmental bit quantum gate, and the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, a first target matrix and a corresponding first evolution matrix are determined, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, the fidelity of the two-bit quantum gate is determined; the fidelity of the two-bit quantum gate is output by calling a second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate. That is to say, the embodiment of the present application takes into account the influence of the environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor on the two-bit quantum gate, and determines the fidelity of the two-bit quantum gate in the multi-bit quantum environment based on the first target matrix and the first evolution matrix after adding the environmental bit quantum gate, thereby improving the accuracy of measuring the fidelity of the two-bit quantum gate, achieving the technical effect of determining the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0014] It is easy to notice that the above general description and the following detailed description are only for the purpose of exemplifying and explaining the present application, and do not constitute a limitation of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0016] Figure 1 It is a hardware structure block diagram of a computer terminal (or mobile device) for implementing a method for determining the fidelity of a bit quantum gate in a quantum processor according to an embodiment of the present application;

[0017] Figure 2 is a structural block diagram of a computing environment according to an embodiment of the present application;

[0018] Figure 3 is a structural block diagram of a service grid according to an embodiment of the present application;

[0019] Figure 4 is a flow chart of a method for determining the fidelity of a bit quantum gate in a quantum processor according to an embodiment of the present application;

[0020] Figure 5 is a flow chart of a method for determining the fidelity of a bit quantum gate in another quantum processor according to an embodiment of the present application;

[0021] Figure 6 is a schematic diagram of a computer device accessing a private network according to an embodiment of the present application;

[0022] Figure 7 is a flow chart of a method for determining the fidelity of a bit quantum gate in another quantum processor according to an embodiment of the present application;

[0023] Figure 8 is a schematic diagram of a decomposition result according to an embodiment of the present application;

[0024] Fig. 9 is a schematic diagram of determining a fidelity error according to an embodiment of the present application;

[0025] Fig.10 is a schematic diagram of a time complexity of determining fidelity according to an embodiment of the present application;

[0026] Fig.11 is a schematic diagram of a method for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application;

[0027] Fig.12is a schematic diagram of another device for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application;

[0028] Fig.13 is a schematic diagram of another device for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application;

[0029] Fig.14 It is a structural block diagram of a computer terminal according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] First, some nouns or terms that appear in the description of the embodiments of the present application are subject to the following explanations:

[0033] Fluxonium can be a flux qubit in a superconducting qubit, or a quantum bit (Qubit) under a flux qubit. It can be used to connect many large junctions (large capacitors) in series, and then connect the large junctions in series with the small junctions in parallel. There are no small superconducting islands in the entire loop to avoid the influence of charge drift. At the same time, the series connection of large junctions provides a sufficiently large inductance so that the quantum fluctuation of the charge distribution is less than one Cooper pair charge. When the system oscillation frequency is much lower than the plasma oscillation frequency of the large junction, fluxonium can well suppress the low-frequency charge drift while retaining the high-frequency oscillation part of the charge. When the loop flux of fluxonium changes, its energy level structure can be adjusted within a wide range (0.5-10GHz).

[0034] A qubit (transmission line shunted plasma oscillation qubit, abbreviated as transmon qubit), which can be a capacitive qubit (charge qubit) in a superconducting qubit, can also be called a charge qubit copper-pairbox) first-level qubit, is used to increase the ratio between Josephson energy (EJ) and charge energy (EC) to flatten the dispersion relation of the system energy state to the gate charge. A larger capacitor is connected in parallel at both ends of the Josephson junction to reduce the sensitivity to charge noise, and the coupling capacitance between it and a linear resonant cavity makes it and the linear resonant cavity form a circuit quantum electrodynamics (circuit-QED) system, which can realize the manipulation and readout of the qubit.

[0035] Example 1

[0036] According to an embodiment of the present application, a method for determining the fidelity of a bit quantum gate in a quantum processor is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0037] The method embodiment provided in the first embodiment of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Figure 1 1 is a hardware structure block diagram of a computer terminal (or mobile device) for implementing a method for determining the fidelity of a bit quantum gate in a quantum processor according to an embodiment of the present application. Figure 1As shown, the computer terminal 10 (or mobile device) may include one or more (102a, 102b, ..., 102n are used to illustrate) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA), a memory 104 for storing data, and a transmission module 106 for communication functions. In addition, it may also include: a display, an input / output interface (I / O interface), a Universal Serial Bus (USB) port (which may be included as one of the ports of the BUS bus), a network interface, a power supply and / or a camera. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above electronic device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0038] It should be noted that the circuit for determining the fidelity of the bit quantum gate in the above-mentioned one or more processors 102 and / or other quantum chips may generally be referred to herein as "the circuit for determining the fidelity of the bit quantum gate in the quantum chip". The circuit for determining the fidelity of the bit quantum gate in the quantum chip may be embodied in whole or in part as software, hardware, firmware or any other combination. In addition, the circuit for determining the fidelity of the bit quantum gate in the quantum chip may be a single independent processing module, or may be fully or partially integrated into any one of the other elements in the computer terminal 10 (or mobile device). As involved in the embodiments of the present application, the voice separation circuit serves as a processor control (e.g., selection of a variable resistance terminal path connected to an interface).

[0039] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the method for determining the fidelity of the bit quantum gate in the quantum processor in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, that is, the method for determining the fidelity of the bit quantum gate in the quantum processor described above is realized. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the computer terminal 10 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0040] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0041] The display may be, for example, a touch screen liquid crystal display (LCD), which may enable a user to interact with a user interface of the computer terminal 10 (or mobile device).

[0042] Figure 1 The hardware structure block diagram shown can be used not only as an exemplary block diagram of the above-mentioned computer terminal 10 (or mobile device), but also as an exemplary block diagram of the above-mentioned server. In an optional embodiment, Figure 2 The block diagram shows the use of the above Figure 1 The computer terminal 10 (or mobile device) shown is an embodiment of a computing node in the computing environment 201. Figure 2 is a structural block diagram of a computing environment according to an embodiment of the present application, such as Figure 2 As shown, computing environment 201 includes multiple computing nodes (such as servers) running on a distributed network (shown as 210-1, 210-2, ..., in the figure). Each computing node contains local processing and memory resources, and end users 202 can remotely run applications or store data in computing environment 201. Applications can be provided as multiple services 220-1, 220-2, 220-3 and 220-4 in computing environment 301, representing services "A", "D", "E" and "H" respectively.

[0043] The end user 202 can provide and access services through a web browser or other software application on the client, and in some embodiments, the end user 202's provision and / or request can be provided to the entry gateway 230. The entry gateway 230 can include a corresponding agent to handle the provision and / or request for the service (one or more services provided in the computing environment 201).

[0044] Services are provided or deployed based on various virtualization technologies supported by the computing environment 201. In some embodiments, services can be provided based on virtual machine (VM)-based virtualization, container-based virtualization, and / or similar methods. Virtual machine-based virtualization can be to simulate a real computer by initializing a virtual machine, and execute programs and applications without directly contacting any actual hardware resources. While the virtual machine virtualizes the machine, according to container-based virtualization, a container can be started to virtualize the entire operating system (Operating System, referred to as OS) so that multiple workloads can run on a single operating system instance.

[0045] In an embodiment based on container virtualization, several containers of a service can be assembled into a Pod (e.g., a Kubernetes Pod). Figure 2 As shown, service 220-2 can be equipped with one or more Pods 240-1, 240-2, ..., 240-N (collectively referred to as Pods). Each Pod can include a proxy 245 and one or more containers 242-1, 242-2, ..., 242-M (collectively referred to as containers). One or more containers in the Pod process requests related to one or more corresponding functions of the service, and the proxy 245 generally controls network functions related to the service, such as routing, load balancing, etc. Other services can also be accompanied by Pods similar to Pods.

[0046] During operation, executing a user request from the end user 202 may require calling one or more services in the computing environment 201, and executing one or more functions of one service may require calling one or more functions of another service. Figure 2 As shown, service "A" 220-1 receives a user request from end user 202 from ingress gateway 230, service "A" 220-1 may call service "D" 220-2, and service "D" 220-2 may request service "E" 220-3 to perform one or more functions.

[0047] The computing environment described above can be a cloud computing environment, where the allocation of resources is managed by the cloud service provider, allowing the development of functions without considering the implementation, adjustment or expansion of servers. The computing environment allows developers to execute code in response to events without building or maintaining complex infrastructure. Services can be divided into a set of functions that can be automatically and independently scaled, rather than expanding a single hardware device to handle potential loads.

[0048] In another optional embodiment, Figure 3 The block diagram shows the use of the above Figure 1 The computer terminal 10 (or mobile device) is shown as an embodiment of the service grid. Figure 3 is a structural block diagram of a service grid according to an embodiment of the present application, such as Figure 3 As shown, the service grid 300 is mainly used to facilitate secure and reliable communication between multiple microservices. Microservices refer to decomposing an application into multiple smaller services or instances and distributing them on different clusters / machines.

[0049] like Figure 3 As shown, the microservice may include an application service instance A and an application service instance B, which form a functional application layer of the service grid 300. In one embodiment, the application service instance A runs in a machine / workload container group 314 (Pod) in the form of a container / process 308, and the application service instance B runs in a machine / workload container group 316 (Pod) in the form of a container / process 310.

[0050] In one implementation, application service instance A may be a product query service, and application service instance B may be a product ordering service.

[0051] like Figure 3 As shown, application service instance A and grid agent (sidecar) 303 coexist in machine workload container group 614, and application service instance B and grid agent 305 coexist in machine workload container 314. Grid agent 303 and grid agent 305 form the data plane layer (dataplane) of service grid 300. Among them, grid agent 303 and grid agent 305 run in the form of container / process 304 and container / process 306 respectively, and can receive request 312 for commodity query service, and grid agent 303 and application service instance A can communicate bidirectionally, and grid agent 305 and application service instance B can communicate bidirectionally. In addition, grid agent 303 and grid agent 305 can also communicate bidirectionally.

[0052] In one embodiment, all traffic of application service instance A is routed to a suitable destination through grid proxy 303, and all network traffic of application service instance B is routed to a suitable destination through grid proxy 305. It should be noted that the network traffic mentioned here includes but is not limited to Hyper Text Transfer Protocol (HTTP), Representational State Transfer (REST) ​​high performance and other forms.

[0053] In one embodiment, the function of extending the data plane layer can be realized by writing a custom filter for the proxy (Envoy) in the service grid 300. The service grid proxy configuration can be to enable the service grid to correctly proxy service traffic and realize service intercommunication and service governance. The grid proxy 303 and the grid proxy 305 can be configured to perform at least one of the following functions: service discovery, health checking, routing, load balancing, authentication and authorization, and observability.

[0054] like Figure 3 As shown, the service grid 300 also includes a control plane layer. The control plane layer can be a group of services running in a dedicated namespace, and these services are hosted by a hosting control plane component 301 in a machine / workload container group (machine / Pod) 302. Figure 3 As shown, the managed control plane component 301 performs bidirectional communication with the grid agent 303 and the grid agent 305. The managed control plane component 301 is configured to perform some control and management functions. For example, the managed control plane component 301 receives telemetry data transmitted by the grid agent 303 and the grid agent 305, and can further aggregate the telemetry data. For these services, the managed control plane component 301 can also provide a user-oriented application programming interface (Application Programming Interface, referred to as API) to more easily manipulate network behavior and provide configuration data to the grid agent 303 and the grid agent 305.

[0055] Under the above operating environment, this application provides Figure 4 A method for determining the fidelity of a bit quantum gate in a quantum processor is shown. Figure 4 1 is a flow chart of a method for determining the fidelity of a bit quantum gate in a quantum processor according to an embodiment of the present application. Figure 4 As shown, the method may include the following steps:

[0056] Step S402, determining an environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum processor.

[0057] In the technical solution provided in the above step S402 of the present application, an environmental bit quantum gate associated with a two-bit quantum gate in a quantum processor can be determined, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum processor. The environmental bit quantum gate can be composed of environmental quantum bits (referred to as environmental bits) around the two-bit quantum gate, which can be a quantum of one environmental bit or a quantum gate of two or more environmental bits. No specific restrictions are made on the environmental bit quantum gate here. A quantum processor may include a quantum system.

[0058] Optionally, in a quantum processor, the control effect of a two-bit quantum gate will be affected by surrounding quantum bits, and the quantum bits around the two-bit quantum gate that affect the two-bit quantum gate can be determined, thereby determining the environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor.

[0059] Step S404, based on the two-bit quantum gate and the environment bit quantum gate, determine the first target matrix and the corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix constructed based on the logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0060] In the technical solution provided in step S404 of the present application, a first target matrix and a first evolution matrix corresponding to the first target matrix can be determined based on the two-bit quantum gate and the environment bit quantum gate. t ) can be a diagonal matrix constructed based on logic gates; the first evolution matrix (U r ) can be a matrix obtained after time evolution (time-dependent evolution).

[0061] Optionally, considering the influence of the environmental bit on the two-bit quantum gate, the first target matrix can be determined based on the two-bit quantum gate and the environmental bit quantum gate. For example, the first target matrix can be obtained by adding two environmental bit quantum gates to the two-bit quantum gate. Considering that the influence of the environmental bit quantum gate on the two-bit quantum gate is different over time, the two-bit quantum gate can be subjected to delayed evolution, and then the matrix obtained after the environmental bit quantum gate and delayed evolution can be processed to obtain the first evolution matrix.

[0062] Step S406, determining the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix.

[0063] In the technical solution provided in the above step S406 of the present application, the fidelity (Fave) of the two-bit quantum gate can be determined based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix.

[0064] When calculating the fidelity of a bit quantum gate in the related art, only the fidelity of an isolated two-bit quantum gate can be calculated. In a real quantum chip, the two-bit quantum gate will inevitably interact with the surrounding quantum bits. The embodiment of the present application takes this situation into consideration and determines the first target matrix and the first evolution matrix based on the environmental bit quantum gate associated with the two-bit quantum gate. Since the two-bit quantum gate is associated with at least one environmental bit quantum gate, the embodiment of the present application takes into account the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix to determine the fidelity of the two-bit quantum gate, thereby solving the technical problem in the prior art that the fidelity of the two-bit quantum gate cannot be accurately determined, and achieving the technical effect of accurately determining the fidelity of the two-bit quantum gate.

[0065] Through the above steps S402 to S408 of the present application, the environment bit quantum gate associated with the two-bit quantum gate in the quantum chip is obtained by calling the first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environment bit quantum gate, and the two-bit quantum gate and the environment bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environment bit quantum gate, a first target matrix and a corresponding first evolution matrix are determined, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix, the fidelity of the two-bit quantum gate is determined; the fidelity of the two-bit quantum gate is output by calling the second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate. That is to say, the embodiment of the present application takes into account the influence of the environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor on the two-bit quantum gate, and determines the fidelity of the two-bit quantum gate in the multi-bit quantum environment based on the first target matrix and the first evolution matrix after adding the environmental bit quantum gate, thereby improving the accuracy of measuring the fidelity of the two-bit quantum gate, achieving the technical effect of determining the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0066] The above method of this embodiment is further introduced below.

[0067] As an optional implementation, when the two-bit quantum gate does not interact with the environment bit quantum gate, the fidelity of the two-bit quantum gate is determined by the second target matrix and the second evolution matrix, the second target matrix is ​​used to represent the logic gate, and the second evolution matrix is ​​composed of multiple time-dependent evolved block matrices, wherein, based on the two-bit quantum gate and the environment bit quantum gate, the first target matrix and the corresponding first evolution matrix are determined, including: adjusting the second target matrix based on the environment bit quantum gate to obtain the first target matrix; adjusting the second evolution matrix based on the environment bit quantum gate to obtain the first evolution matrix.

[0068] In this embodiment, when the two-bit quantum gate does not interact with the environment bit quantum gate, the fidelity of the two-bit quantum gate can be determined based on the second target matrix and the second evolution matrix, wherein the second target matrix (U target ) can be used to represent logic gates, and the second evolution matrix (U0) can be composed of multiple time-dependent evolutionary block matrices (for example, constitute.

[0069] Optionally, the second evolution matrix can be determined by the following formula:

[0070]

[0071] Alternatively, the fidelity of a two-bit quantum gate can be obtained by the following formula:

[0072]

[0073] Among them, Fave(U,U target ) can be used to indicate the determination of the fidelity of a two-bit quantum gate based on the second target matrix and the second evolution matrix; Tr can be used to indicate the trace operation, U + Can be used to represent the conjugate transposed matrix of the second evolution matrix; U target + Can be used to represent the conjugate transpose of the second target matrix.

[0074] In this embodiment, considering the influence of the environment bit quantum gate on the two bit quantum gates, the second target matrix can be adjusted based on the environment bit quantum gate to obtain the first target matrix, and the second evolution matrix can be adjusted based on the environment bit quantum gate to obtain the first evolution matrix.

[0075] As an optional implementation, adjusting the second target matrix based on the environment bit quantum gate to obtain the first target matrix includes: performing tensor processing on the second target matrix based on the environment bit quantum gate to obtain the first target matrix.

[0076] In this embodiment, the second target matrix can be tensor processed based on the environmental bit quantum gate to obtain the first target matrix. Taking the two-bit quantum gate (iswap gate) as an example, the first target matrix can be used to represent the matrix obtained when the two-bit quantum gate is not affected by the surrounding environmental bit quantum gates. The first target matrix can be determined by the following formula:

[0077]

[0078] Among them, iSwap can be used to represent a logic gate, and can be used to represent the state of exchanging two bits in a two-bit quantum gate; i is an imaginary unit; and It can be the evolution matrix obtained when the environment bit quantum gate evolves in isolation.

[0079] As an optional implementation, adjusting the second evolution matrix based on the environment bit quantum gate to obtain the first evolution matrix includes: rotating the second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix.

[0080] In this embodiment, since the two-bit quantum gate will inevitably interact with the surrounding environmental bit quantum gates, the second evolution matrix can be rotated based on the environmental bit quantum gate to obtain the first evolution matrix.

[0081] Optionally, taking the addition of two single-bit quantum as an example, the first evolution matrix can be determined by the following formula:

[0082]

[0083] in, It can be used to represent the single-bit evolution matrix under the assumption that the environmental bit remains unchanged before the real system time evolution; It can be used to represent the single-bit evolution matrix assuming that the environmental bit remains unchanged after the real system time evolution; θ3 and θ4 can be preset arbitrary independent parameters that are not related to each other.

[0084] Alternatively, it can be determined by the following formula and

[0085]

[0086] Among them, R l (θ1, θ2) can be used to characterize the single-bit evolution matrix under the assumption that the environmental bit remains unchanged before the real system time evolution; R r (θ3, θ4) can be used to characterize the single-bit evolution matrix assuming that the environmental bit remains unchanged after the real system time evolution; R lIt can be used to characterize the single-bit evolution matrix without considering the environmental bits before the real system time evolution; R r It can be used to characterize a single-bit evolution matrix without considering the environmental bits before the real system time evolution; θ1 and θ2 can be preset arbitrary independent parameters that are not related to each other.

[0087] As an optional implementation, the fidelity of the two-bit quantum gate is determined based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, including: obtaining a first trace of the product between the conjugate transposed matrix of the first evolution matrix and the first evolution matrix; obtaining a second trace of the product between the conjugate transposed matrix of the first target matrix and the first evolution matrix; and determining the fidelity of the two-bit quantum gate based on the square of the first trace, the second trace, and the number of environmental bit quantum gates.

[0088] In this embodiment, the first trace of the product of the conjugate transposed matrix of the first evolution matrix and the first evolution matrix can be obtained. And obtain the second trace of the product between the conjugate transposed matrix of the first target matrix and the first evolution matrix The fidelity of the two-bit quantum gate can be determined based on the first trace, the square of the second trace, and the number of ambient bit quantum gates.

[0089] As an optional implementation, the method includes determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, and the number of environmental bit quantum gates, including: determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, the number of environmental bit quantum gates and adjacent integers of the number of environmental bit quantum gates.

[0090] In this embodiment, the fidelity of the two-bit quantum gate may be determined based on the first trace, the square of the second trace, the number of ambient bit quantum gates, and adjacent integers of the number of ambient bit quantum gates.

[0091] Alternatively, the fidelity of a two-bit quantum gate can be determined by the following formula:

[0092]

[0093] Among them, Fave(U r , U t ) can be used to indicate the determination of the fidelity of a two-bit quantum gate based on the first target matrix and the first evolution matrix; Tr can be used to indicate the trace operation, U r + Can be used to represent the conjugate transpose of the first evolution matrix; U t +It can be used to represent the conjugate transpose of the first target matrix; n can be the number of environment bit quantum gates, which can be used to characterize the dimension of the first target matrix. In the case of two bit quantum gates plus two environment bits, n can be 16; n+1 can be an adjacent integer of the number of environment bit quantum gates.

[0094] As an optional implementation, the method includes, when the two-bit quantum gate does not interact with the environment bit quantum gate, the fidelity of the two-bit quantum gate is determined by at least the second evolution matrix, obtaining a first trace of the product between the conjugate transposed matrix of the first evolution matrix and the first evolution matrix, including: determining the third trace of the product between the conjugate transposed matrix of the second evolution matrix and the second evolution matrix as the first trace.

[0095] In this embodiment, when the two-bit quantum gate does not interact with the environmental bit quantum gate, the fidelity of the two-bit quantum gate is determined by at least the second evolution matrix, and the third trace of the product of the conjugate transposed matrix of the second evolution matrix and the second evolution matrix can be determined as the first trace, thereby achieving the purpose of determining the first trace.

[0096] Alternatively, since Tr(AB)=Tr(BA), then Therefore, the third trace of the product of the conjugate transposed matrix of the second evolution matrix and the second evolution matrix can be determined as the first trace.

[0097] As an optional implementation, the method includes obtaining a second trace of the product of a conjugate transposed matrix of the first target matrix and the first evolution matrix, including: determining the second trace based on the sum of block matrices on the diagonal of the second evolution matrix.

[0098] In this embodiment, the second trace may be determined based on the sum of the block matrices on the diagonal of the second evolution matrix.

[0099] Optionally, when there are only 4 environmental bit quanta, the second trace can be determined by the following formula:

[0100]

[0101] because:

[0102]

[0103]

[0104] Therefore, it can be determined that:

[0105]

[0106] In the embodiment of the present application, when there are only 4 environmental bit quanta, it is only necessary to multiply the 4 4x4 block matrices on the diagonal of the second evolution matrix by the environmental phase and then simply add them together, so that the 4-bit quantum problem can be converted into a 2-bit quantum problem, and the θ value corresponding to the maximum fidelity can be found by changing θ1, θ2, θ3, and θ4. This method can be simply extended to situations with any number of environmental bits.

[0107] As an optional implementation, the initial time and evolution duration of the quantum chip evolution are determined; the evolution duration is divided into multiple equal sub-evolution durations; based on the first evolution matrix, the initial time and each sub-evolution duration, the time-dependent Hamiltonian corresponding to the quantum chip in each sub-evolution duration is determined.

[0108] In this embodiment, the initial time and evolution period of the quantum chip evolution can be determined, the evolution time can be divided into multiple equal sub-evolution time periods, and the time-dependent Hamiltonian corresponding to each sub-evolution time period of the quantum chip can be determined based on the first evolution matrix, the initial time and each sub-evolution time period. Among them, the initial time (t0) can be the time when the quantum chip evolves at the beginning; the evolution time period (t) can be the evolution time of the electronic chip.

[0109] Optionally, the time when the quantum chip is in the initial state and the time when it has the final state can be determined to obtain the initial time and evolution duration of the quantum chip starting to evolve, and the evolution time can be divided into small pieces to obtain multiple sub-evolution durations of the same duration. Based on the first evolution matrix, the initial time and the duration of each sub-evolution, the time-dependent Hamiltonian (U(t0+τ, t0)) corresponding to each sub-evolution duration of the quantum chip can be determined.

[0110] Optionally, in a real superconducting quantum computing chip, the gate operation is implemented by corresponding to the time evolution of the superconducting quantum system. The embodiment of the present application achieves efficient simulation of the time evolution process of the superconducting quantum system by accurately determining the time-dependent Hamiltonian.

[0111] Optionally, the evolution time t can be divided into multiple sub-evolution durations that satisfy the following conditions:

[0112] U(t1,t0)=U(t1,t1-τ)...U(t0+2τ,t0+τ)U(t0+τ,t0)

[0113] Here, τ can be used to represent a time interval.

[0114] Optionally, when τ<<1 is satisfied, the approximate value of the time-dependent Hamiltonian can be determined by the following formula:

[0115]

[0116] Among them, exp is used to represent the exponential function; H() can be used to represent the Hamiltonian function.

[0117] In the related art, due to the influence of environmental bits, it is very difficult to perform time evolution of multiple quantum bits. The embodiment of the present application takes into account the influence of environmental bits, determines the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip, and determines the time-dependent Hamiltonian corresponding to the duration of each sub-evolution of the quantum chip, thereby achieving the technical effect of accurately determining the fidelity of the two-bit quantum gate and solving the technical problem of being unable to accurately determine the fidelity of the two-bit quantum gate.

[0118] As an optional implementation, the final state of the quantum chip after evolving from an initial state through an evolution time is determined based at least on the time-dependent Hamiltonian corresponding to each sub-evolution time of the quantum chip, the evolution time of each sub-evolution time, and the number of sub-evolution time segments.

[0119] In this embodiment, the final state of the quantum chip after the evolution from the initial state through the evolution time can be determined based at least on the time-dependent Hamiltonian corresponding to each sub-evolution time of the quantum chip, each sub-evolution time, and the number of sub-evolution time segments of the multi-segment sub-evolution time. The sub-evolution time can be used to characterize the time interval; the number of sub-evolution time segments of the multi-segment sub-evolution time can be used to ensure the number of time intervals, which can be obtained by the ratio of the total time to the time interval.

[0120] Optionally, a deterministic compiler (Trotter-Suzuki) can be used to decompose the computational time evolution, and the compiler can process parameters such as the time-dependent Hamiltonian, the duration of each sub-evolution, the number of sub-evolutions in a multi-segment evolution, the initial state of the two-bit quantum gate (|ψ0>), and the order of the compiler to obtain the final state (|ψ(t)>) of the quantum chip after the evolution from the initial state over the evolution duration.

[0121] Alternatively, since any Hamiltonian (H) can be written as the sum of a series of two-qubit quantum gate interactions The deterministic compiler (Trotter-Suzuki) can be decomposed into the time-dependent Hamiltonian by the following formula:

[0122]

[0123] Optionally, the final state of the quantum chip after the evolution time from the initial state can be determined based on the following formula:

[0124] |ψ(t)>=U(t,0)|ψ0)

[0125] Among them, U(t, 0) can be used to characterize the time-dependent Hamiltonian corresponding to the sub-evolution duration t.

[0126] As an optional implementation, the quantum chip is a superconducting quantum chip.

[0127] As an optional implementation, the superconducting quantum chip includes fluxonium type qubits, or the superconducting quantum chip includes transmon type qubits.

[0128] In this embodiment, the superconducting quantum chip may include fluxonium type qubits. By using fluxonium type qubits, low-frequency charge drift can be well suppressed while retaining the high-frequency oscillation part of the charge. When the loop flux of fluxonium changes, its energy level structure can be adjusted within a wide range (0.5-10GHz), so when it is determined that the fidelity between the two-bit quantum gates is low, it is convenient to quickly adjust the parameters of the quantum chip.

[0129] Optionally, the superconducting quantum chip may include a transmon type qubit, and the manipulation and readout of the qubit may be achieved by using the transmon type qubit.

[0130] In an embodiment of the present application, the influence of the environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor on the two-bit quantum gate is taken into consideration, and based on the first target matrix and the first evolution matrix after adding the environmental bit quantum gate, the fidelity of the two-bit quantum gate is determined in a multi-bit quantum environment, thereby improving the accuracy of measuring the fidelity of the two-bit quantum gate, achieving the technical effect of determining the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0131] The embodiment of the present application also provides another method for determining the fidelity of a bit quantum gate in a quantum processor, which can be applied to the software service side (Software-as-a-Service, abbreviated as SaaS).

[0132] Figure 5 is a flow chart of a method for determining the fidelity of a bit quantum gate in another quantum processor according to an embodiment of the present application, such as Figure 5 As shown, the method may include the following steps.

[0133] Step S502, obtaining an environment bit quantum gate associated with the two-bit quantum gate in the quantum chip by calling the first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environment bit quantum gate, and the two-bit quantum gate and the environment bit quantum gate interact with each other in the quantum chip.

[0134] In the technical solution provided in the above step S502 of the present application, the first interface can be an interface for data interaction between the server and the user end. The user end can obtain the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip by calling the first interface. The two-bit quantum gate and the environmental bit quantum gate, and the interaction between the two-bit quantum gate and the environmental bit quantum gate in the quantum chip are used as a first parameter of the first interface to achieve the purpose of obtaining the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip.

[0135] Step S504, based on the two-bit quantum gate and the environment bit quantum gate, determine a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0136] Step S506, determining the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix.

[0137] Step S508, outputting the fidelity of the two-bit quantum gate by calling the second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0138] In the technical solution provided in the above step S508 of the present application, the second interface can be an interface for data interaction between the server and the user end. The server can send the fidelity of the two-bit quantum gate to the client, so that the client can output the fidelity of the two-bit quantum gate to the second interface as a parameter of the second interface, thereby achieving the purpose of sending the fidelity of the two-bit quantum gate to the user end.

[0139] Figure 6 is a schematic diagram of a computer device accessing a private network according to an embodiment of the present application, such as Figure 6 As shown, the environment bit quantum gate associated with the two-bit quantum gate in the quantum chip can be obtained by calling the first interface, and the computer device executes: step S602, obtaining the environment bit quantum gate associated with the two-bit quantum gate in the quantum chip by calling the first interface; step S604, determining the first target matrix and the corresponding first evolution matrix based on the two-bit quantum gate and the environment bit quantum gate; step S606, determining the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix; step S608, outputting the fidelity of the two-bit quantum gate by calling the second interface.

[0140] Optionally, the platform can output the fidelity of the two-bit quantum gate by calling the second interface, wherein the second interface can be used to send the fidelity of the two-bit quantum gate to the client, so that the client sends the fidelity of the two-bit quantum gate.

[0141] The present application embodiment also provides another method for determining the fidelity of a bit quantum gate in a quantum processor. Figure 7 FIG. 1 is a flow chart of another method for determining the fidelity of a bit quantum gate in a quantum processor according to an embodiment of the present application. Figure 7 As shown, the method may include the following steps:

[0142] Step S702, obtaining an environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip from the quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip.

[0143] Step S704, based on the two-bit quantum gate and the environment bit quantum gate, determine a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0144] Step S706, determining the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix.

[0145] Step S708, returning the fidelity of the two-bit quantum gate to the quantum platform.

[0146] Through the above steps S702 to S708 of the present application, the environment bit quantum gate associated with the two-bit quantum gate in the quantum chip is obtained from the quantum platform, wherein the two-bit quantum gate and the environment bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environment bit quantum gate, a first target matrix and a corresponding first evolution matrix are determined, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix, the fidelity of the two-bit quantum gate is determined; and the fidelity of the two-bit quantum gate is returned to the quantum platform, thereby achieving the technical effect of being able to determine the fidelity of the two-bit quantum gate and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0147] Example 2

[0148] In the design process of superconducting quantum chips, usually only the fidelity of isolated two-bit gates (quantum gates) is considered. In a real quantum chip, the two-bit gate will inevitably interact with the surrounding quantum bits. However, there is currently no relevant technology to characterize the fidelity of two-bit quantum gates in a multi-bit environment.

[0149] In addition, when considering the influence of the environmental bits around the two-bit quantum gate on the two-bit quantum gate, we usually need to solve the time evolution of a multi-bit system. However, accurately solving the time evolution of a multi-qubit system is a relatively difficult problem.

[0150] In order to characterize the fidelity of two-bit quantum gates in a multi-bit environment, an embodiment of the present application proposes a method for efficiently analyzing the fidelity of two-bit gates in a multi-bit superconducting quantum chip. In order to accurately solve the time evolution of a multi-bit system, a calculation method for the time evolution of a multi-bit system based on Trotter-Suzuki decomposition is developed.

[0151] The following is a further introduction to the calculation method of the time evolution of a multi-bit system based on Trotter-Suzuki decomposition in an embodiment of the present application.

[0152] In the related art, the fidelity of a two-bit quantum gate can be defined as:

[0153]

[0154] Where Fave is the two-bit gate fidelity, U can be the second evolution matrix (the matrix after time-dependent evolution), and U target It can be the second target matrix (which can be referred to as the target matrix for short). Tr can be used to represent the trace operation, U + Can be used to represent the conjugate transposed matrix of the second evolution matrix; U target + Can be used to represent the conjugate transpose of the second target matrix.

[0155] In this embodiment, considering the influence of the environment bit quantum gate on the two bit quantum gates, the second target matrix can be adjusted based on the environment bit quantum gate to obtain the first target matrix, and the second evolution matrix can be adjusted based on the environment bit quantum gate to obtain the first evolution matrix.

[0156] For example, the first target matrix can be obtained by adding two environmental bit quantum gates to the two-bit quantum gate. Considering that the influence of the environmental bit quantum gate on the two-bit quantum gate is different over time, the two-bit quantum gate can be subjected to delayed evolution, and then the matrix obtained after the environmental bit quantum gate and delayed evolution can be processed to obtain the first evolution matrix. Taking the two-bit quantum gate (iswap gate) as an example, the first target matrix can be used to represent the matrix obtained when the two-bit quantum gate is not affected by the surrounding environmental bit quantum gates, which can be:

[0157]

[0158] Among them, iSwap can be used to represent a logic gate, and can be used to represent the state of exchanging two bits in a two-bit quantum gate; i is an imaginary unit; and It can be the evolution matrix obtained when the environment bit quantum gate evolves in isolation.

[0159] Alternatively, the second evolution matrix may be assumed to be:

[0160]

[0161] In this embodiment, since the two-bit quantum gate will inevitably interact with the surrounding environmental bit quantum gates, the second evolution matrix can be rotated based on the environmental bit quantum gate to obtain the first evolution matrix.

[0162] For example, after adding two environmental bit quanta (referred to as single bits) and rotating the optimizable parameters (θ1, θ2, θ3, θ4),

[0163]

[0164] in, It can be used to represent the single-bit evolution matrix under the assumption that the environmental bit remains unchanged before the real system time evolution; It can be used to represent the single-bit evolution matrix assuming that the environment bit remains unchanged after the real system time evolution.

[0165] Alternatively, it can be determined by the following formula and

[0166]

[0167]

[0168] Among them, R l (θ1, θ2 can be used to characterize the single-bit evolution matrix under the assumption that the environmental bit remains unchanged before the real system time evolution; R r (θ3, θ4) can be used to characterize the single-bit evolution matrix assuming that the environmental bit remains unchanged after the real system time evolution; R l It can be used to characterize the single-bit evolution matrix without considering the environmental bits before the real system time evolution; R r It can be used to characterize a single-bit evolution matrix without considering the environmental bits before the real system time evolution; θ1 and θ2 can be preset arbitrary independent parameters that are not related to each other.

[0169] Alternatively, the fidelity of a two-bit quantum gate can be determined by the following formula:

[0170]

[0171] Among them, Fave(U r , U t ) can be used to indicate the determination of the fidelity of a two-bit quantum gate based on the first target matrix and the first evolution matrix; Tr can be used to indicate the trace operation, U r + Can be used to represent the conjugate transpose of the first evolution matrix; U t + It can be used to represent the conjugate transpose of the first target matrix; n can be the number of environment bit quantum gates; n+1 can be an adjacent integer of the number of environment bit quantum gates.

[0172] The following takes the example of the number of environmental bit quantum gates being 4 to further explain how to calculate the fidelity of a two-bit quantum gate.

[0173] Alternatively, since Tr(AB)=Tr(BA), then The first term in the fidelity calculation formula is a constant, and the second term can only be optimized by the rotation matrix. According to the matrix block operation rule:

[0174]

[0175] At the same time, due to:

[0176]

[0177]

[0178] Therefore, it can be determined that:

[0179]

[0180] In the embodiment of the present application, when there are only 4 environmental bit quanta, it is only necessary to multiply the 4 4x4 block matrices on the diagonal of the second evolution matrix by the environmental phase and then simply add them together, so that the 4-bit quantum problem can be converted into a 2-bit quantum problem, and the θ value corresponding to the maximum fidelity can be found by changing θ1, θ2, θ3, and θ4. This method can be simply extended to situations with any number of environmental bits.

[0181] Optionally, in a real superconducting quantum computing chip, the gate operation is implemented by corresponding to the time evolution of the superconducting quantum system. The embodiment of the present application achieves efficient simulation of the time evolution process of the superconducting quantum system by accurately determining the time-dependent Hamiltonian.

[0182] In an embodiment of the present application, in order to accurately solve the time evolution of a multi-bit quantum system, a calculation method for the time evolution of a multi-bit system based on Trotter-Suzuki decomposition is proposed. This method can use a deterministic compiler to decompose and calculate the time evolution. The compiler can process parameters such as the time-dependent Hamiltonian, the duration of each sub-evolution, the number of sub-evolution durations, the initial state of the two-bit quantum gate (|ψ0>), and the order of the compiler to obtain the final state (|ψ(t)>) of the quantum chip after the evolution from the initial state after the evolution duration. Based on the obtained mode, the time evolution of the multi-bit quantum system is accurately determined, thereby achieving the technical effect of being able to determine the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0183] In this embodiment, a quantum system is in an initial state, and after an evolution time t, has a final state:

[0184] |ψ(t)>=U(t,0)|ψ0>

[0185] Among them, U(t, 0) can be used to characterize the time-dependent Hamiltonian corresponding to the sub-evolution duration t.

[0186] Optionally, the evolution time t can be cut into small pieces that satisfy:

[0187] U(t1,t0)=U(t1,t1-τ)...U(t0+2τ,t0+τ)U(t0+τ,t0)

[0188] Here, τ can be used to represent a time interval.

[0189] Optionally, when τ<<1 is satisfied, the approximate value of the time-dependent Hamiltonian can be determined by the following formula:

[0190]

[0191] Among them, exp is used to represent the exponential function; H() can be used to represent the Hamiltonian function.

[0192] Optionally, Figure 8 is a schematic diagram of a decomposition result according to an embodiment of the present application, such as Figure 8 As shown, the evolution of the entire space (H) can be decomposed into a series of two-bit evolutions (h12, h14, h23, etc.), thereby greatly reducing the dimension of the evolution matrix.

[0193] Alternatively, any Hamiltonian (H) can be written as the sum of a series of two-qubit quantum gate interactions The deterministic compiler (Trotter-Suzuki) can be decomposed into the time-dependent Hamiltonian by the following formula:

[0194]

[0195] In the embodiment of the present application, the time evolution is decomposed and calculated (for example, Trotter decomposition), and parameters such as Hamiltonian, time interval, number of time intervals (total time / time interval), initial state, number of bit states, Trotter order, etc. are input into the program. The program can accurately output the final state after evolution, thereby achieving the purpose of accurately solving the time evolution of the multi-bit system, further realizing the technical effect of determining the fidelity of a two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of a two-bit quantum gate.

[0196] Taking the construction of a logic gate (iswap) with two data bit quantum gates plus two environment bit quantum gates as an example, the duration of the gate operation remains unchanged. Fig. 9 is a schematic diagram of determining the error of fidelity according to an embodiment of the present application. The accuracy of the second-order Trotter procedure is as follows: Fig. 9 As shown in the figure, the horizontal axis is the time interval, and the vertical axis is the maximum element error of the evolution matrix (max(△U)). It can be seen that the error is O(delta_t^4). Fig.10 is a schematic diagram of the time complexity of determining fidelity according to an embodiment of the present application. The time complexity of the second-order Trotter program is as follows: Fig.10 As shown in the figure, the horizontal axis is the time interval (△t), and the vertical axis is the running time (T) required for time evolution. It can be seen that the time complexity is O(delta_t^-1). From the above, it can be seen that the relationship between the running time and the number of bits n of the embodiment of the present application is O(d^(n+2)), which has a significant advantage over the complexity of the traditional method O(d^(2n)). Therefore, the method of the embodiment of the present application can not only accurately determine the fidelity of the two-bit quantum gate, but also improve the processing efficiency of determining the fidelity of the two-bit quantum gate.

[0197] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0198] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions to enable a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.

[0199] Example 3

[0200] According to an embodiment of the present application, there is also provided a method for implementing the above Figure 4 The method for determining the fidelity of a bit quantum gate in a quantum chip and the device for determining the fidelity of a bit quantum gate in a quantum chip are shown.

[0201] Fig.11 is a schematic diagram of a method for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application, such as Fig.11 As shown, the device 1100 for determining the fidelity of a bit quantum gate in the quantum chip may include: a first determining unit 1102 , a second determining unit 1104 and a third determining unit 1106 .

[0202] The first determining unit 1102 is used to determine an environmental bit quantum gate associated with a two-bit quantum gate in the quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip.

[0203] The second determination unit 1104 is used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environment bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on the logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0204] The third determining unit 1106 is used to determine the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix.

[0205] It should be noted that the first determining unit 1102, the second determining unit 1104 and the third determining unit 1106 correspond to steps S402 to S406 in Embodiment 1, and the three units and the corresponding steps implement the same examples and application scenarios, but are not limited to the contents disclosed in Embodiment 1. It should be noted that the above units may be hardware components or software components stored in a memory (e.g., memory 104) and processed by one or more processors (e.g., processors 102a, 102b..., 102n), and the above units may also be part of a device and run in the computer terminal 10 provided in Embodiment 1.

[0206] According to an embodiment of the present application, there is also provided a method for implementing the above Figure 5 The method for determining the fidelity of a bit quantum gate in a quantum chip and the device for determining the fidelity of a bit quantum gate in a quantum chip are shown.

[0207] Fig.12 is a schematic diagram of another device for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application, such as Fig.12 As shown, the device 1200 for determining the fidelity of a bit quantum gate in the quantum chip may include: a first acquisition unit 1202 , a fourth determination unit 1204 , a fifth determination unit 1206 and an output unit 1208 .

[0208] The first acquisition unit 1202 is used to acquire the environment bit quantum gate associated with the two-bit quantum gate in the quantum chip by calling the first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environment bit quantum gate, and the two-bit quantum gate and the environment bit quantum gate interact with each other in the quantum chip.

[0209] The fourth determination unit 1204 is used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environment bit quantum gate, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0210] The fifth determining unit 1206 is used to determine the fidelity of the two-bit quantum gate based on the number of the environment bit quantum gates, the first target matrix and the first evolution matrix.

[0211] The output unit 1208 is used to output the fidelity of the two-bit quantum gate by calling the second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0212] It should be noted that the first acquisition unit 1202, the fourth determination unit 1204, the fifth determination unit 1206 and the output unit 1208 correspond to steps S502 to S508 in Embodiment 1, and the four units and the corresponding steps implement the same examples and application scenarios, but are not limited to the contents disclosed in Embodiment 1. It should be noted that the above units can be hardware components or software components stored in a memory (e.g., memory 104) and processed by one or more processors (e.g., processors 102a, 102b..., 102n), and the above units can also be run in the computer terminal 10 provided in Embodiment 1 as part of the device.

[0213] According to an embodiment of the present application, there is also provided a method for implementing the above Figure 7 The method for determining the fidelity of a bit quantum gate in a quantum chip and the device for determining the fidelity of a bit quantum gate in a quantum chip are shown.

[0214] Fig.13 is a schematic diagram of another device for determining the fidelity of a bit quantum gate in a quantum chip according to an embodiment of the present application, such as Fig.13 As shown, the device 1300 for determining the fidelity of a bit quantum gate in the quantum chip may include: a second obtaining unit 1302 , a sixth determining unit 1304 , a seventh determining unit 1306 and a returning unit 1308 .

[0215] The second acquisition unit 1302 is used to acquire an environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip from the quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip.

[0216] The sixth determination unit 1304 is used to determine a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environment bit quantum gate, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution.

[0217] The seventh determining unit 1306 is used to determine the fidelity of the two-bit quantum gate based on the number of environment bit quantum gates, the first target matrix and the first evolution matrix.

[0218] The returning unit 1308 is used to return the fidelity of the two-bit quantum gate to the quantum platform.

[0219] It should be noted that the second acquisition unit 1302, the sixth determination unit 1304, the seventh determination unit 1306 and the return unit 1308 correspond to steps S702 to S708 in Embodiment 1, and the four units and the corresponding steps implement the same examples and application scenarios, but are not limited to the contents disclosed in Embodiment 1. It should be noted that the above units can be hardware components or software components stored in a memory (e.g., memory 104) and processed by one or more processors (e.g., processors 102a, 102b..., 102n), and the above units can also be run in the computer terminal 10 provided in Embodiment 1 as part of the device.

[0220] In the device for determining the fidelity of a bit quantum gate in the quantum chip of this embodiment, the influence of an environmental bit quantum gate associated with a two-bit quantum gate in a quantum processor on the two-bit quantum gate is taken into consideration, and the fidelity of the two-bit quantum gate in a multi-bit quantum environment is determined based on the first target matrix and the first evolution matrix after adding the environmental bit quantum gate, thereby improving the accuracy of measuring the fidelity of the two-bit quantum gate, achieving the technical effect of being able to determine the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0221] Example 4

[0222] The embodiment of the present application may provide a computer terminal, which may be any computer terminal device in a computer terminal group. Optionally, in this embodiment, the computer terminal may also be replaced by a terminal device such as a mobile terminal.

[0223] Optionally, in this embodiment, the computer terminal may be located in at least one network device among a plurality of network devices of the computer network.

[0224] In this embodiment, the above-mentioned computer terminal can execute the program code of the following steps in the method for determining the fidelity of a bit quantum gate in a quantum chip of an application: determining an environmental bit quantum gate associated with a two-bit quantum gate in the quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; determining a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix.

[0225] Optionally, Fig.14 is a structural block diagram of a computer terminal according to an embodiment of the present application. Fig.14As shown, the computer terminal A may include: one or more (only one is shown in the figure) processors 1402 , a memory 1404 , and a transmission device 1406 .

[0226] Among them, the memory can be used to store software programs and modules, such as the program instructions / modules corresponding to the method and device for determining the fidelity of the bit quantum gate in the quantum chip in the embodiment of the present application. The processor executes various functional applications and predictions by running the software programs and modules stored in the memory, that is, realizing the above-mentioned method for determining the fidelity of the bit quantum gate in the quantum chip. The memory may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely arranged relative to the processor, and these remote memories can be connected to the computer terminal A via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0227] The processor can call the information and application programs stored in the memory through the transmission device to perform the following steps: determine the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determine the first target matrix and the corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix constructed based on the logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, determine the fidelity of the two-bit quantum gate.

[0228] Optionally, the processor may further execute program codes of the following steps: adjusting the second target matrix based on the environment bit quantum gate to obtain the first target matrix; and adjusting the second evolution matrix based on the environment bit quantum gate to obtain the first evolution matrix.

[0229] Optionally, the processor may further execute program code of the following steps: performing tensor processing on the second target matrix based on the environment bit quantum gate to obtain the first target matrix.

[0230] Optionally, the processor may further execute program code of the following steps: rotating the second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix.

[0231] Optionally, the processor may also execute the program code of the following steps: obtaining a first trace of the product of the conjugate transposed matrix of the first evolution matrix and the first evolution matrix; obtaining a second trace of the product of the conjugate transposed matrix of the first target matrix and the first evolution matrix; and determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, and the number of environment bit quantum gates.

[0232] Optionally, the processor may further execute program code of the following steps: determining the fidelity of the two-bit quantum gate based on the square of the first trace, the second trace, the number of environment bit quantum gates, and adjacent integers of the number of environment bit quantum gates.

[0233] Optionally, the processor may also execute a program code of the following step: determining the third trace of the product of the conjugate transposed matrix of the second evolution matrix and the second evolution matrix as the first trace.

[0234] Optionally, the processor may further execute a program code of the following step: determining a second trace based on a sum of block matrices on a diagonal of the second evolution matrix.

[0235] Optionally, the processor may also execute the program code of the following steps: determining the initial time and evolution duration of the quantum chip evolution; dividing the evolution duration into multiple equal sub-evolution durations; and determining the time-dependent Hamiltonian corresponding to each sub-evolution duration of the quantum chip based on the first evolution matrix, the initial time and each sub-evolution duration.

[0236] Optionally, the processor may also execute the program code of the following steps: determining the final state of the quantum chip after evolution from the initial state through the evolution time based at least on the time-dependent Hamiltonian corresponding to each sub-evolution time of the quantum chip, the sub-evolution time of each sub-evolution time, and the number of sub-evolution time segments.

[0237] As an optional example, the processor can call the information and application stored in the memory through the transmission device to perform the following steps: obtain the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip by calling the first interface, wherein the first interface includes a first parameter, and the parameter value of the first parameter is the two-bit quantum gate and the environmental bit quantum gate, and the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determine the first target matrix and the corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on the logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, determine the fidelity of the two-bit quantum gate; output the fidelity of the two-bit quantum gate by calling the second interface, wherein the second interface includes a second parameter, and the parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0238] As an optional example, the processor can call the information and application stored in the memory through the transmission device to perform the following steps: obtain the environmental bit quantum gate associated with the two-bit quantum gate in the quantum chip from the quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determine the first target matrix and the corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on the logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix, determine the fidelity of the two-bit quantum gate; and return the fidelity of the two-bit quantum gate to the quantum platform.

[0239] The embodiment of the present application takes into account the influence of the environmental bit quantum gate associated with the two-bit quantum gate in the quantum processor on the two-bit quantum gate, and determines the fidelity of the two-bit quantum gate in the multi-bit quantum environment based on the first target matrix and the first evolution matrix after adding the environmental bit quantum gate, thereby improving the accuracy of measuring the fidelity of the two-bit quantum gate, achieving the technical effect of determining the fidelity of the two-bit quantum gate, and solving the technical problem of being unable to determine the fidelity of the two-bit quantum gate.

[0240] It can be understood by those skilled in the art that Fig.14 The structure shown is for illustration only, and the computer terminal A may also be a terminal device such as a smart phone (eg, a tablet computer, a palm computer, a mobile Internet device (MID), a PAD, etc. Fig.14 The structure of the computer terminal A is not limited. For example, the computer terminal A may also include Fig.14 More or fewer components (such as network interfaces, display devices, etc.) shown, or having Fig.14 Different configurations shown.

[0241] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing the hardware related to the terminal device through a program, and the program can be stored in a computer-readable storage medium, and the storage medium may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0242] Example 5

[0243] The embodiment of the present application also provides a computer-readable storage medium. Optionally, in this embodiment, the computer-readable storage medium can be used to store the program code executed by the method for determining the fidelity of a bit quantum gate in a quantum chip provided in the above embodiment 1.

[0244] Optionally, in this embodiment, the computer-readable storage medium may be located in any one of the computer terminals in a computer terminal group in a computer network, or in any one of the mobile terminals in a mobile terminal group.

[0245] Optionally, in this embodiment, the computer-readable storage medium is configured to store program codes for executing the following steps: determining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; determining a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix and the first evolution matrix.

[0246] Optionally, the computer-readable storage medium may also execute program code of the following steps: adjusting the second target matrix based on the environment bit quantum gate to obtain the first target matrix; adjusting the second evolution matrix based on the environment bit quantum gate to obtain the first evolution matrix.

[0247] Optionally, the computer-readable storage medium may also execute program code of the following steps: performing tensor processing on the second target matrix based on the environment bit quantum gate to obtain the first target matrix.

[0248] Optionally, the computer-readable storage medium may also execute program code of the following steps: rotating the second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix.

[0249] Optionally, the computer-readable storage medium may also execute program codes of the following steps: obtaining a first trace of the product of the conjugate transposed matrix of the first evolution matrix and the first evolution matrix; obtaining a second trace of the product of the conjugate transposed matrix of the first target matrix and the first evolution matrix; and determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, and the number of environment bit quantum gates.

[0250] Optionally, the computer-readable storage medium may also execute program code for the following steps: determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, the number of environment bit quantum gates, and adjacent integers of the number of environment bit quantum gates.

[0251] Optionally, the computer-readable storage medium may also execute program code for the following step: determining the third trace of the product of the conjugate transposed matrix of the second evolution matrix and the second evolution matrix as the first trace.

[0252] Optionally, the computer-readable storage medium may also execute program code for the following step: determining a second trace based on the sum of block matrices on the diagonal of the second evolution matrix.

[0253] Optionally, the computer-readable storage medium may also execute program code of the following steps: determining the initial time and evolution duration of the quantum chip evolution; dividing the evolution duration into multiple identical sub-evolution durations; and determining the time-dependent Hamiltonian corresponding to each sub-evolution duration of the quantum chip based on the first evolution matrix, the initial time and each sub-evolution duration.

[0254] Optionally, the computer-readable storage medium may also execute program code of the following steps: determining the final state of the quantum chip after evolution from an initial state through an evolution time period based at least on the time-dependent Hamiltonian corresponding to each sub-evolution time period of the quantum chip, the sub-evolution time period of each sub-evolution time period, and the number of sub-evolution time periods of multiple sub-evolution time periods.

[0255] As an optional example, a computer-readable storage medium is configured to store program code for performing the following steps: obtaining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip by calling a first interface, wherein the first interface includes a first parameter, and a parameter value of the first parameter is the two-bit quantum gate and the environmental bit quantum gate, and the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; based on the two-bit quantum gate and the environmental bit quantum gate, determining a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix; outputting the fidelity of the two-bit quantum gate by calling a second interface, wherein the second interface includes a second parameter, and a parameter value of the second parameter is the fidelity of the two-bit quantum gate.

[0256] As an optional example, a computer-readable storage medium is configured to store program code for performing the following steps: obtaining an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip from a quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; determining a first target matrix and a corresponding first evolution matrix based on the two-bit quantum gate and the environmental bit quantum gate, wherein the first target matrix is ​​a diagonal matrix based on a logic gate representation, and the first evolution matrix is ​​a matrix after time-dependent evolution; determining the fidelity of the two-bit quantum gate based on the number of environmental bit quantum gates, the first target matrix, and the first evolution matrix; and returning the fidelity of the two-bit quantum gate to the quantum platform.

[0257] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0258] In the above embodiments of the present application, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0259] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0260] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0261] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0262] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or all or part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of each embodiment method of the present application. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk, etc. Various media that can store program codes.

[0263] The above are only preferred implementations of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A method for determining the fidelity of a bit quantum gate in a quantum chip, characterized in that: include: Determining an ambient bit quantum gate associated with a two-bit quantum gate in a quantum chip, wherein the two-bit quantum gate and the ambient bit quantum gate interact with each other in the quantum chip; Based on the two-bit quantum gate and the environment bit quantum gate, determine a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix constructed based on a logic gate, the logic gate is used to characterize the state of exchanging two bits in the two-bit quantum gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; Determining the fidelity of the two-bit quantum gate based on the number of the environment bit quantum gates, the first target matrix, and the first evolution matrix; Wherein, based on the two-bit quantum gate and the environment bit quantum gate, determining a first target matrix and a corresponding first evolution matrix includes: performing tensor processing on a second target matrix based on the environment bit quantum gate to obtain the first target matrix, wherein the second target matrix is ​​used to represent the logic gate; rotating a second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix, wherein the second evolution matrix is ​​composed of a plurality of time-dependent evolved block matrices.

2. The method according to claim 1, characterized in that: When the two-bit quantum gate does not interact with the environment bit quantum gate, the fidelity of the two-bit quantum gate is determined by the second target matrix and the second evolution matrix.

3. The method according to claim 1, characterized in that: Determining the fidelity of the two-bit quantum gate based on the number of the environment bit quantum gates, the first target matrix, and the first evolution matrix includes: Obtaining a first trace of a product of a conjugate transposed matrix of the first evolution matrix and the first evolution matrix; Obtaining a second trace of the product of the conjugate transposed matrix of the first target matrix and the first evolution matrix; The fidelity of the two-bit quantum gate is determined based on the first trace, the square of the second trace, and the number of the environment bit quantum gates.

4. The method according to claim 3, characterized in that Determining the fidelity of the two-bit quantum gate based on the first trace, the square of the second trace, and the number of the environment bit quantum gates includes: The fidelity of the two-bit quantum gate is determined based on the first trace, the square of the second trace, the number of the environment bit quantum gates, and adjacent integers of the number of the environment bit quantum gates.

5. The method according to claim 3, characterized in that: In a case where the two-bit quantum gate does not interact with the environment bit quantum gate, the fidelity of the two-bit quantum gate is determined by at least a second evolution matrix, and obtaining a first trace of a product between a conjugate transposed matrix of the first evolution matrix and the first evolution matrix comprises: The third trace of the product of the conjugate transposed matrix of the second evolution matrix and the second evolution matrix is ​​determined as the first trace.

6. The method according to claim 5, characterized in that Obtaining a second trace of the product of a conjugate transposed matrix of the first target matrix and the first evolution matrix includes: The second trace is determined based on the sum of block matrices on the diagonal of the second evolution matrix.

7. The method according to claim 1, characterized in that The method further comprises: Determining the initial time and evolution duration of the quantum chip evolution; Dividing the evolution duration into multiple identical sub-evolution durations; Based on the first evolution matrix, the initial time and the duration of each sub-evolution, the time-dependent Hamiltonian of the quantum chip corresponding to each sub-evolution duration is determined.

8. The method according to claim 7, characterized in that The method further comprises: The final state of the quantum chip after evolving from an initial state through the evolution time is determined based at least on the time-dependent Hamiltonian corresponding to each sub-evolution time of the quantum chip, each sub-evolution time, and the number of sub-evolution time periods.

9. The method according to any one of claims 1 to 8, characterized in that The quantum chip is a superconducting quantum chip.

10. The method according to claim 9, characterized in that The superconducting quantum chip includes a fluxonium type qubit, or the superconducting quantum chip includes a transmon type qubit.

11. A method for determining the fidelity of a bit quantum gate in a quantum chip, characterized in that: include: Acquire an environment bit quantum gate associated with a two-bit quantum gate in a quantum chip by calling a first interface, wherein the first interface includes a first parameter, a parameter value of the first parameter is the two-bit quantum gate and the environment bit quantum gate, and the two-bit quantum gate and the environment bit quantum gate interact with each other in the quantum chip; Based on the two-bit quantum gate and the environment bit quantum gate, determine a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, the logic gate is used to characterize the state of exchanging two bits in the two-bit quantum gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; Determining the fidelity of the two-bit quantum gate based on the number of the environment bit quantum gates, the first target matrix, and the first evolution matrix; Outputting the fidelity of the two-bit quantum gate by calling a second interface, wherein the second interface includes a second parameter, and a parameter value of the second parameter is the fidelity of the two-bit quantum gate; Wherein, based on the two-bit quantum gate and the environment bit quantum gate, determining a first target matrix and a corresponding first evolution matrix includes: performing tensor processing on a second target matrix based on the environment bit quantum gate to obtain the first target matrix, wherein the second target matrix is ​​used to represent the logic gate; rotating a second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix, wherein the second evolution matrix is ​​composed of a plurality of time-dependent evolved block matrices.

12. A method for determining the fidelity of a bit quantum gate in a quantum chip, characterized in that: Acquire an environmental bit quantum gate associated with a two-bit quantum gate in a quantum chip from a quantum platform, wherein the two-bit quantum gate and the environmental bit quantum gate interact with each other in the quantum chip; Based on the two-bit quantum gate and the environment bit quantum gate, determine a first target matrix and a corresponding first evolution matrix, wherein the first target matrix is ​​a diagonal matrix represented based on a logic gate, the logic gate is used to characterize the state of exchanging two bits in the two-bit quantum gate, and the first evolution matrix is ​​a matrix after time-dependent evolution; Determining the fidelity of the two-bit quantum gate based on the number of the environment bit quantum gates, the first target matrix, and the first evolution matrix; returning the fidelity of the two-bit quantum gate to the quantum platform; Wherein, based on the two-bit quantum gate and the environment bit quantum gate, determining a first target matrix and a corresponding first evolution matrix includes: performing tensor processing on a second target matrix based on the environment bit quantum gate to obtain the first target matrix, wherein the second target matrix is ​​used to represent the logic gate; rotating a second evolution matrix based on the environment bit quantum gate to obtain the second evolution matrix, wherein the second evolution matrix is ​​composed of a plurality of time-dependent evolved block matrices.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein when the program is executed by a processor, the device where the computer-readable storage medium is located is controlled to execute the method according to any one of claims 1 to 12.

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