Code recognition method, device, computing equipment and computer readable storage medium

Abstract

The application discloses a code recognition method and device, a computing device and a computer storage medium, and the method comprises the following steps: acquiring the calling information of a target method during code execution; generating a topology graph containing the calling tree of the target method according to the calling information and the execution result of the target method; and recognizing the target method capable of being converted into concurrent execution in the code by using a preset recognition model according to the topology graph. The application can analyze the code capable of being executed in a serial-to-concurrent mode with a relatively high probability, and provides a reasonable and feasible recognition and analysis scheme for concurrent execution code which can be quickly implemented for a developer, so that the risk in the project implementation process is reduced, the performance of an online product is optimized, and the highlighted defects of the prior art, such as the high requirement for the experience and skills of the developer and the lack of professional analysis tools, are overcome.

Description

Technical Field

[0001] This invention relates to the field of computer application technology, and specifically to a code recognition method, apparatus, computing device, and computer-readable storage medium. Background Technology

[0002] During software project implementation, product performance and high-concurrency support are crucial considerations for developers. Developers often neglect code performance optimization during design and development due to short project iteration cycles or insufficient experience. In large and medium-sized projects, where the codebase often exceeds hundreds of thousands of lines, effectively and quickly assisting developers, especially junior and intermediate developers, in identifying performance bottlenecks early and providing relevant optimization suggestions will greatly benefit the improvement of subsequent online product performance.

[0003] Existing solutions often rely on experienced developers to help junior and intermediate developers discover problems through code review tools, or to identify performance bottlenecks through relevant test cases during system or performance testing. Developers then go back to check the cause of the bottleneck and refactor the corresponding code. This not only increases development costs but also brings certain performance risks to the product before it goes live. At the same time, the code scanning tools in existing IDEs (Integrated Development Environments) are still lacking in the area of ​​early detection of performance bottlenecks and other issues, and there are no ready-made analysis tools available. Summary of the Invention

[0004] In view of the above problems, the present invention is proposed to provide a code recognition method, apparatus, computing device and computer-readable storage medium that overcomes or at least partially solves the above problems.

[0005] According to one aspect of the present invention, a code recognition method is provided, the method comprising:

[0006] Obtain the call information of the target method during code execution;

[0007] Based on the call information and execution result of the target method, a topology graph containing the call tree of the target method is generated;

[0008] Based on the topology diagram, a preset recognition model is used to identify the target methods in the code that can be converted into concurrent execution.

[0009] Optionally, before obtaining the call information of the target method during code execution, the following should be included:

[0010] Using aspect-oriented programming, enhanced logic is injected into the bytecode corresponding to the code to precede and follow the target method call;

[0011] The target method includes methods in the core business code and / or methods invoked when inputting or outputting to or from disk or network.

[0012] Optionally, obtaining the call information of the target method during code execution specifically includes:

[0013] Obtain the call duration, input parameter variable information, output parameter variable information, and / or target method metadata of the target method.

[0014] Optionally, based on the topology diagram and using a preset recognition model, the target methods in the code that can be converted into concurrent execution include:

[0015] In the topology diagram, methods with execution time not less than a preset value and / or methods called during input / output with disk or network are selected to form a set of serial-to-concurrent target methods;

[0016] Using the set of serial-to-concurrent target methods as independent variables, the optimal or near-optimal solution of the identification model under constraints is obtained.

[0017] Based on the optimal or near-optimal solution, identify the target method in the code that can be converted to concurrency.

[0018] Optionally, in the topology diagram, selecting methods whose execution time is not less than a preset value and / or methods invoked during input / output with disk or network to form a set of serial-to-concurrent target methods further includes:

[0019] The nearest common ancestor node of the node corresponding to the method called when determining input and output is used to form the set of serial-to-concurrent target methods based on the child nodes of the ancestor node.

[0020] Optionally, if the identification model is a planning model, then solving for the optimal or near-optimal solution of the identification model under constraints further includes:

[0021] The simulated annealing algorithm is used to find the optimal or near-optimal solution of the planning model under constraints.

[0022] Optionally, the simulated annealing algorithm is an improved simulated annealing algorithm, comprising: generating undetermined solutions in the neighborhood of feasible solutions in a hierarchical manner; and / or generating initial solutions according to a first part of greedy and a second part of randomization strategy;

[0023] The planning model includes: calculating the product of each set of serial-to-concurrent target methods and the estimated revenue after the serial-to-concurrent target method set is converted, and then solving for the maximum value of the sum of each product;

[0024] The constraints include: call duration constraints and / or CPU resource usage constraints.

[0025] According to another aspect of the present invention, a code recognition device is provided, the device comprising:

[0026] The acquisition module is suitable for obtaining call information of the target method during code execution;

[0027] The generation module is adapted to generate a topology graph containing the call tree of the target method based on the call information and execution result of the target method;

[0028] The identification module is adapted to identify, based on the topology diagram and using a preset identification model, the target methods in the code that can be converted into concurrent execution.

[0029] According to another aspect of the present invention, a computing device is provided, comprising: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other via the communication bus;

[0030] The memory is used to store at least one executable instruction, which causes the processor to perform the operation corresponding to the above code recognition method.

[0031] According to another aspect of the present invention, a computer storage medium is provided, the storage medium storing at least one executable instruction that causes a processor to perform an operation corresponding to the code recognition method described above.

[0032] According to the code identification scheme of the present invention, the code corresponding to the target method that can be executed in a serial-to-concurrent manner with a high probability can be analyzed. By providing developers with a reasonable, feasible and quickly implementable scheme for identifying and analyzing concurrently executable code, the risks in the project implementation process can be reduced, and the performance of online products can be optimized. Furthermore, it overcomes the prominent drawbacks of existing schemes, such as high requirements for developers' experience and skills and the lack of professional analysis tools.

[0033] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0034] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0035] Figure 1 A flowchart of a code recognition method provided by an embodiment of the present invention is shown;

[0036] Figure 2 A flowchart illustrating the execution information of a bytecode-level AOP enhanced logic acquisition method according to an embodiment of the present invention is shown.

[0037] Figure 3 A schematic diagram of the method call tree structure provided in an embodiment of the present invention is shown;

[0038] Figure 4 A flowchart of a code recognition method provided by another embodiment of the present invention is shown;

[0039] Figure 5 A schematic diagram of the structure of a code recognition device provided in an embodiment of the present invention is shown;

[0040] Figure 6 A schematic diagram of the structure of a computing device provided in an embodiment of the present invention is shown. Detailed Implementation

[0041] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0042] Figure 1 A flowchart illustrating an embodiment of the code recognition method of the present invention is shown, which is applied to a computing device. The computing device is a smart terminal device, computer device, and / or cloud that has a computer program using a thread pool installed. The smart terminal device includes, but is not limited to, smartphones and tablets; the computer device includes, but is not limited to, personal computers, laptops, industrial computers, network hosts, single network servers, and sets of multiple network servers; the cloud consists of a large number of computers or network servers based on cloud computing, where cloud computing is a type of distributed computing, consisting of a virtual supercomputer composed of a group of loosely coupled computer sets.

[0043] like Figure 1 As shown, the method includes the following steps:

[0044] Step 110: Obtain the call information of the target method during code execution.

[0045] The code in this embodiment can be written in various languages ​​such as Java, C, PHP, and Python, and there are no specific restrictions on the specific project type. This embodiment can be used to analyze whether the target methods (especially serial deployment methods) in the code of various current projects can be changed to a concurrent approach to improve product performance and operating efficiency.

[0046] It should be noted that, in order to obtain the calling information of the target method in the code, including parameter information such as input and output parameters as well as structured information in the information flow, it is preferable to process the compiled files such as the bytecode corresponding to the code to obtain the calling information in a non-intrusive manner.

[0047] Step 120: Generate a topology graph containing the call tree of the target method based on the call information and execution result of the target method.

[0048] Specifically, based on the method call relationships in the code, corresponding call information and call structure characteristics can be obtained, thereby generating a call tree for each target method, and forming a corresponding topology graph based on this call tree. Figure 3 A concrete example of a call tree is shown.

[0049] Step 130: Based on the topology diagram, use a preset recognition model to identify the target methods in the code that can be converted into concurrent execution.

[0050] Based on the topology diagram and related information about the target methods, a constructed identification model is used to identify target methods that can be changed from the current sequential execution mode to concurrent execution. This identification model can be a mathematical model, a machine learning model, or a deep learning model. For example, the target methods can be identified by comparing the improvement in code execution efficiency and product performance before and after the improvement.

[0051] In summary, the embodiments of this invention are particularly suitable for large and medium-sized Java projects that require high concurrency support. Junior and intermediate developers often implement code that could be done concurrently in a serial manner due to development cycle limitations and lack of experience. For example, they might serially implement multiple method-level message communication, RPC or REST calls, or high-IO operations. However, based on the identification model in the above solution, performance bottlenecks can be identified, and concurrently viable code can be identified. The generated results comprehensively reflect the parts of the project code that can be modified concurrently, thus addressing the prominent drawbacks of existing technologies that require high levels of developer experience and skills, and the lack of specialized analysis tools in this field.

[0052] The above embodiments can be quickly implemented in project development, helping software developers to comprehensively sort out and identify the parts of the project code that can be modified concurrently, reducing the risks in the project implementation process, and playing a good role in optimizing the performance of online products.

[0053] In one or more embodiments, the process of obtaining the call information of the target method during code execution includes:

[0054] Using aspect-oriented programming, enhanced logic is injected into the bytecode corresponding to the code before and after the target method is called; wherein, the target method includes methods in the core business code and / or methods called when inputting and outputting to or from disk or network.

[0055] Specifically, in order to facilitate the non-intrusive acquisition of call information, this embodiment utilizes bytecode enhancement technology to modify the compiled bytecode of Java classes without changing any source code. In particular, for the method call chain of core processing logic, enhanced logic is injected before and after each method call through bytecode-level AOP. This includes thread-level call chains that handle distributed call chain traces and spans to obtain the method call duration and related variable information.

[0056] Aspect-Oriented Programming (AOP) is a technique that achieves unified maintenance of program functionality through pre-compilation and runtime dynamic proxies. AOP is an extension of Object-Oriented Programming (OOP), a hot topic in software development, and an important component of the Spring framework. It is a derivative paradigm of functional programming. AOP allows for the isolation of different parts of business logic, thereby reducing coupling between them, improving program reusability, and increasing development efficiency.

[0057] The main concepts involved in AOP include: Aspect, Joint point, Pointcut, Advice, Target, and Weaving. Among them, Advice defines the specific operations to be performed at the program points defined in the Pointcut. It uses before, after, and around to distinguish whether it is before, after, or replaces the code to be executed at each joint point.

[0058] Furthermore, during the process of a business call completed by the code system, the call information between services (time, interface, layer, result) is logged. Then, all the logged data is connected into a tree-like chain to generate a call chain. The tracking system analyzes and processes the log information generated during the process, reconstructing the complete end-to-end execution of the business call process and performing statistical analysis according to different dimensions. This identifies abnormal service calls, enabling rapid analysis and delineation of the service causing the anomaly. Simultaneously, it allows for statistical analysis of system performance bottlenecks.

[0059] Here, Trace refers to the chain of a single request call, and Trace ID refers to the ID of that request call. In a single request, a globally unique Trace ID is generated at the very beginning of the network to identify the request. This Trace ID remains unchanged throughout the request call, regardless of how many nodes it traverses, and is continuously propagated with each subsequent call. Ultimately, the entire path of this user request within the system can be pieced together using the Trace ID.

[0060] A span refers to the process of calling a module, typically identified by a span ID. During a single request, different nodes / modules / services are called, and each call generates a new span ID for recording. This allows the span ID to pinpoint the current request's location within the entire system call chain, as well as its upstream and downstream nodes.

[0061] In the request's call chain, SpanA calls SpanB, which in turn calls SpanC and SpanD. Each Span call generates its own span ID and records its parent span ID. These IDs essentially identify the entire chain.

[0062] Therefore, it can be seen that each request in the entire call process must pass through the Trace ID and Span ID. Each service records the Trace ID and Span ID attached to this request as the Parent ID, and also records its own generated Span ID. To view a complete call, simply retrieve all call records based on the Trace ID, and then organize the entire call parent-child relationship using the Parent ID and Span ID.

[0063] Specifically, in this embodiment of the invention, in order to obtain call information, method-level AOP interception and enhancement can be performed at the bytecode level without intrusion into the source code layer.

[0064] Combination Figure 2The flowchart shown illustrates the process of obtaining execution information. For the steps involved in obtaining execution information, please refer to [link / reference needed]. Figure 2 As shown in steps 1-6, it's important to note that before the first method call in the same thread's method call chain, a corresponding Trace ID and Span ID need to be generated (the Trace ID is mainly used to distinguish different performance test instances; the Span ID is mainly used to generate method call chain information), and the input parameter variable information for the method needs to be obtained. Before other method calls in the same thread's method call chain, a corresponding Span ID is generated, and the corresponding input parameter variable information is obtained. All of the above information is placed in the thread-local variable `ThreadLocal`, and the start time of the method call is recorded. After the method execution ends, the execution time of this method call (which can be accurate to the microsecond), output parameter variable information, and method meta-information (class name + method signature) are recorded. If the execution of a performance test case involves multiple threads, the execution information of the method call chain corresponding to each thread will be recorded for use by the subsequent optimization model. Each performance test instance can be executed according to the above steps.

[0065] Analysis of the code execution process reveals that the bottlenecks typically lie in the execution of the core business code and the calls between different devices. Therefore, the target methods in this embodiment primarily include methods within the core business code or methods invoked during input / output with disks or networks. Of course, in practice, this embodiment can analyze all relevant methods and use the obtained method execution information to seek the optimal solution for product performance optimization.

[0066] In one or more embodiments, obtaining the call information of the target method during code execution specifically includes: obtaining the call duration, input parameter variable information, output parameter variable information, and / or target method meta-information of the target method.

[0067] Furthermore, based on the above information, it is possible to generate, as follows: Figure 3 The example shown is a call tree for method calls. Each node in the call tree contains information such as a Span ID, method execution time, and a list of variables.

[0068] Furthermore, the topology graph is a forest of call trees, with each call tree corresponding to a test instance. The root node of the call tree is the first method executed, and its child nodes are the sub-methods called within that method, arranged from left to right according to the order of execution (paying special attention to nodes executed sequentially within the child nodes). Simultaneously, the child nodes of the child nodes are recursively defined according to the above embodiment. See also... Figure 3 The call tree shown is a method call tree generated for a test instance of the REST API calls in the first phase of the service.

[0069] In one or more embodiments, based on the topology diagram and using a preset recognition model, the target methods in the code that can be converted into concurrent execution include:

[0070] In the topology diagram, methods with execution time not less than a preset value and / or methods called during input / output with disk or network are selected to form a set of serial-to-concurrent target methods;

[0071] Using the set of serial-to-concurrent target methods as independent variables, the optimal or near-optimal solution of the identification model under constraints is obtained.

[0072] Based on the optimal or near-optimal solution, identify the target method in the code that can be converted to concurrency.

[0073] Furthermore, when forming the set of target methods for converting serial to concurrent operations, the nearest common ancestor node of the node corresponding to the method called during input and output is first determined, and then the set of target methods for converting serial to concurrent operations is formed based on the child nodes of the ancestor node.

[0074] In an optional embodiment, if the identification model is a planning model, then solving for the optimal or near-optimal solution of the identification model under constraints further includes:

[0075] The simulated annealing algorithm is used to find the optimal or near-optimal solution of the planning model under constraints.

[0076] According to the above embodiments, after generating the execution time and meta-information topology graph of all method call chains, the generated topology graph is used to further analyze the code that can be executed in a serial-to-concurrent manner with a high probability, and a report is generated.

[0077] According to the identification model requirements in this embodiment, methods that take no less than a preset time to execute and involve disk or network I / O can be extracted from the method call tree on the topology graph, such as Redis calls, database calls, MQ calls, RPC calls, disk read / write, etc. At the same time, the child node of the nearest common ancestor of the node corresponding to the relevant I / O call method is used as the basis for class division to obtain multiple sets of serial-to-concurrent target methods.

[0078] Specifically, continue to combine Figure 3 As shown, taking the concurrent modification of disk or network I / O call methods and method call chains as an example, the corresponding target methods such as Redis calls, database calls, MQ calls, RPC calls, and disk read / write are selected. Figure 3 Of these, two types of calls meet the requirements: Redis and MySQL database access; simultaneously, Figure 3Method A3 is not considered in the modification. Then, a method call time threshold is configured; methods with a time less than the threshold, as well as all methods in the call chain of that method, are not considered.

[0079] Then, merge and categorize the method nodes that meet the above requirements. The set of target method nodes in a class will become objects that can be concurrently modified.

[0080] The classification method proposed in the above embodiments involves finding the nearest common ancestor of the nodes corresponding to methods involving disk or network I / O calls, and then grouping the children corresponding to that ancestor node into a set of target methods for related concurrent modifications. Here, it is necessary to simultaneously examine the variable list information of the child nodes; if there is an intersection between the variable lists of the child node sets—that is, if the addresses of the Object objects corresponding to the method's output and input parameters are the same—then the final report will indicate that the corresponding code concurrent modifications pose a risk of operating on shared variables; this is also the reason for the previously mentioned probabilistic concurrent modification approach.

[0081] Continue with Figure 3 Taking the example in the example, for the two "Redis connection class send" method nodes, find their nearest common ancestor node, that is, the entry method A node. The corresponding child nodes on its call chain are methods A1 and A2. A1 and A2 are grouped into one category as the independent variable factor x1 of the identification model. At the same time, for the two "MySQL JDBC" method call nodes, find their nearest common ancestor node, that is, the method A4 node. The corresponding child nodes on its call chain are methods D1 and D2. D1 and D2 are also grouped into a new category as the independent variable factor x2 of the identification model.

[0082] Then, a planning model with constraints is established as the identification model, and an improved simulated annealing (SA) algorithm proposed in this embodiment of the invention is used to solve for the optimal or near-optimal solution of the model under the current hardware and software resource constraints; thereby obtaining a report on which methods can be used for concurrent modification.

[0083] In one or more embodiments, the simulated annealing algorithm is an improved simulated annealing algorithm, comprising: generating undetermined solutions in the neighborhood of feasible solutions in a hierarchical manner; and / or generating initial solutions according to a first part of a greedy strategy and a second part of a randomization strategy;

[0084] The planning model includes: calculating the product of each set of serial-to-concurrent target methods and the estimated revenue after the serial-to-concurrent target method set is converted, and then solving for the maximum value of the sum of each product;

[0085] The constraints include: call duration constraints and / or CPU resource usage constraints.

[0086] Specifically, the improved simulated annealing (SA) algorithm mainly includes three aspects: generating undetermined solutions in the neighborhood of the current feasible solution in a hierarchical manner; generating initial solutions using a greedy strategy in the first part and a randomized strategy in the second part, where the second part is greater than the first part, thereby improving the simulated annealing algorithm through the above three aspects.

[0087] The planning model for concurrency modification for each test instance is as follows:

[0088]

[0089] There are n categories x in total. i (x i =0 or 1); v i This is the estimated revenue after converting the serial to concurrent operation for the corresponding category. The formula for calculating vi is:

[0090]

[0091] It can be seen that the estimated benefits can be divided into three parts: the time acceleration ratio before and after the modification, the estimated single CPU resource usage after the concurrency modification, and the weighting item.

[0092] Where T origin It is the original total execution time of the set of methods contained in this class; T p This is the estimated time for concurrent execution. T p The execution time can be approximated by the maximum execution time among the nearest ancestor's child nodes for each method involving disk or network I / O calls, i.e., Max(T) child1 T child2 ,…,T childM λ is the loss factor after switching to concurrency (considering thread scheduling, context switching, and interrupts), which is generally not less than 1. block The time it takes for the code to call the blocking part can be represented by T. p Approximate; T cpu The non-blocking execution time of the code can be approximated by subtracting the execution time of the node corresponding to the method involving disk or network I / O calls from the execution time of the corresponding child node of the nearest ancestor; w i The weight of this category is generally wi, which is 1 for all categories; however, it can be adjusted appropriately based on reliability requirements. For example, if we need to ensure the success of calls to category 1 (target method set 1) as much as possible, while calls to category 2 (target method set 2) can accept failure, then the weight of category 1's w is... i The value of w in category 2 can be increased appropriately. i Adjust it appropriately.

[0093] Constraint 1 is the time after concurrency modification for all n classes (the set of target methods), plus the time of exclusions less than a preset threshold T.limit The total time T for method calls that are not disk or network I / O calls. excluded It cannot exceed the total call duration limit T. limit ;T p It is the estimated concurrent execution time, T origin If concurrency modifications cannot be implemented, the original total execution time of this class will be [not specified].

[0094] Constraint 2 is a CPU resource usage constraint; see v for its meaning. i Partial description; other parameters Num cpu cores The number of CPU cores on the server where the code runs; K is a constant factor, which is generally 2-100 according to industry experience in concurrency tuning for data-intensive services.

[0095] Running the planning model yields x i The value of can be either 1 or 0. A value of 1 indicates that, under the current constraints, method calls within this category can attempt concurrent modification; a value of 0 indicates that, under the current constraints, concurrent modification should not be performed. For example, if the solution yields x1 = 1, then the originally serially executed methods A1 and A2 can be refactored into a concurrent execution mode using a thread pool. Of course, this is a suggested approach, and developers should analyze it in conjunction with the actual situation. All test instances will be analyzed and processed based on this planning model, and the final report results will be output for developers' reference.

[0096] Figure 4 The flowchart of another embodiment of the code recognition method of the present invention is shown. The method includes the following steps: First, setting the characteristics of classes and methods that need to be enhanced by AOP, which may mainly include core business code and open source software used, JDK call classes and methods involving word frequency and network I / O; then, importing the source code project to be analyzed; preparing performance test cases such as code execution time; then, using the optimization model (planning model) and AOP to automatically collect and analyze the code information of concurrently executable methods. The last step can be specifically divided into stages such as configuring the target method, data collection, call tree topology graph generation, and recognition model execution.

[0097] The following is a test example recommended for smart hardware, using ltgrass4j-synctoasync-1.0.0 for concurrent modification and analysis:

[0098] Test case REST URL: recommend-music / aihdw / list / rec / v1

[0099] First, add the following JVM startup configuration to the relevant services being analyzed, and then start them:

[0100] -javaagent:xxxpath / mdp-starter-metrics-bytecodeagent.jar

[0101] Then launch the analysis tool ltgrass4j-synctoasync, enter the relevant parameters, press Enter as needed, and start the analysis.

[0102] Finally, a report on concurrent modifications is generated. This report is a suggested solution; developers still need to analyze it based on the actual situation.

[0103] For example, the report above includes the following: It indicates that the class represented by the method buildHotItemsContext of the AiHdwHotRecallingProcessor class in the project has a value of 1 after the optimization model is solved (a value of 1 indicates that under the current constraints, the method calls under this category can be modified concurrently; a value of 0 indicates that under the current constraints, concurrent modification should not be performed).

[0104] Meanwhile, the buildHotItemsContext method internally calls the recallItems method of the AiHdwRecallService class twice, and these two methods are precisely the objects that can be concurrently modified.

[0105] Once the developers receive the above analysis report, they can examine the corresponding source code. For example, in the source code, the `buildHotItemsContext` method calls `recallItems`, and it's found that the `recallItems` method is executed twice in sequence. Internally, `recallItems` calls Redis-related operations; therefore, it's worth considering modifying it to enable concurrent execution.

[0106] Figure 5 A schematic diagram of an embodiment of the code recognition device of the present invention is shown. Figure 5 As shown, the device 500 includes:

[0107] The acquisition module 510 is suitable for acquiring the call information of the target method during code execution;

[0108] The generation module 520 is adapted to generate a topology graph containing the call tree of the target method based on the call information and execution result of the target method;

[0109] The identification module 530 is adapted to identify, based on the topology diagram and using a preset identification model, the target methods in the code that can be converted into concurrent execution.

[0110] In one embodiment, the acquisition module 510 is further adapted to:

[0111] Using aspect-oriented programming, enhanced logic is injected into the bytecode corresponding to the code to precede and follow the target method call;

[0112] The target method includes methods in the core business code and / or methods invoked when inputting or outputting to or from disk or network.

[0113] In an optional embodiment, the acquisition module 510 is specifically adapted to:

[0114] Obtain the call duration, input parameter variable information, output parameter variable information, and / or target method metadata of the target method.

[0115] In one embodiment, the identification module 530 is further adapted to:

[0116] In the topology diagram, methods with execution time not less than a preset value and / or methods called during input / output with disk or network are selected to form a set of serial-to-concurrent target methods;

[0117] Using the set of serial-to-concurrent target methods as independent variables, the optimal or near-optimal solution of the identification model under constraints is obtained.

[0118] Based on the optimal or near-optimal solution, identify the target method in the code that can be converted to concurrency.

[0119] In one embodiment, the identification module 530 is further adapted to:

[0120] The nearest common ancestor node of the node corresponding to the method called when determining input and output is used to form the set of serial-to-concurrent target methods based on the child nodes of the ancestor node.

[0121] In one embodiment, if the recognition model is a planning model, then the recognition module 530 is further adapted to:

[0122] The simulated annealing algorithm is used to find the optimal or near-optimal solution of the planning model under constraints.

[0123] In one embodiment, the simulated annealing algorithm is an improved simulated annealing algorithm, comprising: generating undetermined solutions in the neighborhood of feasible solutions in a hierarchical manner; and / or generating initial solutions according to a first part of a greedy strategy and a second part of a randomization strategy;

[0124] The planning model includes: calculating the product of each set of serial-to-concurrent target methods and the estimated revenue after the serial-to-concurrent target method set is converted, and then solving for the maximum value of the sum of each product;

[0125] The constraints include: call duration constraints and / or CPU resource usage constraints.

[0126] As can be seen from the above embodiments, the key points, points to be protected, and beneficial effects of the present invention are as follows:

[0127] 1. This invention proposes a topology graph based on a method call tree, and obtains a target method set based on corresponding classification rules (e.g., the child node of the nearest common ancestor of the method node is used as the basis for class division). An optimization model and an improved SA algorithm are designed to identify concurrent code, thereby realizing a brand-new code recognition tool.

[0128] 2. For the method call chain of the core processing logic, without changing any source code, enhanced logic is injected before and after each method call using bytecode-level AOP. Specifically, this involves handling thread-level call chains similar to distributed call chain traces and spans, obtaining method call durations and related variable information. This approach is widely applicable to code scanning tool applications.

[0129] 3. The concurrent code automatic identification scheme based on the optimization model and bytecode-level AOP disclosed in the above embodiments can generate results that can comprehensively reflect the parts of the project code that can be modified concurrently. The corresponding automatic identification tools can be quickly implemented in Java-related project development, helping software developers to comprehensively sort out and identify the parts of the project code that can be modified concurrently, reducing the risks in the project implementation process, and playing a good role in optimizing the performance of online products.

[0130] This invention provides a non-volatile computer storage medium storing at least one executable instruction that can execute the code recognition method in any of the above method embodiments.

[0131] Figure 6 The diagram shows a structural schematic of an embodiment of the computing device of the present invention. The specific embodiments of the present invention do not limit the specific implementation of the computing device.

[0132] like Figure 6 As shown, the computing device may include: a processor 602, a communications interface 604, a memory 606, and a communications bus 608.

[0133] The processor 602, communication interface 604, and memory 606 communicate with each other via communication bus 608. Communication interface 604 is used to communicate with other network elements such as clients or other servers. The processor 602 executes program 610, specifically performing the relevant steps described in the above embodiment of the code recognition method for computing devices.

[0134] Specifically, program 610 may include program code that includes computer operation instructions.

[0135] Processor 602 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention. The computing device includes one or more processors, which may be processors of the same type, such as one or more CPUs; or processors of different types, such as one or more CPUs and one or more ASICs.

[0136] Memory 606 is used to store program 610. Memory 606 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0137] Specifically, program 610 can be used to cause processor 602 to perform operations corresponding to the various code recognition method embodiments described above.

[0138] The algorithms or displays provided herein are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used in conjunction with the teachings herein. The required structure for constructing such systems is apparent from the above description. Furthermore, the embodiments of the present invention are not directed to any particular programming language. It should be understood that the content of the invention described herein can be implemented using various programming languages, and the above description of specific languages ​​is for the purpose of disclosing the best mode of implementation of the invention.

[0139] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0140] Similarly, it should be understood that, in order to simplify the invention and aid in understanding one or more of the various inventive aspects, features of the embodiments of the invention are sometimes grouped together in a single embodiment, figure, or description thereof in the above description of exemplary embodiments of the invention. However, this disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the following claims, inventive aspects lie in fewer than all features of a single foregoing disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into this detailed description, wherein each claim itself is a separate embodiment of the invention.

[0141] Those skilled in the art will understand that modules in the device of the embodiments can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiments can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0142] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.

[0143] The various component embodiments of the present invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some or all of the components according to the embodiments of the present invention. The present invention can also be implemented as a device or apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such programs implementing the present invention can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0144] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be construed as limiting the order of execution.

Claims

1. A code recognition method, the method comprising: Aspect-oriented programming is used to inject enhanced logic before and after the target method is called into the bytecode corresponding to the code; wherein, the target method includes methods in the core business code and / or methods called when inputting and outputting to or from disk or network; Obtain the call information of the target method during code execution; Based on the call information and execution result of the target method, a topology graph containing the call tree of the target method is generated; Based on the topology diagram, using a preset recognition model, target methods in the code that can be converted to concurrent execution are identified; wherein, in the topology diagram, methods whose execution time is not less than a preset value and / or methods called during input / output with disk or network are selected to form a set of serial-to-concurrent target methods; using the set of serial-to-concurrent target methods as independent variables, the optimal solution or near-optimal solution of the recognition model under constraints is solved; based on the optimal solution or near-optimal solution, target methods in the code that can be converted to concurrency are identified.

2. The method of claim 1, wherein, Obtaining the call information of the target method during code execution specifically includes: Obtain the call duration, input parameter variable information, output parameter variable information, and / or target method metadata of the target method.

3. The method of claim 1, wherein, In the topology diagram, the method whose execution time is not less than a preset value and / or the method called during input / output with disk or network are selected to form a set of serial-to-concurrent target methods, which further includes: The nearest common ancestor node of the node corresponding to the method called when determining input and output is used to form the set of serial-to-concurrent target methods based on the child nodes of the ancestor node.

4. The method of claim 1, wherein, If the identification model is a planning model, then solving for the optimal or near-optimal solution of the identification model under constraints further includes: The simulated annealing algorithm is used to find the optimal or near-optimal solution of the planning model under constraints.

5. The method of claim 4, wherein, The simulated annealing algorithm is an improved simulated annealing algorithm, which includes: generating undetermined solutions in the neighborhood of feasible solutions in a hierarchical manner; and / or generating initial solutions according to the first part of the greedy strategy and the second part of the randomization strategy; The planning model includes: calculating the product of each set of serial-to-concurrent target methods and the estimated revenue after the serial-to-concurrent target method set is converted, and then solving for the maximum value of the sum of each product; The constraints include: call duration constraints and / or CPU resource usage constraints.

6. A code recognition device, the device comprising: The acquisition module is suitable for using aspect-oriented programming to implant enhanced logic before and after the target method is called into the bytecode corresponding to the code; wherein, the target method includes methods in the core business code and / or methods called when inputting and outputting to or from disk or network; and the module acquires the call information of the target method during code execution. The generation module is adapted to generate a topology graph containing the call tree of the target method based on the call information and execution result of the target method; The identification module is adapted to identify target methods capable of being converted into concurrent execution in the code according to the topology graph and using a preset identification model; wherein in the topology graph, methods with execution time not less than a preset value and / or methods called during input / output between a disk or a network are selected to form a serial-to-concurrent target method set; an optimal solution or an approximate optimal solution of the identification model under a constraint condition is solved with the serial-to-concurrent target method set as an independent variable; and target methods capable of being converted into concurrency in the code are identified according to the optimal solution or the approximate optimal solution.

7. A computing device comprising: The processor, the memory, the communication interface and the communication bus complete communication among each other through the communication bus; The memory is used to store at least one executable instruction, and the executable instruction causes the processor to perform operations corresponding to the code identification method according to any one of claims 1-5.

8. A computer storage medium, the storage medium storing at least one executable instruction, the executable instruction causing a processor to perform operations corresponding to the code identification method according to any one of claims 1-5.

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