Chip electrostatic protection circuit
By designing monitoring components, drain transistors and control circuits in the chip, and flexibly adjusting the duration of the trigger signal, the challenges of the electrostatic protection circuit design of high-integration chips are solved, and efficient electrostatic protection effect and cost optimization are achieved.
Patent Information
- Application Number
- CN202111300465.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-04
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2041-11-04
AI Technical Summary
With the development of large-scale integrated circuits and the demand for high integration increases, existing electrostatic protection circuit designs face challenges and it is difficult to effectively protect precision devices.
A chip electrostatic protection circuit is designed, including monitoring components, bleed transistors and control circuits. The monitoring components generate trigger signals to control the bleed transistors to conduct. Combined with multiple auxiliary monitoring units and control units, the duration of the trigger signal is flexibly adjusted to optimize the electrostatic protection effect.
It realizes an electrostatic protection circuit that meets the electrostatic protection capability without multiple flow sheets, reduces design and testing costs, and optimizes the protection capability of the electrostatic protection circuit.
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Figure CN116072666B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to semiconductor manufacturing technology, and are related to, but not limited to, an electrostatic protection circuit for a chip. Background Art
[0002] Electrostatic discharge (ESD) is an unavoidable phenomenon for devices such as chips containing large-scale integrated circuits (LSIs). To minimize the impact of ESD on devices, effective ESD protection circuits must be designed during the chip manufacturing process. However, with the continuous development of LSIs, the demand for higher integration is constantly increasing, and devices are becoming increasingly sophisticated, which poses significant challenges to the design of ESD protection circuits. Summary of the Invention
[0003] In view of this, an embodiment of the present application provides an electrostatic protection circuit for a chip, wherein the chip includes a power pad and a ground pad; the electrostatic protection circuit includes:
[0004] a monitoring component, configured to generate a trigger signal when an electrostatic pulse is present on the power pad;
[0005] a discharge transistor connected between the power pad and the ground pad, and configured to be turned on under the control of the trigger signal to discharge the electrostatic charge to the ground pad;
[0006] A control circuit is connected to the monitoring component and is used to control the duration of the trigger signal generated by the monitoring component.
[0007] In some embodiments, the monitoring component includes:
[0008] a primary monitoring unit and at least one secondary monitoring unit;
[0009] The main monitoring unit is connected between the power pad and the ground pad;
[0010] The main monitoring unit and the auxiliary monitoring unit are both connected to the control end of the discharge transistor, and the output signals of the main monitoring unit and the auxiliary monitoring unit act on the control end together;
[0011] The auxiliary monitoring unit is connected to the control circuit.
[0012] In some embodiments, the control circuit includes: at least one first control unit and at least one second control unit; wherein the number of the first control units and the second control units is the same and the number of the auxiliary monitoring units is the same;
[0013] The first control unit is connected between the auxiliary monitoring unit and the power pad; the first control unit is used to control the working state of the auxiliary monitoring unit through the power voltage provided by the power pad;
[0014] The second control unit is connected between the auxiliary monitoring unit and the ground pad; the second control unit is used to control the working state of the auxiliary monitoring unit through the ground voltage provided by the ground pad.
[0015] In some embodiments, the auxiliary monitoring unit includes:
[0016] a monitoring capacitor, a first end of the monitoring capacitor being connected to the first control unit;
[0017] A monitoring resistor, wherein a first end of the monitoring resistor is connected to the second end of the monitoring capacitor and to the control end of the discharge transistor; and a second end of the monitoring resistor is connected to the second control unit.
[0018] In some embodiments, the control circuit further includes: a first switch component, configured to switch the working state of the first control unit;
[0019] The second switch component is used to switch the working state of the second control unit.
[0020] In some embodiments, the first switch assembly includes a first switch and a second switch; the control end of the first control unit is connected to the power pad through the first switch, and is connected to the ground pad through the second switch;
[0021] The second switch assembly includes a third switch and a fourth switch; the control end of the second control unit is connected to the power pad through the third switch, and is connected to the ground pad through the fourth switch.
[0022] In some embodiments, the first control unit is configured to switch from an off state to an on state to increase the total capacitance of the monitoring component, or switch from an on state to an off state to reduce the total capacitance of the monitoring component, according to the switching states of the first switch and the second switch; wherein the switching states of the first switch and the second switch are different.
[0023] In some embodiments, the first control unit is an N-type transistor;
[0024] The first switch is in the on state and the second switch is in the off state, and the first control unit is in the on state;
[0025] The first switch is in a fused state, the second switch is in a conducting state, and the first control unit is in a cut-off state.
[0026] In some embodiments, the first control unit is a P-type transistor;
[0027] The first switch is in an on state, the second switch is in an off state, and the first control unit is in an off state;
[0028] The first switch is in an off state and the second switch is in an on state, and the first control unit is in an on state.
[0029] In some embodiments, the second control unit is configured to switch from an off state to an on state to reduce the total resistance of the monitoring component, or switch from an on state to an off state to increase the total resistance of the monitoring component, according to the switching states of the third switch and the fourth switch; wherein the switching states of the third switch and the fourth switch are different.
[0030] In some embodiments, the second control unit is an N-type transistor;
[0031] The third switch is in the on state, the fourth switch is in the off state, and the second control unit is in the on state;
[0032] The third switch is in an off state, the fourth switch is in an on state, and the second control unit is in a cut-off state.
[0033] In some embodiments, the second control unit is a P-type transistor;
[0034] The third switch is in an on state, the fourth switch is in an off state, and the second control unit is in an off state;
[0035] The third switch is in an off state, the fourth switch is in an on state, and the second control unit is in an on state.
[0036] In some embodiments, the first to fourth switches are one-time programmable memories.
[0037] In some embodiments, the first to fourth switches are laser fuse devices.
[0038] In some embodiments, the main monitoring unit includes:
[0039] a main monitoring capacitor, wherein a first end of the main monitoring capacitor is connected to the power pad;
[0040] A main monitoring resistor, wherein a first end of the main monitoring resistor is connected to the main monitoring capacitor and to the control end of the discharge transistor; and a second end of the main monitoring resistor is connected to the ground pad.
[0041] The electrostatic protection circuit provided by the technical solution of the embodiment of the present application has a discharge transistor and a monitoring component, and also has a control circuit to control the duration of the trigger signal generated by the monitoring component. In this way, the control circuit can be used to adjust and test to determine the electrostatic protection circuit that meets the electrostatic protection capability requirements, eliminating the need for multiple tape-outs, reducing the cost of electrostatic protection circuit design and testing, and optimizing the protection capability of the electrostatic protection circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0043] Figure 1 A schematic diagram of the structure of an electrostatic protection circuit according to an embodiment of the present application Figure 1 ;
[0044] Figure 2 A schematic diagram of the structure of an electrostatic protection circuit according to an embodiment of the present application Figure 2 ;
[0045] Figure 3 A schematic diagram of the structure of an electrostatic protection circuit according to an embodiment of the present application Figure 3 ;
[0046] Figure 4 A schematic diagram of the structure of an electrostatic protection circuit according to an embodiment of the present application Figure 4 ;
[0047] Figure 5 A schematic diagram of the structure of an electrostatic protection circuit according to an embodiment of the present application Figure 5 .
[0048] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION
[0049] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
[0050] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered merely as exemplary, and the true scope and spirit of the present application are indicated by the following claims. The technical solutions of the present application are further described in detail below with reference to the accompanying drawings and examples.
[0051] Figure 1 An electrostatic protection circuit for a chip provided in an embodiment of the present application is as follows: Figure 1 As shown, the chip 10 includes: a power pad VDD and a ground pad VSS, and the electrostatic protection circuit 100 includes: a monitoring component 110, which is used to generate a trigger signal when there is an electrostatic pulse on the power pad VDD; a discharge transistor 120, which is connected between the power pad VDD and the ground pad VSS, and is used to be turned on under the control of the trigger signal to discharge the electrostatic charge to the ground pad VSS; a control circuit 130, which is connected to the monitoring component 110 and is used to control the duration of the trigger signal generated by the monitoring component 110.
[0052] In the embodiment of the present application, the monitoring component 110 can be affected by static electricity and trigger the discharge transistor 120 to discharge the electrostatic charge. That is, when an electrostatic pulse occurs on the power pad VDD, it is transmitted to the monitoring component 110, causing it to generate a trigger signal. This trigger signal is only generated when the electrostatic pulse occurs, thereby turning on the discharge transistor 120 to form a discharge path between the power pad VDD and the ground pad VSS, thereby facilitating the discharge of the electrostatic pulse through this discharge path, thereby achieving the purpose of protecting the chip 10.
[0053] When the chip 10 operates normally and there is no electrostatic pulse, the monitoring component 110 does not generate a trigger signal, and therefore does not trigger the discharge transistor 120 to turn on.
[0054] Since the duration of the monitoring component 110 affects the discharge duration of the discharge transistor 120, and thus affects the effect of electrostatic discharge, it is necessary to adjust the discharge duration by adjusting the duration of the monitoring component 110 to determine the duration that meets the electrostatic protection requirements.
[0055] For example, the number or combination of active components in the monitoring component 110 may affect the duration. Therefore, in the embodiments of the present application, a control circuit is used to flexibly adjust the duration of the monitoring component 110. For example, the duration can be adjusted by adjusting the number of connected components to achieve the purpose of testing the discharge effect of the ESD protection circuit and then determining an ESD protection circuit that meets the requirements.
[0056] In some embodiments, as Figure 2 As shown, the above-mentioned monitoring component 110 includes: a main monitoring unit 111 and at least one auxiliary monitoring unit 112; the main monitoring unit 111 is connected between the power pad VDD and the ground pad VSS, the main monitoring unit 111 and the auxiliary monitoring unit are both connected to the control end 121 of the discharge transistor 120, and the output signals of the main monitoring unit and the auxiliary monitoring unit act together on the control end of the discharge transistor; the auxiliary monitoring unit 112 is connected to the control circuit 130.
[0057] In the embodiment of the present application, the main monitoring unit 111 in the monitoring component 100 is connected to the control end of the discharge transistor 120, so that the output signal of the main monitoring unit 111 can serve as the above-mentioned trigger signal to trigger the conduction of the discharge transistor 120.
[0058] The auxiliary monitoring unit 112 is connected to the control circuit 130, and the auxiliary monitoring unit 112 is also connected to the control end. In this way, the signal output by the auxiliary monitoring unit and the trigger signal output by the main monitoring unit 111 act together on the control end, so that the duration of the trigger signal can be controlled by adjusting the working state of the auxiliary monitoring unit.
[0059] In an embodiment of the present application, the auxiliary monitoring unit 112 is connected to the control circuit 130. The control circuit 130 can adjust the auxiliary monitoring unit 112 to output different signals, and act together with the trigger signal output by the main monitoring unit 111 on the discharge transistor, thereby making the trigger signal have different durations. For example, multiple auxiliary monitoring units 112 can be connected to the main monitoring unit 111, and the number of auxiliary monitoring units 112 will affect the duration of the trigger signal. Therefore, the number of auxiliary monitoring units 112 connected to the main monitoring unit 111 can be switched by the control circuit 130, thereby achieving the effect of controlling the duration of the trigger signal output by the monitoring component 110.
[0060] In some embodiments, the above-mentioned control circuit 130 includes: at least one first control unit 131 and at least one second control unit 132; wherein, the number of the first control units 131 and the second control units 132 is the same, and the same as the number of the auxiliary monitoring units 112; the first control unit 131 is connected between the auxiliary monitoring unit 112 and the power pad VDD; the first control unit is used to control the working state of the auxiliary monitoring unit through the power voltage provided by the power pad; the second control unit 132 is connected between the auxiliary monitoring unit 112 and the ground pad VSS; the second control unit is used to control the working state of the auxiliary monitoring unit through the ground voltage provided by the ground pad.
[0061] In the embodiment of the present application, the first control unit 131 and the second control unit 132 in the control circuit 130 are both components with switching characteristics, which can function to open or close a specified signal path. For example, the first control unit 131 and the second control unit 132 can be three-terminal devices such as MOS transistors and triodes.
[0062] The number of first control units 131, second control units 132, and auxiliary monitoring units 112 can be the same; that is, each auxiliary monitoring unit 112 can be connected to one first control unit 131 and one second control unit 132, respectively. The first control unit 131 is connected between the auxiliary monitoring unit 112 and the power pad VDD. Therefore, when the first control unit 131 is on and the second control unit 132 is off, the voltage of the power pad VDD is applied to the auxiliary monitoring unit 112. When the second control unit 132 is on and the first control unit 131 is off, the voltage of the ground pad VSS is applied to the auxiliary monitoring unit 112. By applying different voltages, the auxiliary monitoring unit 112 can switch its role in the monitoring component 110, such as voltage division, current shunting, current amplification, or voltage amplification, thereby adjusting the duration of the trigger signal generated by the monitoring component 110.
[0063] Because monitoring assembly 110 includes multiple auxiliary monitoring units 112 in the embodiment of the present application, monitoring assembly 110 can output trigger signals of various durations through the switch combinations of first control unit 131 and second control unit 132 corresponding to the multiple auxiliary monitoring units 112. In actual applications, the trigger signal with the various durations that provides the best ESD protection effect can be determined through testing and then mass-produced as the structure in actual products.
[0064] In some embodiments, as Figure 4 As shown, the auxiliary monitoring unit 112 includes: a monitoring capacitor C1, a first end of the monitoring capacitor C1 is connected to the first control unit 131; a monitoring resistor R1, a first end of the monitoring resistor R1 is connected to the second end of the monitoring capacitor C1, and is connected to the control end 121 of the discharge transistor 120; and a second end of the monitoring resistor R1 is connected to the second control unit 132.
[0065] The auxiliary monitoring unit 112 is composed of an RC circuit. One end of the RC circuit, that is, the first end of the monitoring capacitor C1, is connected to the power pad VDD through the first control unit 131; the other end of the RC circuit, that is, the second end of the monitoring resistor R1, is connected to the ground pad VSS through the second control unit 132. In addition, the connection end of the monitoring capacitor C1 and the monitoring resistor R1 in the RC circuit is also connected to the control end of the discharge transistor 120. In other words, the auxiliary monitoring unit 112 and the main monitoring unit 111 can both be connected to the discharge transistor 120, and together play the role of outputting a trigger signal. Since the auxiliary monitoring unit can include multiple, Figure 4 Two auxiliary monitoring units are shown in FIG. , where the monitoring resistors are represented by R1 and R2 , and the monitoring capacitors are represented by C1 and C2 .
[0066] Multiple auxiliary monitoring units 112 are connected to the control terminal of the discharge transistor 120. By switching the conduction state of the first control unit 131 and the second control unit 132, the number of connected monitoring resistors and monitoring capacitors can be changed. The smaller the total resistance R in the monitoring component, the shorter the duration; the larger the total capacitance C, the longer the corresponding duration.
[0067] In some embodiments, as Figure 4 As shown, the main monitoring unit 111 includes: a main monitoring capacitor C0, a first end of the main monitoring capacitor C0 is connected to the power pad VDD; a main monitoring resistor R0, a first end of the main monitoring resistor R0 is connected to the main monitoring capacitor C0 and to the control end of the discharge transistor 120; and a second end of the main monitoring resistor R0 is connected to the ground pad VSS.
[0068] Since at least one monitoring unit is required in the monitoring component 110 , the main monitoring unit 111 can be directly connected between the power pad VDD and the ground pad VSS without the need for the control unit to switch its conduction state.
[0069] It can be seen that when the first control unit 131 and the second control unit 132 connected to the auxiliary monitoring unit 112 are both in the on state, the auxiliary monitoring unit 112 has essentially the same structure as the main monitoring unit 111, and is connected in parallel between the power pad VDD and the ground pad VSS. In addition, the RC circuit is connected to the control terminal of the discharge transistor 120, which is equivalent to the capacitors of the auxiliary monitoring unit 112 and the main monitoring unit 111 being connected in parallel, and the resistors being connected in parallel. Therefore, the more auxiliary monitoring units 112 that are turned on in the monitoring component, the more capacitors and resistors are connected in parallel, the larger the total capacitance C, and the smaller the total resistance R. Of course, the capacitance values of the capacitors and the resistance values of the resistors in each auxiliary monitoring unit 112 can be different, thereby realizing a variety of combinations of different capacitor and resistor sizes and achieving flexible and precise adjustment.
[0070] In some embodiments, the control circuit 130 further includes: a first switch component for switching the working state of the first control unit 131 ; and a second switch component for switching the working state of the second control unit 132 .
[0071] In some embodiments, as Figure 5 As shown, the above-mentioned first switch component includes a first switch K1 and a second switch K2; the control end of the first control unit 131 is connected to the power pad VDD through the first switch K1, and is connected to the ground pad VSS through the second switch K2; the second switch component includes a third switch K3 and a fourth switch K4; the control end of the second control unit 132 is connected to the power pad VDD through the third switch K3, and is connected to the ground pad VSS through the fourth switch K4.
[0072] In the embodiment of the present application, the conduction states of the first control unit 131 and the second control unit 132 can be switched by two switches. The first switch K1 to the fourth switch K4 are each provided with a first end and a second end.
[0073] A first end of the first switch K1 is connected to the control terminal of the first control unit 131. A second end of the first switch K11 is connected to a power supply, which can be used to provide a power supply voltage VDD having the same potential as the power pad. The first switch K1 is configured to switch from a closed state to an open state, or from an open state to a closed state, under the control of a control signal, thereby determining whether the power supply voltage VDD is provided to the control terminal of the first control unit 131.
[0074] A first terminal of the second switch K2 is connected to the control terminal of the first control unit 131, and a second terminal of the second switch K2 is connected to ground or a low potential, i.e., a low voltage VSS having the same potential as the ground pad. The second switch K2 is configured to switch from a closed state to an open state, or vice versa, under the control of a control signal, thereby determining whether the ground voltage VSS is provided to the control terminal of the first control unit 131.
[0075] The first switch K1 and the second switch K2 cannot be opened or closed at the same time. However, the first switch K1 can be opened and the second switch K2 can be closed so that the potential of the control terminal of the first control unit 131 reaches the power supply voltage VDD, or the second switch K2 can be opened and the first switch K1 can be closed so that the potential of the control terminal of the first control unit 131 reaches the low voltage VSS. In this way, the conductive state of the first control unit 131 can be switched.
[0076] Similar to the first control unit 131, the control terminal of the second control unit 132 is also connected to two switches, namely the third switch K3 and the fourth switch K4. The switching state of the second control unit 132 can be switched by the switching state of the third switch K3 and the fourth switch K4.
[0077] In some embodiments, the first control unit 131 is used to switch from an off state to an on state according to the switching states of the first switch K1 and the second switch K2 to increase the total capacitance of the monitoring component 110, or switch from an on state to an off state to reduce the total capacitance of the monitoring component 110; wherein the switching states of the first switch and the second switch are different.
[0078] Since the conduction status of each first control unit 131 can determine the total capacitance of the monitoring component 110, and the conduction status of each second control unit 132 can determine the total resistance of the monitoring component 110, the total capacitance or total resistance of the monitoring component 110 as a whole can be adjusted by switching the switch states described above, rather than simply changing the number of auxiliary monitoring units.
[0079] Here, the total capacitance of the monitoring component 110 is adjusted by switching the states of the first switch K1 and the second switch K2 in each auxiliary monitoring unit.
[0080] In some embodiments, the states of the first switch K1 and the second switch K2 may include on or off. When the switch is in the on state, the circuit in which it is located is connected, and the potentials at both ends of the switch are the same; when the switch is in the off state, the circuit in which it is located is disconnected, and the potentials at both ends of the switch are different.
[0081] Specifically: In some embodiments, the first control unit 131 is an N-type transistor; when the first switch K1 is in the on state and the second switch K2 is in the off state, the first control unit 131 is in the on state; when the first switch K1 is in the off state and the second switch K2 is in the on state, the first control unit 131 is in the off state.
[0082] In some embodiments, the first control unit 131 is a P-type transistor; when the first switch K1 is in the on state and the second switch K2 is in the off state, the first control unit 131 is in the off state; when the first switch K1 is in the off state and the second switch K2 is in the on state, the first control unit 131 is in the on state.
[0083] Similar to the first control unit 131, the second control unit 132 is controlled by the third switch K3 and the fourth switch K4. Specifically: in some embodiments, the second control unit 132 is used to switch from the off state to the on state according to the switching state of the third switch K3 and the fourth switch K4 to reduce the total resistance of the monitoring component 110, or switch from the on state to the off state to increase the total resistance of the monitoring component 110.
[0084] That is, by individually controlling the switching states of the third switch K3 and the fourth switch K4 in each auxiliary monitoring unit, the total resistance of the monitoring component 110 can be adjusted.
[0085] Here, the states of the third switch K3 and the fourth switch K4 include an on state and an off state. When the switch is in the on state, the circuit in which it is located is connected, and the potentials at both ends of the switch are the same; when the switch is in the off state, the circuit in which it is located is disconnected, and the potentials at both ends of the switch are different.
[0086] Specifically: In some embodiments, the second control unit 132 is an N-type transistor; when the third switch K3 is in the on state and the fourth switch K4 is in the off state, the second control unit 132 is in the on state; when the third switch K3 is in the off state and the fourth switch K4 is in the on state, the second control unit 132 is in the off state.
[0087] In some embodiments, the second control unit 132 is a P-type transistor; when the third switch K3 is in the on state and the fourth switch K4 is in the off state, the second control unit 132 is in the off state; when the third switch K3 is in the off state and the fourth switch K4 is in the on state, the second control unit 132 is in the on state.
[0088] In some embodiments, the first to fourth switches K1 to K4 are one-time programmable memories.
[0089] By programming and controlling the one-time programmable memory, the switching states of the first switch K1 to the fourth switch K4 can be switched, thereby controlling the first control unit 131 and the second control unit 132 .
[0090] Since electrostatic breakdown typically occurs when the power is off, using a circuit to generate a control signal to control the switch to close or open is not applicable when the chip is powered off. However, by programming a one-time programmable device to control the switching of the operating states of the first control unit 131 and the second control unit 132, the electrostatic protection circuit's electrostatic protection capability can be adjusted without energizing the chip. This facilitates obtaining chips with different electrostatic protection circuit structures based on test requirements and then testing the chip's electrostatic protection capability.
[0091] In some embodiments, the first to fourth switches are laser fuse devices.
[0092] The laser fuse device is a one-time programmable device. Laser is used to irradiate the laser fuse device connected to the first control unit 131 and the second control unit 132 to switch the on or off state of the first control unit 131 and the second control unit 132, thereby setting the electrostatic protection capability of the chip according to test requirements.
[0093] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments.
[0094] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.
[0095] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.
[0096] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.
[0097] In addition, all functional units in the embodiments of the present application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the above-mentioned integrated units can be implemented in the form of hardware or in the form of hardware plus software functional units.
[0098] The above is merely an embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
Claims
1. An electrostatic protection circuit for a chip, characterized in that: The chip includes a power pad and a ground pad; The electrostatic protection circuit comprises: a monitoring component, configured to generate a trigger signal when an electrostatic pulse is present on the power pad; a discharge transistor connected between the power pad and the ground pad, and configured to be turned on under the control of the trigger signal to discharge the electrostatic charge to the ground pad; a control circuit, connected to the monitoring component, for controlling the duration of the trigger signal generated by the monitoring component; The monitoring component includes: a primary monitoring unit and at least one secondary monitoring unit; The main monitoring unit is connected between the power pad and the ground pad; The main monitoring unit and the auxiliary monitoring unit are both connected to the control end of the discharge transistor, and the output signals of the main monitoring unit and the auxiliary monitoring unit act on the control end together; The auxiliary monitoring unit is connected to the control circuit; The control circuit comprises: at least one first control unit and at least one second control unit; wherein the number of the first control units and the second control units is the same and the number of the auxiliary monitoring units is the same; The first control unit is connected between the auxiliary monitoring unit and the power pad; the first control unit is used to control the working state of the auxiliary monitoring unit through the power voltage provided by the power pad; The second control unit is connected between the auxiliary monitoring unit and the ground pad; the second control unit is used to control the working state of the auxiliary monitoring unit through the ground voltage provided by the ground pad.
2. The electrostatic protection circuit according to claim 1, wherein: The auxiliary monitoring unit includes: a monitoring capacitor, a first end of the monitoring capacitor being connected to the first control unit; A monitoring resistor, wherein a first end of the monitoring resistor is connected to the second end of the monitoring capacitor and to the control end of the discharge transistor; and a second end of the monitoring resistor is connected to the second control unit.
3. The electrostatic protection circuit according to claim 2, wherein: The control circuit further includes: a first switch component for switching the working state of the first control unit; The second switch component is used to switch the working state of the second control unit.
4. The electrostatic protection circuit according to claim 3, characterized in that: The first switch assembly includes a first switch and a second switch; the control end of the first control unit is connected to the power pad through the first switch, and is connected to the ground pad through the second switch; The second switch assembly includes a third switch and a fourth switch. The control end of the second control unit is connected to the power pad through the third switch and is connected to the ground pad through the fourth switch.
5. The electrostatic protection circuit according to claim 4, characterized in that: The first control unit is used to switch from an off state to an on state to increase the total capacitance of the monitoring component, or switch from an on state to an off state to reduce the total capacitance of the monitoring component according to the switching states of the first switch and the second switch; wherein the switching states of the first switch and the second switch are different.
6. The electrostatic protection circuit according to claim 5, characterized in that: The first control unit is an N-type transistor; The first switch is in the on state and the second switch is in the off state, and the first control unit is in the on state; The first switch is in an off state, the second switch is in an on state, and the first control unit is in a cut-off state.
7. The electrostatic protection circuit according to claim 5, characterized in that: The first control unit is a P-type transistor; The first switch is in an on state, the second switch is in an off state, and the first control unit is in an off state; The first switch is in an off state and the second switch is in an on state, and the first control unit is in an on state.
8. The electrostatic protection circuit according to claim 4, wherein: The second control unit is used to switch from an off state to an on state to reduce the total resistance of the monitoring component, or switch from an on state to an off state to increase the total resistance of the monitoring component according to the switching states of the third switch and the fourth switch; wherein the switching states of the third switch and the fourth switch are different.
9. The electrostatic protection circuit according to claim 8, characterized in that: The second control unit is an N-type transistor; The third switch is in the on state, the fourth switch is in the off state, and the second control unit is in the on state; The third switch is in an off state, the fourth switch is in an on state, and the second control unit is in a cut-off state.
10. The electrostatic protection circuit according to claim 8, wherein: The second control unit is a P-type transistor; The third switch is in an on state, the fourth switch is in an off state, and the second control unit is in an off state; The third switch is in an off state, the fourth switch is in an on state, and the second control unit is in an on state.
11. The electrostatic protection circuit according to any one of claims 3 to 9, characterized in that: The first to fourth switches are one-time programmable memories.
12. The electrostatic protection circuit according to claim 11, wherein: The first to fourth switches are laser fuse devices.
13. The electrostatic protection circuit according to claim 1, wherein: The main monitoring unit includes: a main monitoring capacitor, wherein a first end of the main monitoring capacitor is connected to the power pad; A main monitoring resistor, wherein a first end of the main monitoring resistor is connected to the main monitoring capacitor and to the control end of the discharge transistor; and a second end of the main monitoring resistor is connected to the ground pad.
Citation Information
Patent Citations
Electrostatic protection circuit
US20060091464A1
Electrostatic discharge protection device and electrostatic discharge detector circuit
US20190341772A1