A power supply voltage stabilizing switching circuit

Abstract

A power supply voltage stabilization switching circuit includes a voltage reference chip U1, a super capacitor, and a PMOS tube Q1. The output end and the input end of the super capacitor are respectively connected to the source and the drain of the PMOS tube Q1. The drain is connected to the ground after passing through two series-connected resistors R1 and R2. The first pin of the voltage reference chip U1 is connected to the connection point of the resistors R1 and R2, the second pin is connected to the gate of the PMOS tube and connected to the source through a resistor R3, and the third pin is connected to the ground; the drain is connected to an external power supply Vin, and the output end of the super capacitor serves as the output Vout of the entire voltage stabilization switching circuit, and the output Vout serves as the power supply end of the system. The advantage of the invention is that the application adopts the mode of power supply of an external power supply and a super capacitor, which can solve the problem that the system cannot guarantee complete data transmission due to a single power supply.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic hardware, and in particular relates to a power supply voltage stabilization switching circuit. Background Art

[0002] With the development of IoT technology, a large amount of data collected by the collection side needs to be uploaded to the platform for processing and storage. For some application fields, the integrity of the data needs to be guaranteed, that is, all the data must be uploaded before the power is cut off, so as to facilitate the analysis and processing of the platform software. This requires that the IoT side needs to be able to switch the circuit to use the internal large-capacity battery for power supply in real time when the power is cut off or the voltage is unstable, so as to ensure the stability of the IoT side system.

[0003] At present, most of the power supply systems on the Internet of Things are directly powered by the outside, or the power supply mode of the battery and the external power supply system is unified. When the power supply is single, once the power supply is unstable or the power is cut off, the entire Internet of Things system cannot guarantee the complete data upload. When the battery and the external power supply system are powered together, once the external power supply system is powered off, the external load will draw power from the battery, causing the battery power to decay quickly. In this case, the number of battery charge and discharge times is also increased, which cannot meet the needs of the entire system. Summary of the invention

[0004] In order to solve the above technical problems, the present invention proposes a power supply voltage stabilization switching circuit, and the specific technical solution is as follows:

[0005] A power supply voltage stabilization switching circuit comprises a voltage reference chip U1, a super capacitor, and a PMOS tube Q1. The output end and the input end of the super capacitor are respectively connected to the source and the drain of the PMOS tube Q1. The drain is connected to the ground after passing through two series-connected resistors R1 and R2. The first pin of the voltage reference chip U1 is connected to the connection point of the resistors R1 and R2, the second pin is connected to the gate of the PMOS tube and connected to the source through a resistor R3, and the third pin is connected to the ground. The drain is connected to an external power supply Vin, the output end of the super capacitor serves as the output Vout of the entire voltage stabilization switching circuit, and the output Vout serves as the power supply end of the system.

[0006] Specifically, it also includes a first anti-interference and protection circuit arranged between the external power supply Vin and the ground. The first anti-interference and protection circuit includes a transient suppression diode TVS1, an electrolytic capacitor CE1, and a common capacitor C1 connected in parallel.

[0007] Specifically, it also includes a second anti-interference and protection circuit arranged between the output end of the super capacitor and the ground, and the second anti-interference and protection circuit includes a transient suppression diode TVS2, an electrolytic capacitor CE2, and a common capacitor C2 connected in parallel.

[0008] Specifically, the model of the transient voltage suppressor diode is PE06SB.

[0009] Specifically, the model of the super capacitor U2 is 5.4V / 165F.

[0010] Specifically, the model of the voltage reference chip U1 is TL431.

[0011] Specifically, when the supply voltage of the external power supply Vin is maintained at a level greater than or equal to V2, the reference voltage of the first pin of the voltage reference chip U1 is (Vin*R1) / (R1+R2), the output of the second pin of the voltage reference chip U1 is low, the PMOS tube Q1 starts to conduct, and the output Vout is equal to the voltage of the external power supply Vin;

[0012] When the supply voltage of the external power supply Vin is less than V2 and greater than V1, the reference voltage of the first pin of the voltage reference chip U1 is lower than the specific voltage; the output of the second pin of the voltage reference chip U1 is high, the drain and source of the PMOS tube Q1 are closed, the supercapacitor does not reach the turn-on voltage, the supercapacitor does not output, and the output Vout supplies power to the system through the body diode of the PMOS tube Q1;

[0013] When the voltage of the external power supply Vin continues to drop until it is less than V1, the supercapacitor reaches the turn-on voltage, the supercapacitor output is turned on, the output voltage of the supercapacitor is greater than the voltage of the external power supply Vin, the body diode of the PMOS tube Q1 is reversely cut off, and the output Vout is powered by the supercapacitor.

[0014] The advantages of the present invention are:

[0015] (1) This application adopts an external power supply and a supercapacitor power supply method, which can solve the problem that a single power supply causes the system to be unable to guarantee complete data transmission.

[0016] (2) The present application adopts a voltage reference chip to allow the PMOS tube Q1 shutdown voltage to be set and ensure timeliness, and to ensure that the voltage of the back-end supercapacitor will not be transmitted to the front end, thereby solving the problem of the external circuit drawing battery power when the battery is integrated with the external power supply.

[0017] (3) The present application can avoid the problem of excessive energy consumption caused by using a diode by providing a PMOS tube Q1.

[0018] (4) Seamless switching between the external power supply Vin and the supercapacitor ensures the stability of power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is the circuit diagram of the power supply voltage stabilization switching circuit. DETAILED DESCRIPTION

[0020] like Figure 1 As shown, a power supply voltage stabilization switching circuit includes a voltage reference chip U1, a super capacitor, and a PMOS tube Q1. The output end and the input end of the super capacitor are respectively connected to the source and the drain of the PMOS tube Q1. The drain is connected to the ground after passing through two series-connected resistors R1 and R2. The first pin of the voltage reference chip U1 is connected to the connection point of the resistor R1 and the resistor R2, the second pin is connected to the gate of the PMOS tube and connected to the source through the resistor R3, and the third pin is connected to the ground; the drain is connected to an external power supply Vin, the output end of the super capacitor serves as the output Vout of the entire voltage stabilization switching circuit, and the output Vout serves as the power supply end of the system.

[0021] The circuit is optimized, and also includes two anti-interference and protection circuits, which are respectively arranged at the output end of the supercapacitor and the input end of the external power supply Vin; the anti-interference and protection circuit includes a transient suppression diode TVS, an electrolytic capacitor, and an ordinary capacitor in parallel. Specifically, the first anti-interference and protection circuit arranged between the external power supply Vin and the ground includes a transient suppression diode TVS1, an electrolytic capacitor CE1, and an ordinary capacitor C1; the second anti-interference and protection circuit arranged between the output end of the supercapacitor and the ground includes a transient suppression diode TVS2, an electrolytic capacitor CE2, and an ordinary capacitor C2. Among them, the ordinary capacitor C1 and the electrolytic capacitor CE1 ensure the stability of the voltage of the external power supply Vin, and the ordinary capacitor C2 and the electrolytic capacitor CE2 ensure the stability of the output voltage of the supercapacitor.

[0022] Specifically, the model of the transient voltage suppressor diode is PE06SB, the model of the super capacitor U2 is 5.4V / 165F, and the model of the voltage reference chip U1 is TL431.

[0023] Specifically, the power supply provided by the supercapacitor is 5V. Due to the instability of the external power supply Vin, the circuit working principle of this application is as follows:

[0024] The external power supply Vin is powered on, and the output Vout is powered through the body diode in the PMOS tube Q1. At the same time, the external power supply charges the supercapacitor. At this time, the voltage value of the external input power supply is greater than V2.

[0025] The first pin of the voltage reference chip U1 is a reference pin, which is connected to the external power supply Vin. When the supply voltage of the external power supply Vin is maintained at a level greater than or equal to V2, the reference voltage of the first pin of the voltage reference chip U1 is (Vin*R1) / (R1+R2). At this time, according to the characteristics of TL431, the output of the second pin of the voltage reference chip U1 is low, the PMOS tube Q1 starts to conduct, and the output Vout is equal to the voltage of the external power supply Vin.

[0026] When the PMOS tube Q1 is turned on, the external power supply Vin selects the channel with small resistance to transmit power. When the voltage of the external power supply Vin is greater than a certain voltage, the super capacitor does not output, and the system is powered by the PMOS tube Q1.

[0027] When the supply voltage of the external power supply Vin is less than V2 and greater than V1, the reference voltage of the first pin of the voltage reference chip U1 is lower than the specific voltage; at this time, according to the characteristics of TL431, the output of the second pin of the voltage reference chip U1 is high, the drain and source of the PMOS tube Q1 are closed, the supercapacitor has not reached the turn-on voltage, the supercapacitor has no output, and the output Vout supplies power to the system through the body diode of the PMOS tube Q1.

[0028] When the voltage of the external power supply Vin continues to drop until it is less than V1, the supercapacitor reaches the turn-on voltage, the supercapacitor output is turned on, and the output voltage of the supercapacitor is greater than the voltage of the external power supply Vin. The body diode of the PMOS tube Q1 is reversely cut off because the anode voltage is less than the cathode voltage, and the output Vout is powered by the supercapacitor, realizing seamless switching of power supply to the system.

[0029] In this embodiment, when the external power supply voltage is maintained at 5V, the resistor R1 is 10Ω, R2 is 11Ω, and the reference voltage on the first pin of the voltage reference chip U1 is (5*11) / 21=2.619V. At this time, according to the characteristics of TL431, the second pin of the voltage reference chip U1 outputs low, and the PMOS tube Q1 starts to conduct. When the PMOS tube is turned on, the external power supply selects the channel with small resistance to transmit power. When the external power supply voltage is greater than 4.78V, the super capacitor does not output, and the system is powered by the PMOS tube.

[0030] When the external power supply voltage is lower than 4.78V and greater than 4.6V, the reference voltage of the first pin of the voltage reference chip U1 is lower than 2.5V; at this time, according to the characteristics of TL431, the output of the second pin of the voltage reference chip U1 is high, the drain and source of the PMO tube are closed, the supercapacitor has not reached the turn-on voltage, the supercapacitor has no output, and power is supplied to the system through the body diode of Q1.

[0031] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A power supply voltage stabilization switching circuit, characterized in that: It includes a voltage reference chip U1, a super capacitor, and a PMOS tube Q1. The output end and the input end of the super capacitor are respectively connected to the source and the drain of the PMOS tube Q1. The drain is connected to the ground after passing through two series-connected resistors R1 and R2. The first pin of the voltage reference chip U1 is connected to the connection point of the resistors R1 and R2, the second pin is connected to the gate of the PMOS tube and connected to the source through a resistor R3, and the third pin is connected to the ground; the drain is connected to an external power supply Vin, the output end of the super capacitor serves as the output Vout of the entire voltage stabilization switching circuit, and the output Vout serves as the power supply end of the system; When the supply voltage of the external power supply Vin is maintained at a level greater than or equal to V2, the reference voltage of the first pin of the voltage reference chip U1 is (Vin*R1) / (R1+R2), the output of the second pin of the voltage reference chip U1 is low, the PMOS tube Q1 starts to conduct, and the output Vout is equal to the voltage of the external power supply Vin; When the supply voltage of the external power supply Vin is less than V2 and greater than V1, the reference voltage of the first pin of the voltage reference chip U1 is lower than the specific voltage; the output of the second pin of the voltage reference chip U1 is high, the drain and source of the PMOS tube Q1 are closed, the supercapacitor does not reach the turn-on voltage, the supercapacitor does not output, and the output Vout supplies power to the system through the body diode of the PMOS tube Q1; When the voltage of the external power supply Vin continues to drop until it is less than V1, the supercapacitor reaches the turn-on voltage, the supercapacitor output is turned on, the output voltage of the supercapacitor is greater than the voltage of the external power supply Vin, the body diode of the PMOS tube Q1 is reversely cut off, and the output Vout is powered by the supercapacitor.

2. A power supply voltage stabilization switching circuit according to claim 1, characterized in that: It also includes a first anti-interference and protection circuit arranged between the external power supply Vin and the ground. The first anti-interference and protection circuit includes a transient suppression diode TVS1, an electrolytic capacitor CE1, and a common capacitor C1 connected in parallel.

3. A power supply voltage stabilization switching circuit according to claim 1, characterized in that: It also includes a second anti-interference and protection circuit arranged between the output end of the super capacitor and the ground. The second anti-interference and protection circuit includes a transient suppression diode TVS2, an electrolytic capacitor CE2, and a common capacitor C2 connected in parallel.

4. A power supply voltage stabilization switching circuit according to claim 2 or 3, characterized in that: The model of the transient voltage suppressor diode is PE06SB.

5. The power supply voltage stabilization switching circuit according to claim 1, characterized in that: The model of the super capacitor U2 is 5.4V / 165F.

6. A power supply voltage stabilization switching circuit according to claim 1, characterized in that: The model of the voltage reference chip U1 is TL431.

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