An efficiency optimization control method for a phase-shifted full-bridge DC / DC converter

Abstract

The present invention discloses an efficiency optimization control method for a phase-shifted full-bridge DC / DC converter. By improving the synchronous rectification control strategy and using digital control methods to maximize the utilization of synchronous rectifier tubes, the efficiency optimization of the phase-shifted full-bridge DC / DC converter is achieved. Specifically, by calculating the real-time duty cycle loss time t<subgt;Dloss< / subgt;, combining the look-up table and the fitting function, fast calculation and timely response are achieved to compensate for the conduction timing of the synchronous rectifier tube, thereby reducing the conduction time of the body diode and reducing the conduction loss to improve the system efficiency.

Description

Technical Field

[0001] The present invention belongs to the technical field of switching power supply control strategies, and particularly relates to an efficiency optimization control method applicable to a phase-shifted full-bridge DC / DC converter. Background Art

[0002] Switching power supply converters have important application values in military fields such as aerospace, communication, and transportation. With the development of technology and the improvement of application requirements, higher requirements are put forward for the power density, efficiency, reliability, etc. of the converters. The phase-shifted full-bridge topology is widely used in high-power DC conversion power supply applications. By virtue of its characteristics, it can achieve zero-voltage turn-on of the power transistors on the primary side of the transformer, reducing switching losses. The transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter adds a clamping diode on the basis of the traditional structure, which can weaken the voltage spike of the synchronous rectifier tube and further reduce the device losses. The secondary rectification side of the traditional structure uses diode rectification, which will result in high conduction losses. Further, by replacing the diode with a MOSFET to achieve synchronous rectification control, the conduction losses can be reduced to a certain extent. However, since the existing control methods cannot fully cover all conduction times, there will be a conduction time of the body diode of the MOSFET after the rectifier tube is turned off, resulting in the problem of conduction losses. Summary of the Invention

[0003] The purpose of the present invention is to further improve the working efficiency of the phase-shifted full-bridge DC / DC converter so as to better play its role in high-power scenarios. The current synchronous rectification control strategy timing cannot well cover the actual conduction time of the rectifier tube, resulting in the problem that the conduction losses increase due to the conduction of the body diode of the rectifier tube in some time periods.

[0004] To solve the above problems, the technical solution adopted by the present invention is: a control strategy for the synchronous rectification drive timing applicable to the phase-shifted full-bridge topology, and the above problems are avoided by compensating an appropriate dead time. The control method includes the following steps:

[0005] (1) According to the topology of the phase-shifted full-bridge DC / DC converter, label the primary switching transistors S1-S4 and the secondary synchronous rectifier diodes D1-D4;

[0006] (2) Collect the input voltage V i of the DC / DC converter under various working conditions and the output current I o ;

[0007] (3) Calculate the optimal duty cycle loss time t Dloss of the phase-shifted full-bridge DC / DC converter under different working conditions;

[0008]

[0009] Among them, L r is the resonant inductance value; n is the turns ratio of the primary and secondary sides of the transformer; I o is the output current; V i is the input voltage;

[0010] (4), Generate the duty cycle loss time t Dloss lookup table;

[0011] Each column of the lookup table corresponds to one output variable for two input variables. Among them, the two input variables are the input voltage V i and the output current I o under different working conditions, and the output variable is the optimal duty cycle loss time t Dloss under the corresponding working conditions;

[0012] (5), Real-time collect the input voltage V i and the output current value I o of the DC / DC converter through the voltage detection unit and the current detection unit, and then find the corresponding optimal duty cycle loss time t Dloss in the lookup table through the DSP digital control module. If there is a corresponding t Dloss value in the lookup table, directly read the corresponding t Dloss value as the compensation value of the synchronous rectifier tube; if there is no corresponding t Dloss value in the lookup table, take the t Dloss close to the current input voltage and output current in the lookup table as the base point, and then fit the optimal duty cycle loss time t Dloss through the following fitting function as the compensation value of the synchronous rectifier tube;

[0013] t Dloss = a·ΔV i + bΔI o + c

[0014] Among them, ΔV i is the difference between the input voltage sampled in real time and the input voltage corresponding to the base point, and ΔI o is the difference between the output current sampled in real time and the output current corresponding to the base point. a and b are the fitting coefficients respectively, and c is the duty cycle loss time at the base point;

[0015] (6), Compensate the optimal duty cycle loss time t Dloss obtained in step (5) into the synchronous rectifier tube;

[0016] (6.1), The conduction signals of the secondary synchronous rectifier tubes D1 and D4 are synchronized with the conduction moment of the power switch tube S1, and the turn-off signals are delayed by t DlossTurn off to obtain the control timings of the secondary synchronous rectifier diodes D1 and D4; the conduction signals of the secondary synchronous rectifier diodes D2 and D3 are synchronized with the conduction moment of the power switch tube S2, and the turn-off signal is delayed by t based on the turn-off moment of the power switch tube S3 Dloss Turn off to obtain the control timings of the secondary synchronous rectifier diodes D2 and D3;

[0017] (7), Implement the efficiency optimization control of the converter through the drive module;

[0018] According to the control timings of the secondary synchronous rectifier diodes D1, D2, D3, and D4, the DSP digital control module generates the control timings of the corresponding duty cycles, and then generates the drive signals of the synchronous rectifier through the drive module, thereby reducing the conduction time of the body diode, and further reducing the conduction loss to improve the efficiency of the converter.

[0019] The invention object of the present invention is achieved as follows:

[0020] An efficiency optimization control method for a phase-shifted full-bridge DC / DC converter of the present invention realizes the maximized utilization of the synchronous rectifier diode by improving the synchronous rectification control strategy and using the digital control method, and further realizes the efficiency optimization of the phase-shifted full-bridge DC / DC converter; specifically, by calculating the real-time duty cycle loss time t Dloss , combining the lookup table and the fitting function method, achieving fast calculation and timely response to compensate the conduction timings of the synchronous rectifier diodes, thereby reducing the conduction time of the body diode and reducing the conduction loss to improve the system efficiency;

[0021] Meanwhile, an efficiency optimization control method for a phase-shifted full-bridge DC / DC converter of the present invention also has the following

[0022] Beneficial effects:

[0023] (1), The present invention applies the principle of minimum conduction loss. Compared with the prior art through the above technical solutions mentioned in the present invention, it can improve the working efficiency of the transformer leading-type diode clamped phase-shifted full-bridge DC / DC converter, and is also applicable to other phase-shifted full-bridge topologies;

[0024] (2), In the calculation of compensating the duty cycle loss time, through the sampling result lookup table and the fitting function method, combined with the computing power of the digital controller, the required compensation time can be quickly determined, and this part of time is compensated into the synchronous rectification control timing, which can eliminate the damage caused by the conduction of the body diode and improve the working efficiency of the converter. Description of the Drawings

[0025] Figure 1 is a flow chart of an efficiency optimization control method for a phase-shifted full-bridge DC / DC converter of the present invention;

[0026] Figure 2 is the structure diagram of the converter topology and control circuit given in the embodiments of the present invention;

[0027] Figure 3 is the schematic diagram of the control method given in the embodiments of the present invention;

[0028] Figure 4 is the theoretical timing diagram of the control method given in the embodiments of the present invention;

[0029] Figure 5 is the simulation waveform diagram of the control method given in the embodiments of the present invention; Detailed implementation manners

[0030] The following describes the detailed implementation manners of the present invention with reference to the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be particularly noted that in the following descriptions, when the detailed descriptions of known functions and designs may obscure the main content of the present invention, these descriptions will be omitted here.

[0031] Embodiment

[0032] Figure 1 is the flow chart of the efficiency optimization control method for a phase-shifted full-bridge DC / DC converter of the present invention.

[0033] Figure 2 is the structure diagram of the topology and control circuit of the transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter used in the present invention.

[0034] In this embodiment, as Figure 2 shown, the topology and control circuit of the transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter includes: a DC input power supply, an input filter capacitor, an advanced bridge arm, a lagging bridge arm, a resonant inductor, a transformer-advanced clamping diode, a transformer, a full-bridge synchronous rectifier, an output freewheeling inductor, an output filter capacitor, and a load. The above devices are combined to form a transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter. The control circuit further includes a voltage detection module, a DSP control digital module, a drive module, and a current detection module;

[0035] The voltage detection module and the current detection module are respectively connected to the input end and the output end of the transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter for sampling the input voltage V in and the output current I o respectively.

[0036] The driver circuit module is connected to the transformer-advanced diode-clamped phase-shifted full-bridge DC / DC converter and the DSP digital controller module, and is used to perform level conversion on the signals generated by the PWM generator in the DSP digital controller, so as to drive the primary switching tubes and the secondary synchronous rectifier tubes of the converter.

[0037] Next, we will combine Figure 3 , and describe in detail the efficiency-optimized digital control method for a phase-shifted full-bridge DC / DC converter of the present invention. As Figure 1 shown, it includes the following steps:

[0038] S1. As Figure 2 shown, according to the topology of the phase-shifted full-bridge DC / DC converter, mark the primary switching tubes S1-S4 and the secondary synchronous rectifier tubes D1-D4;

[0039] S2. Collect the input voltage V i and the output current I o of the DC / DC converter under various working conditions.

[0040] S3. Calculate the duty cycle loss time t Dloss under various working conditions;

[0041] In a switching cycle, there is a time when the primary current passes through zero and commutates, corresponding to two periods of changing from positive to negative and from negative to positive. Theoretically, the two periods are the same, and each period is the duty cycle loss time t Dloss :

[0042]

[0043] where, L r is the value of the resonant inductor; n is the turns ratio of the primary and secondary windings of the transformer; I o is the output current; V i is the input voltage;

[0044] S4. Generate a look-up table of the duty cycle loss time t Dloss under various working conditions;

[0045] Each column of the look-up table has two input variables corresponding to one output variable. Among them, the two input variables are the input voltage V i and the output current I o under different working conditions, and the output variable is the optimal duty cycle loss time t Dloss under the corresponding working conditions;

[0046] In this embodiment, Table 1 is the look-up table of the optimal duty cycle loss time t Dloss under different working conditions. Table 1 is only taken as an example, so only partial data are listed in the table.

[0047]

[0048] Table 1

[0049] After the S5 converter starts working, the input voltage V of the DC / DC converter is collected in real time through the voltage detection unit and the current detection unit i and the output current value I o ;

[0050] S6. Select a suitable duty cycle loss time t Dloss ;

[0051] Find the corresponding optimal duty cycle loss time t in the look-up table through the DSP digital control module Dloss , if there is a corresponding t Dloss value in the look-up table, directly read the corresponding t Dloss value as the compensation value of the synchronous rectifier tube; if there is no corresponding t Dloss value in the look-up table, then use the t Dloss in the look-up table that is close to the current input voltage and output current as the base point, and then fit the optimal duty cycle loss time t Dloss through the following fitting function as the compensation value of the synchronous rectifier tube; <x

[0052] t Dloss = a·ΔV i + bΔI o + c

[0053] where ΔV i is the difference between the input voltage sampled in real time and the input voltage corresponding to the base point, and ΔI o is the difference between the output current sampled in real time and the output current corresponding to the base point. a and b are fitting coefficients respectively, and c is the duty cycle loss time at the base point;

[0054] Next, we describe the process of fitting the optimal duty cycle loss time t Dloss by the fitting function, specifically:

[0055] First, bring the real-time input voltage and output current into the look-up table to find the duty cycle loss times t Dloss under four different combinations close to the input voltage and output current;

[0056] Select two duty cycle loss times t Dloss_1 , t Dloss_2 with the same output current but different input voltages. The input voltages are denoted as V i_1 , V i_2 ; Calculate the fitting coefficient a:

[0057]

[0058] Select two duty cycle loss times \(t\) with different output currents but the same input voltage Dloss_3 and \(t\) Dloss_4 , and denote the output currents as \(I\) o_1 and \(I\) o_2 ; Calculate the fitting coefficient \(b\):

[0059]

[0060] In this embodiment, Table 2 shows the optimal duty cycle loss time \(t_D\) los s fitting function. Table 2 is only an example, so only partial data are listed in the table;

[0061] <![CDATA[225V < V i < 230V, 7A < I o < 8A]]> <![CDATA[t Dloss = a1·ΔV i + b1·ΔI o + c1]]> <![CDATA[230V < V i < 235V, 8A < I o < 9A]]> <![CDATA[t Dloss = a2·ΔV i + b2·ΔI o + c2 <!-- 4 -->]]> … …

[0062] Table 2

[0063] S7. Generate the control timing of the synchronous rectifier tube;

[0064] S7.1. The conduction signals of the synchronous rectifier tubes D1 and D4 are synchronized with the conduction moment of the power switch tube S1, and the turn-off signal is delayed by \(t\) Dloss to turn off, obtaining the control timing of the secondary synchronous rectifier tubes D1 and D4;

[0065] S7.2. The conduction signals of the synchronous rectifier tubes D2 and D3 are synchronized with the conduction moment of the power switch tube S2, and the turn-off signal is delayed by \(t\) Dloss to turn off, obtaining the control timing of the secondary synchronous rectifier tubes D2 and D3;

[0066] In this embodiment, the control timing diagrams of the synchronous rectifier tubes D1, D2, D3, and D4 are as Figure 4 shown. The control timings of the synchronous rectifier tubes D1 and D4 are the same, and the control timings of the synchronous rectifier tubes D2 and D3 are the same. The current waveforms of \(I\) DS1 and \(I\) DS2 flowing through the two groups of rectifier tubes, after compensating the control timing of the duty cycle loss time, the control signals basically cover the turn-on time of the rectifier tubes;

[0067] S8. Implement the efficiency optimization control of the converter through the drive module;

[0068] According to the control timing of the synchronous rectifier tubes D1, D2, D3, and D4, use the DSP digital control module to generate the control timing of the corresponding duty cycle, and after passing through the drive module, generate the drive signal of the synchronous rectifier tube, so as to achieve minimizing the conduction time of the body diode and thus reducing the conduction loss and improving the efficiency of the converter.

[0069] In this embodiment, the simulation waveform diagram of the control method given in the embodiment of the present invention is as follows Figure 5 shown, where Vgs represents the rectifier diode signal and Vds represents the actual conduction signal of the rectifier diode. It can be seen that the duty cycle loss time t Dloss is compensated, and the control timing basically meets the conduction time of the rectifier diode, reducing its body diode conduction time, further reducing the conduction loss, and improving the working efficiency of the converter.

[0070] Although the above-described illustrative specific embodiments of the present invention have been described to facilitate the understanding of the present invention by those skilled in the art, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions created using the concept of the present invention are within the scope of protection.

Claims

1. An efficiency optimization control method for a phase-shifted full-bridge DC / DC converter, characterized in that It includes the following steps: (1), Mark the primary side switching transistors S1 - S4 and the secondary side synchronous rectifier diodes D1 - D4 according to the topology of the phase-shifted full-bridge DC / DC converter; (2) Collect the input voltage V of the DC / DC converter under various working conditions i and the output current I o ; (3) Calculate the optimal duty cycle loss time t of the phase-shifted full-bridge DC / DC converter under different operating conditions Dloss ; Among them, L r is the resonant inductor value; n is the turns ratio of the primary and secondary sides of the transformer; I o is the output current; V i is the input voltage; (4) Generate the duty cycle loss time t under each working condition Dloss Look-up table; Each column of the lookup table corresponds to an output variable for two input variables, where the two input variables are the input voltage V i and the output current I o , and the output variable is the optimal duty cycle loss time t Dloss ; (5) The input voltage V of the DC / DC converter is collected in real time by the voltage detection unit and the current detection unit i and the output current value I o . Then, the DSP digital control module finds the corresponding optimal duty cycle loss time t Dloss in the lookup table. If there is a corresponding t Dloss value in the lookup table, the corresponding t Dloss value is directly read as the compensation value of the synchronous rectifier tube; if there is no corresponding t Dloss value in the lookup table, the t Dloss closest to the current input voltage and output current in the lookup table is used as the base point, and then the optimal duty cycle loss time t Dloss is fitted through the following fitting function as the compensation value of the synchronous rectifier tube; t Dloss = a·ΔV i + bΔI o + c where, ΔV i is the difference between the input voltage sampled in real time and the input voltage corresponding to the base point, and ΔI o is the difference between the output current sampled in real time and the output current corresponding to the base point. a and b are fitting coefficients respectively, and c is the duty cycle loss time at the base point; (6) Compensate the optimal duty cycle loss time t obtained in step (5) Dloss into the synchronous rectifier tube; (6.1) The conduction signals of the secondary synchronous rectifier diodes D1 and D4 are synchronized with the conduction moment of the power switch tube S1, and the turn-off signals are delayed by t based on the turn-off moment of the power switch tube S4 Dloss to turn off, obtaining the control timing sequence of the secondary synchronous rectifier diodes D1 and D4; (6.2) The conduction signals of the secondary synchronous rectifier diodes D2 and D3 are synchronized with the conduction moment of the power switch tube S2, and the turn-off signals are delayed by t based on the turn-off moment of the power switch tube S3 Dloss to turn off, obtaining the control timing sequence of the secondary synchronous rectifier diodes D2 and D3; (7), Implement the efficiency optimization control of the converter through the drive module; According to the control timing of the secondary side synchronous rectifier diodes D1, D2, D3 and D4, the DSP digital control module generates the control timing of the corresponding duty cycle, and then generates the drive signals of the synchronous rectifier diodes through the drive module, so as to reduce the conduction time of the body diodes, and further reduce the conduction loss and improve the efficiency of the converter.

2. The efficiency optimization control method of a phase-shifted full-bridge DC / DC converter according to claim 1, characterized in that, The process of the fitting function fitting out the optimal duty cycle loss time t Dloss is as follows: First, bring the real-time input voltage and output current into the look-up table to find the duty cycle loss time t under four different combinations adjacent to the input voltage and output current. Dloss ; Select two duty cycle loss times \(t\) with different input voltages but the same output current Dloss_1 and \(t\) Dloss_2 , and denote the input voltages as \(V\) i_1 and \(V\) i_2 ; calculate the fitting coefficient \(a\): Select two duty cycle loss times \(t\) with different output currents but the same input voltage Dloss_3 and \(t\) Dloss_4 , and record the output currents as \(I\) o_1 and \(I\) o_2 ; calculate the fitting coefficient \(b\):

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