A tdc-based multi-voltage threshold sampling method, system and device

Abstract

The application relates to a TDC-based multi-voltage threshold sampling method, system and device. The method comprises the following steps: inputting a reference voltage threshold and a sine threshold signal into a first differential input port of a field programmable gate array to generate a square wave signal; determining a timing mark of a time-to-digital converter of a positive voltage signal and a timing mark of a time-to-digital converter of a negative voltage signal according to the square wave signal; inputting the sine threshold signal and an unknown signal into a second differential input port of the field programmable gate array to generate a digitized waveform of the unknown signal; recording time information of the digitized waveform by using the time-to-digital converter according to the timing mark of the positive voltage signal and the timing mark of the negative voltage signal; and mapping the digitized waveform to a voltage value of the square wave signal at the moment according to the time information of the digitized waveform to generate a time-voltage pair. The sampling rate and accuracy of the application are not limited by the ADC sampling bit width, and TDC sampling of hundreds of channels can be realized.

Description

Technical Field

[0001] This invention relates to the field of multi-voltage threshold sampling, and in particular to a multi-voltage threshold sampling method, system and device based on TDC. Background Technology

[0002] Analog-to-digital converters (ADCs) serve as a bridge between the analog and digital worlds, playing a crucial role in devices. With the continuous development of integration technology, many fields are demanding increasingly higher performance from ADCs. Multi-channel, miniaturized, high-speed ADC sampling is currently a research hotspot, leading to the development of ADCs primarily towards higher conversion rates, higher accuracy, and lower power consumption.

[0003] As the number of bits in an ADC increases, its accuracy increases, but its speed decreases because each bit adds a clock cycle. The power consumption, accuracy, and speed of an ADC are mutually restrictive; improving one performance metric will negatively impact the other two. Simultaneously achieving low power consumption, high accuracy, and high speed in an ADC chip is technically difficult and prohibitively expensive. Clearly, the sampling rate and accuracy of traditional ADC technology are limited by the ADC's sampling bit width, making it unsuitable for current digital development trends. A new technology is needed to replace the traditional ADC, achieving high-speed, multi-channel miniaturized sampling while maintaining high accuracy and low power consumption. Summary of the Invention

[0004] The purpose of this invention is to provide a multi-voltage threshold sampling method, system, and device based on TDC to solve the problem that the sampling rate and accuracy of traditional ADC technology are limited by the sampling bit width of the ADC.

[0005] To achieve the above objectives, the present invention provides the following solution:

[0006] A multi-voltage threshold sampling method based on TDC includes:

[0007] Obtain the reference voltage threshold and the sinusoidal threshold signal;

[0008] The reference voltage threshold and the sinusoidal threshold signal are input together to the first differential input port of the field-programmable gate array to generate a square wave signal with equal time intervals and time information.

[0009] The timing flags for the time-to-digital converter of the positive voltage signal and the time-to-digital converter of the negative voltage signal are determined based on the square wave signal; the timing flags include a timing start flag and a timing end flag.

[0010] An unknown signal is acquired, and the sinusoidal threshold signal and the unknown signal are input together to the second differential input port of the field-programmable gate array to generate a digital waveform of the unknown signal; the digital waveform is a square wave signal with non-equal time intervals and time information.

[0011] The timing information of the digitized waveform is recorded using the time data converter based on the timing flags of the time-to-digital converter for the positive voltage signal and the time-to-digital converter for the negative voltage signal.

[0012] Based on the time information of the digitized waveform, the digitized waveform is mapped to the voltage value of the square wave signal at this moment to generate a time-voltage pair; the time-voltage pair is the sampling point selected by the unknown signal.

[0013] Optionally, the acquisition of the reference voltage threshold and the sinusoidal threshold signal may be further included prior to:

[0014] Based on the principle of multi-threshold voltage acquisition, a reference voltage threshold of 0V is determined according to multiple constant thresholds of multi-threshold voltage sampling.

[0015] Optionally, determining the timing flags of the time-to-digital converter for the positive voltage signal and the time-to-digital converter for the negative voltage signal based on the square wave signal specifically includes:

[0016] The rising edge of the square wave signal is used as the timing start flag for the time-to-digital converter of the positive voltage signal.

[0017] The falling edge of the square wave signal is used as the timing end marker of the time-to-digital converter of the positive voltage signal;

[0018] The falling edge of the square wave signal is used as the start of timing for the time-to-digital converter of the negative voltage signal.

[0019] The rising edge of the square wave signal is used as the timing end marker of the time-to-digital converter for the negative voltage signal.

[0020] Optionally, the step of mapping the digitized waveform to the voltage value of the square wave signal at this moment based on the time information of the digitized waveform to generate a time-voltage pair further includes:

[0021] The time and amplitude signals of the sample points selected from the unknown signals are packaged to generate integrated data;

[0022] Upload the integrated data to the host computer;

[0023] The integrated data is fitted using the host computer to generate a reconstructed signal.

[0024] A multi-voltage threshold sampling system based on TDC, comprising:

[0025] The parameter acquisition module is used to acquire the reference voltage threshold and the sinusoidal threshold signal;

[0026] The square wave signal generation module is used to input the reference voltage threshold and the sine threshold signal together to the first differential input port of the field-programmable gate array to generate a square wave signal with equal time intervals and time information.

[0027] The timing flag determination module is used to determine the timing flags of the time-to-digital converter for the positive voltage signal and the timing flags of the time-to-digital converter for the negative voltage signal based on the square wave signal; the timing flags include a timing start flag and a timing end flag.

[0028] The digital waveform determination module is used to acquire an unknown signal, inputting the sinusoidal threshold signal and the unknown signal together into the second differential input port of the field-programmable gate array to generate a digital waveform of the unknown signal; the digital waveform is a square wave signal with time information and non-equal time intervals.

[0029] The digital waveform time information recording module is used to record the time information of the digital waveform using the time data converter based on the timing flags of the time-to-digital converter of the positive voltage signal and the time-to-digital converter of the negative voltage signal.

[0030] The mapping module is used to map the digitized waveform to the voltage value of the square wave signal at this moment based on the time information of the digitized waveform, thereby generating a time-voltage pair; the time-voltage pair is the sampling point selected by the unknown signal.

[0031] Optional, also includes:

[0032] The reference voltage threshold determination module is used to determine a 0V reference voltage threshold based on the multi-threshold voltage acquisition principle and multiple constant thresholds from the multi-threshold voltage sampling.

[0033] Optionally, the timing flag determination module specifically includes:

[0034] A positive voltage signal timing start flag determination unit is used to use the rising edge of the square wave signal as the timing start flag of the positive voltage signal time-to-digital converter.

[0035] A positive voltage signal timing end flag determination unit is used to use the falling edge of the square wave signal as the timing end flag of the positive voltage signal time-to-digital converter.

[0036] A negative voltage signal timing start flag determination unit is used to use the falling edge of the square wave signal as the timing start flag of the time-to-digital converter of the negative voltage signal.

[0037] The negative voltage signal timing end flag determination unit is used to use the rising edge of the square wave signal as the timing end flag of the negative voltage signal time-to-digital converter.

[0038] Optional, also includes:

[0039] An integrated data generation module is used to package the time and amplitude signals of the sampling points selected from the unknown signals to generate integrated data.

[0040] The data transmission module is used to upload the integrated data to the host computer;

[0041] The signal reconstruction module is used to fit the integrated data using the host computer to generate a reconstructed signal.

[0042] An electronic device includes a memory and a processor, the memory storing a computer program, and the processor running the computer program to cause the electronic device to perform the TDC-based multi-voltage threshold sampling method described above.

[0043] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the TDC-based multi-voltage threshold sampling method described above.

[0044] According to specific embodiments provided by the present invention, the following technical effects are disclosed: The present invention provides a multi-voltage threshold sampling method, system, and device based on TDC (Transmission Controlled Diode). Utilizing the differential input pins of a Field-Programmable Gate Array (FPGA) as a comparator, and provided the available resources of the FPGA chip allow, TDC sampling with hundreds of channels can be achieved. While ensuring high-speed multi-channel acquisition, it also guarantees high integration of high-speed multi-channel ADC sampling. Therefore, the sampling rate and accuracy of the present invention are not limited by the ADC sampling bit width, but only by the hardware parameters and software design of the FPGA chip used. The present invention features easy integration, high-speed sampling, and high sampling accuracy, providing guidance for subsequent hardware design of TDC acquisition systems and showing broad prospects in signal acquisition applications. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 This is a schematic diagram of SineMVT sampling of an unknown signal provided by the present invention;

[0047] Figure 2 Here is a flowchart of the TDC-based multi-voltage threshold sampling method provided by the present invention;

[0048] Figure 3 The threshold signal versus time relationship diagram provided by this invention;

[0049] Figure 4 The diagram showing the relationship between the input signal and time for the LVDS differential input port 1 provided by this invention;

[0050] Figure 5 The present invention provides a graph showing the relationship between sampling points and time during the sampling process;

[0051] Figure 6 A schematic diagram of the digital waveform of the unknown signal provided by this invention;

[0052] Figure 7 This is a schematic diagram of the sampling point distribution for the unknown signal provided by the present invention;

[0053] Figure 8 This is a schematic diagram of the reconstructed signal distribution provided by the present invention. Detailed Implementation

[0054] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0055] The purpose of this invention is to provide a multi-voltage threshold sampling method, system and device based on TDC, whose sampling rate and accuracy are not limited by the sampling bit width of ADC, and can realize TDC sampling of hundreds of channels.

[0056] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0057] Example 1

[0058] This invention references the acquisition principle of conventional multi-threshold voltage (MVT) sampling, replacing the multiple constant thresholds of conventional MVT sampling with a single 0V reference voltage threshold. This threshold is compared with a pre-set sinusoidal threshold signal to obtain a square wave signal with equal time intervals containing time information, which serves as a marker for the start and end of sampling within half a cycle of the sin signal. Figure 1 This is a schematic diagram of SineMVT sampling of an unknown signal provided by the present invention, as shown below. Figure 1 As shown, the time it takes for the pulse to cross a given sin signal waveform can be measured by a TDC. Since the amplitude, phase, and frequency of the sine wave are known, the voltage value when the pulse crosses the sine wave can be calculated by measuring the time, thus forming voltage time sampling points. The subsequent data processing is similar to the traditional ADC sampling method. These sampling points can be used to fit and reconstruct the pulse, extract signal information, and upload the sampled signal to the host computer.

[0059] like Figure 2 As shown, the present invention provides a multi-voltage threshold sampling method based on TDC, comprising:

[0060] Step 201: Obtain the reference voltage threshold and the sine threshold signal.

[0061] Before step 201, the method further includes: based on the principle of multi-threshold voltage acquisition, determining a 0V reference voltage threshold according to multiple constant thresholds of multi-threshold voltage sampling.

[0062] Step 202: Input the reference voltage threshold and the sine threshold signal together into the first differential input port of the field-programmable gate array to generate a square wave signal with equal time intervals and time information.

[0063] In practical applications, the set threshold signal and 0V voltage are passed together through the differential input port 1 of the Low-Voltage Differential Signaling (LVDS) of a Field-Programmable Gate Array (FPGA) to obtain a square wave signal with a 50% duty cycle, such as... Figure 3 As shown, the set threshold signal is as follows: Figure 4 As shown. In this invention, all amplitude units are V, frequency units are MHz, and phase units are *πrad.

[0064] Step 203: Determine the timing flags of the time-to-digital converter for the positive voltage signal and the time-to-digital converter for the negative voltage signal based on the square wave signal; the timing flags include a timing start flag and a timing end flag.

[0065] In practical applications, step 203 specifically includes: using the rising edge of the square wave signal as the start time marker of the time-to-digital converter for the positive voltage signal; using the falling edge of the square wave signal as the end time marker of the time-to-digital converter for the positive voltage signal; using the falling edge of the square wave signal as the start time marker of the time-to-digital converter for the negative voltage signal; and using the rising edge of the square wave signal as the end time marker of the time-to-digital converter for the negative voltage signal.

[0066] In practical applications, the rising edge of the signal input to LVDS differential input port 1 is used as the start mark for sampling TDC timing of positive voltage signals, and the falling edge is used as the end mark; for negative voltage signals, the falling edge is used as the start mark for timing, and the rising edge is used as the end mark for timing.

[0067] Furthermore, since there are only two sampling points per half sampling cycle during the sampling process, this characteristic can be used to eliminate some unsuitable sampling points. For example... Figure 5 As shown, one edge corresponds to one sampling point.

[0068] Step 204: Acquire the unknown signal. Input the sinusoidal threshold signal and the unknown signal together into the second differential input port of the field-programmable gate array to generate a digital waveform of the unknown signal; the digital waveform is a square wave signal with non-equal time intervals and time information, such as... Figure 6 As shown.

[0069] In practical applications, the threshold signal and the unknown signal are passed together through the LVDS differential input port 2 of the FPGA to obtain the digitized waveform of the unknown signal. Clearly, the digitized waveform of this signal is a square wave with non-uniform time intervals and time information, meaning the duty cycle is not fixed.

[0070] Step 205: Based on the timing flags of the time-to-digital converter for the positive voltage signal and the time-to-digital converter for the negative voltage signal, the time information of the digitized waveform is recorded using the time-to-digital converter.

[0071] Step 206: Based on the time information of the digitized waveform, map the digitized waveform to the voltage value of the square wave signal at this moment to generate a time-voltage pair; the time-voltage pair is the sampling point selected by the unknown signal.

[0072] In practical applications, after step 206, the method further includes: packaging the time and amplitude signals of the sample points selected by the unknown signal to generate integrated data; uploading the integrated data to a host computer; and using the host computer to fit the integrated data to generate a reconstructed signal.

[0073] In practical applications, the time information carried by the rising and falling edges of the digitized waveform is recorded by a time-voltage converter (TDC). The recorded time points are then mapped to the voltage value of a known threshold signal at that moment to obtain a time-voltage pair, i.e., a sampling point. For example... Figure 7 As shown, the sampling points are distributed over non-uniform time intervals.

[0074] The time and amplitude information contained in the selected sampling points are packaged and integrated, and then uploaded to the host computer via Ethernet. The sampling point information transmitted to the host computer should contain accurate time and amplitude information, which will be used to reconstruct the signal later.

[0075] The sampling points transmitted to the host computer are fitted using a fitting tool that most closely resembles the original signal to obtain the reconstructed signal, such as... Figure 8 As shown

[0076] This invention utilizes the differential input pins of an FPGA as comparators, enabling TDC sampling with hundreds of channels, provided the FPGA chip's available resources allow. This ensures high-speed multi-channel acquisition while maintaining the high level of integration not found in high-speed multi-channel ADC sampling. The method's ease of integration, high-speed sampling, and high sampling accuracy provide guidance for subsequent hardware design of TDC acquisition systems and have broad prospects in signal acquisition applications.

[0077] Example 2

[0078] In order to implement the method corresponding to Embodiment 1 above and achieve the corresponding functions and technical effects, a multi-voltage threshold sampling system based on TDC is provided below.

[0079] A multi-voltage threshold sampling system based on TDC, comprising:

[0080] The parameter acquisition module is used to acquire the reference voltage threshold and the sine threshold signal.

[0081] The square wave signal generation module is used to input the reference voltage threshold and the sine threshold signal together to the first differential input port of the field-programmable gate array to generate a square wave signal with equal time intervals and time information.

[0082] The timing flag determination module is used to determine the timing flags of the time-to-digital converter for the positive voltage signal and the timing flags of the time-to-digital converter for the negative voltage signal based on the square wave signal; the timing flags include a timing start flag and a timing end flag.

[0083] The digital waveform determination module is used to acquire the unknown signal, input the sinusoidal threshold signal and the unknown signal together to the second differential input port of the field-programmable gate array, and generate the digital waveform of the unknown signal; the digital waveform is a square wave signal with non-equal time intervals and time information.

[0084] The digital waveform time information recording module is used to record the time information of the digital waveform using the time data converter based on the timing flags of the time-to-digital converter of the positive voltage signal and the time-to-digital converter of the negative voltage signal.

[0085] The mapping module is used to map the digitized waveform to the voltage value of the square wave signal at this moment based on the time information of the digitized waveform, thereby generating a time-voltage pair; the time-voltage pair is the sampling point selected by the unknown signal.

[0086] In practical applications, it also includes: a reference voltage threshold determination module, which is used to determine a 0V reference voltage threshold based on the multi-threshold voltage acquisition principle and multiple constant thresholds of the multi-threshold voltage sampling.

[0087] In practical applications, the timing flag determination module specifically includes: a positive voltage signal timing start flag determination unit, used to use the rising edge of the square wave signal as the timing start flag of the positive voltage signal time-to-digital converter; a positive voltage signal timing end flag determination unit, used to use the falling edge of the square wave signal as the timing end flag of the positive voltage signal time-to-digital converter; a negative voltage signal timing start flag determination unit, used to use the falling edge of the square wave signal as the timing start flag of the negative voltage signal time-to-digital converter; and a negative voltage signal timing end flag determination unit, used to use the rising edge of the square wave signal as the timing end flag of the negative voltage signal time-to-digital converter.

[0088] In practical applications, it also includes: an integrated data generation module, used to package the time and amplitude signals of the sampling points selected by the unknown signal to generate integrated data; a data transmission module, used to upload the integrated data to a host computer; and a signal reconstruction module, used to fit the integrated data using the host computer to generate a reconstructed signal.

[0089] Unlike traditional ADC sampling methods, this invention first designs a data acquisition circuit. A known continuous threshold signal is used as the comparator threshold voltage, and the time-to-market (TDC) records the time it takes for the signal to cross the threshold to obtain the sampling point. Addressing the challenges of integration when using traditional ADC sampling principles for multi-channel sampling, or the increased power consumption and cost associated with increasing the number of channels, this invention utilizes two configurable Low Voltage Differential Signaling (LVDS) interfaces on two FPGAs to achieve one-channel digital sampling. Hundreds of channels of digital sampling can be achieved on a single FPGA chip, significantly reducing cost compared to traditional ADCs. The number of sampling channels is only related to the number of configurable LVDS ports and the available FPGA chip resources.

[0090] Example 3

[0091] This invention provides an electronic device including a memory and a processor. The memory stores a computer program, and the processor runs the computer program to enable the electronic device to perform the TDC-based multi-voltage threshold sampling method provided in Embodiment 1.

[0092] In practical applications, the aforementioned electronic devices can be servers.

[0093] In practical applications, electronic devices include: at least one processor, memory, bus, and communication interface.

[0094] The processor, communication interface, and memory communicate with each other via a communication bus.

[0095] A communication interface is used to communicate with other devices.

[0096] The processor is used to execute programs, specifically the methods described in the above embodiments.

[0097] Specifically, the program may include program code, which includes computer operation instructions.

[0098] The processor may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention. The electronic device includes one or more processors, which may be processors of the same type, such as one or more CPUs; or they may be processors of different types, such as one or more CPUs and one or more ASICs.

[0099] Memory is used to store programs. Memory may include high-speed RAM, and may also include non-volatile memory, such as at least one disk drive.

[0100] Based on the description of the above embodiments, this application provides a storage medium storing computer program instructions thereon, which can be executed by a processor to implement the methods described in any embodiment.

[0101] The TDC-based multi-voltage threshold sampling system provided in this application exists in various forms, including but not limited to:

[0102] (1) Mobile communication devices: These devices are characterized by their mobile communication capabilities and primarily aim to provide voice and data communication. These terminals include: smartphones (e.g., iPhones), multimedia phones, feature phones, and low-end phones, etc.

[0103] (2) Ultra-mobile personal computer devices: These devices fall under the category of personal computers, possessing computing and processing capabilities, and generally also have mobile internet access capabilities. These terminals include PDAs, MIDs, and UMPCs, such as the iPad.

[0104] (3) Portable entertainment devices: These devices can display and play multimedia content. This category includes: audio and video players (such as iPods), handheld game consoles, e-books, as well as smart toys and portable car navigation devices.

[0105] (4) Other electronic devices with data interaction functions.

[0106] Specific embodiments of the subject matter have now been described. Other embodiments are within the scope of the appended claims. In some cases, the actions described in the claims can be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing can be advantageous.

[0107] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0108] For ease of description, the above apparatus is described by dividing it into various functional units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware components. Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0109] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0110] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0111] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0112] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0113] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0114] Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, and CD-ROM.

[0115] Digital multifunction optical disc (DVD) or other optical storage, magnetic cassette tape, magnetic tape, disk storage or other magnetic storage devices

[0116] Or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transient media, such as modulated data signals and carrier waves.

[0117] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0118] This application can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific transactions or implement specific abstract data types. This application can also be practiced in distributed computing environments where transactions are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0119] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.

[0120] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A TDC-based multi-voltage threshold sampling method, characterized in that, The method comprises the following steps: Based on the multi-threshold voltage acquisition principle, a 0V reference voltage threshold is determined according to a plurality of constant thresholds sampled by multi-threshold voltage sampling; Obtain the reference voltage threshold and the sinusoidal threshold signal; The reference voltage threshold and the sinusoidal threshold signal are input into the first differential input port of the field programmable gate array to generate an equal time interval square wave signal with time information; According to the square wave signal, the timing marks of the time-to-digital converter of the positive voltage signal and the timing marks of the time-to-digital converter of the negative voltage signal are determined; the timing marks include timing start marks and timing end marks; specifically comprising: The rising edge of the square wave signal is used as the timing start mark of the time-to-digital converter of the positive voltage signal; The falling edge of the square wave signal is used as the timing end mark of the time-to-digital converter of the positive voltage signal; The falling edge of the square wave signal is used as the timing start mark of the time-to-digital converter of the negative voltage signal; The rising edge of the square wave signal is used as the timing end mark of the time-to-digital converter of the negative voltage signal; Obtain the unknown signal, input the sinusoidal threshold signal and the unknown signal into the second differential input port of the field programmable gate array to generate the digitized waveform of the unknown signal; the digitized waveform is a non-equal time interval square wave signal with time information; According to the timing marks of the time-to-digital converter of the positive voltage signal and the timing marks of the time-to-digital converter of the negative voltage signal, the time information of the digitized waveform is recorded by the time data converter; According to the time information of the digitized waveform, the digitized waveform is mapped to the voltage value of the square wave signal at this time to generate a time-voltage pair; the time-voltage pair is a sampling point of the unknown signal screening; With the differential input pin of the field programmable gate array FPGA as a comparator, as long as the available resources of the FPGA chip allow, hundreds of channels of TDC sampling can be realized.

2. The TDC-based multi-voltage threshold sampling method of claim 1, wherein, After generating the time-voltage pair by mapping the digitized waveform to the voltage value of the square wave signal at this time according to the time information of the digitized waveform, the method further comprises the following steps: The time and amplitude signal of the sampling point of the unknown signal screening are data packed to generate integrated data; The integrated data is uploaded to the upper computer; The integrated data is fitted by the upper computer to generate a reconstructed signal.

3. A TDC-based multi-voltage threshold sampling system, comprising: The method comprises the following steps: A reference voltage threshold determination module is used to determine a 0V reference voltage threshold based on the multi-threshold voltage acquisition principle according to a plurality of constant thresholds sampled by multi-threshold voltage sampling; A parameter acquisition module is used to obtain the reference voltage threshold and the sinusoidal threshold signal; A square wave signal generation module is used to input the reference voltage threshold and the sinusoidal threshold signal into the first differential input port of the field programmable gate array to generate an equal time interval square wave signal with time information; A timing mark determination module is used to determine the timing marks of the time-to-digital converter of the positive voltage signal and the timing marks of the time-to-digital converter of the negative voltage signal according to the square wave signal; the timing marks include timing start marks and timing end marks. The time mark determination module specifically comprises: A positive voltage signal timing start mark determination unit configured to take the rising edge of the square wave signal as the timing start mark of the time-to-digital converter of the positive voltage signal; A positive voltage signal timing end mark determination unit configured to take the falling edge of the square wave signal as the timing end mark of the time-to-digital converter of the positive voltage signal; A negative voltage signal timing start mark determination unit configured to take the falling edge of the square wave signal as the timing start mark of the time-to-digital converter of the negative voltage signal; A negative voltage signal timing end mark determination unit configured to take the rising edge of the square wave signal as the timing end mark of the time-to-digital converter of the negative voltage signal; A digitized waveform determination module configured to acquire an unknown signal, input the sine threshold signal and the unknown signal into the second differential input port of the field programmable gate array, and generate a digitized waveform of the unknown signal; the digitized waveform is a non-equidistant square wave signal with time information; A time information recording module of the digitized waveform configured to record the time information of the digitized waveform by using the time-to-digital converter according to the timing marks of the time-to-digital converter of the positive voltage signal and the timing marks of the time-to-digital converter of the negative voltage signal; A mapping module configured to map the digitized waveform to the voltage value of the square wave signal at the time according to the time information of the digitized waveform, and generate a time-voltage pair; the time-voltage pair is a sampling point of the unknown signal screening; The differential input pin of the field programmable gate array FPGA is used as a comparator, and as long as the available resources of the FPGA chip allow, hundreds of channels of TDC sampling can be realized.

4. The TDC-based multi-voltage threshold sampling system of claim 3, wherein, Further comprising: An integrated data generation module configured to pack the time and amplitude signal of the sampling point of the unknown signal screening, and generate integrated data; A data transmission module configured to upload the integrated data to an upper computer; A signal reconstruction module configured to fit the integrated data by using the upper computer, and generate a reconstructed signal.

5. An electronic device, comprising: The electronic device comprises a memory and a processor, the memory is used to store a computer program, and the processor runs the computer program to enable the electronic device to perform the TDC-based multi-voltage threshold sampling method according to any one of claims 1-2.

6. A computer-readable storage medium, characterized in that, The computer program stored in the memory is executed by the processor to implement the TDC-based multi-voltage threshold sampling method according to any one of claims 1-2.

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