Method of forming an insulated gate bipolar transistor

Abstract

The application provides a forming method of an insulated gate bipolar transistor, comprising the following steps: providing a substrate, and a first oxide layer and a first nitride layer which are sequentially arranged on the surface of the substrate and expose part of the surface of the substrate; forming a second oxide layer on the surface of the substrate and in the substrate by a thermal oxidation method from the exposed surface of the substrate, the second oxide layer is partially grown under the first oxide layer, part of the first oxide layer and part of the first nitride layer are warped, the first nitride layer with a part of thickness close to the surface of the first nitride layer is oxidized to form an oxidized nitride layer; removing the oxidized nitride layer; removing part of the second oxide layer and removing the warped part of the first nitride layer and the warped part of the first oxide layer, so that the surface of the remaining second oxide layer and the surface of the remaining first nitride layer are flush; removing the first nitride layer; removing the first oxide layer while removing part of the second oxide layer, the surface of the remaining second oxide layer is flush and flush with the surface of the substrate.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor technology, in particular to a forming method of an insulated gate bipolar transistor. BACKGROUND

[0002] Power devices are applied to strategic industry fields such as rail transportation, aerospace, ship driving, smart grid, power electronics, new energy vehicles, etc., and are praised by the industry as the "CPU" of power conversion devices and the "core" of green economy. Among them, the insulated gate bipolar transistor (IGBT) is widely used due to its high voltage and large current, easy to drive, and low power consumption performance advantages. The IGBT chip includes a terminal region, the terminal region includes a terminal basic unit and a cutoff ring; the improvement lies in that the cutoff ring is distributed between the terminal basic unit and the scribe groove (the scribe groove refers to the region between two IGBT chips, which is the region where the two IGBT chips intersect; not included in the terminal region) region, used to form equipotential with the polycrystalline field plate or the metal field plate, cut off the surface leakage channel of the IGBT chip, and reduce the surface leakage of the IGBT; the cutoff ring is applied in the high-voltage and high-power IGBT chip of the power grid. The IGBT needs to withstand high voltage, and the thickness of the silicon dioxide in the IGBT cutoff ring region has an effect on the withstand voltage. Under certain conditions, the thicker the thickness of the silicon dioxide, the higher the withstand voltage.

[0003] The forming method of the prior art insulated gate bipolar transistor is described with reference to Figure 1 , first providing a substrate 110, forming a first oxide layer 120 and a first nitride layer 130 on the surface of the substrate 110 in sequence, the first oxide layer 120 can be silicon oxide, and the first nitride layer 130 can be silicon nitride, sequentially etching the first nitride layer 130 and the first oxide layer 120 to expose the substrate 110, the area of the etched first nitride layer 130 and the cross-sectional area of the first oxide layer 120 are the same, and are located at the same place on the surface of the substrate 110. Next, with reference to Figure 2 , a second oxide layer 140 is formed on the exposed substrate 110 by a thermal growth method, the second oxide layer 140 being the above-mentioned silicon dioxide of the cutoff ring, at this time the second oxide layer 140 will partially grow below the first oxide layer 120, causing the first oxide layer 120 and the first nitride layer 130 to partially warp, and the second oxide layer 140 will form into the interior of the substrate 110. And at the same time as forming the second oxide layer 140 by thermal growth, the first nitride layer 130 with a partial thickness near the surface of the first nitride layer 130 is oxidized to form an oxidized nitride layer 150. Next, with reference to Figure 3, the oxidized nitride layer 150 is removed by grinding to expose the first nitride layer 130, and the grinding of the oxidized nitride layer 150 will grind part of the first nitride layer 130 and the second nitride layer 140, so that the surface of the remaining second oxide layer 140 is flat and the surface of the remaining second oxide layer 140 is flush with the surface of the first nitride layer 130. Next, please refer to Figure 4 , part of the second oxide layer 140 is removed so that the oxidized nitride layer 150 in Figure 2 can be further removed more cleanly, so that the subsequent silicon nitride wet process can completely remove the first nitride layer 130, avoiding the influence of the residual silicon nitride on the subsequent process and device performance. Next, please refer to Figure 5 , the first nitride layer 130 is removed by wet etching to expose the first oxide layer 120, which can further reduce the thickness of the remaining second oxide layer 140. Please refer to Figure 6 , the first oxide layer 120 is removed, and at this time part of the surface of the remaining second oxide layer 140 is also removed, causing the middle part of the remaining second oxide layer 140 to be concave downward.

[0004] Therefore, the thickness of the second oxide layer 140 formed by the prior art is reduced, that is, the thickness of the silicon dioxide of the stop ring may not meet the standard. SUMMARY

[0005] The purpose of the present application is to provide a method for forming an insulated gate bipolar transistor, which can ensure that the thickness of the silicon dioxide of the stop ring formed meets the standard.

[0006] In order to achieve the above-mentioned purpose, the present application provides a method for forming an insulated gate bipolar transistor, comprising:

[0007] providing a substrate and a first oxide layer and a first nitride layer successively located on the substrate, the first oxide layer and the first nitride layer exposing part of the surface of the substrate;

[0008] forming a second oxide layer on the surface of the substrate and inside the substrate by thermal oxidation from the exposed surface of the substrate, the second oxide layer growing partially under the first oxide layer, part of the first oxide layer and part of the first nitride layer being raised, and part of the first nitride layer near the surface of the first nitride layer being oxidized to form an oxidized nitride layer;

[0009] remove the oxidized nitride layer to expose the first nitride layer;

[0010] remove part of the second oxide layer and remove the raised part of the first nitride layer and the raised part of the first oxide layer, so that the surfaces of the remaining second oxide layer and the first nitride layer are flat, and the surface of the remaining second oxide layer is flush with the surface of the remaining first nitride layer.

[0011] removing the first nitride layer to expose the first oxide layer;

[0012] removing the first oxide layer while removing part of the second oxide layer, the remaining surface of the second oxide layer being flat and flush with the surface of the substrate.

[0013] Optionally, in the method for forming the insulated gate bipolar transistor, the substrate comprises a wafer.

[0014] Optionally, in the method for forming the insulated gate bipolar transistor, the material of the first oxide layer comprises silicon oxide.

[0015] Optionally, in the method for forming the insulated gate bipolar transistor, the silicon oxide comprises silicon dioxide.

[0016] Optionally, in the method for forming the insulated gate bipolar transistor, the material of the first nitride layer comprises silicon nitride.

[0017] Optionally, in the method for forming the insulated gate bipolar transistor, the oxidized nitride layer is removed by wet etching.

[0018] Optionally, in the method for forming the insulated gate bipolar transistor, part of the second oxide layer and the raised part of the first nitride layer and the raised part of the first oxide layer are removed by grinding.

[0019] Optionally, in the method for forming the insulated gate bipolar transistor, the first nitride layer is removed by wet etching to expose the first oxide layer.

[0020] Optionally, in the method for forming the insulated gate bipolar transistor, the substrate and the first oxide layer and the first nitride layer sequentially provided on the substrate comprise:

[0021] providing a substrate;

[0022] forming a silicon dioxide layer and a silicon nitride layer sequentially on the surface of the substrate;

[0023] etching the silicon dioxide layer and the silicon nitride layer sequentially, the remaining silicon dioxide layer and silicon nitride layer forming the first oxide layer and the first nitride layer respectively.

[0024] Optionally, in the method for forming the insulated gate bipolar transistor, the silicon dioxide layer and the silicon nitride layer are etched sequentially from the surface of the silicon nitride layer perpendicularly to the silicon nitride layer until the surface of the substrate is exposed, the remaining silicon dioxide layer and silicon nitride layer forming the first oxide layer and the first nitride layer respectively.

[0025] In the method for forming an insulated gate bipolar transistor provided by the present application, the method comprises the following steps: providing a substrate and a first oxide layer and a first nitride layer successively on the substrate, the first oxide layer and the first nitride layer exposing a surface of the substrate; forming a second oxide layer on the surface of the substrate and inside the substrate by a thermal oxidation method from the exposed surface of the substrate, the second oxide layer partially growing under the first oxide layer, part of the first oxide layer and part of the first nitride layer being warped, and part of the first nitride layer near the surface thereof being oxidized to form an oxidized nitride layer; removing the oxidized nitride layer to expose the first nitride layer; removing part of the second oxide layer and removing the warped part of the first nitride layer and the warped part of the first oxide layer, so that the surfaces of the remaining second oxide layer and the first nitride layer are flat and the surface of the remaining second oxide layer is flush with the surface of the remaining first nitride layer; removing the first nitride layer to expose the first oxide layer; and removing the first oxide layer while removing part of the second oxide layer, the surface of the remaining second oxide layer being flat and flush with the surface of the substrate. The silicon dioxide surface of the second oxide layer, i.e. the stop ring, formed by the present application is flat and flush with the surface of the substrate, so that the thickness of the silicon dioxide of the stop ring meets the standard. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figures 1 to 6 is a schematic diagram of a method for forming an insulated gate bipolar transistor of the prior art;

[0027] Figure 7 is a flow chart of a method for forming an insulated gate bipolar transistor of an embodiment of the present application;

[0028] Figures 8 to 13 is a schematic diagram of a method for forming an insulated gate bipolar transistor of the prior art;

[0029] In the drawings: 110 - substrate, 120 - first oxide layer, 130 - first nitride layer, 140 - second oxide layer, 150 - oxidized nitride layer, 210 - substrate, 220 - first oxide layer, 230 - first nitride layer, 240 - second oxide layer, 250 - oxidized nitride layer. DETAILED DESCRIPTION

[0030] The specific embodiments of the present application will be described in more detail below with reference to the accompanying drawings. The advantages and features of the present application will be more apparent from the following description. It should be noted that the drawings are very simplified and are not drawn to scale, and are only used to assist in the description of the embodiments of the present application.

[0031] In the following detailed description, the terms "first", "second", etc. are used to distinguish between like elements having a same, or similar, function in the context in which the elements are used and are not necessarily used to describe a particular sequential or chronological order. It is to be understood that, where appropriate, so used terms can be interchanged. Also, if a method comprising a series of steps is described herein, the order of the steps presented herein is not necessarily the only order in which the steps can be performed, and some of the described steps can be omitted and / or other steps not described herein can be added to the method.

[0032] Reference will now be made to Figure 7 The present application provides a forming method of an insulated gate bipolar transistor, comprising:

[0033] S11: providing a substrate and a first oxide layer and a first nitride layer successively on the substrate, the first oxide layer and the first nitride layer exposing a surface of the substrate;

[0034] S12: forming a second oxide layer on the surface of the substrate and inside the substrate by a thermal oxidation method from the exposed surface of the substrate, the second oxide layer partially growing under the first oxide layer, and part of the first oxide layer and part of the first nitride layer being warped, and at the same time, part of the thickness of the first nitride layer close to the surface of the first nitride layer being oxidized to form an oxidized nitride layer;

[0035] S13: removing the oxidized nitride layer to expose the first nitride layer;

[0036] S14: removing part of the second oxide layer and removing the warped part of the first nitride layer and the warped part of the first oxide layer, so that the surfaces of the remaining second oxide layer and the first nitride layer are flat, and the surface of the remaining second oxide layer and the surface of the remaining first nitride layer are flush;

[0037] S15: removing the first nitride layer to expose the first oxide layer;

[0038] S16: removing the first oxide layer while removing part of the second oxide layer, the surface of the remaining second oxide layer being flat and flush with the surface of the substrate.

[0039] Reference will now be made to Figure 8 First, a substrate 210 is provided, and a first oxide layer 220 and a first nitride layer 230 are successively formed on the surface of the substrate 210, the first oxide layer 220 can be silicon oxide, and the first nitride layer 230 can be silicon nitride, the first oxide layer 220 is exposed by successively etching part of the first oxide layer 220 and the first nitride layer 230, the area of the etched first nitride layer 230 is the same as the cross-sectional area of the first oxide layer 220, and is located at the same position on the surface of the substrate 210.

[0040] Next, reference is made to Figure 9, a second oxide layer 240 is formed on the exposed substrate 210 by thermal growth, the second oxide layer 240 is silicon dioxide as the stop ring, at this time the second oxide layer 240 will grow partially under the first oxide layer 220, causing the first oxide layer 220 to partially warp and the first nitride layer 230 to partially warp, and the second oxide layer 240 will form to the inside of the substrate 210. And at the same time of forming the second oxide layer 240 by thermal growth, the part of the first nitride layer 230 near the surface of the first nitride layer 230 is oxidized to form the oxidized nitride layer 250.

[0041] Next, please refer to Figure 9 and 10 , the oxidized nitride layer 250 is removed by wet etching to expose the first nitride layer 230.

[0042] Next, please refer to Figure 11 , the second oxide layer 240 is polished by polishing to remove part of the second oxide layer 240 and remove the warped first nitride layer 230 and the first oxide layer 220, so that the surface of the remaining second oxide layer 240 and the surface of the remaining first nitride layer 230 are flat, and the surface of the remaining second oxide layer 240 and the surface of the remaining first nitride layer 230 are flush. The thickness of the second oxide layer reduced by the wet etching method to remove the oxidized nitride layer 250 is negligible compared to the thickness of the second oxide layer 240 polished. The oxidized nitride layer 250 of the embodiment of the present application has been completely removed by wet etching before polishing the second oxide layer 240, so there is no need to consider whether the oxidized nitride layer 250 is completely removed when polishing the second oxide layer 240. Compared with the prior art, the thickness of the remaining second oxide layer 240 after polishing the second oxide layer 240 is thicker than the thickness of the remaining second oxide layer in the prior art.

[0043] Next, please refer to Figure 12 , the first nitride layer 230 is removed to expose the first oxide layer 220. Compared with the prior art, the embodiment of the present application does not use the process of removing the first nitride layer 230 by wet etching after polishing the second oxide layer 240, so it will not further reduce the thickness of the second oxide layer 240, so the remaining second oxide layer 140 will be thicker than the prior art.

[0044] Next, please refer to Figure 13 , the first oxide layer 220 is removed, at this time part of the surface of the remaining second oxide layer 240 will also be removed, the surface of the remaining second oxide layer 240 is flush and flush with the surface of the substrate 210, there is no concave in the middle of the remaining second oxide layer 240, and the thickness of the second oxide layer 240 meets the standard, that is, the thickness of the silicon dioxide as the stop ring meets the standard.

[0045] In summary, in the forming method of the insulated gate bipolar transistor provided by the embodiment of the present application, the method comprises the following steps: providing a substrate and a first oxide layer and a first nitride layer successively on the substrate, the first oxide layer and the first nitride layer exposing a surface of the substrate; forming a second oxide layer on the surface of the substrate and in the substrate by a thermal oxidation method from the exposed surface of the substrate, the second oxide layer being partially grown under the first oxide layer, part of the first oxide layer and part of the first nitride layer being warped, and part of the first nitride layer near the surface of the first nitride layer being oxidized to form an oxidized nitride layer; removing the oxidized nitride layer to expose the surface of the first nitride layer; removing part of the second oxide layer and removing the warped part of the first nitride layer and the warped part of the first oxide layer, so that the surfaces of the remaining second oxide layer and the first nitride layer are flat, and the surface of the remaining second oxide layer is flush with the surface of the remaining first nitride layer; removing the first nitride layer to expose the surface of the first oxide layer; removing the first oxide layer while removing part of the second oxide layer, the surface of the remaining second oxide layer being flat and flush with the surface of the substrate. The silicon dioxide surface of the second oxide layer, i.e. the cutoff ring, formed by the present application is flat and flush with the surface of the substrate, so that the thickness of the silicon dioxide of the cutoff ring meets the standard.

[0046] The above merely describes the preferred embodiments of the present application and does not limit the present application in any way. Any person skilled in the art can make any equivalent replacement, modification or change to the technical solutions and technical contents disclosed by the present application without departing from the scope of the technical solutions of the present application, and such changes still belong to the protection scope of the present application.

Claims

1. A method for forming an insulated gate bipolar transistor, characterized in that: include: Providing a substrate and a first oxide layer and a first nitride layer sequentially located on the substrate, wherein the first oxide layer and the first nitride layer partially expose a surface of the substrate; forming a second oxide layer on the surface and inside the substrate by thermal oxidation starting from the exposed surface of the substrate, wherein the second oxide layer is partially grown below the first oxide layer, so that a portion of the first oxide layer and a portion of the first nitride layer are raised, and at the same time, a portion of the thickness of the first nitride layer near the surface of the first nitride layer is oxidized to form an oxidized nitride layer; removing the oxidized nitride layer to expose the first nitride layer; Removing a portion of the second oxide layer and removing a raised portion of the first nitride layer and a raised portion of the first oxide layer, so that the surfaces of the remaining second oxide layer and the first nitride layer are both flat, and the surface of the remaining second oxide layer is flush with the surface of the remaining first nitride layer; removing the first nitride layer to expose the first oxide layer; The first oxide layer is removed, and a portion of the second oxide layer is removed at the same time, and the surface of the remaining second oxide layer is flat and flush with the surface of the substrate.

2. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: The substrate includes a wafer.

3. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: The material of the first oxide layer includes silicon oxide.

4. The method for forming an insulated gate bipolar transistor according to claim 3, wherein: The silicon oxide includes silicon dioxide.

5. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: The material of the first nitride layer includes silicon nitride.

6. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: The oxidized nitride layer is removed by wet etching.

7. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: A portion of the second oxide layer is removed by grinding, and the raised portion of the first nitride layer and the raised portion of the first oxide layer are removed.

8. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: The first nitride layer is removed by wet etching to expose the first oxide layer.

9. The method for forming an insulated gate bipolar transistor according to claim 1, wherein: Providing a substrate and a first oxide layer and a first nitride layer sequentially located on the substrate includes: providing a substrate; forming a silicon dioxide layer and a silicon nitride layer in sequence on the surface of the substrate; The silicon dioxide layer and the silicon nitride layer are etched in sequence, and the remaining silicon dioxide layer and the silicon nitride layer form a first oxide layer and a first nitride layer respectively.

10. The method for forming an insulated gate bipolar transistor according to claim 9, wherein: The silicon nitride layer and the silicon dioxide layer are sequentially etched from the surface of the silicon nitride layer in a manner perpendicular to the silicon nitride layer until the substrate is exposed, and the remaining silicon dioxide layer and silicon nitride layer form a first oxide layer and a first nitride layer, respectively.

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