A method for manufacturing a GaN-based HEMT device having a p-channel

Abstract

The application discloses a preparation method of a GaN-based HEMT device with a p channel, and the method comprises the following steps: bonding a silicon thin film on a diamond substrate, wherein the thickness of the silicon thin film is 20-200 nm; epitaxially growing a GaN layer on the silicon thin film; epitaxially growing an AlGaN layer on the GaN layer, growing a p-GaN layer and a process protection layer on the AlGaN layer; forming a passivation layer on the diamond substrate on one side of a GaN HEMT power device; growing a BaF2 layer as a dielectric layer on the passivation layer and the process protection layer; selectively etching the BaF2 layer, removing the SiO2 layer and the BaF2 layer above the p-GaN layer by using a lift-off process; manufacturing a source electrode, a drain electrode and a gate electrode on the diamond region and the GaN region respectively, and obtaining a final device. The application effectively improves the bonding quality and success rate by bonding an ultrathin silicon layer with a diamond substrate and then epitaxially growing GaN, meanwhile, the passivation layer formed by the passivation of the diamond by H ions solves the technical problem of monolithic integration of the GaN device.

Description

[0001] Parent case: application number 2023101615515; name: a high-thermal-conductivity GaN-based HEMT device and a preparation method thereof TECHNICAL FIELD

[0002] The present application relates to the technical field of semiconductor, in particular to a preparation method of GaN-based HEMT device with p-channel. BACKGROUND

[0003] GaN has a wide band gap and high carrier mobility, and the HEMT device (High Electron Mobility Transistor) manufactured based on GaN material has the characteristics of high withstand voltage, high working frequency and high temperature working. However, with the increase of power of GaN-based microwave power device and the decrease of device size, the heat dissipation problem becomes an important factor restricting its reliable work, so it is necessary to enhance its heat dissipation capacity. The traditional heat dissipation method is to deposit or bond a material with high thermal conductivity on the front or back surface of the device. Among the known natural materials, diamond has the highest thermal conductivity (800 W / m.K-1800 W / m.K), which is an excellent heat conduction material for GaN-based high-power devices.

[0004] There are two main methods of using diamond for heat dissipation at present, one is to grow diamond on the surface of the device by chemical vapor deposition, and the other is to grind off the original silicon substrate and then bond the GaN layer with the diamond substrate by using an intermediate bonding layer. Because the GaN film is epitaxially grown on a silicon substrate, due to the lattice mismatch and thermal mismatch during the growth process, GaN has a very large warping degree. When GaN is bonded with the diamond substrate, the bonding often fails due to the large difference in warping degree between diamond and GaN, and even the wafer is broken. SUMMARY

[0005] The purpose of the present application is to overcome the problem of low bonding quality of diamond and GaN in the prior art, and to provide a preparation method of GaN-based HEMT device with p-channel.

[0006] The purpose of the present application is achieved by the following technical solutions:

[0007] In the first aspect, a preparation method of GaN-based HEMT device with p-channel is provided, and the method comprises the following steps:

[0008] S1, bonding a silicon thin film on a diamond substrate, the thickness of the silicon thin film is 20-200 nm; the bonding of the silicon thin film on the diamond substrate comprises:

[0009] S11, ion implantation is performed on a silicon substrate;

[0010] S12, bonding the silicon substrate with the ion implantation completed side as the bonding surface to the diamond substrate;

[0011] S13, annealing to cause the silicon substrate to be peeled off from the vicinity of the ion implantation range, leaving a thin layer of silicon film on the diamond substrate, forming a silicon film / diamond substrate structure;

[0012] S14, chemical mechanical polishing to remove the rough surface area of the silicon film, obtaining a high flatness silicon surface;

[0013] S2, epitaxially growing a GaN layer on the silicon film;

[0014] S3, epitaxially growing an AlGaN layer on the GaN layer;

[0015] S4, growing a p-GaN layer and a process protection layer on the AlGaN layer;

[0016] S5, forming a passivation layer on the diamond substrate on one side of the GaN HEMT power device;

[0017] S6, growing a BaF2 layer as a dielectric layer on the passivation layer and the process protection layer;

[0018] S7, selectively etching the BaF2 layer, and removing the SiO2 layer and the BaF2 layer above the p-GaN layer using a lift-off process;

[0019] S8, manufacturing a source, a drain and a gate on the diamond region and the GaN region respectively, obtaining the final device, as an option, a preparation method of a GaN-based HEMT device with a p-channel, the bonding of the silicon film on the diamond substrate comprising:

[0020] bonding the diamond substrate to the silicon substrate, grinding and chemical mechanical polishing the silicon substrate to leave a layer of silicon film on the diamond substrate.

[0021] As an option, the thickness of the silicon film in the preparation method of the GaN-based HEMT device with a p-channel is 50 nm.

[0022] As an option, the crystal orientation of the silicon film in the preparation method of the GaN-based HEMT device with a p-channel is (111).

[0023] As an option, the ion implantation in the preparation method of the GaN-based HEMT device with a p-channel uses H ion implantation, the ion implantation energy is 10 keV-100 keV, the implantation dose is 6E16 atoms / cm 2 .

[0024] As a preferred option, a preparation method of a GaN-based HEMT device with a p-channel, the ion implantation energy is 20 keV.

[0025] As a preferred option, a preparation method of a GaN-based HEMT device with a p-channel, the annealing temperature is 600 degrees Celsius, and the annealing time is 30 minutes.

[0026] In the second aspect, a high-thermal-conductivity GaN-based HEMT device is provided, comprising, from bottom to top, a diamond substrate, a silicon thin film, a buffer layer, a GaN layer, and an AlGaN layer, wherein the AlGaN layer is provided with a source electrode, a drain electrode, and a gate electrode, and the silicon thin film has a thickness of 20-200 nm.

[0027] As a preferred option, the high-thermal-conductivity GaN-based HEMT device has a silicon thin film with a thickness of 50 nm.

[0028] It should be further explained that the technical features corresponding to the above options can be combined or replaced with each other to form new technical solutions without conflict.

[0029] Compared with the prior art, the present application has the following advantages:

[0030] The present application bonds a silicon thin film on a diamond substrate, since the silicon material itself has almost no stress, it can be well bonded with the diamond, and then a GaN layer is epitaxially grown on the remaining silicon thin film, thereby avoiding the problem of wafer breakage caused by bonding of the diamond and the GaN layer. On the other hand, because the thickness of the remaining silicon thin film after bonding is 20-200 nm, it is easier to fix the defects caused by lattice mismatch in the silicon thin film when growing a GaN layer thereon, thereby reducing the defect density of the GaN layer and improving the GaN crystal quality. Thirdly, compared with the traditional scheme, the present application reduces the wafer bonding and debonding process once, and reduces the bonding layer deposition process twice, thereby simplifying the process. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 A flowchart of a preparation method of a high-thermal-conductivity GaN-based HEMT device is shown for the embodiments of the present application;

[0032] Figure 2 A structural schematic diagram of a high-thermal-conductivity GaN-based HEMT device is shown for the embodiments of the present application;

[0033] Figure 3 A schematic diagram of ion implantation into a silicon substrate is shown for the embodiments of the present application;

[0034] Figure 4 A schematic diagram of bonding of a silicon substrate and a diamond substrate is shown for the embodiments of the present application;

[0035] Figure 5 FIG. 1 is a schematic diagram of the annealing process for the thin film peeling and chemical mechanical polishing of the diamond on silicon thin film according to an embodiment of the present application;

[0036] Figure 6 FIG. 2 is a schematic diagram of the growth of the p-GaN layer and the process protection layer on the AlGaN layer according to an embodiment of the present application;

[0037] Figure 7 FIG. 3 is a schematic diagram of the formation of the passivation layer on the diamond substrate according to an embodiment of the present application;

[0038] Figure 8 FIG. 4 is a schematic diagram of the growth of the BaF2 layer on the passivation layer and the process protection layer according to an embodiment of the present application;

[0039] Figure 9 FIG. 5 is a schematic diagram of the selective etching of the BaF2, the removal of the SiO2 layer and the BaF2 layer on the p-GaN layer according to an embodiment of the present application;

[0040] Figure 10 FIG. 6 is a schematic diagram of the manufacturing of the source, the drain and the gate on the diamond region and the GaN region respectively according to an embodiment of the present application.

[0041] In the figure, 1 is the diamond substrate, 2 is the silicon thin film, 3 is the buffer layer, 4 is the GaN layer, 5 is the AlGaN layer, 6 is the gate dielectric, 7 is the source, 8 is the drain, 9 is the gate, 10 is the silicon substrate, 11 is the p-GaN layer, 12 is the process protection layer, 13 is the passivation layer, and 14 is the BaF2 layer. DETAILED DESCRIPTION

[0042] The technical solutions of the present application will be described clearly and completely below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0043] In the description of the present application, it should be noted that the directions or position relationships indicated by "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like are the directions or position relationships described based on the drawings, and are only for the convenience of describing the present application and simplifying the description, and thus cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and thus cannot be understood as limiting the present application.

[0044] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting" should be understood in a broad sense, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be direct connection, or indirect connection through intermediate medium, or internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0045] In addition, the technical features involved in the different embodiments of the application described below can be combined with each other as long as there is no conflict.

[0046] In an exemplary embodiment, a method for preparing a high-thermal-conductivity GaN-based HEMT device is provided, as shown in Figure 1 The method comprises the following steps:

[0047] S1, bonding a silicon thin film 2 on a diamond substrate 1, the thickness of the silicon thin film 2 being 20-200 nm;

[0048] S2, epitaxially growing a GaN layer 4 on the silicon thin film 2;

[0049] S3, epitaxially growing an AlGaN layer 5 on the GaN layer 4, and manufacturing a source electrode 7, a drain electrode 8 and a gate electrode 9 on the AlGaN layer 5, to obtain a GaN HEMT power device.

[0050] Specifically, the present application bonds a silicon thin film 2 on a diamond substrate 1, which can be well bonded with the diamond substrate 1 due to the fact that the silicon material itself has almost no stress, and then epitaxially grows a GaN layer 4 on the remaining silicon thin film 2, thereby avoiding the problem of wafer breakage caused by bonding the diamond substrate 1 with the GaN layer 4. On the other hand, because the thickness of the remaining silicon thin film 2 after bonding is 20-200 nm, it is easier to fix the defects caused by lattice mismatch in the silicon thin film when growing the GaN layer 4 thereon, thereby reducing the defect density of the GaN layer 4 and improving the GaN crystal quality. Thirdly, compared with the traditional scheme, the present application reduces the wafer bonding and debonding process once, and reduces the bonding layer deposition process twice, thereby simplifying the process.

[0051] Further, the silicon thin film 2 transferred by the present application does not serve as a bonding adhesive layer, but as a substrate for growing the GaN layer 4, which is irreplaceable and must be a silicon material substrate. Moreover, the present application does not sacrifice the high-cost SiC substrate, thereby saving costs.

[0052] In one example, with reference to Figures 2-5 A method for preparing a high-thermal-conductivity GaN-based HEMT device, the bonding of a silicon thin film 2 on a diamond substrate 1 comprises:

[0053] S11, ion implantation is performed on the silicon substrate 10;

[0054] S12, the silicon substrate 10 after ion implantation is bonded to the diamond substrate 1;

[0055] S13, the silicon substrate 10 is split near the ion implantation range by an annealing process, and the silicon film defined by the ion implantation range has been bonded to the diamond substrate 1, forming a silicon film 2 on the diamond substrate.

[0056] S14, the thin silicon film 2 formed on the diamond substrate 1 is chemically and mechanically polished using a chemical mechanical polishing process to obtain a high flatness surface.

[0057] It should be noted that after the silicon film 2 is transferred using the ion implantation method, the remaining silicon substrate 10 can continue to be chemically and mechanically polished for more film transfers (each time a film of 1 um or less is peeled off from a silicon wafer of 1000 um in thickness, preferably a few tens of nm, and theoretically can be used for several hundred times).

[0058] In one example, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the silicon film 2 is bonded to the diamond substrate 1, which includes:

[0059] The diamond substrate 1 is bonded to the silicon substrate 10, and the silicon substrate 10 is ground and chemically and mechanically polished to leave a layer of silicon film 2 on the diamond substrate. This method can replace the ion implantation method described above, but the control accuracy of the film thickness will be worse, and can be selected according to actual conditions.

[0060] In one example, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the thickness of the silicon film 2 is 50 nm, and the crystal direction of the silicon film 2 is (111).

[0061] In one example, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the ion implantation uses H ion implantation, the ion implantation energy is 10 keV-100 keV, the implantation dose is 6E16 atoms / cm 2 In other embodiments, other ion implantation can also be used, which is not limited here.

[0062] In one example, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the ion implantation energy is 20 keV.

[0063] In one example, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the annealing temperature is 600 degrees Celsius, and the annealing time is 30 minutes.

[0064] In another exemplary embodiment, a method for preparing a high-thermal-conductivity GaN-based HEMT device, the method further comprises:

[0065] S4, referring to Figure 6 A p-GaN layer 11 and a process protection layer 12 are grown on the AlGaN layer 5, wherein the process protection layer 12 is preferably a SiO2 layer; then a region is defined by photolithography, and a side structure (including part of the GaN layer 4, the silicon film 2, etc.) on the diamond substrate 1 is etched by a reactive ion etching process.

[0066] S5, referring to Figure 7 A passivation layer 13 is formed on the diamond substrate 1 on one side of the GaN HEMT power device, specifically, a surface activation treatment is performed on the material in an H plasma atmosphere, so that an H passivation layer 13 is formed on the diamond surface.

[0067] S6, referring to Figure 8 A BaF2 layer is grown as a dielectric layer on the passivation layer 13 and the process protection layer 12.

[0068] S7, referring to Figure 9 The BaF2 layer 14 is selectively etched, and the SiO2 layer and the BaF2 layer 14 above the p-GaN layer 11 are removed by a lift-off process (HF immersion);

[0069] S8, referring to Figure 10 The source 7, the drain 8 and the gate 9 are respectively manufactured in the diamond region and the GaN region, and a final device is obtained.

[0070] Specifically, GaN monolithic integration is a trend in the development of GaN, which is to manufacture all IC circuit functions on a GaN wafer. Such a design includes advantages such as small area, small parasitic parameters, high power density, and relatively low cost. One of the main obstacles to improving the overall performance of GaN power ICs is still to find a suitable solution to solve the problem of the lack of p-channel devices with acceptable performance in GaN. In this embodiment, the passivation layer formed by the H ion passivation of the diamond is exposed to the air atmosphere, and a layer of two-dimensional holes is formed on the surface. The device constructed based on the two-dimensional hole gas is a typical p-channel device. This solves the technical problem of monolithic integration of GaN devices.

[0071] In a second scheme, a high-thermal-conductivity GaN-based HEMT device is provided, as shown in Figure 2 including, from bottom to top, a diamond substrate 1, a silicon film 2, a buffer layer 3, a GaN layer 4 and an AlGaN layer 5 connected in sequence, wherein the AlGaN layer 5 is provided with a source 7, a drain 8 and a gate 9, and the thickness of the silicon film 2 is 20-200 nm.

[0072] Further, a high-thermal-conductivity GaN-based HEMT device, the thickness of the silicon thin film 2 is 50 nm.

[0073] The above detailed description merely explains the application, and is not to be taken in a limiting sense, as many variations and modifications will readily occur to those skilled in the art. The application can be practiced with the specific details disclosed herein or variations and modifications that are apparent to the skilled artisan. The application is not limited to the described implementations, but instead is limited only by the scope of the claims.

Claims

1. A method for fabricating a GaN-based HEMT device with a p-channel, characterized in that, The method includes the following steps: S1. Bonding a silicon thin film on a diamond substrate, wherein the thickness of the silicon thin film is 20nm-200nm; the bonding of the silicon thin film on the diamond substrate includes: S11. Ion implantation is performed on the silicon substrate; S12. Use the side of the silicon substrate that has undergone ion implantation as the bonding surface to bond with the diamond substrate; S13. Annealing causes the silicon substrate to be peeled away from the position defined by the ion implantation range, forming a silicon thin film / diamond substrate structure on the diamond substrate. S14. Chemical mechanical polishing removes rough areas from the silicon film surface to obtain a smooth silicon surface; S2. Epitaxially grow a GaN layer on the silicon thin film; S3. An AlGaN layer is epitaxially grown on the GaN layer; S4. Grow a p-GaN layer and a process protection layer on the AlGaN layer; S5. A passivation layer is formed on the diamond substrate on one side of the GaN HEMT power device. S6. A BaF2 layer is grown on the passivation layer and the process protection layer as a dielectric layer; S7. Selectively etch the BaF2 layer and use a lift-off process to remove the SiO2 layer and BaF2 layer on the p-GaN layer; S8. The source, drain, and gate are fabricated in the diamond region and GaN region respectively to obtain the final device.

2. The method for fabricating a GaN-based HEMT device with a p-channel according to claim 1, characterized in that, The bonding of a silicon thin film on a diamond substrate includes: A diamond substrate is bonded to a silicon substrate, and the silicon substrate is ground and chemically mechanically polished to leave a silicon thin film on the diamond substrate.

3. The method for fabricating a GaN-based HEMT device with a p-channel according to claim 1, characterized in that, The silicon thin film has a thickness of 50 nm and a crystal orientation of (111).

4. The method for fabricating a GaN-based HEMT device with a p-channel according to claim 1, characterized in that, The ion implantation was performed using H ions, with an implantation energy of 10 keV - 100 keV and an implantation dose of 6E16 atoms / cm². 2 .

5. The method for fabricating a GaN-based HEMT device with a p-channel according to claim 4, characterized in that, The ion implantation energy is 20 keV.

6. The method for fabricating a GaN-based HEMT device with a p-channel according to claim 1, characterized in that, The annealing temperature is 600 degrees Celsius, and the annealing time is 30 minutes.

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