Semiconductor laser chip and method of manufacturing

Abstract

The application discloses a semiconductor laser chip and a preparation method, and belongs to the technical field of semiconductors. The semiconductor laser chip comprises an N-type substrate and an epitaxial layer arranged on the N-type substrate; the epitaxial layer comprises a transition layer, an N-type lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, a P-type upper cladding layer and a cap layer which are sequentially arranged on the N-type substrate; the cap layer and the N-type substrate are respectively provided with a P-type ohmic contact electrode and an N-type ohmic contact electrode; the cap layer is a semiconductor material without or with low doping; and the cap layer and the P-type upper cladding layer are provided with a patterned P-type impurity diffusion region. The semiconductor laser chip provided by the application has low doping concentration outside the P-type impurity diffusion region, and the current injection range is limited in the P-type impurity diffusion region; the limitation of the current injection range can be realized without depositing an insulating film on the cap layer and etching the cap layer, the wafer fabrication process can be simplified, and the stability of the process is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a semiconductor laser chip and a preparation method thereof. BACKGROUND

[0002] Semiconductor lasers are widely used in material processing, medical treatment, beauty, 3D printing, communication and other fields, wherein, the semiconductor laser chip is the core component of the semiconductor laser. The cap layer of the existing semiconductor laser chip is a heavily doped semiconductor material, and in the chip preparation method, an insulating film is usually deposited on the surface of the cap layer and then windowed, and then the semiconductor cap layer and the cladding layer are etched by wet or dry method to define the current injection area, which leads to complex flow sheet process and low process stability. Therefore, how to simplify the flow sheet process of the semiconductor laser chip and improve the process stability has become a technical problem to be solved. SUMMARY

[0003] The present application provides a semiconductor laser chip, which can solve the problems of complex flow sheet process and low process stability of the semiconductor laser chip.

[0004] To solve the above technical problems, the present application provides a semiconductor laser chip, which comprises an N-type substrate and an epitaxial layer arranged on the N-type substrate; the epitaxial layer comprises a transition layer, an N-type lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, a P-type upper cladding layer and a cap layer which are sequentially arranged on the N-type substrate; the cap layer and the N-type substrate are respectively provided with a P-type ohmic contact electrode and an N-type ohmic contact electrode; the cap layer is a non-doped or low-doped semiconductor material, and the cap layer and the P-type upper cladding layer are provided with a patterned P-type impurity diffusion zone for injecting current.

[0005] The present application also provides a preparation method of the semiconductor laser chip, which comprises the following steps:

[0006] providing an N-type substrate;

[0007] forming an epitaxial layer on the N-type substrate, wherein the epitaxial layer comprises a transition layer, an N-type lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, a P-type upper cladding layer and a cap layer which are sequentially arranged on the N-type substrate;

[0008] diffusing impurity atoms through the cap layer to form a P-type impurity diffusion zone on the P-type upper cladding layer for injecting current; wherein the diffusion method comprises gaseous source impurity diffusion, solid source impurity diffusion or a combination of impurity ion implantation and high temperature annealing;

[0009] depositing a P-type ohmic contact electrode and an N-type ohmic contact electrode on the cap layer and the N-type substrate, respectively.

[0010] The semiconductor laser chip provided by the application has a cap layer of undoped or low-doped semiconductor material, and a patterned P-type impurity diffusion region is arranged on the cap layer as a current injection region. Since the doping concentration outside the P-type impurity diffusion region is low, the current injection range is limited within the P-type impurity diffusion region. The limitation of the current injection range can be realized without depositing an insulating film on the cap layer and etching the cap layer, thus simplifying the wafer processing and improving the stability of the processing. BRIEF DESCRIPTION OF DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0012] Figure 1 Fig. 1 is a top view of a semiconductor laser chip according to an embodiment of the present application;

[0013] Figure 2 Fig. 2 is a sectional view of the semiconductor laser chip in Fig. 1 from a perspective; Figure 1

[0014] Fig. 3 is a contrast diagram of the refractive index of the P-type upper cladding layer before and after impurity diffusion according to an embodiment of the present application; Figure 3

[0015] Fig. 4 is a flowchart of a preparation method of a semiconductor laser chip according to an embodiment of the present application. Figure 4 DETAILED DESCRIPTION

[0016] The present application will be further described in detail below in combination with the drawings and embodiments. It is particularly pointed out that the following embodiments are only used to illustrate the present application, but do not limit the scope of the present application. Similarly, the following embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present application.

[0017] ​In the description of the application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise explicitly and specifically limited. The terms "first", "second", "third" in the embodiments of the present application are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features limited by "first", "second", "third" can explicitly or implicitly include at least one of the features. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative positional relationship, movement condition, etc. between the components in a certain posture (as shown in the drawings), and if the certain posture changes, the directional indications also change accordingly. The terms "include" and "have" and any variations thereof in the embodiments of the present application are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or components inherent to the process, method, product or device.

[0018] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearance of the phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily independent or alternative embodiments to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0019] The present application provides a semiconductor laser chip. Please refer to Figure 1 , Figure 2 , Figure 1 is a top view structural schematic diagram of an embodiment of the semiconductor laser chip provided by the present application, Figure 2 is Figure 1 a sectional view structural schematic diagram of the semiconductor laser chip in one view. The semiconductor laser chip 100 can include an N-type substrate 10 and an epitaxial layer 20 disposed on the N-type substrate 10. The epitaxial layer 20 includes a transition layer 21, an N-type lower cladding layer 22, a lower waveguide layer 23, an active layer 24, an upper waveguide layer 25, a P-type upper cladding layer 26 and a cap layer 27, which are sequentially stacked on the N-type substrate 10. The cap layer 27 and the N-type substrate 10 are respectively provided with a P-type ohmic contact electrode 30 and an N-type ohmic contact electrode 40. The active layer 24 is a light emitting region, the lower waveguide layer 23 and the upper waveguide layer 25 are used to limit the light beam, the N-type lower cladding layer 22 and the P-type upper cladding layer 26 are used to guide the light field, and the P-type ohmic contact electrode 30 and the N-type ohmic contact electrode 40 are used for input and output of current.

[0020] The cap layer 27 is a non-doped or low-doped semiconductor material. The cap layer 27 and the P-type upper cladding layer 26 are provided with a patterned P-type impurity diffusion region 271 for injecting current.

[0021] The shape and depth of the P-type impurity diffusion region 271 can be designed and manufactured by different methods according to specific needs. For example, the shape of the P-type impurity diffusion region 271 can be a Figure 2 reverse trapezoid as shown.

[0022] The semiconductor laser chip 100 provided by the present application is a non-doped or low-doped semiconductor material. The cap layer 27 is provided with a patterned P-type impurity diffusion region 271 as a current injection region. Since the doping concentration outside the P-type impurity diffusion region 271 is low, the current injection range is limited within the P-type impurity diffusion region 271. Compared with the prior art, the limitation of the current injection range can be achieved without depositing an insulating film on the cap layer 27 and etching the cap layer 27, which simplifies the flow process and improves the stability of the process.

[0023] Specifically, in some embodiments, the cap layer 27 can be a low-doped semiconductor material doped with N-type or P-type impurity atoms. When the cap layer 27 is an N-type doped semiconductor material, its doping concentration is less than 4x10 18 / cm 3 ; when the cap layer 27 is a P-type doped semiconductor material, its doping concentration is less than 5x10 17 / cm 3 . In some embodiments, the N-type impurity atom concentration of the cap layer 27 can be 4x10 18 / cm 3 , 3x10 18 / cm 3 , 2x10 18 / cm 3 , 1x10 18 / cm 3 , 9x10 17 / cm 3 , 7x10 17 / cm 3 , 5x10 17 / cm 3 , etc. The P-type impurity atom concentration of the cap layer 27 can be 5x10 17 / cm 3 , 4x10 17 / cm 3 , 3x10 17 / cm 3 , 2x10 17 / cm 3 , 1x10 17 / cm 3 , 9x1016 / cm 3 , 5 x 10 16 / cm 3 , 7 x 10 16 / cm 3 , 9 x 10 19 / cm 3 , and the like, and are not specifically limited herein. When the doping concentration of the cap layer 27 is within the above range, the current can be prevented from spreading outside the P-type impurity diffusion region 271.

[0024] In an embodiment, the impurity atomic concentration of the P-type impurity diffusion region 271 of the cap layer 27 is greater than or equal to 1 x 10 19 / cm 3 . By high doping, the conductivity of the P-type impurity diffusion region 271 can be enhanced, and the width of the P-type impurity diffusion region 271 is designed to be the width of the current injection region. In some embodiments, the impurity atomic concentration of the P-type impurity diffusion region 271 of the cap layer 27 can be 1 x 10 19 / cm 3 , 2 x 10 19 / cm 3 , 3 x 10 19 / cm 3 , 4 x 10 19 / cm 3 , 5 x 10 19 / cm 3 , and the like. Specifically, the impurity atoms diffused in the P-type impurity diffusion region 271 of the cap layer 27 can be one or more of copper atoms, zinc atoms, and manganese atoms. The above impurity atoms are selected to facilitate the formation of the P-type impurity diffusion region 271, and when diffused into the cap layer 27 and the P-type upper cladding layer 26 using a diffusion process, high-doped conductivity can be achieved while reducing damage to the reflective structure of the P-type upper cladding layer 26 caused by diffusion of the impurity atoms.

[0025] Optionally, the N-type lower cladding layer 22 can be a semiconductor material doped with N-type impurity atoms at a doping concentration of 1 x 10 17 - 4 x 10 18 / cm 3 . The doping concentration can be 1 x 10 17 / cm 3 , 3 x 10 17 / cm 3 , 5 x 10 17 / cm 3 , 7 x 10 17 / cm 3 , 9 x 10 17 / cm 3 , 1 x 10 18 / cm 3 , 2 x 10 18 / cm 3 , 4 x 10 18 / cm 3 The P-type upper cladding 26 can be a semiconductor material doped with N-type impurity atoms, P-type impurity atoms, or alternating N-type and P-type impurity atoms, or undoped, with a doping concentration of less than or equal to 5 × 10⁻⁶. 17 / cm 3 The doping concentration can be 5×10 17 / cm 3 4×10 17 / cm 3 3×10 17 / cm 3 2×10 17 / cm 3 1×10 17 / cm 3 wait.

[0026] To enhance the guidance of the light field, the N-type lower cladding 22 can be a single-layer structure or a multi-layer periodic structure, and the P-type upper cladding 26 is a multi-layer periodic structure.

[0027] Preferably, the multi-layer periodic structure is a multi-layer periodic superlattice structure or a Bragg reflector periodic structure. The Bragg reflector periodic structure can be regarded as a Bragg waveguide. When light propagates in such a periodic dielectric material, the periodic dielectric material guides the light through a photonic bandgap, thereby confining the light field and improving the divergence angle of the laser.

[0028] In one embodiment, the N-type substrate 10 has a silicon doping concentration of 2 × 10⁻⁶. 18 / cm 3 The N-type semiconductor material GaAs, with N-type lower cladding 22 and P-type upper cladding 26 both using 9 pairs of Al 0.15 Ga 0.85 As / Al 0.35 Ga 0.65 As a Bragg reflector structure, the N-type lower cladding is 22-doped silicon, with a doping concentration of 2×10⁻⁶ along the epitaxial direction. 18 -5×10 17 / cm 3 Gradient, P-type cladding 26 doped with carbon, doping concentration of 5 × 10⁻⁶ along the epitaxial direction. 16 -5×10 17 / cm 3 Gradual transition, with the lower waveguide layer 23 and the upper waveguide layer 25 being Al. 0.25 Ga 0.75 As, active layer 24 is In 0.2 Ga 0.8 As / GaAs quantum well, with cap layer 27 being doped with carbon at a concentration of 5 × 10⁻⁶. 17 / cm 3 P-type GaAs.

[0029] In the diffusion process of impurity atoms into the cap layer 27 and the P-type upper cladding layer 26, the diffusion depth of the P-type impurity diffusion region 271 in the P-type upper cladding layer 26 needs to be less than the thickness of the P-type upper cladding layer 26. That is, for the P-type upper cladding layer 26 which is a multi-layer periodic structure, the diffusion depth of the impurity atoms does not exceed the bottom of the layer on the upper waveguide layer 25, so as to form different refractive indexes in at least part of the layers in the multi-layer structure of the P-type upper cladding layer 26. Please refer to Figure 3 , Figure 3 is a comparison diagram of the refractive indexes of the P-type upper cladding layer before and after the impurity diffusion of an embodiment of the semiconductor laser chip provided by the present application. As can be seen from the diagram, the refractive indexes of the layers of the P-type upper cladding layer 26 are all equal before the impurity diffusion; after the impurity diffusion, the refractive indexes of the layers close to the cap layer 27 in the multi-layer structure are reduced, thereby forming different refractive indexes.

[0030] In an embodiment, the N-type lower cladding layer 22 and the P-type upper cladding layer 26 are both multi-layer periodic structures formed by two kinds of materials with different refractive indexes. In order to enhance the guidance to the optical field, the refractive index of at least one kind of material in the N-type lower cladding layer 22 is greater than the refractive index of the lower waveguide layer 23, and the refractive index of at least one kind of material in the P-type upper cladding layer 26 is greater than the refractive index of the upper waveguide layer 25.

[0031] The present application provides a preparation method of a semiconductor laser chip, which is used for preparing the semiconductor laser chip 100 as described above. Please refer to Figure 4 , Figure 4 is a flow chart of an embodiment of the preparation method of the semiconductor laser chip provided by the present application. The preparation method 200 of the semiconductor laser chip comprises steps S210 to S240:

[0032] S210, providing an N-type substrate 10;

[0033] S220, forming an epitaxial layer 20 on the N-type substrate 10, the epitaxial layer 20 comprising a transition layer 21, an N-type lower cladding layer 22, a lower waveguide layer 23, an active layer 24, an upper waveguide layer 25, a P-type upper cladding layer 26 and a cap layer 27 which are sequentially arranged on the N-type substrate 10;

[0034] S230, diffusing impurity atoms into the P-type upper cladding layer 26 through the cap layer 27 to form a P-type impurity diffusion region 271 for injecting current; wherein the diffusion method comprises gaseous source impurity diffusion, solid source impurity diffusion, or impurity ion implantation combined with high-temperature annealing;

[0035] S240, depositing a P-type ohmic contact electrode 30 and an N-type ohmic contact electrode 40 on the cap layer 27 and the N-type substrate 10 respectively, and the deposition method of the electrodes can be evaporation plating or magnetron sputtering plating and the like.

[0036] The preparation method 200 of the semiconductor laser chip provided in the application adopts gaseous source impurity diffusion, solid source impurity diffusion, or impurity ion implantation combined with high-temperature annealing to diffuse impurity atoms from the cap layer 27 to the P-type upper cladding layer 26 to form a P-type impurity diffusion region 271.

[0037] The semiconductor laser chip and the preparation method provided in the application have at least the following beneficial effects:

[0038] 1. The semiconductor laser chip 100 provided in the application has the cap layer 27 made of undoped or low-doped semiconductor material, and the patterned P-type impurity diffusion region 271 is arranged on the cap layer 27 as a current injection region, so that the injection current range can be limited without depositing an insulating film for windowing on the cap layer 27 and etching the cap layer 27, thereby simplifying the flow sheet process and improving the stability of the process.

[0039] 2. The P-type upper cladding layer 26 has a multilayer periodic superlattice structure or a Bragg reflector periodic structure, and can guide the optical field to improve the divergence angle of the laser.

[0040] 3. The preparation method 200 of the semiconductor laser chip provided in the application adopts gaseous source impurity diffusion, solid source impurity diffusion, or impurity ion implantation combined with high-temperature annealing to diffuse impurity atoms from the cap layer 27 to the P-type upper cladding layer 26 to form a P-type impurity diffusion region 271, and the P-type impurity diffusion region 271 does not need to deposit an insulating film for windowing on the cap layer 27 and etch the cap layer 27 during the processing, thereby simplifying the flow sheet process and improving the stability of the process.

[0041] The above only describes some embodiments of the application, and does not limit the protection scope of the application, and any equivalent device or equivalent process conversion using the content of the specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the application.

Claims

1. A semiconductor laser chip, characterized in that, include: An N-type substrate and an epitaxial layer disposed on the N-type substrate; The epitaxial layer includes a transition layer, an N-type lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, a P-type upper cladding layer, and a cap layer, which are sequentially stacked on the N-type substrate. The cap layer and the N-type substrate are respectively provided with P-type ohmic contact electrodes and N-type ohmic contact electrodes. The cap layer is an undoped or lightly doped semiconductor material. The cap layer and the P-type upper cladding are provided with patterned P-type impurity diffusion regions for injecting current. The diffusion depth of the P-type impurity diffusion regions in the P-type upper cladding is less than the thickness of the P-type upper cladding. Both the N-type lower cladding and the P-type upper cladding are multi-layer periodic structures formed by alternating materials with two different refractive indices. The multi-layer periodic structure is a multi-layer periodic superlattice structure or a Bragg reflector periodic structure. The refractive index of at least one material in the N-type lower cladding is greater than that of the lower waveguide layer, and the refractive index of at least one material in the P-type upper cladding is greater than that of the upper waveguide layer.

2. The semiconductor laser chip according to claim 1, characterized in that, The cap layer is made of N-type doped semiconductor material with a doping concentration of less than 4 × 10⁻⁶. 18 / cm 3 Alternatively, the cap layer may be a P-type doped semiconductor material with a doping concentration of less than 5 × 10⁻⁶. 17 / cm 3 .

3. The semiconductor laser chip according to claim 1, characterized in that, The impurity atom concentration in the P-type impurity diffusion region of the cap layer is greater than or equal to 1 × 10⁻⁶. 19 / cm 3 .

4. The semiconductor laser chip according to claim 1, characterized in that, The impurity atoms diffused in the P-type impurity diffusion region of the cap layer are one or more of copper atoms, zinc atoms, and manganese atoms.

5. The semiconductor laser chip according to claim 1, characterized in that, The N-type lower cladding is doped with N-type impurity atoms, with a doping concentration of 1×10⁻⁶. 17 -4×10 18 / cm 3 Semiconductor material; The P-type cladding is a semiconductor material doped with N-type impurity atoms, P-type impurity atoms, or alternating N-type and P-type impurity atoms, or undoped, with a doping concentration of less than or equal to 5 × 10⁻⁶. 17 / cm 3 .

6. The semiconductor laser chip according to claim 1, characterized in that, The width of the P-type impurity diffusion region is the designed width of the current injection region.

7. A method for fabricating a semiconductor laser chip, characterized in that, include: Provide an N-type substrate; An epitaxial layer is formed on the N-type substrate. The epitaxial layer includes a transition layer, an N-type lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, a P-type upper cladding layer, and a cap layer, which are sequentially stacked on the N-type substrate. The N-type lower cladding layer and the P-type upper cladding layer are both multi-layer periodic structures formed by alternating materials with two different refractive indices. The multi-layer periodic structure is a multi-layer periodic superlattice structure or a Bragg reflector periodic structure. The refractive index of at least one material in the N-type lower cladding layer is greater than that of the lower waveguide layer, and the refractive index of at least one material in the P-type upper cladding layer is greater than that of the upper waveguide layer. A P-type impurity diffusion region is generated by diffusing impurity atoms from the cap layer to the P-type upper cladding for current injection; wherein the diffusion depth of the P-type impurity diffusion region in the P-type upper cladding is less than the thickness of the P-type upper cladding, and the diffusion method includes gaseous source impurity diffusion, solid source impurity diffusion, or a combination of impurity ion implantation and high-temperature annealing. P-type ohmic contact electrodes and N-type ohmic contact electrodes are deposited on the cap layer and the N-type substrate, respectively.

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