A power consumption control device, a processor and a power consumption control method

Abstract

A power consumption control device, processor and power consumption control method are used to improve the accuracy of power consumption adjustment. The power consumption control device includes a fixed frequency clock generator and a power consumption regulator. The power consumption regulator is connected to one or more processing units in a system on chip. The fixed frequency clock generator provides a fixed frequency clock signal to the power consumption regulator. The power consumption regulator obtains the power consumption of the one or more processing units in a period of time, and adjusts the current power consumption of the one or more processing units according to the power consumption. Since the historical power consumption can better reflect the real state of the processing unit, the adjustment strategy determined based on the historical power consumption can also be more in line with the current needs of the processing unit, which helps to improve the accuracy of adjusting the power consumption. Moreover, this method can adjust the power consumption of one or more processing units in the processor as needed, so the adjustment granularity is finer and the adjustment method is more flexible.

Description

Technical Field

[0001] This application relates to the field of processor technology, and in particular to a power consumption control device, processor and power consumption control method. Background Technology

[0002] When a processor leaves the factory, its components (such as processing units) are typically defined with certain standard maximum workloads, such as maximum power consumption. The processor's power consumption during operation should generally not exceed its maximum power consumption; otherwise, the processor may experience overcurrent, overvoltage, or overheating, affecting the lifespan of its components. However, the actual power consumption of a processor is determined by the load; generally, the higher the load, the higher the processor's power consumption. In this situation, if the processor's power consumption is not limited, it is very likely that under heavy loads, the processor's power consumption will exceed its limit for extended periods, which is detrimental to the normal operation and maintenance of the various components within the processor.

[0003] However, existing solutions lack research on limiting processor power consumption. For example, in one existing solution, the processor corresponds to a preset load threshold. When the current load of the processor is determined to be greater than the preset load threshold, the processor's power consumption is reduced. Obviously, this method directly adjusts power consumption based on a fixed load threshold, which obviously cannot reflect the processor's true state. Therefore, this method has low accuracy in adjusting power consumption. Summary of the Invention

[0004] This application provides a power consumption control device, processor, and power consumption control method to solve the technical problem of inaccurate power consumption regulation caused by using a fixed load threshold to adjust the power consumption of the processor in the prior art.

[0005] In a first aspect, this application provides a power consumption control device, including a fixed-frequency clock generator and a power consumption regulator. The power consumption regulator is connected to one or more processing units in a system-on-a-chip (SoC). The fixed-frequency clock generator can generate a fixed-frequency clock signal and provide it to the power consumption regulator. Under the operating clock provided by the fixed-frequency clock signal, the power consumption regulator can obtain the power consumption consumed by one or more processing units over a period of time and adjust the current power consumption of one or more processing units according to the power consumption.

[0006] The above design adjusts the current power consumption of the processing unit based on its historical power consumption. Since historical power consumption accurately reflects the true state of the processing unit, the adjustment strategy determined based on historical power consumption is more in line with the current needs of the processing unit, thus improving the accuracy of power consumption adjustment. Furthermore, this approach can adjust one or more processing units on demand, rather than only adjusting the power consumption of the entire processor. Therefore, it allows for more flexible and finer-grained power consumption adjustment. In addition, this scheme designs a separate clock generator for the power regulator, which helps to decouple the power regulator from the processing unit. This ensures that the normal operation of the processing unit is not affected, and that the power consumption of other processing units can continue to be adjusted even if a processing unit fails, resulting in high reliability of the power control device.

[0007] In an alternative design, when one or more processing units comprise at least two processing units, the one or more processing units can be located in the same voltage domain, and different processing units within the one or more processing units can use different operating clocks. This design allows for unified adjustment of at least two processing units with the same voltage but different frequencies, which not only helps improve the flexibility of power consumption adjustment but also saves processing resources.

[0008] In an alternative design, the power regulator can first determine the value of one or more processing units under a preset current index based on the power consumption of one or more processing units over a period of time. When the value of one or more processing units under the preset current index meets a first adjustment threshold corresponding to the preset current index, the current power consumption of one or more processing units is adjusted using the adjustment range corresponding to the first adjustment threshold. The first adjustment threshold is one of at least two adjustment thresholds corresponding to the preset current index, and each of the at least two adjustment thresholds corresponds to an adjustment range. In the above design, by setting multiple adjustment thresholds, the power control device can detect each adjustment threshold sequentially in ascending order. Thus, the power control device can gradually reduce power consumption by increasing the adjustment range, rather than directly reducing the power consumption to a very low level, which helps to maintain the processing capacity of the processing units as much as possible.

[0009] In an optional design, the preset current parameters may include peak current parameters and / or current change rate parameters. This design can determine the current power consumption by detecting current-related parameters, thus adjusting power consumption based on current-related parameters can maintain a normal current state as much as possible, avoiding overcurrent or current instability in the processing unit.

[0010] In an optional design, when the preset current index includes a peak current index, if the peak current of one or more processing units within a certain period of time satisfies multiple adjustment thresholds corresponding to the peak current index, then the first adjustment threshold is the maximum adjustment threshold among the satisfied adjustment thresholds. In the above design, the maximum peak current threshold among the currently satisfied peak current thresholds reflects the worst circuit environment of the processing unit. Adjusting the power consumption using the maximum adjustment range corresponding to the maximum peak current threshold can quickly move the processing unit away from the worst circuit environment and promptly exit the overcurrent state of the processing unit.

[0011] In an optional design, when the preset current index includes a current change rate index, if the current change rate of one or more processing units satisfies multiple adjustment thresholds corresponding to the current change rate index over a period of time, then the first adjustment threshold is the adjustment threshold with the largest absolute value among the multiple adjustment thresholds satisfied. In the above design, the largest positive current change rate and the smallest negative current change rate can indicate the most unstable state of the processing unit. By adjusting the power consumption using the adjustment amplitude corresponding to the most unstable state, the processing unit can be stabilized near the current as quickly as possible, and the stable state of the processing unit can be restored in a timely manner.

[0012] In an optional design, the power control device further includes a storage unit connected to a power regulator. The storage unit can store the power consumption of one or more processing units in each cycle according to a preset period. Correspondingly, the power regulator can also obtain the power consumption of one or more processing units in any cycle from the storage unit and use it as the power consumption of one or more processing units over a period of time. This design obtains the power consumption of each processing unit in a periodic manner, which helps to achieve power consumption control of each processing unit over the entire time dimension.

[0013] In an optional design, the storage unit may include K memories, each corresponding to a preset cycle, where K is a positive integer greater than or equal to 2. In this case, any of the K memories can store the power consumption of one or more processing units within each preset cycle. Thus, the power control device can control the power consumption of the processing units from different time dimensions based on the power consumption of the processing units in each preset cycle, thereby further improving the granularity of power control from a time perspective.

[0014] In an optional design, the power control device further includes one or more power calculator groups and one or more power accumulators corresponding to one or more processing units, as well as a power statistics unit. Each power calculator group includes multiple power calculators, which are connected to multiple processor cores in the corresponding processing unit. The power calculator group corresponding to any processing unit is connected to the power accumulator of the corresponding storage unit, and the one or more power accumulators are connected to the power statistics unit. In this case, the power calculator connected to any processor core can acquire the power consumption signals of that processor core in each instantaneous period, calculate the power consumption consumed by that processor core in each instantaneous period based on the power consumption signals, and send it to the connected power accumulator. Each power accumulator can accumulate the power consumption of each processor core in the same instantaneous period sent by the connected power calculators to obtain the power consumption of the corresponding processing unit in each instantaneous period, and send it to the power statistics unit. The power statistics unit can accumulate the power consumption of one or more processing units in each instantaneous period of a cycle sent by one or more power accumulators to obtain the power consumption of one or more processing units in each cycle, and send it to the storage unit. This design, by incorporating a power consumption calculator, a power consumption accumulator, and a power consumption statistician, enables periodic control of the power consumption of any or multiple processing units, thereby improving the flexibility of power consumption control for processing units.

[0015] In one optional design, the power signal corresponding to any processor core includes one or more of the following: toggle signals corresponding to components in the processor core, level signals corresponding to components in the processor core, clock gating signals corresponding to components in the processor core, and register signals corresponding to registers in the processor core. In the above design, the power consumption of the processor core is calculated by statistically analyzing various key signals that are highly correlated with power consumption. This not only allows for a more comprehensive and accurate calculation of the processor core's true power consumption but also ensures that the normal functioning of these key signals within the processor core is not affected, thus helping to maintain the normal operation of the processor core.

[0016] In an alternative design, the power regulator can adjust the power consumption of one or more processing units in various ways, for example:

[0017] In one approach, the power regulator can also be connected to a frequency regulator corresponding to one or more processing units. In this case, when the power regulator needs to reduce the current power consumption of one or more processing units, it can send a frequency reduction command to the frequency regulator corresponding to one or more processing units. This causes the frequency regulator to reduce the operating frequency of one or more processing units or extend the clock cycle by several cycles before resuming the clock operation for the processing units. This design can regulate the power consumption of processing units by adjusting their operating clocks, which helps to regulate the power consumption of one or more processing units without affecting the normal operating clocks of other devices on the SoC or processor.

[0018] Alternatively, the power regulator can be connected to one or more voltage regulators corresponding to processing units, with these voltage regulators residing on the same SoC as the processing units. In this case, when the power regulator needs to reduce the current power consumption of one or more processing units, it can send a buck regulation command to the voltage regulators corresponding to those processing units, causing them to reduce the operating voltage of the processing units. This design allows for power consumption regulation of processing units by adjusting their operating voltage, facilitating power consumption adjustment of one or more processing units without affecting the normal operating voltage of other devices on the SoC or processor.

[0019] In method three, the power regulator can also be connected to one or more frequency regulators and voltage regulators corresponding to processing units. In this case, when the power regulator needs to reduce the current power consumption of one or more processing units, it can send a frequency reduction command to the frequency regulators corresponding to the processing units and a voltage reduction command to the voltage regulators corresponding to the processing units. This causes the frequency regulators to reduce the operating frequency of the processing units or extend the clock cycle by several cycles before resuming the clock supply, and the voltage regulators to reduce the operating voltage of the processing units. This design can quickly adjust the power consumption of the processing units by simultaneously regulating their clock and voltage, allowing them to avoid abnormal power consumption states in a timely manner.

[0020] In an alternative design, the frequency regulator and / or voltage regulator corresponding to one or more processing units resides on the same SoC as one or more processing units. In this design, the power control device does not need to perform off-chip adjustment across the SoC, but can directly perform power adjustment within the SoC. Thus, adjustment commands can be transmitted to the corresponding frequency regulator and / or voltage regulator more quickly, which helps to improve the speed of power adjustment.

[0021] Secondly, this application provides a processor including a power control device as described in any of the first aspects and one or more processing units, wherein the one or more processing units are deployed on a system-on-a-chip (SoC), and the power control device can be connected to the one or more processing units to adjust the current power consumption of the one or more processing units according to the power consumption consumed by the one or more processing units over a period of time.

[0022] Thirdly, this application provides a power consumption control method applicable to a power consumption control device. The power consumption control device uses a fixed-frequency clock signal as its operating clock and can be connected to one or more processing units in a System-on-a-Chip (SoC). The method includes: the power consumption control device acquiring the power consumption consumed by one or more processing units over a period of time, and adjusting the current power consumption of the one or more processing units based on the power consumption.

[0023] In an alternative design, when one or more processing units include at least two processing units, the one or more processing units are located in the same voltage domain, and different processing units in the one or more processing units use different operating clocks.

[0024] In an optional design, the power consumption control device can further determine the value of one or more processing units under a preset current index based on the power consumption consumed by one or more processing units over a period of time. When the value of one or more processing units under the preset current index meets a first adjustment threshold corresponding to the preset current index, the current power consumption of one or more processing units is adjusted using the adjustment range corresponding to the first adjustment threshold. The first adjustment threshold is one of at least two adjustment thresholds corresponding to the preset current index, and each of the at least two adjustment thresholds corresponds to an adjustment range.

[0025] In an optional design, the preset current parameters may include peak current and / or current change rate.

[0026] In an optional design, when the preset current index includes the peak current index, if the power consumption control device determines that the peak current of one or more processing units meets multiple adjustment thresholds corresponding to the peak current index within a certain period of time, then the largest adjustment threshold among the multiple adjustment thresholds met is taken as the first adjustment threshold.

[0027] In an optional design, when the power consumption control device has preset current indicators including current change rate indicators, if it determines that the current change rate of one or more processing units meets multiple adjustment thresholds corresponding to the current change rate indicators over a period of time, then the adjustment threshold with the largest absolute value among the multiple adjustment thresholds is taken as the first adjustment threshold.

[0028] In an optional design, the power consumption control device may also store the power consumption consumed by one or more processing units in each cycle according to a preset period, and obtain the power consumption consumed by one or more processing units in any cycle, and use it as the power consumption consumed by one or more processing units over a period of time.

[0029] In an optional design, the power consumption control device may further store the power consumption of one or more processing units in each of the K preset cycles, and then, for each preset cycle, obtain the power consumption of one or more processing units in any cycle corresponding to the preset cycle, and use it as the power consumption of one or more processing units over a period of time. Here, K is a positive integer greater than or equal to 2.

[0030] In an alternative design, the power consumption control device may also acquire power consumption signals of each processor core in each instantaneous period for any of the one or more processing units, calculate the power consumption consumed by the processor core in each instantaneous period based on the power consumption signals, sum the power consumption consumed by each processor core in the same instantaneous period to obtain the power consumption consumed by the processing unit in each instantaneous period, and then sum the power consumption consumed by the one or more processing units in each instantaneous period of a cycle to obtain the power consumption consumed by the one or more processing units in each cycle.

[0031] In one alternative design, the power signal corresponding to any processor core includes one or more of the following: a toggle signal corresponding to a component in the processor core, a level signal corresponding to a component in the processor core, a clock gating signal corresponding to a component in the processor core, and a register signal corresponding to a register in the processor core.

[0032] In an alternative design, the power control device may also send a frequency reduction command to the frequency regulators corresponding to one or more processing units when it is necessary to reduce the current power consumption of one or more processing units, so that the frequency regulators corresponding to one or more processing units reduce the operating frequency of one or more processing units or extend the operating clock to one or more processing units after several cycles.

[0033] In an alternative design, the power control device may also send a buck regulation command to the voltage regulators corresponding to one or more processing units when it is necessary to reduce the current power consumption of one or more processing units, so that the voltage regulators corresponding to one or more processing units reduce the operating voltage of one or more processing units.

[0034] In an alternative design, the power consumption control device may also send a frequency reduction command to the frequency regulator corresponding to one or more processing units and a voltage reduction command to the voltage regulator corresponding to one or more processing units when it is necessary to reduce the current power consumption of one or more processing units. This causes the frequency regulator corresponding to one or more processing units to reduce the operating frequency of one or more processing units or extend the clock supply to one or more processing units for several cycles, and causes the voltage regulator corresponding to one or more processing units to reduce the operating voltage of one or more processing units.

[0035] For the beneficial effects of each design in the second to third aspects mentioned above, please refer to the beneficial effects of each design in the first aspect mentioned above; they will not be elaborated here. Attached Figure Description

[0036] Figure 1 An exemplary schematic diagram of an electronic device is shown;

[0037] Figure 2 An exemplary schematic diagram of a system architecture applicable to an embodiment of this application is shown;

[0038] Figure 3 This illustration shows a detailed flowchart of a power consumption regulation method provided in an embodiment of this application.

[0039] Figure 4 A schematic diagram of a peak current regulating meter provided in an embodiment of this application is shown as an example;

[0040] Figure 5 A schematic diagram of a current change rate adjustment table provided in an embodiment of this application is shown as an example;

[0041] Figure 6 An exemplary schematic diagram of a power consumption control device provided in an embodiment of this application is shown;

[0042] Figure 7 An exemplary schematic diagram of another power consumption control device provided in an embodiment of this application is shown. Detailed Implementation

[0043] The power consumption control device disclosed in this application can be applied to electronic devices with processing functions. In some embodiments of this application, the power consumption control device can be an electronic device or a separate unit. When the power consumption control device is a separate unit, the unit can be embedded in the electronic device and can control the power consumption of one or more processing units of the electronic device to avoid overcurrent or other phenomena in the processing units. In other embodiments of this application, the power consumption control device can also be a unit packaged inside an electronic device to implement the power consumption control function of the electronic device. The electronic device can be a portable electronic device including functions such as a personal digital assistant and / or a music player, such as a mobile phone, tablet computer, wearable device with wireless communication function (such as a smartwatch), or in-vehicle device. Exemplary embodiments of portable electronic devices include, but are not limited to, devices equipped with... Alternatively, it can be a portable electronic device with another operating system. The aforementioned portable electronic device can also be a laptop computer, such as one with a touch-sensitive surface (e.g., a touch panel). It should also be understood that, in some other embodiments of this application, the aforementioned electronic device can also be a desktop computer with a touch-sensitive surface (e.g., a touch panel).

[0044] Figure 1 An exemplary schematic diagram of an electronic device is shown. It should be understood that the illustrated electronic device 100 is merely an example, and the electronic device 100 may have more or fewer components than shown in the figure, may combine two or more components, or may have different component configurations. The various components shown in the figure may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application-specific integrated circuits.

[0045] like Figure 1As shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, and a bone conduction sensor 180M, etc. The following is a combination of... Figure 1 A detailed description of each component of the electronic device 100 is provided.

[0046] Processor 110 may include one or more chips, such as a system-on-a-chip (SoC) or a chipset consisting of multiple chips. Processor 110 may include at least one processing unit (or at least one processing subsystem), which may include, for example, a central processing unit (CPU) and a graphics processing unit (GPU), and may also include an application processor (AP), a modem processor, an image signal processor (ISP), a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU), etc. Different processing units may be distributed across different chips or integrated onto a single chip. Each processing unit may include only one processor core or multiple processor cores simultaneously.

[0047] The CPU can be the nerve center and command center of the electronic device 100. The CPU can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. The executed instructions include, but are not limited to, operating system program instructions or application software program instructions. The GPU can be the visual center of the electronic device 100. The electronic device 100 implements display functions through the GPU, display screen 194, and application processing unit (AP). The GPU connects to the display screen 194 and the AP, and is used to generate graphics control signals based on instruction opcodes and timing signals to complete graphics or image-related computations. The processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0048] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can directly retrieve it from this memory, thereby avoiding repeated accesses, reducing the processor 110's waiting time, and improving processing efficiency.

[0049] In some embodiments, the processor 110 may include one or more interfaces. For example, the interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc. It is understood that the interface connection relationships between the modules illustrated in the embodiments of this application are merely illustrative and do not constitute a structural limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.

[0050] A power management unit (PMU) 141 connects the battery 142, the charging management module 140, and the processor 110. The charging management module 140 receives charging input from the charger. The PMU 141 receives input from the battery 142 and / or the charging management module 140 to power the processor 110, internal memory 121, display screen 194, camera 193, and wireless communication module 160. The PMU 141 can also monitor parameters such as battery capacity, battery cycle count, and battery health status (e.g., leakage current or impedance). In some other embodiments, the PMU 141 may be located within the processor 110. In other embodiments, the PMU 141 and the charging management module 140 may be located in the same device.

[0051] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, music, video, and other files can be saved on the external memory card.

[0052] Internal memory 121 can be used to store computer executable program code, which includes instructions. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store applications required for at least one function of the operating system, such as applications for sound playback and image playback. The data storage area may store data created during the use of electronic device 100, such as audio data and phonebooks. Furthermore, internal memory 121 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or universal flash storage (UFS). Processor 110 executes various functional applications and data processing of electronic device 100 by running instructions stored in internal memory 121 and / or instructions stored in memory disposed in the processor.

[0053] although Figure 1 As not shown in the diagram, the electronic device 100 may also include a Bluetooth device, a positioning device, a flash, a miniature projection device, or a near field communication (NFC) device, etc., which will not be described in detail here.

[0054] The present application will now be described in further detail with reference to the accompanying drawings. It should be noted that in the description of this application, "at least one" refers to one or more, where "multiple" refers to two or more. Therefore, in the embodiments of the present invention, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0055] Furthermore, it should be understood that in the description of this application, terms such as "first" and "second" are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance or order. For example, "first clock generator" or "first clock generator" merely exemplarily points out different clock generators and does not imply a difference in the importance or priority of the two clock generators.

[0056] Figure 2 This illustration shows a schematic diagram of a system architecture applicable to an embodiment of this application. Figure 2 As shown, the system architecture may include at least one processing unit, such as processing unit 1, processing unit 2, ..., processing unit N, where N is a positive integer. Each of the at least one processing unit can be any processing unit described above, such as a CPU, GPU, NPU, AP, ISP, DSP, modem processor, video codec, or baseband processor, etc. The at least one processing unit can be as follows: Figure 2 The design can be integrated onto a single chip (i.e., a System-on-a-Chip), deployed on different chips, or distributed across multiple chips in any combination. Furthermore, although... Figure 2 Not shown, but at least one processing unit can also communicate via interconnect or bus.

[0057] In this embodiment, each processing unit may include multiple components. Processing unit 1 will be used as an example for illustrative purposes: [Continuing to refer to...] Figure 2As shown, processing unit 1 may include at least one processor core, such as processor core 10, processor core 11, and processor core 1M, where M is a positive integer. Processing unit 1 can be homogeneous, meaning processor cores 10 to 1M have the same structure and function, and can complete the same processing task according to the same processing logic. Alternatively, processing unit 1 can be heterogeneous, meaning processor cores 10 to 1M have different structures and functions, each responsible for different parts of the same processing task, or each responsible for different processing tasks. Furthermore, processing unit 1 may also include non-core components, such as general-purpose units (including counters, decoders, and signal generators), accelerator units, input / output control units, interface units, internal memory, and external buffers. The processor cores and non-core components can be connected via a bus to enable data transfer between any two components.

[0058] like Figure 2 As shown, the system architecture may also include a power supply and at least one voltage regulator, such as voltage regulator 1, voltage regulator 2, ..., voltage regulator K, where K is a positive integer. The power supply can be coupled to each processing unit through at least one voltage regulator. For example, the power supply can be coupled to a single processing unit through a voltage regulator (e.g., coupled to processing unit N through voltage regulator K), in which case the processing unit itself resides in a separate voltage domain. Alternatively, the power supply can also be coupled to two or more processing units through a voltage regulator (e.g., coupled to processing unit 1 and processing unit 2 through voltage regulator 1), in which case at least two processing units are in the same voltage domain, and at least two processing units operate at the same voltage. The voltage regulator can be any device capable of voltage regulation, such as a Buck circuit, a switched capacitor (SC) circuit, or a low dropout regulator (LDO).

[0059] like Figure 2As shown, the system architecture may also include a first clock generator and at least one frequency regulator, such as frequency regulator 1, frequency regulator 2, ..., frequency regulator L, where L is a positive integer. The first clock generator is used to generate a first clock signal, which has a preset frequency, such as 38.4MHz. The first clock generator can be coupled to each processing unit through at least one frequency regulator. For example, the first clock generator can be coupled to a processing unit through a frequency regulator (e.g., coupled to processing unit N through frequency regulator 1, coupled to processing unit 2 through frequency regulator 2, coupled to processing unit 1 through frequency regulator L). In this case, the processing unit itself can correspond to a clock frequency. Alternatively, the first clock generator can also be coupled to two or more processing units through a frequency regulator. In this case, at least two processing units can correspond to the same clock frequency. The frequency regulator can refer to any device capable of frequency adjustment, such as a clock gating circuit, a clock extension circuit, a frequency divider, or a frequency multiplier. It should be understood that "N processing units are provided with the same first clock generator" is only one optional implementation. In other optional implementations, the N processing units may be provided with the same clock generator, or some of the N processing units may be provided with the same clock generator, while other processing units may be provided with their own different clock generators, etc., and there is no specific limitation.

[0060] For example, the voltage regulator and frequency regulator corresponding to a processing unit can also be deployed on the chip where the processing unit resides. In this case, the voltage regulator corresponding to the processing unit can also be called an on-chip voltage regulator, such as an on-chip Buck circuit, an on-chip SC circuit, or an on-chip low dropout regulator on-a-chip (OCLDO). The frequency regulator corresponding to the processing unit can also be called an on-chip frequency regulator, such as an on-chip clock extension circuit, an on-chip frequency divider, or an on-chip frequency multiplier.

[0061] Continue to refer to Figure 2 As shown in the embodiments of this application, a power consumption control device can also be provided in the system architecture. The power consumption control device can be as follows: Figure 2The illustrated deployment is on the SoC within the processor, but it can also be deployed outside the SoC, such as as a separate component within the processor. The power control device can include a second clock generator and a power regulator. The clock output of the second clock generator can be connected to the clock control terminal of the power regulator. The second clock generator, also known as a fixed-frequency clock generator, is used to generate a fixed-frequency clock signal and provide it to the power regulator. The input terminals of the power regulator can be connected to one or more processing units in at least one processing unit. Under the operating clock of the fixed-frequency clock signal, it obtains the power consumption of one or more processing units over a period of time, and adjusts the current power consumption of one or more processing units based on this power consumption to prevent overcurrent and other phenomena in one or more processing units, thereby protecting the processing units.

[0062] In one alternative implementation, adjusting the power consumption of a processing unit can be achieved by adjusting the operating voltage and / or operating clock of the processing unit. In this case, refer to... Figure 2 As shown, the output of the power regulator can also be connected to each voltage regulator and each frequency regulator in the system architecture. When it is necessary to adjust the power consumption of one or more processing units, the power regulator can send adjustment commands to the voltage regulator and / or frequency regulator corresponding to each of the one or more processing units. For example, when it is necessary to reduce power consumption: send a buck adjustment command to the corresponding voltage regulator, and / or send a frequency reduction adjustment command to the corresponding frequency regulator. Similarly, when it is necessary to increase power consumption: send a boost adjustment command to the corresponding voltage regulator, and / or send a frequency increase adjustment command to the corresponding frequency regulator. In this embodiment, when the voltage regulator and frequency regulator corresponding to a processing unit are located in the same SoC as the processing unit, there is no need for off-chip adjustment across the SoC; adjustment can be performed directly within the SoC. This allows the adjustment commands to be transmitted to the corresponding voltage regulator and frequency regulator more quickly, which helps to improve the speed of power consumption adjustment. Furthermore, the voltage regulator and frequency regulator corresponding to a processing unit are local regulators for that processing unit. Adjusting the power consumption of the processing unit through the local regulator will not affect the normal operation of the SoC or other components on the processor. Furthermore, the operating voltage and clock speed of each processing unit are generally controlled by a power management module (such as...). Figure 1 The power management module shown is provided in this embodiment. By adjusting the operating voltage and clock of the processing unit in a timely manner, it also helps to ensure that the operating voltage or clock does not exceed the threshold of the power management module, thereby achieving the purpose of protecting both the processing unit and the power management module.

[0063] In the embodiments of this application, one or more processing units may have various configurations, such as:

[0064] Scenario 1: One or more processing units refers to each processing unit. In this case, the power regulator can promptly reduce the current power consumption of any processing unit when its power consumption is too high. This helps to ensure that no processing unit experiences overcurrent or other issues.

[0065] Scenario 2: One or more processing units refer to processing units located in the same voltage domain. In this case, since each processing unit in the same voltage domain corresponds to the same voltage regulator, the power consumption regulator can achieve unified regulation of these processing units by adjusting a single voltage regulator.

[0066] Scenario 3: One or more processing units refer to processing units that operate using the same clock frequency. In this case, since each processing unit operating at the same clock frequency corresponds to the same frequency regulator, the power regulator can achieve unified regulation of these processing units by adjusting a single frequency regulator;

[0067] Scenario 4: One or more processing units refer to all processing units deployed on the SoC. In this case, the power regulator can uniformly adjust the power consumption of each processing unit on the SoC when the overall power consumption of the SoC is too high, realizing SoC-level power monitoring and power regulation;

[0068] Scenario 5: Multiple processing units pre-configured via software, or multiple processing units combined according to certain rules. In this case, the power regulator also supports configuring the processing units to be adjusted according to actual needs, which helps improve the user experience.

[0069] It should be noted that the above-described "providing a working clock for the power regulator by setting a fixed-frequency clock generator" is only one optional implementation. In other optional implementations, the power control device may not include a fixed-frequency clock generator, but instead include a new frequency regulator (such as frequency regulator L+1). The input of this frequency regulator is connected to the first clock generator, and the output of this frequency regulator is connected to the clock control terminal of the power regulator. This frequency regulator can receive a first clock signal output by the first clock generator, and then adjust the frequency of the first clock signal to obtain the fixed-frequency clock signal, which is then provided to the power regulator. This implementation eliminates the need to set up a separate clock generator for the power regulator, and can directly utilize the existing clock generator to generate the dedicated fixed-frequency clock signal corresponding to the power regulator. Therefore, it can achieve normal operation of the power regulator at a lower cost.

[0070] The specific implementation process of the power consumption control scheme in this application will be described below through specific embodiments.

[0071] Example 1

[0072] Figure 3 This application provides an exemplary embodiment of a power consumption regulation method, which is applicable to power consumption regulators, such as... Figure 2 The power consumption regulator shown is illustrated. In this embodiment, the power consumption regulator can execute a power consumption regulation method in a periodic manner. Figure 3 An example is given of a power regulation process of a power regulator, such as... Figure 3 As shown, the method includes:

[0073] Step 301: The power regulator obtains the power consumption of one or more processing units over a period of time.

[0074] In step 301 above, when the power regulator executes the power regulation method in a periodic manner, a period of time can refer to a period of time. For each processing unit in one or more processing units, the power regulator can obtain the power consumption of that processing unit within a period of time in various ways. Several possible methods are illustrated below:

[0075] In one possible acquisition method, the power control device maintains the power consumption of the processing unit in each instantaneous period (the time interval between instantaneous periods is very short). At the end of each period, the power regulator can obtain the power consumption of the processing unit in each instantaneous period of the period from the power control device, and accumulate the power consumption in each instantaneous period to obtain the total power consumption of the processing unit in the period.

[0076] In another possible method of obtaining the power consumption value, the power control device maintains the power consumption value of the processing unit at each moment. The power consumption value of the processing unit at each moment refers to the total power consumption consumed by the processing unit from the start of operation to that moment. Thus, at the end of each cycle period, the power regulator can obtain the power consumption value of the processing unit at the end of that cycle period and the power consumption value at the end of the previous cycle period from the power control device. The difference between the two values ​​gives the total power consumption consumed by the processing unit during that cycle period.

[0077] In another possible acquisition method, the power control device maintains the power consumption value of the processing unit at the current moment of each cycle. At the beginning of a cycle, the power control device can record the power consumption value of the processing unit at the current moment of that cycle as 0. Then, it acquires the power consumption consumed by the processing unit in each instantaneous moment and adds this power consumption to the power consumption value at the current moment to update the power consumption value in real time. Thus, at the end of the cycle, the power regulator can obtain the power consumption value of the processing unit at the current moment from the power control device; this power consumption value is the total power consumption consumed by the processing unit during that cycle.

[0078] How the power consumption control device maintains the power consumption of the processing unit will be specifically described in Embodiment 2, and will not be explained here.

[0079] Step 302: The power regulator calculates the value of one or more processing units under a preset current index based on the power consumption of one or more processing units over a period of time.

[0080] In step 302 above, the preset current index may include a peak current index and / or a current change rate index. Taking a processing unit as an example:

[0081] When the preset current specification includes a peak current specification, the power regulator can calculate the peak current of the processing unit within a given time period based on the power consumption and voltage of the processing unit during that period. For example, when the time interval is short, the power regulator can directly use the ratio of the power consumption to the voltage of the processing unit during that period as the peak current. When the time interval is long, the power regulator can first divide the time period into multiple short-duration periods, then calculate the instantaneous current of the processing unit in each instantaneous period using the power consumption and voltage of the processing unit in each instantaneous period. Finally, the maximum instantaneous current among the multiple instantaneous currents corresponding to the multiple instantaneous periods is taken as the peak current of the processing unit within that period. To accurately determine the instantaneous current of the processing unit, the time interval can be set to 0.5ms. This allows the power regulator to calculate the peak current at very small intervals, facilitating real-time power consumption adjustment based on the peak current.

[0082] When the preset current index includes the current change rate index, the power regulator can also obtain the power consumption of the processing unit in the most recent historical period before a certain period. Then, it first calculates the average current of the processing unit in the period based on the power consumption and voltage of the processing unit in the period. Then, it calculates the historical average current of the processing unit in the most recent historical period based on the power consumption and voltage of the processing unit in the most recent historical period. Then, it calculates the current difference between the average current of the processing unit in the period and the average current of the processing unit in the most recent historical period. Based on the current difference and the time interval between the period and the most recent historical period, it calculates the current change rate. It should be noted that calculating the current change rate in this way is only one optional implementation method. In other optional implementation methods, the power regulator can first calculate the power consumption of the processing unit during the current period and the power consumption of the processing unit during the most recent historical period, then calculate the voltage of the processing unit during the current period and the voltage difference of the processing unit during the most recent historical period, and then calculate the current difference based on the power consumption difference and the voltage difference. Finally, the current change rate is calculated based on the current difference and the time interval between the current period and the most recent historical period. There are many optional implementation methods, which will not be elaborated here.

[0083] In this embodiment, when the preset current index includes both a peak current index and a current change rate index, the peak current index and the current change rate index can correspond to the same period duration or different period durations. When they correspond to different period durations, the power regulator can perform power monitoring based on the peak current according to the period duration corresponding to the peak current index, and perform power monitoring based on the current change rate according to the period duration corresponding to the current change rate index. Then, it uses the worst-case power consumption scenario obtained from these two power monitoring methods to perform power control, so as to prevent overcurrent as much as possible.

[0084] It should be noted that the above content only illustrates the example of a power regulator monitoring the preset current index of a single processing unit. When the power regulator simultaneously monitors the preset current index (such as peak current index) of multiple processing units, the processing unit mentioned above can be directly replaced with multiple processing units for calculation. For example, the average power consumption can be calculated first based on the total power consumption of multiple processing units over a period of time and the number of processing units. Then, the average voltage of multiple processing units over that period of time can be calculated based on the multiple voltages of multiple processing units over that period of time and the number of processing units. Finally, the average current can be calculated based on the average power consumption and average voltage, which serves as the peak current of multiple processing units over that period of time. Alternatively, the peak current of each processing unit over a period of time can be calculated first in the above manner, and then the average of the multiple peak currents of multiple processing units over that period of time can be used as the peak current of multiple processing units over that period of time. There are many possible implementation methods, which will not be elaborated here.

[0085] Step 303: The power regulator determines whether the value of one or more processing units under the preset current index meets the power regulation condition corresponding to the preset current index. If it meets the condition, then proceed to step 304; otherwise, proceed to step 301.

[0086] In step 303 above, when the preset current index includes a peak current index, under the condition that the operating voltage remains constant, the larger the peak current of the processing unit, the greater the power consumption of the processing unit; under the condition that the operating clock remains constant, the larger the peak current of the processing unit, the higher the workload of the processing unit per unit time, and the more heat the processing unit generates. Both of these situations may cause overcurrent or overheating in the processing unit, which may adversely affect the processing unit and even other components on the SOC. Based on this, in order to avoid excessive peak current as much as possible, in an optional embodiment, the power consumption adjustment condition corresponding to the peak current can be set to: the peak current is greater than the peak current threshold. The peak current threshold can be determined experimentally or set by those skilled in the art based on experience. For example, the peak current threshold can be set to the rated maximum operating current or a value slightly greater than the rated maximum operating current, and there is no specific limitation.

[0087] In step 303 above, when the preset current index includes a current change rate index, under constant operating voltage, the larger the absolute value of the current change rate of the processing unit, the greater the power consumption variation of the processing unit; under constant operating clock, the larger the absolute value of the current change rate of the processing unit, the greater the work done by the processing unit per unit time, resulting in the processing unit experiencing alternating periods of cooling and heating. Both of these situations will cause the processing unit to be in an unstable state, not only preventing the processing unit from working stably but also potentially affecting the stability of other related components on the SOC. Therefore, to minimize current instability, in an optional implementation, the power consumption adjustment condition corresponding to the current change rate can be set as follows: the absolute value of the current change rate is greater than a current change rate threshold. The current change rate threshold can include a first current change rate threshold and a second current change rate threshold. The first current change rate threshold corresponds to the current increase (i.e., the first current change rate threshold is positive), and the second current change rate threshold corresponds to the current decrease (i.e., the second current change rate threshold is negative). In this case, the absolute value of the current change rate is greater than the current change rate threshold, which can include: the current change rate being greater than a first current change rate, or the current change rate being less than a second current change rate. The first and second current change rate thresholds can be determined experimentally or set by those skilled in the art based on experience; no specific limitation is imposed.

[0088] Step 304: The power consumption regulator sends a frequency regulation command to the frequency regulator corresponding to one or more processing units, and sends a voltage regulation command to the voltage regulator corresponding to one or more processing units.

[0089] In one optional implementation, when the peak current exceeds a peak current threshold, it indicates that the current of one or more processing units is too high. To prevent overcurrent or overheating in one or more processing units, it is necessary to reduce the current power consumption of one or more processing units. When the rate of change of current exceeds a first rate of change of current threshold, it indicates that the current of one or more processing units is rising too rapidly. To prevent instability in one or more processing units, it is also necessary to reduce the current power consumption of one or more processing units. When reducing the current power consumption of one or more processing units, the power regulator can generate a frequency reduction command and send it to the frequency controller corresponding to each of the one or more processing units. After receiving the frequency reduction command, the frequency regulator corresponding to any processing unit can reduce the frequency of the operating clock corresponding to that processing unit, or provide the operating clock to the processing unit after several cycles, thereby reducing the power consumption of the processing unit by adjusting the operating clock of the processing unit. Considering that the processing unit may be in a high voltage and low frequency state after frequency reduction, resulting in low power utilization of the processing unit, the power regulator can also send a step-down regulation command to the voltage regulator corresponding to the processing unit at the same time as frequency reduction to reduce the operating voltage of the processing unit. This method can keep the processing unit in a low voltage and low frequency state as much as possible, which helps to improve the power utilization of the processing unit.

[0090] In one optional implementation, when the rate of change of current is less than a second rate of change of current threshold, it indicates that the current of one or more processing units is decreasing too rapidly. To avoid instability in the state of one or more processing units, it is necessary to increase the current power consumption of one or more processing units. When the peak current of a processing unit is too low, the power consumption of the processing unit is low, and there may still be a large amount of unused power margin in the processing unit, resulting in low processing efficiency. In this case, to improve the processing efficiency of the processing unit, the current power consumption of one or more processing units can also be increased. When increasing the current power consumption of one or more processing units, the power regulator can send a frequency increase command to the frequency regulator corresponding to these processing units. After receiving the frequency increase command, the frequency regulator corresponding to any processing unit can increase the frequency of the operating clock corresponding to that processing unit, or provide the operating clock to the processing unit in advance before the original cycle time arrives. At the same time, the high-frequency state of the processing unit requires high voltage to drive it, so the power regulator can also send a boost control command to the voltage regulator corresponding to the processing unit to increase the operating voltage of the processing unit, so as to smoothly increase the operating clock of the processing unit.

[0091] In an optional embodiment of steps 303 and 304 above, the preset current index can correspond to multiple adjustment thresholds, such as four or more. Each adjustment threshold corresponds to a multiple adjustment range, which may include one or more of the following: a clock frequency reduction factor corresponding to the operating clock, the number of clock cycles to wait for, a voltage reduction factor corresponding to the operating voltage, a clock frequency increase factor corresponding to the operating clock, a clock frequency advance factor, and a voltage increase factor corresponding to the operating voltage, and supports software updates. In this case, after calculating the value of one or more processing units under the preset current index, the power regulator can compare this value with each of the multiple adjustment thresholds to find candidate adjustment thresholds whose absolute value is less than the target value. Then, the power regulator can use the candidate adjustment threshold with the largest absolute value among the candidate adjustment thresholds as the target adjustment threshold, and use the adjustment range corresponding to the target adjustment threshold to adjust the operating clock and / or operating voltage of one or more processing units. There are several ways to update the adjustment threshold and adjustment range in software. For example, the power regulator can be wirelessly connected to an external device so that the power regulator can receive and update the target adjustment threshold and target adjustment range wirelessly. Alternatively, a preset update interface can be opened on the power regulator, and when an update is needed, the preset update interface can be connected to an external device via a peripheral bus so that the power regulator can receive and update the target adjustment threshold and target adjustment range via a wired connection.

[0092] The following examples illustrate this from the perspectives of monitoring peak current and monitoring rate of change of current.

[0093] Peak current

[0094] Figure 4 An exemplary diagram illustrates a peak current regulation meter provided in an embodiment of this application, such as... Figure 4 As shown, with the increase of the peak current threshold, the corresponding adjustment range also gradually increases. For example, when the peak current is no greater than 2.5A, the power regulator can effectively reduce power consumption by adjusting only the operating clock. However, when the peak current is greater than 2.5A, the power regulator cannot reduce power consumption in a timely manner by adjusting only the operating clock; therefore, the power regulator also needs to adjust both the operating clock and the operating voltage simultaneously. Figure 4 The A in this context refers to the unit of electric current, namely the ampere.

[0095] based on Figure 4 Peak current adjustment meter as shown and Figure 2 The illustrated system architecture assumes that the power regulator calculates the peak current of processing unit N in one cycle to be 1.7A. The power regulator can then compare this peak current of 1.7A with... Figure 4The four peak current thresholds shown are compared. Since the peak current of 1.7A is only greater than the peak current threshold of 1.5A, the peak current of 1.7A triggers the adjustment range corresponding to the peak current threshold of 1.5A. In this case, the power regulator can immediately adjust the operating clock of the processing unit N according to the adjustment range corresponding to the peak current threshold of 1.5A, that is, control the frequency regulator 1 to reduce the operating clock frequency of the processing unit N to half of the current operating clock frequency.

[0096] Theoretically, after performing frequency and voltage reduction operations, if the other circuit environments in processing unit N remain unchanged, the peak current of processing unit N will also decrease. When the peak current drops below the peak current threshold of 1.5A, the power regulator can end the frequency reduction operation. However, considering that if the frequency reduction is ended directly when the peak current just drops below the peak current threshold of 1.5A, it is very likely that the peak current of the processing unit will return to above the peak current threshold of 1.5A in the next moment, or fluctuate around the peak current threshold of 1.5A, causing the power regulator to re-execute the frequency reduction operation, wasting network and computing resources. To avoid this situation, when the peak current just drops below the peak current threshold of 1.5A, the power regulator can not end the frequency reduction operation directly, but continue to reduce the frequency for a period of time and observe whether the peak current returns to above the peak current threshold of 1.5A. If this phenomenon does not occur within a period of time, the power regulator can end the frequency reduction operation. Alternatively, another threshold can be set in the power regulator, slightly smaller than the minimum peak current threshold of 1.5A, such as 1.4A. When the peak current drops below the 1.5A threshold, the power regulator can use the 1.4A threshold to compare the peak current with the 1.4A threshold. As long as the peak current does not drop below 1.4A, the power regulator can continue to reduce the frequency until the peak current drops below 1.4A, at which point the power regulator will stop reducing the frequency. This implementation avoids the power regulator repeatedly performing frequency reduction by delaying the exit, which helps save computing and network resources.

[0097] It should be noted that the above description only uses the minimum peak current threshold as an example to illustrate this delayed exit scheme. It should be understood that this delayed exit scheme can also be applied to any other peak current threshold. For any other peak current threshold, exiting frequency reduction (and / or voltage reduction) means exiting the adjustment range corresponding to the current peak current threshold and switching to the adjustment range corresponding to a lower-level peak current threshold. In this case, if the delayed exit is achieved by setting an alternative threshold, the alternative threshold can be a value slightly smaller than the current peak current threshold and larger than the lower-level peak current threshold.

[0098] In special cases, after frequency reduction, if the peak current of processing unit N continues to rise due to certain reasons, the peak current of the processing unit in subsequent cycles may exceed other peak current thresholds. However, since peak current is a continuous variable, and its increase is continuous rather than abrupt, as long as the cycle length is set sufficiently short, the peak current detected by the power regulator can first pass through the case of a peak current exceeding the 2A threshold and then the case of a peak current exceeding the 2.5A threshold, instead of directly detecting a peak current exceeding the 2.5A or 3A threshold before detecting a peak current exceeding the 2A threshold. Thus, by setting multiple peak current thresholds, the power regulator can detect peak currents exceeding the thresholds in ascending order, allowing it to gradually reduce power consumption by increasing the adjustment range, rather than directly reducing power consumption to a very low level.

[0099] Current change rate

[0100] Figure 5 This illustration shows a schematic diagram of a current change rate adjustment table provided in an embodiment of this application, such as... Figure 5 As shown, the current change rate threshold can include a first current change rate threshold and a second current change rate threshold. The first current change rate threshold corresponds to a positive value, and the second current change rate threshold corresponds to a negative value. As the absolute value of the current change rate threshold increases, the corresponding adjustment range also gradually increases. For example, as the first current change rate threshold increases, the frequency reduction or voltage reduction amplitude corresponding to the first current change rate threshold gradually increases; conversely, as the second current change rate threshold decreases, the frequency increase or voltage increase amplitude corresponding to the second current change rate threshold gradually increases. Figure 5 In this context, mA is the unit of current, or milliampere. Figure 5 In this context, ms is a unit of time, specifically milliseconds.

[0101] based on Figure 5 The current change rate adjustment table shown is as follows: Figure 2 The illustrated system architecture assumes that the power regulator calculates the current change rate of processing unit 1 and processing unit 2 to be 0.12 mA / ms over one cycle. The power regulator can then compare this current change rate of 0.12 mA / ms with... Figure 5The four positive first current change rate thresholds are compared. Since the current change rate of 0.12mA / ms is greater than both the first current change rate thresholds of 0.05mA / ms and 0.1mA / ms, the current change rate of 0.12mA / ms triggers the adjustment range corresponding to the higher first current change rate threshold of 0.1mA / ms. In this case, the power regulator can immediately adjust the operating clock of processing unit 1, the operating clock of processing unit 2, and the operating voltages of processing unit 1 and processing unit 2 according to the adjustment range corresponding to the first current change rate threshold of 0.1mA / ms. That is, the control frequency regulator L waits three cycles before providing the operating clock to processing unit 1, the control frequency regulator 2 waits three cycles before providing the operating clock to processing unit 2, and the control voltage regulator 1 reduces the operating voltages of processing unit 1 and processing unit 2 to half of the current operating voltage.

[0102] Theoretically, after frequency and voltage reduction, if the other circuit environments in processing unit 1 and processing unit 2 remain unchanged, the current change rate of processing unit 1 and processing unit 2 will also decrease. When the current change rate drops to less than the first current change rate threshold of 0.1mA / ms, the current current change rate is only higher than the previous first current change rate threshold of 0.05mA / ms. Therefore, the power consumption regulator can switch to the adjustment range corresponding to the previous first current change rate threshold of 0.05mA / ms (i.e., control the frequency regulator L to reduce the operating clock frequency of processing unit 1 to half of the current operating clock frequency, and control the frequency regulator 2 to reduce the operating clock frequency of processing unit 2 to half of the current operating clock frequency). However, if the power regulator were to switch directly to the adjustment range corresponding to the first current rate of change threshold of 0.05 mA / ms as soon as the current rate of change drops below it, the current rate of change of the processing unit might revert back to above the first current rate of change threshold of 0.1 mA / ms, or fluctuate around it, causing the power regulator to have to switch back to the adjustment range corresponding to the first current rate of change threshold of 0.1 mA / ms, wasting network and computing resources. To avoid this, when the current rate of change drops below the first current rate of change threshold of 0.1 mA / ms, the power regulator can choose not to switch the adjustment range directly, but instead continue to adjust using the existing adjustment range for a period of time, observing whether the current rate of change reverts back to above the first current rate of change threshold of 0.1 mA / ms. If this does not occur within a certain period, the power regulator can then switch to the adjustment range corresponding to the first current rate of change threshold of 0.05 mA / ms. Alternatively, the power regulator can be configured with another threshold, slightly smaller than the first current change rate threshold of 0.1 mA / ms and larger than the first current change rate threshold of 0.05 mA / ms, such as 0.09 mA / ms. When the current change rate drops below the first current change rate threshold of 0.1 mA / ms, the power regulator can use the 0.09 mA / ms threshold to compare with the current change rate. As long as the current change rate does not drop below 0.09 mA / ms, the power regulator will not switch its adjustment range until the current change rate drops below 0.09 mA / ms, at which point the power regulator will switch its adjustment range. This implementation avoids repeated switching of the adjustment range by delaying the exit, which helps save computing and network resources.

[0103] It should be noted that the above explanation only uses a specific current change rate threshold as an example to illustrate this delayed exit scheme. It should be understood that this delayed exit scheme can also be applied to any other first current change rate threshold, such as the minimum first current change rate threshold of 0.05mA / ms. For the minimum first current change rate threshold of 0.05mA / ms, since there is no higher-level current change rate threshold, the switching adjustment amplitude refers to exiting frequency reduction and voltage reduction. If the delayed exit is based on setting another threshold, this additional threshold can be a value slightly smaller than the minimum first current change rate threshold of 0.05mA / ms.

[0104] In special cases, after frequency and voltage reduction operations, if the current change rate of processing unit N continues to increase due to certain special reasons, the current change rate of the processing unit in subsequent cycle periods may still exceed other first current change rate thresholds. However, since the current change rate is a continuous variable, and its increase is continuous rather than abrupt, as long as the cycle length is set sufficiently small, the current change rate subsequently detected by the power regulator can first pass through a situation exceeding the first current change rate threshold by 0.15mA / ms, and then pass through a situation exceeding the first current change rate threshold by 0.2mA / ms, instead of directly detecting a situation exceeding the first current change rate threshold by 0.2mA / ms or 0.25mA / ms before detecting a situation exceeding the first current change rate threshold by 0.15mA / ms. Thus, by setting multiple levels of first current change rate thresholds, the power regulator can detect the first current change rate thresholds that the current change rate exceeds in an order from small to large. Therefore, the power regulator can also gradually reduce power consumption in a manner that increases in adjustment magnitude, rather than directly reducing power consumption to a very small level.

[0105] It should be noted that the scheme of increasing power consumption according to the adjustment range corresponding to the second current change rate threshold of the multi-level system can be implemented with reference to the scheme of reducing power consumption according to the adjustment range corresponding to the first current change rate threshold of the multi-level system, and will not be repeated here.

[0106] In one alternative implementation, when the preset current index includes both a peak current index and a circuit rate of change index, if the adjustment range obtained based on peak current monitoring differs from the adjustment range obtained based on current rate of change monitoring, the power consumption can be adjusted using a larger adjustment range. Since a larger adjustment range better reflects a more severe circuit environment than a smaller adjustment range, this method is essentially equivalent to adjusting the entire circuit environment using the adjustment range corresponding to a more severe circuit environment, thereby helping to prevent the deterioration of the entire circuit environment in advance.

[0107] In the above description, a processing unit located in a voltage domain means that all components within that processing unit operate at the same voltage, and a processing unit having a single operating clock means that all components within that processing unit operate under the same operating clock. In this case, the power consumption control scheme described above actually adjusts the power consumption of one or more processing units at the processing unit level. However, in other alternative embodiments, the components within a processing unit may also operate at different voltages or under different operating clocks. In such cases, the power consumption of one or more components can also be adjusted at the component level, similar to the power consumption control scheme described above. For example, the power consumption of some components within a processing unit that are in the same voltage domain may be adjusted, or the power consumption of some components within a processing unit that operate at the same clock frequency may be adjusted. This application will not elaborate on these aspects further.

[0108] The following example, using Embodiment 2, illustrates a possible structure of a power consumption control device. It should be understood that this application does not limit the power consumption control device to having only this structure; any power consumption control device that can implement the power consumption adjustment method in Embodiment 1 is within the scope of protection of this application.

[0109]

Example 2

[0110] Figure 6 An exemplary schematic diagram of a power consumption control device provided in an embodiment of this application is shown, such as... Figure 6 As shown, the power consumption control device may include a second clock generator, one or more power consumption calculators (such as power consumption calculator group 1 and power consumption calculator group 2), and one or more power consumption accumulators (such as...). 1 and 2) A power consumption synthesizer, storage units (such as memory 1 and memory 2), and a power consumption regulator. One or more sets of power consumption calculators and one or more power consumption accumulators correspond one-to-one with one or more processing units. Each set of power consumption calculators may include multiple power consumption calculators, and each set of multiple power consumption calculators corresponds one-to-one with each processor core in the processing unit to which that set of power consumption calculators belongs. The input terminal of any power consumption calculator is connected to the output terminal of the corresponding processor core. The output terminal of any power consumption calculator is connected to the input terminal of the power consumption accumulator corresponding to the processing unit to which the corresponding processor core belongs. The output terminals of each power consumption accumulator are connected to the input terminal of a power consumption statistician. The output terminal of the power consumption statistician is connected to the input terminal of the storage unit and the control terminal of the power consumption regulator. The output terminal of the storage unit is connected to the input terminal of the control circuit. The output terminal of the control circuit is connected to the frequency regulator (such as frequency regulator L and frequency regulator 2) and voltage regulator (such as voltage regulator 1) corresponding to one or more processing units.

[0111] For ease of understanding, the one or more processing units to be adjusted will be referred to as each target processing unit in the following text.

[0112] according to Figure 6 The power consumption control device shown is used in one alternative implementation of power consumption regulation:

[0113] A power consumption calculator is used to perform power consumption calculations according to a preset instantaneous duration period. Within each instantaneous period, it counts the power consumption signals triggered by the connected processor core. At the end of the instantaneous period, based on the triggering status of any power consumption signal and the power consumption corresponding to that signal, it calculates the power consumption corresponding to that power consumption signal. It then accumulates the power consumption corresponding to each power consumption signal to obtain the power consumption consumed by the connected processor core during that instantaneous period, and sends the power consumption consumed by the connected processor core during that instantaneous period to the connected power consumption accumulator. For example, a power signal refers to a signal that significantly affects the power consumption of the processor core, such as, but not limited to: toggle signals corresponding to components in the processor core, level signals corresponding to components in the processor core, clock gating signals corresponding to components in the processor core, and register signals corresponding to registers in the processor core. Taking toggle signals as an example, a power sensor can also be set in the processor core, which can automatically report to the power consumption calculator when it senses that a toggle signal in the processor core has been triggered. Correspondingly, the power consumption calculator can also be configured with a counter corresponding to the flip signal. Within a given instantaneous period, each time the power consumption calculator receives a report from the power sensor regarding the flip signal, it increments the counter corresponding to the flip signal. When the instantaneous period ends, the power consumption calculator obtains the value of the counter corresponding to the flip signal and uses this value along with the power consumption calculation corresponding to the flip signal triggering a single flip to obtain the power consumption consumed by the flip signal within the instantaneous period. In this way, the power consumption calculator can obtain the power consumption consumed by each power consumption signal in the processor core within the same instantaneous period, and then sum these power consumptions to obtain the total power consumption consumed by the processor core within the instantaneous period. In this example, calculating the processor core's power consumption by statistically analyzing various key signals that are highly correlated with power consumption not only utilizes more comprehensive information to calculate the true power consumption of the processor core as accurately as possible, but also does not affect the normal function of these key signals in the processor core, helping to maintain the normal operation of the processor core.

[0114] Any power accumulator is used to accumulate the power consumption of each processor core in the same processing unit in each instantaneous period sent by each connected power calculator, so as to obtain the power consumption of the processing unit corresponding to the power accumulator in each instantaneous period and send it to the power synthesizer.

[0115] The power consumption synthesizer is used to accumulate the power consumption of each target processing unit in each instantaneous period of a cycle in both the processing unit and time dimensions, to obtain the total power consumption of each target processing unit in a cycle, and send it to the memory, as well as send a trigger command to the power regulator. There are several accumulation methods. For example, the power consumption of each target processing unit in the same instantaneous period can be accumulated at the processing unit level to obtain the power consumption of each target processing unit in that instantaneous period, and then the power consumption of each target processing unit in each instantaneous period of a cycle can be accumulated to obtain the total power consumption of each target processing unit in a cycle. Alternatively, the power consumption of any target processing unit in each instantaneous period of a cycle can be accumulated to obtain the power consumption of any target processing unit in that cycle, and then the power consumption of each target processing unit in a cycle can be accumulated to obtain the total power consumption of each target processing unit in a cycle. It should be noted that the "accumulation" mentioned in this section can refer to direct summation or weighted averaging. When using a weighted average, the weight of each instantaneous period can gradually decrease as the instantaneous period becomes closer to the current time. That is, the closer an instantaneous period is to the current time, the greater its corresponding weight.

[0116] A storage unit is used to store the power consumption of each target processing unit in each cycle. A storage unit can refer to memory or registers, such as a single memory, a memory bank, a single register, a register bank, or a register file. Memory can be volatile or non-volatile, or may include both. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory cells of the methods described herein are intended to include, but are not limited to, these and any other suitable types of memory cells.

[0117] The power consumption regulator, upon receiving a trigger command from the power consumption synthesizer, retrieves the power consumption of each target processing unit in the most recent cycle from the storage unit. Based on this power consumption, it calculates the value of each target processing unit under a preset current index. When this value triggers an adjustment threshold corresponding to the preset current index, it sends a frequency adjustment command to the frequency regulator corresponding to each target processing unit and a voltage adjustment command to the voltage regulator corresponding to each target processing unit, using the adjustment range corresponding to the triggered adjustment threshold, to adjust the power consumption of each target processing unit. For example, continuing to refer to... Figure 6As shown, the power consumption control device may include multiple power consumption regulators: each power consumption regulator may correspond to a preset current index, used to adjust the power consumption of each target processing unit based on the corresponding preset current index; or, each power consumption regulator may correspond to a processing unit, used to adjust the power consumption of the corresponding processing unit based on each preset current index; or, each power consumption regulator may correspond to a preset current index of a processing unit, used to adjust the power consumption of the corresponding processing unit based on the corresponding preset current index.

[0118] In one alternative implementation, referencing Figure 6 As shown, the storage unit may include at least two memories, each corresponding to at least two preset cycles. In this case, the power synthesizer can also perform the aforementioned power synthesis operation according to the preset cycle corresponding to each memory, and send the power consumption of each target processing unit in each preset cycle to the memory corresponding to each preset cycle. Each memory may store the power consumption of each target processing unit in each preset cycle corresponding to that memory. Thus, the power regulator can obtain the power consumption of each target processing unit in each preset cycle from each memory, and perform power adjustment on each target processing unit from different time dimensions based on the power consumption in each preset cycle, so as to further improve the fineness of power adjustment from the time dimension. It should be noted that when there are at least two time dimensions corresponding to different adjustment ranges, the power regulator can use a larger adjustment range to perform power adjustment to cope with more severe circuit environments.

[0119] To facilitate understanding, a specific example is provided below. In this example, assume that the target processing units are processing unit 1 and processing unit 2, the duration of the instantaneous period is 0.03ms, the cycle duration corresponding to memory 1 is 0.5ms, the cycle duration corresponding to memory 2 is 2ms, and the preset current indicators include peak current and current change rate indicators. Then:

[0120] Each power consumption calculator in power consumption calculator group 1 corresponds to a processor core in processing unit 1, and each power consumption calculator in power consumption calculator group 2 corresponds to a processor core in processing unit 2. Each power consumption calculator counts the number of toggle signals, the duration of the applied level signal, the number of clock gating signal triggers, and the register read / write changes for each component in its corresponding processor core every 0.03ms. The power consumption corresponding to the toggle signal is calculated based on the number of toggle signals and the power consumption corresponding to one toggle. The power consumption corresponding to the level signal is calculated based on the duration of the applied level signal and the power consumption corresponding to a unit of applied level signal. The power consumption corresponding to the clock gating signal is calculated based on the number of clock gating signal triggers and the power consumption corresponding to one clock gating signal trigger. The power consumption is calculated based on the power consumption corresponding to the register signal, the change in register read / write, and the unit data volume of register read / write. The power consumption corresponding to the toggle signal, the power consumption corresponding to the level signal, the power consumption corresponding to the clock gating signal, and the power consumption corresponding to the register signal are accumulated to obtain the power consumption consumed by the corresponding processor core within 0.03ms and reported to the corresponding power accumulator. For example, each power calculator in power calculator group 1 sends the accumulated power consumption consumed by a processor core in processing unit 1 to power accumulator 1 every 0.03ms, and each power calculator in power calculator group 2 sends the accumulated power consumption consumed by a processor core in processing unit 2 to power accumulator 2 every 0.03ms.

[0121] Power accumulator 1 accumulates the power consumption within the same 0.03ms time interval sent by each power calculator in power calculator group 1 to obtain the power consumption consumed by processing unit 1 within the 0.03ms time interval and sends it to power synthesizer; power accumulator 2 accumulates the power consumption within the same 0.03ms time interval sent by each power calculator in power calculator group 2 every 0.03ms time interval to obtain the power consumption consumed by processing unit 2 within the 0.03ms time interval and sends it to power synthesizer.

[0122] The power consumption synthesizer accumulates the power consumption sent by power accumulator 1 and power consumption sent by power accumulator 2 every 0.5ms to obtain the power consumption consumed by processing unit 1 and processing unit 2 within 0.5ms and sends it to memory 1, and sends a first trigger command to the power consumption regulator; on the other hand, the power consumption synthesizer accumulates the power consumption sent by power accumulator 1 and power consumption sent by power accumulator 2 every 2ms to obtain the power consumption consumed by processing unit 1 and processing unit 2 within 2ms and sends it to memory 2, and sends a second trigger command to the power consumption regulator.

[0123] Memory 1 stores the power consumption of processing unit 1 and processing unit 2 every 0.5ms, and memory 2 stores the power consumption of processing unit 1 and processing unit 2 every 2ms.

[0124] If the power regulator receives the first trigger command, it can retrieve the power consumption of processing unit 1 and processing unit 2 in the most recent 0.5ms from memory 1, calculate the peak current of processing unit 1 and processing unit 2 in the most recent 0.5ms based on the power consumption, and then compare the peak current with... Figure 4 The peak current thresholds shown are compared to find the target peak current threshold triggered by the peak current. The power regulator can also retrieve the power consumption of processing unit 1 and processing unit 2 within the two most recent 0.5ms intervals from memory 1, calculate the current change rate of processing unit 1 and processing unit 2 based on these two power consumption values, and compare this current change rate with... Figure 5 The various current change rate thresholds are compared to find the target current change rate threshold triggered by the current change rate. Then, the power consumption regulator takes the maximum adjustment range between the adjustment range corresponding to the target peak current threshold and the adjustment range corresponding to the target current change rate threshold as the target adjustment range, and sends frequency adjustment commands to frequency regulator 2 and frequency regulator L, and voltage adjustment commands to voltage regulator 1 according to the target adjustment range.

[0125] In one alternative implementation, continue to refer to Figure 6 As shown, the power control device may further include a log printer, which is connected to both a power calculator and a power synthesizer. The log printer can print the power consumption of any processor core in any instantaneous period or the power consumption of any processing unit in one cycle when a trigger event is detected. The trigger event could be, for example, that the power consumption of a processor core in the current instantaneous period exceeds a first alarm threshold, the power consumption of a processing unit in one cycle exceeds a second alarm threshold, or a print command is received.

[0126] In one alternative implementation, continue to refer to Figure 6 As shown, the power consumption control device may further include a frequency division module, which may include multiple frequency dividers, each corresponding to a different component in the power consumption control device. The input of any frequency divider can be connected to the output of a second clock generator, and the output of any frequency divider can be connected to the clock control terminal of its corresponding component. Each frequency divider can be used to divide the fixed-frequency clock signal generated by the second clock generator into the desired clock signal and provide it to the corresponding component. This implementation allows different components in the power consumption control device to have different operating clocks, which helps improve the flexibility of the power consumption control device's operation. For example, when a component has a low load, a smaller operating clock can be provided to that component to reduce power consumption, while when another component has a high load, a larger operating clock can be provided to that component to improve its processing capacity.

[0127] In one alternative implementation, continue to refer to Figure 6 As shown, the power control device may also include a local power supply, which is connected to each component in the power control device to provide power to each component and support their normal operation. By providing a separate local power supply for the power control device, independent power supply can be achieved, which helps reduce the impact of the power control device on other components in the SoC. It should be understood that, although Figure 6 Although not illustrated, the power consumption control device may further include a local voltage regulation module, which may include multiple local voltage regulators. Each local voltage regulator corresponds to a specific component in the power consumption control device. The input terminal of any local voltage regulator can be connected to the output terminal of a local power supply, and the output terminal of any local voltage regulator can be connected to its corresponding component. Each local voltage regulator can be used to step down the operating voltage provided by the local power supply to the required operating voltage and supply it to the corresponding component. This embodiment allows different components in the power consumption control device to have different operating voltages, which helps to further improve the flexibility of the power consumption control device's operation. For example, when a component has a low load, a lower operating voltage can be provided to that component to reduce power consumption, while when another component has a high load, a higher operating voltage can be provided to that component to improve its processing capacity.

[0128] In one alternative implementation, when the duration of a single instantaneous period is short, if the power consumption calculator reports power consumption to the power consumption synthesizer in every instantaneous period, the power consumption synthesizer may need to perform power synthesis operations frequently, resulting in a waste of the power consumption synthesizer's computing resources. To solve this problem, refer to... Figure 6 As shown, the power synthesizer and any power accumulator can also be bidirectionally connected. The power synthesizer can request the accumulated power from the power accumulator only at the end of each preset cycle. The power accumulator can also stop reporting the accumulated power of each instantaneous period to the power synthesizer and continue to perform the accumulation operation until it receives the request from the power synthesizer. After receiving the request, it will stop accumulating and send the accumulated power consumed by the processor core in the preset cycle to the power synthesizer. Then, it will restart the accumulation operation for the next preset cycle to save the computing resources of the power synthesizer.

[0129] It should be noted that the power consumption calculator, power consumption accumulator, and power consumption synthesizer performing the above-described power consumption storage is only one optional implementation. In another optional implementation, the power consumption calculator, power consumption accumulator, and power consumption synthesizer can also perform power consumption storage in the following manner, which is still described using the parameters from the above example:

[0130] A power consumption calculator is used to maintain the power consumption value of the connected processor core at the current moment. This power consumption value is the total power consumption consumed by the processor core since it started running. The power consumption value at the current moment can be calculated in either of the following ways: The power consumption calculator obtains the power consumption signal changes of the connected processor core within 0.03ms every 0.03ms (e.g., the number of signal toggles within 0.03ms), calculates the power consumption consumed by the connected processor core within 0.03ms based on the power consumption signal changes within 0.03ms, adds the power consumption consumed by the connected processor core within 0.03ms to the power consumption value at the current moment, updates the power consumption value at the current moment, and sends it to the connected power consumption accumulator. Alternatively, the power consumption calculator obtains the current total power consumption signal of the connected processor core every 0.03ms (e.g., the total number of signal toggles from the processor core's startup to the current moment, which can be obtained by accessing the processor core's status data), calculates the power consumption value of the connected processor core at the current moment based on the current total power consumption signal.

[0131] Each power accumulator is used to accumulate the power consumption values ​​of each processor core in the same processing unit at the same time, sent by each connected power calculator, to obtain the power consumption value of the processing unit corresponding to the power accumulator at each time and send it to the power synthesizer. The power consumption value of the processing unit at any given time is the total power consumption consumed by the processing unit from startup to that time.

[0132] The power consumption synthesizer is used to accumulate the power consumption values ​​of each processing unit at the same time sent by each power consumption accumulator to obtain the power consumption value of each processing unit at each time. Then, on the one hand, every 0.5ms, it acquires the power consumption value of each processing unit at the current time and the power consumption value at the time 0.5ms ago, calculates the difference between the two to obtain the power consumption consumed by each processing unit in the 0.5ms period and sends it to memory 1. On the other hand, every 2ms, it acquires the power consumption value of each processing unit at the current time and the power consumption value at the time 2ms ago, calculates the difference between the two to obtain the power consumption consumed by each processing unit in the 2ms period and sends it to memory 2.

[0133] It should be noted that all time parameters involved in the above embodiments of this application can be set to be software adjustable. In one possible manner, the various components in the power control device (such as a power calculator, power accumulator, power synthesizer, or memory) can also be connected to a client via an advanced peripheral bus (APB). When it is determined that the time parameters used by a certain component are inappropriate, the user can send the target time parameters to that component through the client and the APB. This allows the component to perform power calculation, power accumulation, power synthesis, or power storage according to the target time parameters configured by the user.

[0134] It should be understood that the above description, up to the power regulator, uses the storage of power consumption data as an example. However, in actual operation, the power consumption mentioned above can be replaced with other data that can characterize power consumption, such as current, and this application does not specifically limit this.

[0135] According to the aforementioned method, Figure 7 This is a schematic diagram of a power consumption control device 700 provided in an embodiment of this application. The power consumption control device 700 can be a chip or circuit, such as a chip or circuit that can be disposed in a processor. This power consumption control device 700 can correspond to the power consumption control device in the above-described method. This power consumption control device 700 can achieve the above-described functionality. Figures 2 to 6 The steps of the method corresponding to any one or more of the items shown. Figure 7 As shown, the power consumption control device 700 may include a generation unit 701, an acquisition unit 702, and an adjustment unit 703.

[0136] In this embodiment, the acquisition unit 702 can be a receiving unit or a receiver when receiving information, and this receiving unit or receiver can be a radio frequency circuit. In a specific implementation, the generation unit 701 is used to generate a fixed-frequency clock signal to provide a working clock for each component in the power consumption adjustment device. Under the working clock provided by the fixed-frequency clock signal, the acquisition unit 702 can acquire the power consumption consumed by one or more processing units in the connected on-chip system over a period of time. The adjustment unit 703 can adjust the current power consumption of one or more processing units according to the power consumption.

[0137] For the concepts, explanations, detailed descriptions, and other steps related to the technical solutions provided in the embodiments of this application involved in the power consumption control device 700, please refer to the descriptions of these contents in the foregoing methods or other embodiments, which will not be repeated here.

[0138] It is understood that the functions of each unit in the power consumption control device 700 described above can be referred to the implementation of the corresponding method embodiments, and will not be repeated here.

[0139] It should be understood that the division of units in the power consumption control device 700 described above is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. In this embodiment, the generation unit 701 can be composed of the aforementioned... Figure 2 or Figure 6 The second clock generator in the above-mentioned unit can be used to obtain the acquisition unit 702 and the adjustment unit 703. Figure 6 The power regulator is implemented in [the system / process].

[0140] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute... Figures 1 to 6 The method of any one of the embodiments shown.

[0141] According to the method provided in the embodiments of this application, this application also provides a computer-readable storage medium storing program code, which, when run on a computer, causes the computer to perform... Figures 1 to 6 The method of any one of the embodiments shown.

[0142] The terms “component,” “module,” “system,” etc., used in this specification are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0143] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.

[0144] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0145] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0146] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0147] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0148] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0149] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power consumption control device, characterized by comprising: The application relates to a system for adjusting power consumption of one or more processing units in a system on chip (SoC), comprising a fixed-frequency clock generator, a power consumption regulator and a storage unit connected to the power consumption regulator, wherein the power consumption regulator is connected to the one or more processing units in the SoC; when the one or more processing units comprise at least two processing units, the one or more processing units are located in the same voltage domain, and different processing units in the one or more processing units use different working clocks; the fixed-frequency clock generator is configured to generate a fixed-frequency clock signal and provide the fixed-frequency clock signal to the power consumption regulator; the storage unit is configured to store power consumption of the one or more processing units in each period according to a preset period; and the power consumption regulator is configured to obtain power consumption of the one or more processing units in any period from the storage unit under a working clock provided by the fixed-frequency clock signal, take the power consumption of the one or more processing units in any period as power consumption of the one or more processing units in a period of time, determine a value of the one or more processing units under a preset current index according to the power consumption of the one or more processing units in the period of time, and adjust current power consumption of the one or more processing units using an adjustment amplitude corresponding to a first adjustment threshold when the value of the one or more processing units under the preset current index meets the first adjustment threshold corresponding to the preset current index. The first adjustment threshold is one of at least two adjustment thresholds corresponding to the preset current index, and each of the at least two adjustment thresholds corresponds to an adjustment amplitude. The preset current index comprises a peak current index and / or a current change rate index. When the preset current index comprises the peak current index: If peak current of the one or more processing units in the period of time meets a plurality of adjustment thresholds corresponding to the peak current index, the first adjustment threshold is a maximum adjustment threshold in the plurality of adjustment thresholds.

2. The apparatus of claim 1, wherein, When the preset current index comprises the current change rate index:

3. The apparatus of claim 1, wherein, If a current change rate of the one or more processing units in the period of time meets a plurality of adjustment thresholds corresponding to the current change rate index, the first adjustment threshold is an adjustment threshold with the largest absolute value in the plurality of adjustment thresholds. The storage unit comprises K storage units, and the K storage units correspond to K preset periods respectively; K is a positive integer greater than or equal to 2; 4. The apparatus of claim 1, wherein, Any storage unit in the K storage units is configured to store power consumption of the one or more processing units in each preset period corresponding to the storage unit according to the preset period. ​ 5. The apparatus of claim 1, wherein, ​ ​ 6. The apparatus of claim 1, wherein, The power consumption controller is further connected to one or more power consumption calculators corresponding to the one or more processing units, each of the one or more power consumption calculators comprises a plurality of power consumption calculators, each of the plurality of power consumption calculators is connected to a plurality of processor cores in the corresponding processing unit; the power consumption calculators corresponding to any processing unit are connected to the power consumption accumulators corresponding to the storage unit; and the one or more power consumption accumulators are connected to the power consumption statistic unit. The power consumption calculator connected to any processor core is configured to acquire power consumption signals of the processor core in each time interval, calculate power consumption of the processor core in each time interval according to the power consumption signals, and send the power consumption to the connected power consumption accumulator. Any power consumption accumulator is configured to accumulate power consumption of each processor core in the same time interval sent by the connected power consumption calculators, obtain power consumption of the corresponding processing unit in each time interval, and send the power consumption to the power consumption statistic unit. The power consumption statistic unit is configured to accumulate power consumption of the one or more processing units in each time interval sent by the one or more power consumption accumulators, obtain power consumption of the one or more processing units in each period, and send the power consumption to the storage unit.

7. The apparatus of claim 6, wherein, The power signal corresponding to any processor core comprises one or more of the following: a flip signal corresponding to a component in the processor core, a level signal corresponding to the component in the processor core, a clock gating signal corresponding to the component in the processor core, and a register signal corresponding to a register in the processor core.

8. The device of any one of claims 1 to 7, wherein, The power consumption regulator is further connected to a frequency regulator and / or a voltage regulator corresponding to the one or more processing units, and the frequency regulator and / or the voltage regulator corresponding to the one or more processing units are located in the same SoC as the one or more processing units. The power consumption regulator is specifically configured to: when it is necessary to reduce the current power consumption of the one or more processing units, send a frequency reduction adjustment instruction to the frequency regulator, the frequency reduction adjustment instruction is used to reduce the working frequency of the one or more processing units or to provide a working clock to the one or more processing units after a period of time; and / or, send a voltage reduction adjustment instruction to the voltage regulator, the voltage reduction adjustment instruction is used to reduce the working voltage of the one or more processing units.

9. A processor, comprising: The power consumption control device according to any one of claims 1 to 8 and one or more processing units, the one or more processing units are deployed in a system on chip (SoC), and the power consumption control device is connected to the one or more processing units. The power consumption control device is configured to adjust the current power consumption of the one or more processing units according to power consumption of the one or more processing units in a period of time.

10. A power consumption control method characterized by comprising: The method is suitable for a power consumption control device using a fixed frequency clock signal as a working clock; the power consumption control device is connected to one or more processing units in a system on chip (SoC); when the one or more processing units include at least two processing units, the one or more processing units are located in the same voltage domain, and different processing units in the one or more processing units use different working clocks; the method includes: storing power consumption of the one or more processing units consumed in each period according to a preset period; obtaining power consumption of the one or more processing units consumed in any period as power consumption of the one or more processing units consumed in a period of time; determining a value of the one or more processing units under a preset current index according to power consumption of the one or more processing units consumed in a period of time; when the value of the one or more processing units under the preset current index meets a first adjustment threshold corresponding to the preset current index, adjusting current power consumption of the one or more processing units using an adjustment amplitude corresponding to the first adjustment threshold; wherein the first adjustment threshold is one of at least two adjustment thresholds corresponding to the preset current index, and each adjustment threshold of the at least two adjustment thresholds corresponds to an adjustment amplitude.

11. The method of claim 10, wherein, The preset current index includes a peak current index and / or a current change rate index.

12. The method of claim 10, wherein, The method further includes: when the preset current index includes a peak current index, if peak current of the one or more processing units in the period of time meets a plurality of adjustment thresholds corresponding to the peak current index, the first adjustment threshold is a maximum adjustment threshold of the plurality of adjustment thresholds that are met.

13. The method of claim 10, wherein, The method further includes: when the preset current index includes a current change rate index, if a current change rate of the one or more processing units in the period of time meets a plurality of adjustment thresholds corresponding to the current change rate index, the first adjustment threshold is an adjustment threshold with the largest absolute value among the plurality of adjustment thresholds that are met.

14. The method of claim 10, wherein, The method further includes: storing power consumption of the one or more processing units consumed in each of K preset periods respectively according to the K preset periods; wherein K is a positive integer greater than or equal to 2; for each preset period, obtaining power consumption of the one or more processing units consumed in any period corresponding to the preset period as power consumption of the one or more processing units consumed in the period of time.

15. The method of claim 10, wherein, The method further includes: for any processing unit of the one or more processing units, obtaining power consumption signals of each processor core in the processing unit in each transient period, calculating power consumption of the processor core consumed in each transient period according to the power consumption signals, and accumulating power consumption of each processor core in the processing unit consumed in the same transient period to obtain power consumption of the processing unit consumed in each transient period. accumulating the power consumption consumed by the one or more processing units in each transient period of a cycle to obtain the power consumption consumed by the one or more processing units in each cycle.

16. The method of claim 15, wherein, The power signal corresponding to any processor core comprises one or more of: The flip signal corresponding to a component in the processor core, the level signal corresponding to a component in the processor core, the clock gating signal corresponding to a component in the processor core, the register signal corresponding to a register in the processor core.

17. The method of any one of claims 10 to 16, wherein, The method further comprises: When it is required to reduce the current power consumption of the one or more processing units: sending a frequency reduction adjustment instruction to the frequency regulator corresponding to the one or more processing units, the frequency reduction adjustment instruction being used for the frequency regulator corresponding to the one or more processing units to reduce the working frequency of the one or more processing units or to provide a working clock to the one or more processing units after a few cycles of extension; and / or, sending a voltage reduction adjustment instruction to the voltage regulator corresponding to the one or more processing units, the voltage reduction adjustment instruction being used for the voltage regulator corresponding to the one or more processing units to reduce the working voltage of the one or more processing units.

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