Pixel circuit, display substrate and driving method

Abstract

The present invention discloses a pixel circuit, a display substrate, and a driving method, relating to the field of display technology. The pixel circuit includes: a driving circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first light-emitting device, and a second light-emitting device; the driving circuit, the first light-emitting control circuit, and the second light-emitting control circuit are connected to a third node; the driving circuit, the first light-emitting control circuit, and the first electrode of the first light-emitting device are connected to a fifth node; the driving circuit, the second light-emitting control circuit, and the first electrode of the second light-emitting device are connected to a sixth node; the first light-emitting device and the second light-emitting device have the same luminous color and correspond to the same viewing angle. This enables the pixel circuit to use the same control method to achieve the lighting operation of the pixel it controls, simplifying the circuit structure and control method of the pixel circuit.

Description

Technical Field

[0001] The present invention generally relates to the field of display technology, and in particular to a pixel circuit, a display substrate, and a driving method. Background Art

[0002] Currently, OLED (Organic Light-Emitting Diode) display panels are gradually expanding their application beyond mobile phones to include laptops, tablets, monitors, and other electronic products. OLED display panels offer the advantage of wide viewing angles. While these wide viewing angles offer excellent visibility, they also pose significant challenges to user privacy.

[0003] In the prior art, the same sub-pixel is split to obtain narrow-viewing angle pixels and wide-viewing angle pixels with different luminous areas. The narrow-viewing angle pixels and wide-viewing angle pixels in the same sub-pixel are driven by the same pixel circuit to switch and light up, thereby realizing the switching between narrow viewing angle and wide viewing angle. Due to the difference in the control method of lighting up the narrow-viewing angle pixels and the wide-viewing angle pixels, the implementation of the pixel circuit is relatively complicated. Summary of the Invention

[0004] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a pixel circuit, a display substrate and a driving method, which can enable the pixel circuit to use the same control method to light up the pixels it controls, thereby simplifying the circuit structure and control method of the pixel circuit.

[0005] In a first aspect, the present invention provides a pixel circuit, which includes a driving circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first light-emitting device and a second light-emitting device; the driving circuit, the first light-emitting control circuit, and the second light-emitting control circuit are connected to a third node, the driving circuit, the first light-emitting control circuit, and the first electrode of the first light-emitting device are connected to a fifth node, the driving circuit, the second light-emitting control circuit, and the first electrode of the second light-emitting device are connected to a sixth node, and the first light-emitting device and the second light-emitting device have the same light-emitting color and correspond to the same viewing angle.

[0006] The driving circuit is connected to the third voltage terminal and writes the third voltage of the third voltage terminal into the fifth node and the sixth node to reset the first electrodes of the first light emitting device and the second light emitting device.

[0007] The driving circuit is further configured to generate driving currents for the first light emitting device and the second light emitting device.

[0008] The first light-emitting control circuit is connected to the first light-emitting control signal terminal and is configured to control the conduction between the third node and the fifth node in response to the signal of the first light-emitting control signal terminal, so that the driving current is input into the first light-emitting device after reset.

[0009] The second light-emitting control circuit is connected to the second light-emitting control signal terminal and is configured to control the conduction between the third node and the sixth node in response to the signal of the second light-emitting control signal terminal, so that the driving current is input into the second light-emitting device after reset.

[0010] Optionally, the driving circuit includes: a data writing circuit, a voltage stabilizing circuit, a compensation control circuit, and a driving transistor; wherein, the compensation control circuit and the gate of the driving transistor are connected to a first node, the data writing circuit and the compensation control circuit are connected to a second node, the compensation control circuit, the voltage stabilizing circuit, and the second electrode of the driving transistor are connected to the third node, the voltage stabilizing circuit and the compensation control circuit are connected to a fourth node; the compensation control circuit is connected to the fifth node and the sixth node.

[0011] The data writing circuit is connected to the first voltage terminal and the first control signal terminal, and is configured to write the first voltage of the first voltage terminal into the second node in response to a first signal of the first control signal terminal.

[0012] The compensation control circuit is connected to the first control signal terminal, the second control signal terminal and the third voltage terminal, and is configured to obtain the threshold voltage of the driving transistor in response to the signal of the second control signal terminal, and write the third voltage terminal to the second node in response to the second signal of the first control signal terminal, and write a light-emitting voltage capable of threshold compensation for the driving transistor to the first node based on the voltage change at the second node and the threshold voltage, and write the third voltage of the third voltage terminal to the fifth node and the sixth node in response to the signal of the second control signal terminal.

[0013] The first electrode of the driving transistor is connected to the second voltage terminal and is configured to generate a corresponding driving current according to the light-emitting voltage.

[0014] The voltage stabilizing circuit is connected to the third control signal terminal and the third voltage terminal, and is configured to write the third voltage of the third voltage terminal into the third node in response to the signal of the third control signal terminal.

[0015] Optionally, the voltage stabilizing circuit includes a seventh transistor.

[0016] A gate of the seventh transistor is connected to the third signal control terminal, a first electrode of the seventh transistor is connected to the fourth node, and a second electrode of the seventh transistor is connected to the third node.

[0017] Optionally, the data writing circuit includes a second transistor.

[0018] A gate of the second transistor is connected to the first signal control terminal, a first electrode of the second transistor is connected to the first voltage terminal, and a second electrode of the second transistor is connected to the second node.

[0019] Optionally, the second transistor is a double-gate transistor.

[0020] Optionally, the compensation control circuit includes a third transistor, a fourth transistor, a sixth transistor, a ninth transistor and a coupling capacitor.

[0021] A gate of the third transistor is connected to the second control signal terminal, a first electrode of the third transistor is connected to the first node, and a second electrode of the third transistor is connected to the third node.

[0022] A gate of the fourth transistor is connected to the first control signal terminal, a first electrode of the fourth transistor is connected to the second node, and a second electrode of the fourth transistor is connected to the fourth transistor.

[0023] A gate of the sixth transistor is connected to the second control signal terminal, a first electrode of the sixth transistor is connected to the third voltage terminal, and a second electrode of the sixth transistor is connected to the fifth node.

[0024] The gate of the ninth transistor is connected to the second control signal terminal, the first electrode of the ninth transistor is connected to the third voltage terminal, and the second electrode of the ninth transistor is connected to the sixth node.

[0025] A first end of the coupling capacitor is connected to the second node, and a second end of the coupling capacitor is connected to the first node.

[0026] Optionally, the first light emitting control circuit includes a fifth transistor.

[0027] A gate of the fifth transistor is connected to the first light emitting control signal terminal, a first electrode of the fifth transistor is connected to the third node, and a second electrode of the fifth transistor is connected to the fifth node.

[0028] Optionally, the second light emitting control circuit includes an eighth transistor.

[0029] A gate of the eighth transistor is connected to the second light emitting control signal terminal, a first electrode of the eighth transistor is connected to the third node, and a second electrode of the eighth transistor is connected to the sixth node.

[0030] Optionally, the first signal at the first control signal terminal is at a low level, and the second signal at the first control signal terminal is at a high level.

[0031] In a second aspect, the present invention provides a display substrate comprising a pixel circuit as described in any one of claims 1 to 9.

[0032] In a third aspect, the present invention provides a driving method, applied to the pixel circuit of the first aspect, the driving method comprising:

[0033] In the initialization phase, the driving circuit writes the third voltage of the third voltage terminal to the fifth node and the sixth node to reset the first electrode of the first light-emitting device and the second light-emitting device.

[0034] During the data writing phase, the driving circuit generates a driving current for the first light emitting device and the second light emitting device.

[0035] In the light-emitting stage, the first light-emitting control circuit controls the conduction between the third node and the fifth node in response to the signal of the first light-emitting control signal terminal, so that the driving current flows into the first light-emitting device; and / or the second light-emitting control circuit controls the conduction between the third node and the sixth node in response to the signal of the second light-emitting control signal terminal, and the driving circuit drives the first light-emitting device and / or the second light-emitting device to emit light according to the driving current.

[0036] The present invention proposes a pixel circuit, display substrate and driving method, taking into account that the pixel circuit of the prior art needs to realize the switching and lighting of narrow-viewing angle pixels and wide-viewing angle pixels as a group to achieve different viewing angles. Since the driving current for lighting pixels under different viewing angles is different, the circuit structure and control method of the pixel circuit will become more complicated. The present invention divides pixels with the same luminous area under the same color into a group, such as dividing wide-viewing angle pixels of the same color into a group or dividing narrow-viewing angle pixels of the same color into a group, so that the pixel circuit can use the same control method to realize the lighting operation of the pixels it controls, thereby simplifying the circuit structure and control method of the pixel circuit.

[0037] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0039] Figure 1 A schematic structural diagram of a pixel arrangement provided by an embodiment of the present invention;

[0040] Figure 2 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0041] Figure 3 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0042] Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0043] Figure 5 In the embodiment of the present invention Figure 4 The operating timing diagram of the provided pixel circuit;

[0044] Figure 6 In the embodiment of the present invention Figure 4 A schematic diagram of the working state of the provided pixel circuit during the initialization phase;

[0045] Figure 7 In the embodiment of the present invention Figure 4 A schematic diagram of the working state of the provided pixel circuit during the data writing phase;

[0046] Figure 8 In the embodiment of the present invention Figure 4 A schematic diagram of the working state of the provided pixel circuit in the bias phase;

[0047] Figure 9 In the embodiment of the present invention Figure 4 A schematic diagram of the working state of the provided pixel circuit in the light-emitting stage;

[0048] Figure 10 An embodiment of the present invention provides an application Figure 2 A schematic flow chart of a driving method for a pixel circuit is shown. DETAILED DESCRIPTION

[0049] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are intended only to illustrate the relevant invention and are not intended to limit the invention. It should also be noted that, for ease of description, only portions relevant to the invention are shown in the accompanying drawings.

[0050] Unless otherwise defined, the technical or scientific terms used in the present invention shall have the usual meanings understood by persons of ordinary skill in the field to which the present invention belongs. The words "first", "second" and similar terms used in the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0051] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present invention. The same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions.

[0052] It should be noted that the transistors used in the embodiments of the present invention can be thin film transistors or field effect transistors or other devices with the same or similar characteristics. Since the source and drain of the transistors used are symmetrical, there is no difference between the source and drain. In the embodiments of the present invention, in order to distinguish the source and drain of the transistor, one of the poles is called the first pole and the other pole is called the second pole. In addition, according to the characteristics of the transistor, the transistor can be divided into N-type and P-type. When a P-type transistor is used, the first pole is the source of the P-type transistor and the second pole is the drain of the P-type transistor. The situation of the N-type transistor is the opposite. The "effective level" in the present invention refers to the level that can control the conduction of the corresponding transistor; specifically, for a P-type transistor, the corresponding effective level is a low level; for an N-type transistor, the corresponding effective level is a high level.

[0053] It can be understood that the light-emitting device (including the first light-emitting device and the second light-emitting device) in the embodiment of the present invention refers to a current-driven light-emitting element including an organic light-emitting diode (OLED) and a light-emitting diode (LED). In the embodiment of the present invention, the light-emitting device is OLED as an example for exemplary description, wherein the first electrode and the second electrode of the light-emitting device refer to the anode and the cathode, respectively.

[0054] Figure 1A schematic diagram of a pixel arrangement provided by an embodiment of the present invention. The embodiment of the present invention further divides the same sub-pixel in the same pixel unit into wide-viewing angle pixels and narrow-viewing angle pixels. The wide-viewing angle pixels are lit when used for wide-viewing angle display, and the narrow-viewing angle pixels are lit when used for narrow-viewing angle display. At least two wide-viewing angle pixels of the same color can be divided into a group and lit by the same pixel circuit drive, or at least two narrow-viewing angle pixels of the same color can be divided into a group and lit by the same pixel circuit. Taking two pixels as a group as an example, Figure 1 As shown, pixels a11 and b11 are both wide-viewing-angle pixels, and pixels a12 and b12 are both narrow-viewing-angle pixels. Pixels a11 and b11 are divided into group a, and pixels a12 and b12 are divided into group b.

[0055] It can be understood that the wide-view pixels or narrow-view pixels divided into a group can be wide-view pixels or narrow-view pixels of the same color arranged in the same column, or they can be wide-view pixels or narrow-view pixels of the same color in different columns. The embodiment of the present invention is not limited to this.

[0056] Reference Figure 2 , an embodiment of the present invention provides a circuit structure diagram of a pixel circuit, such as Figure 2 As shown, the pixel circuit includes a driving circuit 1, a first light-emitting control circuit 2, a second light-emitting control circuit 3, a first light-emitting device OLED1 and a second light-emitting device OLED2; the driving circuit 1, the first light-emitting control circuit 2, and the second light-emitting control circuit 3 are connected to a third node N3, the driving circuit 1, the first light-emitting control circuit 2, and the first electrode of the first light-emitting device OLED1 are connected to a fifth node N5, the driving circuit 1, the second light-emitting control circuit 3, and the first electrode of the second light-emitting device OLED2 are connected to a sixth node N6, and the first light-emitting device OLED1 and the second light-emitting device OLED2 have the same light-emitting color and correspond to the same viewing angle.

[0057] Optionally, the first light emitting device OLED1 and the second light emitting device OLED2 have the same opening size in the light emitting direction. It is understandable that the first light emitting device OLED1 and the second light emitting device OLED2 have the same light emitting area under the same driving conditions.

[0058] For example, the first light-emitting device OLED1 and the second light-emitting device OLED2 are both red G wide-viewing angle pixels.

[0059] The driving circuit 1 is connected to the third voltage terminal Vref, and writes the third voltage of the third voltage terminal Vref into the fifth node N5 and the sixth node N6 to reset the first electrodes of the first light emitting device and the second light emitting device.

[0060] The driving circuit 1 is further configured to generate driving currents for the first light emitting device OLED1 and the second light emitting device OLED2 .

[0061] The first light emitting control circuit 2 is connected to the first light emitting control signal terminal EM1 and is configured to control the conduction between the third node N3 and the fifth node N5 in response to the signal of the first light emitting control signal terminal EM1 so that the driving current is input into the reset first light emitting device OLED1.

[0062] The second light emitting control circuit 3 is connected to the second light emitting control signal terminal EM2 and is configured to control the conduction between the third node N3 and the sixth node N6 in response to the signal of the second light emitting control signal terminal EM2, so that the driving current is input into the reset second light emitting device OLED2.

[0063] It is understandable that the third node N3 and the fifth node N5, the third node N3 and the sixth node N6 in the embodiment of the present invention are not turned on at the same time, and one of them can be controlled to be turned on and the other can be turned off to achieve driving current flowing into the corresponding light-emitting device.

[0064] For example, the first light-emitting control circuit 2 controls the disconnection between the third node N3 and the fifth node N5 in response to the signal of the first light-emitting control signal terminal EM1, and the second light-emitting control circuit 3 controls the conduction between the third node N3 and the sixth node N6 in response to the signal of the second light-emitting control signal terminal EM2, so that the driving current is input into the reset second light-emitting device OLED2.

[0065] For another example, the second light-emitting control circuit 3 controls the disconnection between the third node N3 and the sixth node N6 in response to the signal of the second light-emitting control signal terminal EM2, and the first light-emitting control circuit 2 controls the conduction between the third node N3 and the fifth node N5 in response to the signal of the first light-emitting control signal terminal EM1, so that the driving current is input into the first light-emitting device OLED1 after reset.

[0066] Based on the above, the first light emitting control circuit 2 is further configured to control the disconnection between the third node N3 and the fifth node N5 in response to the signal of the first light emitting control signal terminal EM1 to prevent the driving current from being input into the reset first light emitting device.

[0067] The second light emitting control circuit 3 is further configured to control the disconnection between the third node N3 and the sixth node N6 in response to the signal of the second light emitting control signal terminal EM2, so as to prevent the driving current from being input into the reset second light emitting device.

[0068] The pixel circuit provided in the embodiment of the present invention takes into account that the pixel circuit in the prior art needs to realize the switching and lighting of narrow-viewing angle pixels and wide-viewing angle pixels as a group to realize different viewing angles. Since the driving current for lighting pixels under different viewing angles is different, the circuit structure and control method of the pixel circuit will become more complicated. The embodiment of the present invention divides pixels with the same luminous area under the same color into a group, such as dividing wide-viewing angle pixels of the same color into a group or dividing narrow-viewing angle pixels of the same color into a group, so that the pixel circuit adopts the same control method to realize the lighting operation of the pixels it controls, thereby simplifying the circuit structure and control method of the pixel circuit.

[0069] Figure 3 Another circuit structure diagram of a pixel store provided in an embodiment of the present invention is shown in FIG. Figure 3 As shown, in some embodiments, the driving circuit 1 includes: a data writing circuit 11, a voltage stabilizing circuit 12, a compensation control circuit 13, and a driving transistor T1; wherein, the compensation control circuit 13 and the gate of the driving transistor T1 are connected to the first node N1, the data writing circuit 11 and the compensation control circuit 13 are connected to the second node N2, the compensation control circuit 13, the voltage stabilizing circuit 12, and the second electrode of the driving transistor T1 are connected to the third node N3, the voltage stabilizing circuit 12 and the compensation control circuit 13 are connected to the fourth node N4; the compensation control circuit 13 is connected to the fifth node N5 and the sixth node N6.

[0070] The data writing circuit 11 is connected to the first voltage terminal Vdata and the first control signal terminal Scan1 , and is configured to write the first voltage of the first voltage terminal Vdata into the second node N2 in response to a first signal of the first control signal terminal Scan1 .

[0071] The compensation control circuit 13 is connected to the first control signal terminal Scan1, the second control signal terminal Scan2 and the third voltage terminal Vref, and is configured to obtain the threshold voltage of the driving transistor T1 in response to the signal of the second control signal terminal Scan2, and write the third voltage terminal Vref to the second node N2 in response to the second signal of the first control signal terminal Scan1, and write the light-emitting voltage that can perform threshold compensation on the driving transistor T1 to the first node N1 according to the voltage change and the threshold voltage at the second node N2, and write the third voltage of the third voltage terminal Vref to the fifth node N5 and the sixth node N6 in response to the signal of the second control signal terminal Scan2.

[0072] A first electrode of the driving transistor T1 is connected to the second voltage terminal Vdd, and is configured to generate a corresponding driving current according to the light-emitting voltage.

[0073] In some embodiments, the driving transistor T1 is a P-type transistor.

[0074] The voltage stabilizing circuit 12 is connected to the third control signal terminal Scan3 and the third voltage terminal Vref, and is configured to write the third voltage of the third voltage terminal Vref into the third node N3 in response to the signal of the third control signal terminal Scan3.

[0075] In some embodiments, the first signal at the first control signal terminal Scan1 is at a low level, and the second signal at the first control signal terminal Scan1 is at a high level.

[0076] Figure 4 A schematic diagram of another circuit structure of a pixel circuit provided by an embodiment of the present invention is shown in FIG. Figure 4 As shown, the voltage stabilizing circuit 12 includes a seventh transistor T7; a gate of the seventh transistor T7 is connected to the third signal control terminal, a first electrode of the seventh transistor T7 is connected to the fourth node N4, and a second electrode of the seventh transistor T7 is connected to the third node N3.

[0077] Reference Figure 4 The data writing circuit 11 includes a second transistor T2, wherein a gate of the second transistor T2 is connected to the first signal control terminal, a first electrode of the second transistor T2 is connected to the first voltage terminal Vdata, and a second electrode of the second transistor T2 is connected to the second node N2.

[0078] In some embodiments, the second transistor T2 is a dual-gate transistor. Specifically, the second transistor T2 is an N-type transistor; further, the second transistor T2 is an N-type dual-gate transistor.

[0079] like Figure 4 As shown, the compensation control circuit 13 includes a third transistor T3, a fourth transistor T4, a sixth transistor T6, a ninth transistor T9 and a coupling capacitor Cst.

[0080] The gate of the third transistor T3 is connected to the second control signal terminal Scan2 , the first electrode of the third transistor T3 is connected to the first node N1 , and the second electrode of the third transistor T3 is connected to the third node N3 .

[0081] A gate of the fourth transistor T4 is connected to the first control signal terminal Scan1 , a first electrode of the fourth transistor T4 is connected to the second node N2 , and a second electrode of the fourth transistor T4 is connected to the fourth transistor T4 .

[0082] A gate of the sixth transistor T6 is connected to the second control signal terminal Scan2 , a first electrode of the sixth transistor T6 is connected to the third voltage terminal Vref, and a second electrode of the sixth transistor T6 is connected to the fifth node N5 .

[0083] A gate of the ninth transistor T9 is connected to the second control signal terminal Scan2 , a first electrode of the ninth transistor T9 is connected to the third voltage terminal Vref, and a second electrode of the ninth transistor T9 is connected to the sixth node N6 .

[0084] A first end of the coupling capacitor Cst is connected to the second node N2 , and a second end of the coupling capacitor Cst is connected to the first node N1 .

[0085] Figure 4 The example in the figure shows that all transistors in the compensation control circuit 13 are P-type transistors. For example, all transistors in the compensation control circuit 13 are low-temperature polysilicon (LTPS) transistors. The first voltage terminal Vdata provides a first voltage Vdata, the second voltage terminal Vdd provides a second voltage Vdd, and the third voltage terminal Vref provides a third voltage Vref. The third voltage Vref can be equal to the first voltage Vdata or slightly less than the first voltage Vdata. However, the embodiment of the present invention does not impose any limitation on this. For example, the fourth transistor T4 in the compensation control circuit 13 can be a P-type transistor, and the third transistor T3, the sixth transistor T6, and the ninth transistor T9 can be N-type transistors.

[0086] In some embodiments, reference Figure 4 , the first light emitting control circuit 2 includes a fifth transistor T5.

[0087] The gate of the fifth transistor T5 is connected to the first light emitting control signal terminal EM1 , the first electrode of the fifth transistor T5 is connected to the third node N3 , and the second electrode of the fifth transistor T5 is connected to the fifth node N5 .

[0088] The second light emitting control circuit 3 includes an eighth transistor T8.

[0089] The gate of the eighth transistor T8 is connected to the second light emitting control signal terminal EM2 , the first electrode of the eighth transistor T8 is connected to the third node N3 , and the second electrode of the eighth transistor T8 is connected to the sixth node N6 .

[0090] In some embodiments, Figure 4 The fifth transistor T5 is exemplarily shown as a P-type transistor, but it can also be an N-type transistor. The sixth transistor T6 and the ninth transistor T9 are similar, and are not described here in detail.

[0091] The following will be combined with the accompanying drawings Figure 4 The specific working process of the pixel circuit shown is described in detail. Figure 5 for Figure 4 A working timing diagram of the pixel circuit shown in FIG. Figure 5 As shown, Figure 4The operation process of the pixel circuit shown may include the following Figure 5 The four stages shown are initialization stage t1, data writing stage t2, bias stage t3, and light emitting stage t4:

[0092] In the initialization phase t1, the signal of the first control signal terminal Scan1 is high, the second control signal terminal Scan2 is high, the third control signal terminal Scan3 is high: the first light-emitting control signal terminal EM1 is low: the signal of the second light-emitting control signal terminal EM2 is low. Figure 6 , the second transistor T2 and the seventh transistor T7 are turned off; the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, and the ninth transistor T9 are turned on.

[0093] The third voltage Vref is written to the second node N2 via the fourth transistor T4 to reset the second node N2. The third voltage Vref is sequentially written to the potential of point N1 via the sixth transistor T6, the fifth transistor T5, and the third transistor T3 to initialize the gate of the driving transistor T1. Simultaneously, the third voltage Vref is sequentially written to the fifth node N5 via the sixth transistor T6, and the third voltage Vref is written to the sixth node N6 via the ninth transistor T9. This resets the first electrode of the first light-emitting device OLED1 via the fifth node N5, and the first electrode of the second light-emitting device OLED2 via the sixth node N6.

[0094] In the data writing phase t2, the signal of the first control signal terminal Scan1 is low, the second control signal terminal Scan2 is high, the third control signal terminal Scan3 is high: the first light-emitting control signal terminal EM1 is high: the signal of the second light-emitting control signal terminal EM2 is high. Figure 7 , the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, and the eighth transistor T8 are turned off; the second transistor T2, the third transistor T3, the sixth transistor T6, and the ninth transistor T9 are turned on.

[0095] The first voltage Vdata is written to the second node N2 via the second transistor T2. Since the gate of the driving transistor T1 is initialized during the initialization phase t1, turning on the driving transistor T1, the second voltage Vdd charges the first node N1 via the driving transistor T1 and the third transistor T3. When the voltage at the first node N1 reaches VDD + Vth, the first transistor T1 is turned off, and charging is complete. Vth is the threshold voltage of the driving transistor DTFT. At this point, the voltage difference across the coupling capacitor C1 is VDD + Vth - Vdata.

[0096] In the bias phase t3, the signal of the first control signal terminal Scan1 is high, the second control signal terminal Scan2 is low, the third control signal terminal Scan3 is low: the first light-emitting control signal terminal EM1 is high: the signal of the second light-emitting control signal terminal EM2 is high. Figure 8 , the second transistor T2 , the third transistor T3 , the fifth transistor T5 , the sixth transistor T6 , the eighth transistor T8 , and the ninth transistor T9 are turned off; the fourth transistor T4 and the seventh transistor T7 are turned on.

[0097] The second transistor T3 is turned off, and the first node N1 is in a floating state. The third voltage Vref is written to the second node N2 via the third transistor T3. The voltage at the second node N2 changes from Vdata to Vref. Under the bootstrap effect of the coupling capacitor Cst, the voltage at the first node N1 changes from VDD + Vth to VDD + Vth + Vref - Vdata. In other words, the light-emitting voltage written to the first node N1 is VDD + Vth + Vref - Vdata.

[0098] In addition, the third voltage Vref is written into the third node N3 through the seventh transistor T7, and the voltage at the third node N3 is always maintained at Vref. The second electrode (i.e., the drain) of the first transistor T1 is designed to be on-biased, so that the second electrode of the first transistor T1 is normalized, that is, the bias stress on the first transistor T1 is basically consistent, and the threshold voltage of the first transistor T1 remains basically stable, which can reduce the influence of the hysteresis effect.

[0099] In the light-emitting stage t4, the signal of the first control signal terminal Scan1 is high, the second control signal terminal Scan2 is low, the third control signal terminal Scan3 is high: the first light-emitting control signal terminal EM1 is low: the signal of the second light-emitting control signal terminal EM2 is low. Figure 9 , the second transistor T2 , the third transistor T3 , the sixth transistor T6 , the seventh transistor T7 , and the ninth transistor T9 are turned off; the fourth transistor T4 , the fifth transistor T5 , and the eighth transistor T8 are turned on.

[0100] The third voltage Vref is continuously written into the second node N2 through the fourth transistor T4 to maintain the stability of the voltage at the second node N2, which is conducive to maintaining the stability of the voltage at the first node N1; at the same time, the first transistor T1 outputs the driving current I according to its own gate-source voltage Vgs.

[0101] Where Vgs= = , and then according to the saturation drive current formula of the first transistor T1, we can get:

[0102] I=

[0103] =

[0104] =

[0105] Where K is a constant (its magnitude is related to the electrical characteristics of the first transistor T1). As can be seen from the above formula, the drive current I output by the first transistor T1 is only related to the data voltage Vda and the third voltage Vref, and is independent of the threshold voltage Vth of the first transistor T1. This prevents the drive current flowing through the first light-emitting device OLED1 and / or the second light-emitting device OLED2 from being affected by threshold voltage unevenness and drift, thereby effectively improving the uniformity of the drive current flowing through the first light-emitting device OLED1 and / or the second light-emitting device OLED2.

[0106] Based on the same inventive concept, an embodiment of the present invention further provides a display substrate, which includes: a pixel circuit. The pixel circuit adopts the pixel circuit provided by the previous embodiment. For detailed description, please refer to the content of the previous embodiment and will not be repeated here.

[0107] The display substrate in the embodiment of the present invention can be provided in a display device, which can be any product or component with a display function, such as electronic paper, OLED panel, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, etc.

[0108] Based on the same inventive concept, an embodiment of the present disclosure also provides a driving method. Figure 10 This is a flow chart of a driving method provided in an embodiment of the present invention. The driving method is applied to the pixel circuit provided in the previous embodiment. For a detailed description of the pixel circuit, please refer to the content of the previous embodiment and will not be repeated here. The driving method includes:

[0109] S1, initialization stage, the driving circuit writes the third voltage of the third voltage terminal to the fifth node and the sixth node to reset the first electrode of the first light-emitting device and the first electrode of the second light-emitting device.

[0110] S2, data writing stage: the driving circuit generates driving currents for the first light-emitting device and the second light-emitting device.

[0111] S3, light-emitting stage, the first light-emitting control circuit controls the conduction between the third node and the fifth node in response to the signal of the first light-emitting control signal terminal, so that the driving current flows into the first light-emitting device; and / or the second light-emitting control circuit controls the conduction between the third node and the sixth node in response to the signal of the second light-emitting control signal terminal, and the driving circuit drives the first light-emitting device and / or the second light-emitting device to emit light according to the driving current.

[0112] The driving method provided in the embodiments of the present invention takes into account that conventional pixel circuits require switching between narrow-viewing angle pixels and wide-viewing angle pixels as a group to achieve different viewing angles. Because the driving currents required to illuminate pixels at different viewing angles differ, the circuit structure and control methods of the pixel circuit become more complex. In the embodiments of the present invention, pixels of the same color and the same light-emitting area are grouped together, such as wide-viewing angle pixels of the same color or narrow-viewing angle pixels of the same color. During the initialization phase, the driving circuit writes a third voltage from a third voltage terminal to the fifth and sixth nodes to reset the first electrodes of the first and second light-emitting devices. Furthermore, during the data writing phase, the driving circuit generates a driving current for the first and second light-emitting devices. Finally, during the light-emitting phase, the first light-emitting control circuit, in response to a signal from a first light-emitting control signal terminal, controls the connection between the third and fifth nodes to allow the driving current to flow into the first light-emitting device. Furthermore, the second light-emitting control circuit, in response to a signal from a second light-emitting control signal terminal, controls the connection between the third and sixth nodes to allow the driving current to flow into the first light-emitting device. Furthermore, the second light-emitting control circuit, in response to a signal from a second light-emitting control signal terminal, controls the connection between the third and sixth nodes to allow the driving current to flow into the first light-emitting device. The driving circuit then drives the first and / or second light-emitting devices to emit light in accordance with the driving current. Thus, the pixel circuit can use the same control method to perform lighting operations on the pixels it controls, thereby simplifying the circuit structure and control method of the pixel circuit.

[0113] For the detailed description of the above steps S1 to S3, please refer to the contents of the previous embodiment, which will not be repeated here.

[0114] The above description is merely a preferred embodiment of the present invention and an illustration of the underlying technical principles. Those skilled in the art should understand that the scope of the present invention is not limited to technical solutions formed by specific combinations of the aforementioned technical features. It also encompasses other technical solutions formed by any combination of the aforementioned technical features or their equivalents, without departing from the aforementioned disclosed concepts. For example, a technical solution formed by replacing the aforementioned features with (but not limited to) technical features with similar functions disclosed in this invention.

Claims

1. A pixel circuit, characterized in that: The device comprises a driving circuit, a first light-emitting control circuit, a second light-emitting control circuit, a first light-emitting device, and a second light-emitting device; the driving circuit, the first light-emitting control circuit, and the second light-emitting control circuit are connected to a third node; the driving circuit, the first light-emitting control circuit, and a first electrode of the first light-emitting device are connected to a fifth node; the driving circuit, the second light-emitting control circuit, and a first electrode of the second light-emitting device are connected to a sixth node; the first light-emitting device and the second light-emitting device have the same luminous color and correspond to the same viewing angle; The driving circuit is connected to the third voltage terminal and writes a third voltage of the third voltage terminal to the fifth node and the sixth node to reset the first electrodes of the first light-emitting device and the second light-emitting device; The driving circuit is further configured to generate driving currents for the first light emitting device and the second light emitting device; The first light emitting control circuit is connected to the first light emitting control signal terminal and is configured to control conduction between the third node and the fifth node in response to a signal at the first light emitting control signal terminal, so that the driving current is input into the first light emitting device after reset; The second light-emitting control circuit is connected to the second light-emitting control signal terminal and is configured to control the conduction between the third node and the sixth node in response to the signal of the second light-emitting control signal terminal, so that the driving current is input into the second light-emitting device after reset.

2. The pixel circuit according to claim 1, wherein: The driving circuit includes: a data writing circuit, a voltage stabilizing circuit, a compensation control circuit, and a driving transistor; wherein the compensation control circuit and the gate of the driving transistor are connected to a first node, the data writing circuit and the compensation control circuit are connected to a second node, the compensation control circuit, the voltage stabilizing circuit, and the second electrode of the driving transistor are connected to a third node, the voltage stabilizing circuit and the compensation control circuit are connected to a fourth node; and the compensation control circuit is connected to the fifth node and the sixth node. The data writing circuit is connected to the first voltage terminal and the first control signal terminal, and is configured to write the first voltage of the first voltage terminal into the second node in response to the first signal of the first control signal terminal; The compensation control circuit is connected to the first control signal terminal, the second control signal terminal, and the third voltage terminal, and is configured to obtain the threshold voltage of the driving transistor in response to the signal of the second control signal terminal, write the third voltage terminal to the second node in response to the second signal of the first control signal terminal, write a light-emitting voltage capable of threshold compensation for the driving transistor to the first node based on the voltage change at the second node and the threshold voltage, and write a third voltage of the third voltage terminal to the fifth node and the sixth node in response to the signal of the second control signal terminal; The first electrode of the driving transistor is connected to the second voltage terminal and is configured to generate a corresponding driving current according to the light-emitting voltage; The voltage stabilizing circuit is connected to the third control signal terminal and the third voltage terminal, and is configured to write the third voltage of the third voltage terminal into the third node in response to the signal of the third control signal terminal.

3. The pixel circuit according to claim 2, wherein: The voltage stabilizing circuit includes a seventh transistor; A gate of the seventh transistor is connected to the third control signal terminal, a first electrode of the seventh transistor is connected to the fourth node, and a second electrode of the seventh transistor is connected to the third node.

4. The pixel circuit according to claim 2, wherein: The data writing circuit includes a second transistor; A gate of the second transistor is connected to the first signal control terminal, a first electrode of the second transistor is connected to the first voltage terminal, and a second electrode of the second transistor is connected to the second node.

5. The pixel circuit according to claim 4, wherein: The second transistor is a double-gate transistor.

6. The pixel circuit according to claim 2, wherein: The compensation control circuit includes a third transistor, a fourth transistor, a sixth transistor, a ninth transistor and a coupling capacitor; The gate of the third transistor is connected to the second control signal terminal, the first electrode of the third transistor is connected to the first node, and the second electrode of the third transistor is connected to the third node; The gate of the fourth transistor is connected to the first control signal terminal, the first electrode of the fourth transistor is connected to the second node, and the second electrode of the fourth transistor is connected to the fourth transistor; The gate of the sixth transistor is connected to the second control signal terminal, the first electrode of the sixth transistor is connected to the third voltage terminal, and the second electrode of the sixth transistor is connected to the fifth node; The gate of the ninth transistor is connected to the second control signal terminal, the first electrode of the ninth transistor is connected to the third voltage terminal, and the second electrode of the ninth transistor is connected to the sixth node; A first end of the coupling capacitor is connected to the second node, and a second end of the coupling capacitor is connected to the first node.

7. The pixel circuit according to claim 2, wherein: The first light emitting control circuit includes a fifth transistor; A gate of the fifth transistor is connected to the first light emitting control signal terminal, a first electrode of the fifth transistor is connected to the third node, and a second electrode of the fifth transistor is connected to the fifth node.

8. The pixel circuit according to claim 2, wherein: The second light emitting control circuit includes an eighth transistor; A gate of the eighth transistor is connected to the second light emitting control signal terminal, a first electrode of the eighth transistor is connected to the third node, and a second electrode of the eighth transistor is connected to the sixth node.

9. The pixel circuit according to any one of claims 2 to 8, wherein: The first signal at the first control signal terminal is at a low level, and the second signal at the first control signal terminal is at a high level.

10. A display substrate, characterized in that: The pixel circuit comprises the pixel circuit according to any one of claims 1 to 9.

11. A driving method, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 9, the driving method includes: In the initialization phase, the driving circuit writes the third voltage of the third voltage terminal to the fifth node and the sixth node to reset the first electrodes of the first light-emitting device and the second light-emitting device; During the data writing phase, the driving circuit generates driving currents for the first light emitting device and the second light emitting device; In the light-emitting stage, the first light-emitting control circuit controls the conduction between the third node and the fifth node in response to the signal of the first light-emitting control signal terminal, so that the driving current flows into the first light-emitting device; and / or the second light-emitting control circuit controls the conduction between the third node and the sixth node in response to the signal of the second light-emitting control signal terminal, and the driving circuit drives the first light-emitting device and / or the second light-emitting device to emit light according to the driving current.

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