Bias circuit, amplification circuit, and electronic device

By designing a current path in the bias circuit to avoid using resistors, and utilizing the conduction and discharge mechanisms of current mirrors and transistors, a stable bias voltage is generated. This solves the problem of unstable bias voltage caused by resistor manufacturing deviations, and improves the reliability and simplifies the design of the cascode operational amplifier.

CN116743090BActive Publication Date: 2026-04-14HANGZHOU HIKVISION DIGITAL TECHNOLOGY CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-01
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Manufacturing deviations in the resistors of the existing bias circuit cause unstable bias voltage, affecting the normal operation of the cascode operational amplifier.

Method used

A novel bias circuit structure is adopted. By designing the current path, the use of resistors is avoided. Multiple current paths are formed by utilizing the current mirror and the conduction and discharge mechanism of the transistor to generate a bias voltage. The bias voltage is determined by adjusting the current ratio of the current paths.

Benefits of technology

It improves the reliability of the bias circuit, reduces the design difficulty, and makes the bias voltage more stable, making it suitable for the normal operation of a common-source cascode operational amplifier.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN116743090B_ABST
    Figure CN116743090B_ABST
Patent Text Reader

Abstract

The application provides a bias circuit, an amplification circuit and an electronic device, relates to the technical field of integrated circuits, and can avoid the influence of a resistor in an existing bias circuit on a bias voltage generated by the bias circuit. The bias circuit comprises a current source, a pull-up module, a first control module, a second control module, a third control module, a fourth control module and a determination module.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a bias circuit, an amplifier circuit, and an electronic device. Background Technology

[0002] Currently, common integrated circuits include analog integrated circuits and digital integrated circuits. Digital integrated circuits are used to process digital signals, while analog integrated circuits are used to process analog signals. In analog integrated circuits, operational amplifiers are fundamental modules, used to amplify analog signals to enable subsequent analog signal processing.

[0003] For an operational amplifier to function properly, the bias circuit connected to it needs to provide several essential bias voltages. For a cascode operational amplifier (CMAP), this bias voltage is crucial. Typically, to provide this bias voltage, the bias circuit includes a resistor with a relatively large resistance value. The resistance value is directly related to the bias voltage generated by the bias circuit. Therefore, if the resistor's manufacturing deviation is significant, the resulting bias voltage will be affected. Summary of the Invention

[0004] Embodiments of this application provide a bias circuit, an amplifier circuit, and an electronic device that can avoid the influence of resistors in existing bias circuits on the bias voltage generated by the bias circuit.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] In a first aspect, a bias circuit is provided, comprising: a current source, a pull-up module, a first control module, a second control module, a third control module, a fourth control module, and a determining module; wherein, a first terminal of the current source is connected to a first voltage terminal, a second terminal of the current source is connected to the control terminal of the pull-up module, the control terminal of the second control module, and a first terminal of the first control module; a first terminal of the pull-up module is connected to the first voltage terminal, a second terminal of the pull-up module is connected to the control terminal of the first control module; a second terminal of the first control module is connected to the first terminal of the second control module, a third terminal of the first control module is connected to the second terminal of the third control module, a fourth terminal of the first control module is connected to the third terminal of the second control module, and a fifth terminal of the first control module... The second terminal of the first control module is connected to the second voltage terminal; the sixth terminal of the first control module is connected to the second voltage terminal; the seventh terminal of the first control module is connected to the second terminal of the fourth control module; the eighth terminal of the first control module is connected to the fifth terminal of the second control module; the second terminal of the second control module is connected to the second voltage terminal; the fourth terminal of the second control module is connected to the second voltage terminal; the sixth terminal of the second control module is connected to the second voltage terminal; the first terminal of the third control module is connected to the first voltage terminal; the control terminal of the third control module is connected to the second terminal of the third control module, the second control terminal of the determining module, and the second control terminal of the fourth control module; the first terminal of the fourth control module is connected to the first voltage terminal; the first control terminal of the fourth control module is connected to the first control terminal of the determining module. The second terminal of the second control module and the second terminal of the fourth control module are defined; the first terminal of the module is connected to the first voltage terminal; wherein, the current source is configured to output a predetermined current at the second terminal of the current source to charge the control terminal of the second control module and the control terminal of the pull-up module; the second control module is configured to connect the first terminal of the second control module to the second terminal of the second control module, connect the third terminal of the second control module to the fourth terminal of the second control module, and connect the fifth terminal of the second control module to the sixth terminal of the second control module after the voltage at the control terminal of the second control module reaches the first voltage; the pull-up module is configured to connect the first terminal of the pull-up module to the second terminal of the pull-up module after the voltage at the control terminal of the pull-up module reaches the second voltage. The system is configured to connect the first terminal of the first control module to the second terminal of the first control module, the third terminal of the first control module to the fourth terminal of the first control module, the fifth terminal of the first control module to the sixth terminal of the first control module, and the seventh terminal of the first control module to the eighth terminal of the first control module after the voltage at the control terminal of the first control module reaches the third voltage, so as to discharge to the second terminal of the third control module and discharge to the second terminal of the fourth control module; the system is configured to connect the first terminal of the third control module to the second terminal of the third control module after the voltage at the control terminal of the third control module reaches the fourth voltage.The fourth control module is configured to connect its first and second terminals when the voltage at its second control terminal reaches a fifth voltage and the voltage at its first control terminal reaches a sixth voltage. The determining module is configured to connect its first and second terminals when the voltage at its second control terminal reaches a seventh voltage and the voltage at its first control terminal reaches an eighth voltage.

[0007] In the above-mentioned bias circuit, firstly, the bias circuit has the following structure and connection relationship: the first end of the current source is connected to the first voltage terminal, the second end of the current source is connected to the first end of the first control module, the second end of the first control module is connected to the first end of the second control module, and the second end of the second control module is connected to the second voltage terminal; and the second end of the current source is also connected to the control terminal of the second control module and the control terminal of the pull-up module, the first end of the pull-up module is connected to the first voltage terminal, and the second end of the pull-up module is connected to the control terminal of the first control module. Based on the above connection relationship, the bias circuit has the following functions: when the second terminal of the current source outputs a predetermined current to charge the control terminal of the second control module and the control terminal of the pull-up module, when the voltage of the control terminal of the second control module rises to the first voltage, the first terminal of the second control module is connected to the second terminal of the second control module; when the voltage of the control terminal of the pull-up module rises to the second voltage, the first terminal of the pull-up module and the second terminal of the pull-up module are connected, so that the first voltage terminal charges the control terminal of the first control module through the pull-up module; when the voltage of the control terminal of the first control module rises to the third voltage, the first terminal of the first control module and the second terminal of the first control module are connected. Then the bias circuit will form a fourth current path from the first voltage terminal through the current source, the first terminal and the second terminal of the first control module, and the first and second terminals of the second control module to the second voltage terminal.

[0008] Secondly, in terms of structure, the bias circuit also has the following structure and connection relationship: the first terminal of the third control module is connected to the first voltage terminal, the control terminal of the third control module is connected to the second terminal of the third control module, the second terminal of the third control module is connected to the third terminal of the first control module, the fourth terminal of the first control module is connected to the third terminal of the second control module, and the fourth terminal of the second control module is connected to the second voltage terminal. Based on the above connection relationship, the bias circuit functions as follows: after the voltage at the control terminal of the second control module reaches the first voltage, the third terminal and the fourth terminal of the second control module are connected; when the voltage at the control terminal of the first control module reaches the third voltage, the third terminal and the fourth terminal of the first control module are connected; then the second terminal of the third control module will be connected to the second voltage terminal through the third terminal and the fourth terminal of the first control module, as well as the third terminal and the fourth terminal of the second control module; the second voltage terminal discharges to the second terminal of the third control module and also discharges to the control terminal of the third control module; after the voltage at the control terminal of the third control module reaches the fourth voltage, the first terminal and the second terminal of the third control module are connected; then the bias circuit will form a fifth current path from the first voltage terminal through the first terminal and the second terminal of the third control module, the third terminal and the fourth terminal of the first control module, the third terminal and the fourth terminal of the second control module, to the second voltage terminal.

[0009] Furthermore, structurally, the bias circuit also has the following structure and connection relationships: the first terminal of the fourth control module is connected to the first voltage terminal, the first control terminal of the fourth control module is connected to the second terminal of the fourth control module, the second control terminal of the fourth control module is connected to the control terminal of the third control module, the second terminal of the fourth control module is connected to the seventh terminal of the first control module, the eighth terminal of the first control module is connected to the fifth terminal of the second control module, and the sixth terminal of the second control module is connected to the second voltage terminal. Based on the above connection relationship, the bias circuit functions as follows: after the voltage at the control terminal of the second control module rises to the first voltage, the fifth terminal and the sixth terminal of the second control module are connected; after the voltage at the control terminal of the first control module rises to the third voltage, the seventh terminal and the eighth terminal of the first control module are connected; then the second terminal of the fourth control module will be connected to the second voltage terminal through the seventh and eighth terminals of the first control module, the fifth terminal of the second control module, and the sixth terminal of the second control module; the second voltage terminal discharges to the second terminal of the fourth control module and also to the first control terminal of the fourth control module; after the voltage at the first control terminal of the fourth control module reaches the sixth voltage and the voltage at the second control terminal of the fourth control module reaches the fifth voltage, the first terminal and the second terminal of the fourth control module are connected; then the bias circuit will form a sixth current path from the first voltage terminal through the first and second terminals of the fourth control module, the seventh and eighth terminals of the first control module, the fifth terminal of the second control module, and the sixth terminal of the second control module to the second voltage terminal.

[0010] In addition, structurally, this bias circuit also has the following structure and connection relationships: the first terminal of the determining module is connected to the first voltage terminal, the first control terminal of the determining module is connected to the first control terminal of the fourth control module, the second control terminal of the determining module is connected to the control terminal of the third control module, the second terminal of the determining module is connected to the fifth terminal of the first control module, and the sixth terminal of the first control module is connected to the second voltage terminal. Based on the above connection relationships, the bias circuit functions as follows: when the voltage at the control terminal of the first control module rises to the third voltage, the fifth terminal and the sixth terminal of the first control module are turned on; when the voltage at the first control terminal of the determining module reaches the eighth voltage and the voltage at the second control terminal of the determining module reaches the seventh voltage, the first terminal and the second terminal of the determining module are turned on. Then, the bias circuit will form a seventh current path flowing from the first voltage terminal through the first terminal and the second terminal of the determining module, as well as the fifth and sixth terminals of the first control module, to the second voltage terminal. This means that in the above bias circuit, four current paths can be formed without setting resistors. The formation of four paths can determine the bias voltage, avoiding the area consumed by setting resistors in existing bias circuits, improving the reliability of the bias circuit and reducing the design difficulty of the bias circuit.

[0011] Optionally, in the bias circuit described above, when the current at the sixth terminal of the first control module reaches α times the predetermined current, the first bias voltage output from the control terminal of the first control module is output to the first transistor of the cascode operational amplifier. The first transistor is an N-type transistor in the cascode structure of the cascode operational amplifier. When the current at the second terminal of the second control module reaches the predetermined current, the second bias voltage output from the control terminal of the second control module is output to the second transistor of the cascode operational amplifier. The first transistor is connected to ground through the second transistor, and the second transistor is an N-type transistor. When the current at the fourth terminal of the second control module reaches β times the predetermined current, the third bias voltage output from the control terminal of the third control module is output to the third transistor of the cascode operational amplifier. The third transistor is a P-type transistor in the cascode structure of the cascode operational amplifier. When the current at the sixth terminal of the second control module reaches γ times the predetermined current, the fourth bias voltage output from the first control terminal of the fourth control module is output to the fourth transistor of the cascode operational amplifier. The third transistor is connected to the power supply through the fourth transistor, and the fourth transistor is a P-type transistor. In this optional scheme, the bias circuit pre-sets the values ​​of α, β, and γ. When the current at the sixth terminal of the first control module reaches α times the predetermined current, the first bias voltage output from the control terminal of the first control module is output to the first transistor of the cascode operational amplifier. The first transistor is an N-type transistor in the cascode structure of the cascode operational amplifier. When the current at the second terminal of the second control module reaches the predetermined current, the second bias voltage output from the control terminal of the second control module is output to the second transistor of the cascode operational amplifier. The first transistor is connected to ground through the second transistor. Furthermore, the second transistor is N-type; when the current at the fourth terminal of the second control module reaches β times the predetermined current, the third bias voltage output from the control terminal of the third control module is output to the third transistor of the cascode operational amplifier. The third transistor is a P-type transistor in the cascode operational amplifier structure. When the current at the sixth terminal of the second control module reaches γ times the predetermined current, the fourth bias voltage output from the first control terminal of the fourth control module is output to the fourth transistor of the cascode operational amplifier. The third transistor is connected to the power supply through the fourth transistor, and the fourth transistor is P-type. This means that the current bias circuit does not require resistors; only the proportional relationships between the currents in the fifth, sixth, and seventh current paths and the current in the fourth current path—that is, the values ​​of α, β, and γ—need to be adjusted to determine the four bias voltages.

[0012] Optionally, the bias circuit further includes a pull-down module; the control terminal of the pull-down module is connected to the second terminal of the fourth control module, the first terminal of the pull-down module is connected to the control terminal of the third control module, and the second terminal of the pull-down module is connected to the second voltage terminal; the pull-down module is configured to conduct the first terminal and the second terminal of the pull-down module after the voltage at the control terminal of the pull-down module reaches the ninth voltage, so as to discharge to the control terminal of the third control module, the second control terminal of the determining module, and the second control terminal of the fourth control module. In this optional scheme, since the control terminal of the third control module is also connected to the second terminal of the third control module, the second voltage terminal discharges to the control terminal of the third control module through the third terminal and the fourth terminal of the first control module, as well as the third terminal and the fourth terminal of the second control module, forming the first discharge path of the control terminal of the third control module. Furthermore, the second voltage terminal discharges to the second terminal of the fourth control module through the seventh and eighth terminals of the first control module, as well as the fifth and sixth terminals of the second control module. The control terminal of the pull-down module also discharges, causing its voltage to decrease. After the voltage at the control terminal of the pull-down module drops to the ninth voltage, the first and second terminals of the pull-down module are connected, and the first terminal of the pull-down module is connected to the control terminal of the third control module, while the second terminal is connected to the second voltage terminal. At this point, the control terminal of the third control module is connected to the second voltage terminal through the pull-down module, and the second voltage terminal discharges to the control terminal of the third control module, forming a second discharge path for the control terminal of the third control module. This discharge causes the voltage at the control terminal of the third control module to decrease. The control terminal of the third control module can then discharge through these two discharge paths, allowing its voltage to drop to the fourth voltage more quickly, thus enabling the third control module to enter its operating state more rapidly.

[0013] Optionally, the pull-down module includes a fifth transistor; the first terminal of the fifth transistor is connected to the first terminal of the pull-down module, the second terminal of the fifth transistor is connected to the second terminal of the pull-down module, and the control terminal of the fifth transistor is connected to the control terminal of the pull-down module; the fifth transistor turns on after the voltage at the control terminal of the pull-down module reaches the ninth voltage.

[0014] Optionally, the determining module includes a sixth transistor and a seventh transistor; the first terminal of the sixth transistor is connected to the first terminal of the determining module, the second terminal of the sixth transistor is connected to the first terminal of the seventh transistor, the second terminal of the seventh transistor is connected to the second terminal of the determining module, the control terminal of the sixth transistor is connected to the first control terminal of the determining module, and the control terminal of the seventh transistor is connected to the second control terminal of the determining module; the seventh transistor turns on after the voltage at the second control terminal of the determining module reaches a seventh voltage, and the sixth transistor turns on after the voltage at the first control terminal of the determining module reaches an eighth voltage.

[0015] Optionally, the pull-up module includes an eighth transistor; the first terminal of the eighth transistor is connected to the first terminal of the pull-up module, the second terminal of the eighth transistor is connected to the second terminal of the pull-up module, and the control terminal of the eighth transistor is connected to the control terminal of the pull-up module; the eighth transistor turns on after the voltage at the control terminal of the pull-up module reaches the second voltage.

[0016] Optionally, the first control module includes a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor; the first terminal of the ninth transistor is connected to the first terminal of the first control module, the second terminal of the ninth transistor is connected to the second terminal of the first control module, the first terminal of the tenth transistor is connected to the third terminal of the first control module, the second terminal of the tenth transistor is connected to the fourth terminal of the first control module, the first terminal of the eleventh transistor is connected to the fifth terminal of the first control module, the second terminal of the eleventh transistor is connected to the sixth terminal of the first control module, the first terminal of the twelfth transistor is connected to the seventh terminal of the first control module, the second terminal of the twelfth transistor is connected to the eighth terminal of the first control module, and the control terminals of the ninth, tenth, eleventh, and twelfth transistors are connected to the control terminal of the first control module; the ninth, tenth, eleventh, and twelfth transistors conduct after the voltage at the control terminal of the first control module reaches a third voltage, and the eleventh transistor saturates after the current at the sixth terminal of the first control module reaches α times a predetermined current.

[0017] Optionally, the second control module includes a thirteenth transistor, a fourteenth transistor, and a fifteenth transistor; the first terminal of the thirteenth transistor is connected to the first terminal of the second control module, the second terminal of the thirteenth transistor is connected to the second terminal of the second control module, the first terminal of the fourteenth transistor is connected to the third terminal of the second control module, the second terminal of the fourteenth transistor is connected to the fourth terminal of the second control module, the first terminal of the fifteenth transistor is connected to the fifth terminal of the second control module, and the second terminal of the fifteenth transistor is connected to the sixth terminal of the second control module; the control terminals of the thirteenth, fourteenth, and fifteenth transistors are connected to the control terminal of the second control module; the thirteenth, fourteenth, and fifteenth transistors conduct after the voltage at the control terminal of the second control module reaches a first voltage, and the thirteenth transistor saturates after the current at the second terminal of the second control module reaches a predetermined current.

[0018] Optionally, the third control module includes a sixteenth transistor, the first terminal of which is connected to the first terminal of the third control module, the second terminal of which is connected to the second terminal of the third control module, and the control terminal of which is connected to the control terminal of the third control module; the sixteenth transistor turns on after the voltage at the control terminal of the third control module reaches a fourth voltage, and saturates after the current at the fourth terminal of the second control module reaches β times the predetermined current.

[0019] Optionally, the fourth control module includes a seventeenth transistor and an eighteenth transistor; the first terminal of the seventeenth transistor is connected to the first terminal of the fourth control module, the second terminal of the seventeenth transistor is connected to the first terminal of the eighteenth transistor, the second terminal of the eighteenth transistor is connected to the second terminal of the fourth control module, the control terminal of the seventeenth transistor is connected to the first control terminal of the fourth control module, and the control terminal of the eighteenth transistor is connected to the second control terminal of the fourth control module; the eighteenth transistor turns on after the voltage at the second control terminal of the fourth control module reaches a fifth voltage, the seventeenth transistor turns on after the voltage at the first control terminal of the fourth control module reaches a sixth voltage, and the seventeenth transistor saturates after the current at the sixth terminal of the second control module reaches γ times the predetermined current.

[0020] In a second aspect, an amplifier circuit is provided, including a common-source cascode operational amplifier and a bias circuit as described in any of the first aspects above, the bias circuit providing a bias voltage for the common-source cascode operational amplifier.

[0021] Thirdly, an electronic device is provided, comprising a printed circuit board and an amplification circuit as described in the second aspect above disposed on the printed circuit board.

[0022] The technical effects of either the second or third aspect can be found in the technical effects of the first aspect, and will not be repeated here. Attached Figure Description

[0023] Figure 1 A schematic diagram of a bias circuit provided for Embodiment 1 of this application;

[0024] Figure 2 A schematic diagram of the structure of a common-source cascode operational amplifier provided for an embodiment of this application;

[0025] Figure 3 A schematic diagram of a bias circuit provided for Embodiment 2 of this application;

[0026] Figure 4 A schematic diagram of a bias circuit provided for Embodiment 3 of this application;

[0027] Figure 5 A schematic diagram of a bias circuit provided for Embodiment 4 of this application;

[0028] Figure 6 A schematic diagram of a bias circuit provided for Embodiment 5 of this application;

[0029] Figure 7 A schematic diagram of a bias circuit provided for Embodiment Six of this application;

[0030] Figure 8 A schematic diagram of a bias circuit provided for Embodiment Seven of this application;

[0031] Figure 9 A schematic diagram of a bias circuit provided for Embodiment 8 of this application;

[0032] Figure 10 A schematic diagram of a bias circuit provided for Embodiment 9 of this application;

[0033] Figure 11 A schematic diagram of a bias circuit provided for Embodiment 10 of this application;

[0034] Figure 12 A schematic diagram of a bias circuit provided for Embodiment Eleven of this application;

[0035] Figure 13 This is a schematic diagram of a bias circuit provided for Embodiment Twelve of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0037] Unless otherwise defined, all technical terms used herein have the same meaning as those known to one of ordinary skill in the art. In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships may exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, or a, b, and c, where a, b, and c can be single or multiple. Furthermore, in the embodiments of this application, the terms "first," "second," "first," "second," etc., do not limit the quantity or order.

[0038] Furthermore, in this application, directional terms such as "upper" and "lower" are defined relative to the orientation of the components shown in the accompanying drawings. It should be understood that these directional terms are relative concepts, used for relative description and clarification, and can change accordingly depending on the orientation of the components in the accompanying drawings.

[0039] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0040] The technical terms used in the embodiments of this application are explained below:

[0041] In the embodiments of this application, the transistor can be a metal-oxide-semiconductor field-effect transistor (MOSFET). Transistors are classified into two types: N-type transistors and P-type transistors. A transistor includes a source, a drain, and a gate. The transistor's on / off state can be controlled by controlling the voltage at the gate. For example, when the voltage between the gate and source of the transistor is greater than the transistor's threshold voltage, the transistor is on, and the source and drain are conducting; when the voltage between the gate and source is less than the threshold voltage, the transistor is off, and the source and drain are not conducting.

[0042] Taking an N-type transistor as an example, when the voltage between the gate and source of an N-type transistor is greater than the threshold voltage, the N-type transistor turns on. At this time, if the voltage between the source and drain of the N-type transistor is increased, the drain current of the N-type transistor will also increase, and the N-type transistor is in the linear operating region. When the voltage between the source and drain of the N-type transistor reaches a certain threshold, further increasing the voltage between the source and drain of the N-type transistor will result in a constant drain current that no longer increases; at this point, the N-type transistor is saturated, and the drain current has a maximum value.

[0043] In embodiments of this application, the gate of the transistor is also referred to as the control terminal, the source as the first terminal, and the drain as the second terminal; or, the gate is referred to as the control terminal, the drain as the first terminal, and the source as the second terminal. Furthermore, the N-type transistor is turned on when the voltage at the control terminal is high; the N-type transistor is turned off when the voltage at the control terminal is low. The P-type transistor is turned on when the voltage at the control terminal is low; the P-type transistor is turned off when the voltage at the control terminal is high.

[0044] Currently, common integrated circuits include analog integrated circuits and digital integrated circuits. Digital integrated circuits are used to process digital signals, while analog integrated circuits are used to process analog signals. Among them, operational amplifiers are the basic modules in analog integrated circuits. Operational amplifiers are used to amplify analog signals to enable subsequent analog signal processing.

[0045] For an operational amplifier to function properly, the bias circuit connected to it needs to provide several necessary bias voltages. Specifically, for a cascode operational amplifier, the bias circuit needs to provide four bias voltages.

[0046] Reference Figure 1 As shown in the diagram, an embodiment of this application provides a schematic diagram of a bias circuit. In this bias circuit 10, the first terminal of the current source Bias is connected to the power supply Vdd, the second terminal of the current source Bias is connected to the first terminal of resistor R1, the second terminal of resistor R1 is connected to the first terminal of transistor N12, the second terminal of transistor N12 is connected to the first terminal of transistor N11, and the second terminal of transistor N11 is connected to ground GND. The second terminal of the current source Bias is also connected to the control terminal of transistor N12 via node bnc, and the second terminal of resistor R1 is also connected to the control terminal of transistor N11 via node bn. The first terminal of transistor P13 is connected to the power supply Vdd, the second terminal of transistor P13 is connected to the first terminal of transistor N14, the second terminal of transistor N14 is connected to the first terminal of transistor N13, and the second terminal of transistor N13 is connected to ground GND. The control terminal of transistor P13 is connected to the second terminal of transistor P13 via node bpc. The first terminal of transistor P11 is connected to the power supply Vdd. The second terminal of transistor P11 is connected to the first terminal of transistor P12. The second terminal of transistor P12 is connected to the first terminal of transistor N16. The second terminal of transistor N16 is connected to the first terminal of transistor N15. The second terminal of transistor N15 is connected to ground GND. The control terminal of transistor P11 is connected to the second terminal of transistor P12 through node bp. The control terminal of transistor P12 is connected to node bpc. The control terminals of transistors N13 and N15 are connected to node bn. The control terminals of transistors N14 and N16 are connected to node bnc.

[0047] It should be noted that transistors N11, N12, N13, N14, N15, and N16 are N-type transistors; transistors P11, P12, and P13 are P-type transistors.

[0048] In this circuit, the second terminal of the current source Bias outputs a current i1, which is transmitted to node bnc to charge it. This causes the voltage at the control terminals of transistors N12, N14, and N16 to rise to a high voltage, turning on transistors N12, N14, and N16. Simultaneously, current i1 is transmitted through resistor R1 to node bn, charging it and causing the voltage at the control terminals of transistors N11, N13, and N15 to rise to a high voltage, turning on transistors N11, N13, and N15. At this point, the bias circuit 10 forms the first current path from the power supply Vdd through the current source Bias, resistor R1, transistors N12 and N11 to ground GND. When transistors N14 and N13 are turned on, node bpc can be discharged, causing the voltage at the control terminal of transistor P13 to drop to a low voltage. Transistors P13 and P12 then turn on, forming a second current path in the bias circuit 10 from the power supply Vdd through transistors P13, N14, and GND. When transistors N15 and N16 are turned on, node bp can be discharged, causing the voltage at the control terminal of transistor P11 to drop to a low voltage. Transistor P11 then turns on, forming a third current path in the bias circuit 10 from the power supply Vdd through transistors P11, P12, N6, and N15 to GND.

[0049] It should be noted that, Figure 1 In the bias circuit 10 shown, transistors N13 and 15 have the same dimensions as transistor N11, and transistors N14 and 16 have the same dimensions as transistor N12. The same dimensions indicate that the basic parameters of the transistors, such as electron mobility, channel length, and channel width, are the same. Transistors N12 and N11, N14, and N13 form a current mirror, as do transistors N14 and N13, N16, and N15. When the current flowing through the first, second, and third current paths is i1, node bnc outputs a bias voltage Vbnc, node bn outputs a bias voltage Vbn, node bpc outputs a bias voltage Vbpc, and node bp outputs a bias voltage Vbp. The relationship between the gate voltage and drain current of the transistors is as follows:

[0050]

[0051] Among them, I dVdrain current is the current flowing through the transistor; Vgs is the voltage between the gate and source of the transistor; Vth is the threshold voltage of the transistor; L is the channel length of the transistor; W is the channel width of the transistor; μ is the electron mobility in the transistor. Transistors made of different materials have different electron mobilities, while transistors made of the same material have the same electron mobility. For a transistor made of a fixed material, its electron mobility is a constant; C ox It is the dielectric constant of the transistor.

[0052] From the above formula, we can see that in transistor N11, the Vgs of transistor N11 is:

[0053]

[0054] Similarly, the Vgs of transistor P11 and transistor P13 can be calculated. Furthermore, since the second terminal of transistor N11 is grounded (this second terminal is the source), the voltage Vbn at node bn is the same as the Vgs of transistor N11. Therefore, the voltage Vbnc at node bnc is Vbn + R1*i1. The voltage Vbpc at node bpc is the Vgs of transistor P13 minus the power supply voltage Vdd, and the voltage Vbp at node bp is the Vgs of transistor P11 minus the power supply voltage Vdd. The bias voltage Vbnc is greater than the bias voltage Vbn, and in the bias circuit 10, transistors P13 and P11 have different dimensions, causing the bias voltage Vbp to be greater than the bias voltage Vbpc.

[0055] Reference Figure 2As shown in the figure, an embodiment of this application provides a schematic diagram of the structure of a common-source cascode operational amplifier 20. In the common-source cascode operational amplifier 20, the first terminal of the current source Iss is connected to the power supply Vdd, the second terminal of the current source Iss is connected to the first terminal of transistor P21 and the first terminal of transistor P22, the control terminal of transistor P21 forms the first input terminal of the common-source cascode operational amplifier 20, the second terminal of transistor P21 is connected to node X, the control terminal of transistor P22 forms the second input terminal of the common-source cascode operational amplifier 20, and the second terminal of transistor P22 is connected to node Y. In this configuration, the first terminal of transistor P25 is connected to the power supply Vdd, the second terminal of transistor P25 is connected to the first terminal of transistor P23, the second terminal of transistor P23 is connected to the first terminal of transistor N21, the second terminal of transistor N21 is connected to the first terminal of transistor N23, and the second terminal of transistor N23 is connected to ground GND. The first terminal of transistor P26 is connected to the power supply Vdd, the second terminal of transistor P26 is connected to the first terminal of transistor P24, the second terminal of transistor P24 is connected to the first terminal of transistor N22, the second terminal of transistor N22 is connected to the first terminal of transistor N24, and the second terminal of transistor N24 is connected to ground GND. Furthermore, the first terminal of transistor N21 forms the first output terminal of the cascode operational amplifier 20, and the first terminal of transistor N22 forms the second output terminal of the cascode operational amplifier 20. The control terminals of transistors P25 and P26 receive the bias voltage Vbp output by bias circuit 10; the control terminals of transistors P23 and P24 receive the bias voltage Vbpc output by bias circuit 10; the control terminals of transistors N21 and N22 receive the bias voltage Vbnc output by bias circuit 10; and the control terminals of transistors N23 and N24 receive the bias voltage Vbn output by bias circuit 10.

[0056] The common-source cascode operational amplifier 20 receives analog signals from the first input terminal and the second input terminal. When the bias voltage Vbn controls transistors N23 and N24 to turn on, the bias voltage Vbnc controls transistors N21 and N22 to turn on, the bias voltage Vbpc controls transistors P23 and P24 to turn on, and the bias voltage Vbp controls transistors P25 and P26 to turn on, the common-source cascode operational amplifier 20 can amplify the received analog signals by a predetermined factor and output the amplified analog signals from the first output terminal and the second output terminal.

[0057] For example, the cascode operational amplifier 20 amplifies the received analog signal by a predetermined factor. This predetermined factor is related not only to the magnitudes of the bias voltages Vbp, Vbpc, Vbnc, and Vbn, but also to the current flowing through each transistor in the cascode operational amplifier 20. Since the bias voltages Vbp, Vbpc, Vbnc, and Vbn are determined by the bias circuit 10, the cascode operational amplifier 20 can be made to function normally by setting the dimensions of transistor N21 and the ratio between the dimensions of transistor N22 and transistor N12, the dimensions of transistor N23 and the ratio between the dimensions of transistor N24 and transistor N11, the dimensions of transistor P23 and the ratio between the dimensions of transistor P24 and transistor P12, and the dimensions of transistor P25 and the ratio between the dimensions of transistor P26 and transistor P11. The dimensions of the transistors mentioned above typically include the gate width, channel length, etc. More specifically, refer to... Figure 2 As shown, Figure 2 The size of transistor N23 is the same as that of transistor N24, and the ratio of the size of transistor N23 to that of transistor N12 is 10:1; Figure 2 The size of transistor N21 is the same as that of transistor N22, and the ratio of the size of transistor N21 to that of transistor N11 is 5:1. Figure 2 The size of transistor P23 is the same as that of transistor P24, and the ratio of the size of transistor P23 to that of transistor P12 is 5:1. Figure 2 The size of transistor P25 is the same as that of transistor P26, and the ratio of the size of transistor P25 to that of transistor P11 is 5:1.

[0058] It should be noted that the cascode operational amplifier 20 described above is an example of a folded cascode operational amplifier. In other embodiments, the bias circuit 10 described above can also be connected to a sleeve-type cascode operational amplifier and provide bias voltages Vbn, Vbnc, Vbpc, and Vbp for the sleeve-type cascode operational amplifier. The embodiments of this application do not limit the form of the cascode operational amplifier.

[0059] In the design of the bias circuit 10, in order to meet the above-mentioned bias voltage requirements, the resistance value of resistor R1 is often set to be large enough so that the bias voltage Vbnc can meet the requirements. As the resistance value of resistor R1 increases, the area of ​​resistor R1 also increases. At the same time, due to the limitations of the manufacturing process, the manufacturing deviation of resistor R1 is often relatively large. Moreover, the bias voltage Vbnc is related to the resistance value of resistor R1. When the manufacturing deviation of resistor R1 is large, the bias voltage Vbnc will change, so that the bias voltage Vbnc generated by the bias circuit 10 does not meet the requirements, and the common-source common-gate operational amplifier 20 connected to the bias circuit 10 will not work properly.

[0060] To avoid the influence of resistors on bias voltage in existing bias circuits, embodiments of this application provide a bias circuit, as described above. Figure 3 As shown, the bias circuit 30 includes: a current source Bias, a pull-up module 35, a first control module 31, a second control module 32, a third control module 33, a fourth control module 34, and a determination module 36.

[0061] The first end of the current source bias is connected to the first voltage terminal, and the second end of the current source bias is connected to the control terminal of the pull-up module 35, the control terminal of the second control module 32, and the first end of the first control module 31.

[0062] The first end of the pull-up module 35 is connected to the first voltage terminal, and the second end of the pull-up module 35 is connected to the control terminal of the first control module 31.

[0063] The second terminal of the first control module 31 is connected to the first terminal of the second control module 32, the third terminal of the first control module 31 is connected to the second terminal of the third control module 33, the fourth terminal of the first control module 31 is connected to the third terminal of the second control module 32, the fifth terminal of the first control module 31 is connected to the second terminal of the determining module 36, the sixth terminal of the first control module 31 is connected to the second voltage terminal, the seventh terminal of the first control module 31 is connected to the second terminal of the fourth control module 34, and the eighth terminal of the first control module 31 is connected to the fifth terminal of the second control module 32.

[0064] The second terminal of the second control module 32 is connected to the second voltage terminal, the fourth terminal of the second control module 32 is connected to the second voltage terminal, and the sixth terminal of the second control module 32 is connected to the second voltage terminal.

[0065] The first terminal of the third control module 33 is connected to the first voltage terminal, and the control terminal of the third control module 33 is connected to the second terminal of the third control module 33, the second control terminal of the determining module 36, and the second control terminal of the fourth control module 34.

[0066] The first terminal of the fourth control module 34 is connected to the first voltage terminal, and the first control terminal of the fourth control module 34 is connected to the first control terminal of the determination module 36 and the second terminal of the fourth control module 34.

[0067] The first terminal of module 36 is connected to the first voltage terminal.

[0068] The current source bias is configured to output a predetermined current i300 at its second terminal to charge the control terminals of the second control module 32 and the pull-up module 35. Specifically, the current source bias charges the control terminals of the second control module 32 and the pull-up module 35, increasing their voltages. The module enters a working state when the voltage at its control terminal reaches a first voltage, and when the voltage at its control terminal reaches a second voltage. The first and second voltages can be the same or different.

[0069] The second control module 32 is configured to, after the voltage at the control terminal of the second control module 32 reaches the first voltage, connect the first terminal of the second control module 32 to the second terminal of the second control module 32, connect the third terminal of the second control module 32 to the fourth terminal of the second control module 32, and connect the fifth terminal of the second control module 32 to the sixth terminal of the second control module 32.

[0070] Pull-up module 35 is configured to connect its first and second terminals after the voltage at its control terminal reaches a second voltage, thereby charging the control terminal of the first control module 31. Specifically, after the voltage at the control terminal of pull-up module 35 reaches the second voltage, the first and second terminals of pull-up module 35 are connected, with the first terminal connected to a first voltage terminal and the second terminal connected to the control terminal of the first control module 31. At this time, the control terminal of the first control module 31 is connected to the first voltage terminal via pull-up module 35. When the first voltage terminal is the power supply Vdd, it charges the control terminal of the first control module 31, causing the voltage at the control terminal to rise. When the voltage at the control terminal of the first control module 31 rises to a third voltage, the first control module 31 enters the working state. For example, the internal structure of the pull-up module 35 can be adjusted to make the second voltage smaller, so that the voltage at the control terminal of the pull-up module 35 can reach the second voltage as soon as possible, and the first terminal and the second terminal of the pull-up module 35 can be turned on earlier and charge the control terminal of the first control module 31 more quickly. Then the voltage at the control terminal of the first control module 31 can also reach the third voltage earlier.

[0071] The first control module 31 is configured to, after the voltage at its control terminal reaches a third voltage, connect its first terminal to its second terminal, its third terminal to its fourth terminal, its fifth terminal to its sixth terminal, and its seventh terminal to its eighth terminal, thereby discharging to the second terminal of the third control module 33 and to the second terminal of the fourth control module 34. Specifically, after the voltage at the control terminal of the second control module 32 reaches a first voltage, the third terminal of the second control module 32 connects to its fourth terminal; and after the voltage at the control terminal of the first control module 31 reaches a third voltage, the third terminal of the first control module 31 connects to its fourth terminal. In this configuration, the fourth terminal of the second control module 32 is connected to the second voltage terminal. When the second voltage terminal is ground (GND), it discharges to the second terminal of the third control module 33. The second terminal of the third control module 33 is also connected to its control terminal. This discharge lowers the voltage at the control terminal of the third control module 33. When the voltage at the control terminal of the third control module 33 drops to the fourth voltage, the third control module 33 enters its operating state. Since the second terminal of the third control module 33 is also connected to the second control terminal of the fourth control module 34 and the second control terminal of the determining module 36, it can also discharge to these terminals, lowering the voltage at the second control terminal of the fourth control module 34 to the fifth voltage and the voltage at the second control terminal of the determining module 36 to the seventh voltage. After the voltage at the control terminal of the second control module 32 reaches the first voltage, the fifth terminal of the second control module 32 is connected to the sixth terminal of the second control module 32. After the voltage at the control terminal of the first control module 31 reaches the third voltage, the seventh terminal of the first control module 31 is connected to the eighth terminal of the first control module 31. In this configuration, the sixth terminal of the second control module 32 is connected to the second voltage terminal. When the second voltage terminal is ground (GND), it discharges to the second terminal of the fourth control module 34. The second terminal of the fourth control module 34 is also connected to its first control terminal. This discharge causes a decrease in the voltage of the first control terminal of the fourth control module 34. After the voltage of the first control terminal of the fourth control module 34 decreases to the sixth voltage and the voltage of the second control terminal of the fourth control module 34 decreases to the fifth voltage, the fourth control module 34 enters the operating state. The second terminal of the fourth control module 34 is also connected to the first control terminal of the determination module 36, thus it can also discharge to the first control terminal of the determination module 36. This discharge causes a decrease in the voltage of the first control terminal of the determination module 36. After the voltage of the first control terminal of the determination module 36 decreases to the eighth voltage and the voltage of the second control terminal of the determination module 36 decreases to the seventh voltage, the determination module 36 enters the operating state.

[0072] The third control module 33 is configured to connect its first terminal to its second terminal after the voltage at its control terminal reaches a fourth voltage; the fourth control module 34 is configured to connect its first terminal to its second terminal after the voltage at its second control terminal reaches a fifth voltage and the voltage at its first control terminal reaches a sixth voltage; and the determining module 36 is configured to connect its first terminal to its second terminal after the voltage at its second control terminal reaches a seventh voltage and the voltage at its first control terminal reaches an eighth voltage.

[0073] Thus, the bias circuit 30 described above will form a fourth current path from the first voltage terminal through the current source Bias, the first and second terminals of the first control module 31, the first and second terminals of the second control module 32, to the second voltage terminal. It will also form a fourth current path from the first voltage terminal through the first and second terminals of the third control module 33, the third and fourth terminals of the first control module 31, the third and fourth terminals of the second control module 32, to the second voltage terminal. The fifth current path at the two voltage terminals will form a sixth current path flowing from the first voltage terminal through the first and second terminals of the fourth control module 34, the seventh and eighth terminals of the first control module 31, the fifth and sixth terminals of the second control module 32, to the second voltage terminal. It will also form a seventh current path flowing from the first voltage terminal through the first and second terminals of the determining module 36, the fifth and sixth terminals of the first control module 31, to the second voltage terminal. Furthermore, the currents in the fifth, sixth, and seventh current paths will be in a predetermined ratio to the current in the fourth current path.

[0074] When the current at the sixth terminal of the first control module 31 reaches α times the predetermined current i300, the first bias voltage output from the control terminal of the first control module 31 is output to the first transistor of the common-source cascode operational amplifier. The first transistor is an N-type transistor in the common-source cascode operational amplifier structure. Specifically, the aforementioned α can be different or the same in different bias circuits 30. The specific value of α is determined when designing the bias circuit 30. Therefore, when the current at the sixth terminal of the first control module 31 reaches α times the predetermined current i300, it indicates that the current in the current seventh current path meets the condition. At this time, the bias circuit 30 can output the first bias voltage output from the control terminal of the first control module 31 to the first transistor of the common-source cascode operational amplifier, as shown in the reference. Figure 2 The common-source cascode operational amplifier 20 shown has a first bias voltage, which is the bias voltage Vbnc. The first transistor includes transistor N21 and transistor N22, which are N-type transistors in the common-source cascode structure of the common-source cascode operational amplifier 20.

[0075] When the current at the second terminal of the second control module 32 reaches the predetermined current i300, the second bias voltage output from the control terminal of the second control module 32 is output to the second transistor of the common-source cascode operational amplifier. The first transistor is connected to ground through the second transistor, and the second transistor is N-type. Specifically, when the current at the second terminal of the second control module 32 reaches the predetermined current i300, it means that the current in the fourth current path meets the condition. At this time, the bias circuit 30 can output the second bias voltage output from the control terminal of the second control module 32 to the second transistor of the common-source cascode operational amplifier, as shown in the figure. Figure 2 The common-source cascode operational amplifier 20 shown has a second bias voltage, which is the bias voltage Vbn. The second transistor includes transistor N23 and transistor N24. Transistor N21 is connected to ground through transistor N23, and transistor N22 is connected to ground through transistor N24. Transistors N23 and N24 are N-type transistors.

[0076] When the current at the fourth terminal of the second control module 32 reaches β times the predetermined current i300, the third bias voltage output from the control terminal of the third control module 33 is output to the third transistor of the cascode operational amplifier. The third transistor is a P-type transistor in the cascode operational amplifier structure. Specifically, the aforementioned β can be different or the same in different bias circuits 30. The specific value of β is determined when designing the bias circuit 30. Therefore, when the current at the fourth terminal of the second control module 32 reaches β times the predetermined current i300, it indicates that the current of the current in the fifth current path meets the condition. At this time, the bias circuit 30 can output the third bias voltage output from the control terminal of the third control module 33 to the third transistor of the cascode operational amplifier, as shown in the reference. Figure 2 The common-source cascode operational amplifier 20 shown has a third bias voltage, which is the bias voltage Vbpc. The third transistor includes transistor P23 and transistor P24. Transistors P23 and P24 are P-type transistors in the common-source cascode structure of the common-source cascode operational amplifier 20.

[0077] When the current at the sixth terminal of the second control module 32 reaches γ times the predetermined current i300, the fourth bias voltage output from the first control terminal of the fourth control module 34 is output to the fourth transistor of the common-source cascode operational amplifier. The third transistor is connected to the power supply through the fourth transistor, and the fourth transistor is P-type. Specifically, the aforementioned γ can be different or the same in different bias circuits 30. The specific value of γ is determined when designing the bias circuit 30. Therefore, when the current at the sixth terminal of the second control module 32 reaches γ times the predetermined current i300, it indicates that the current in the current sixth current path meets the condition. At this time, the bias circuit 30 can output the fourth bias voltage output from the first control terminal of the fourth control module 34 to the fourth transistor of the common-source cascode operational amplifier, referring to... Figure 2 The common-source cascode operational amplifier 20 shown has a fourth bias voltage, which is the bias voltage Vbp. The fourth transistor includes transistor P25 and transistor P26. Transistor P23 is connected to the power supply Vdd through transistor P25, and transistor P24 is connected to the power supply Vdd through transistor P26. Transistors P25 and P26 are P-type transistors.

[0078] In the above-mentioned bias circuit, firstly, the bias circuit has the following structure and connection relationship: the first end of the current source is connected to the first voltage terminal, the second end of the current source is connected to the first end of the first control module, the second end of the first control module is connected to the first end of the second control module, the second end of the second control module is connected to the second voltage terminal, and the second end of the current source is also connected to the control terminal of the second control module and the control terminal of the pull-up module, the first end of the pull-up module is connected to the first voltage terminal, and the second end of the pull-up module is connected to the control terminal of the first control module. Based on the above connection relationship, the bias circuit has the following functions: when the second terminal of the current source outputs a predetermined current to charge the control terminal of the second control module and the control terminal of the pull-up module, when the voltage of the control terminal of the second control module rises to the first voltage, the first terminal of the second control module is connected to the second terminal of the second control module; when the voltage of the control terminal of the pull-up module rises to the second voltage, the first terminal of the pull-up module and the second terminal of the pull-up module are connected, so that the first voltage terminal charges the control terminal of the first control module through the pull-up module; when the voltage of the control terminal of the first control module rises to the third voltage, the first terminal of the first control module and the second terminal of the first control module are connected. Then the bias circuit will form a fourth current path from the first voltage terminal through the current source, the first terminal and the second terminal of the first control module, and the first and second terminals of the second control module to the second voltage terminal.

[0079] Secondly, in terms of structure, the bias circuit also has the following structure and connection relationship: the first terminal of the third control module is connected to the first voltage terminal, the control terminal of the third control module is connected to the second terminal of the third control module, the second terminal of the third control module is connected to the third terminal of the first control module, the fourth terminal of the first control module is connected to the third terminal of the second control module, and the fourth terminal of the second control module is connected to the second voltage terminal. Based on the above connection relationship, the bias circuit functions as follows: after the voltage at the control terminal of the second control module reaches the first voltage, the third terminal and the fourth terminal of the second control module are connected; when the voltage at the control terminal of the first control module reaches the third voltage, the third terminal and the fourth terminal of the first control module are connected; then the second terminal of the third control module will be connected to the second voltage terminal through the third terminal and the fourth terminal of the first control module, as well as the third terminal and the fourth terminal of the second control module; the second voltage terminal discharges to the second terminal of the third control module and also discharges to the control terminal of the third control module; after the voltage at the control terminal of the third control module reaches the fourth voltage, the first terminal and the second terminal of the third control module are connected; then the bias circuit will form a fifth current path from the first voltage terminal through the first terminal and the second terminal of the third control module, the third terminal and the fourth terminal of the first control module, the third terminal and the fourth terminal of the second control module, to the second voltage terminal.

[0080] Furthermore, structurally, the bias circuit also has the following structure and connection relationships: the first terminal of the fourth control module is connected to the first voltage terminal, the first control terminal of the fourth control module is connected to the second terminal of the fourth control module, the second control terminal of the fourth control module is connected to the control terminal of the third control module, the second terminal of the fourth control module is connected to the seventh terminal of the first control module, the eighth terminal of the first control module is connected to the fifth terminal of the second control module, and the sixth terminal of the second control module is connected to the second voltage terminal. Based on the above connection relationship, the bias circuit functions as follows: after the voltage at the control terminal of the second control module rises to the first voltage, the fifth terminal and the sixth terminal of the second control module are connected; after the voltage at the control terminal of the first control module rises to the third voltage, the seventh terminal and the eighth terminal of the first control module are connected; then the second terminal of the fourth control module will be connected to the second voltage terminal through the seventh and eighth terminals of the first control module, the fifth terminal of the second control module, and the sixth terminal of the second control module; the second voltage terminal discharges to the second terminal of the fourth control module and also to the first control terminal of the fourth control module; after the voltage at the first control terminal of the fourth control module reaches the sixth voltage and the voltage at the second control terminal of the fourth control module reaches the fifth voltage, the first terminal and the second terminal of the fourth control module are connected; then the bias circuit will form a sixth current path from the first voltage terminal through the first and second terminals of the fourth control module, the seventh and eighth terminals of the first control module, the fifth terminal of the second control module, and the sixth terminal of the second control module to the second voltage terminal.

[0081] In addition, structurally, this bias circuit also has the following structure and connection relationships: the first terminal of the determining module is connected to the first voltage terminal, the first control terminal of the determining module is connected to the first control terminal of the fourth control module, the second control terminal of the determining module is connected to the control terminal of the third control module, the second terminal of the determining module is connected to the fifth terminal of the first control module, and the sixth terminal of the first control module is connected to the second voltage terminal. Based on the above connection relationships, the bias circuit functions as follows: when the voltage at the control terminal of the first control module rises to the third voltage, the fifth terminal and the sixth terminal of the first control module are turned on; when the voltage at the first control terminal of the determining module reaches the eighth voltage and the voltage at the second control terminal of the determining module reaches the seventh voltage, the first terminal and the second terminal of the determining module are turned on. Then, the bias circuit will form a seventh current path flowing from the first voltage terminal through the first terminal and the second terminal of the determining module, as well as the fifth and sixth terminals of the first control module, to the second voltage terminal. This means that in the above bias circuit, four current paths can be formed without setting resistors. The formation of four paths can determine the bias voltage, avoiding the area consumed by setting resistors in existing bias circuits, improving the reliability of the bias circuit and reducing the design difficulty of the bias circuit.

[0082] Furthermore, the bias circuit has pre-set values ​​for α, β, and γ. When the current at the sixth terminal of the first control module reaches α times the predetermined current, the first bias voltage output from the control terminal of the first control module is output to the first transistor of the cascode operational amplifier. The first transistor is an N-type transistor in the cascode structure of the cascode operational amplifier. When the current at the second terminal of the second control module reaches the predetermined current, the second bias voltage output from the control terminal of the second control module is output to the second transistor of the cascode operational amplifier. The first transistor is connected to ground through the second transistor, and the... The two transistors are N-type. When the current at the fourth terminal of the second control module reaches β times the predetermined current, the third bias voltage output from the control terminal of the third control module is output to the third transistor of the cascode operational amplifier. The third transistor is a P-type transistor in the cascode operational amplifier structure. When the current at the sixth terminal of the second control module reaches γ times the predetermined current, the fourth bias voltage output from the first control terminal of the fourth control module is output to the fourth transistor of the cascode operational amplifier. The third transistor is connected to the power supply through the fourth transistor, and the fourth transistor is P-type. This means that the current bias circuit does not require resistors; only the proportional relationships between the currents in the fifth, sixth, and seventh current paths and the current in the fourth current path—that is, the values ​​of α, β, and γ—need to be adjusted to determine the four bias voltages.

[0083] Reference Figure 4As shown, in some embodiments, in order to quickly reduce the voltage at the control terminal of the third control module 33 to the third voltage, the bias circuit 30 includes a pull-down module 37. The control terminal of the pull-down module 37 is connected to the second terminal of the fourth control module 34, the first terminal of the pull-down module 37 is connected to the control terminal of the third control module 33, and the second terminal of the pull-down module 37 is connected to the second voltage terminal. The pull-down module 37 is configured to conduct the first terminal and the second terminal of the pull-down module 37 to discharge to the control terminal of the third control module 33 after the voltage at the control terminal of the pull-down module 37 reaches the ninth voltage. Specifically, since the control terminal of the third control module 33 is also connected to the second terminal of the third control module 33, the second voltage terminal discharges to the control terminal of the third control module 33 through the third terminal and the fourth terminal of the first control module 31, as well as the third terminal and the fourth terminal of the second control module 32, forming the first discharge path of the control terminal of the third control module 33. Furthermore, the second voltage terminal discharges to the second terminal of the fourth control module 34 through the seventh and eighth terminals of the first control module 31, the fifth terminal of the second control module 32, and the sixth terminal of the second control module 32. The control terminal of the pull-down module 37 also discharges, causing a voltage drop at its control terminal. After the voltage at the control terminal of the pull-down module 37 drops to the ninth voltage, the first and second terminals of the pull-down module 37 are connected, and the first terminal of the pull-down module 37 is connected to the control terminal of the third control module 33. The second terminal of the pull-down module 37 is connected to the second voltage terminal. At this time, the control terminal of the third control module 33 is connected to the second voltage terminal through the pull-down module 37. When the second voltage terminal is ground (GND), the second voltage terminal discharges to the control terminal of the third control module 33, forming a second discharge path for the control terminal of the third control module 33. Discharging reduces the voltage at the control terminal of the third control module 33. At this time, the control terminal of the third control module 33 can discharge through two discharge paths, so that the voltage at the control terminal of the third control module 33 drops to the fourth voltage more quickly, and the third control module 33 can enter the working state more quickly.

[0084] For example, refer to Figure 5As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The second control module 32 in the bias circuit 30 includes transistors N321, N322, and N323; the first terminal of transistor N321 is connected to the first terminal of the second control module 32, the second terminal of transistor N321 is connected to the second terminal of the second control module 32, the first terminal of transistor N322 is connected to the third terminal of the second control module 32, the second terminal of transistor N322 is connected to the fourth terminal of the second control module 32, the first terminal of transistor N323 is connected to the fifth terminal of the second control module 32, and the second terminal of transistor N323 is connected to the sixth terminal of the second control module 32; the control terminals of transistors N321, N322, and N323 are connected to the control terminals of the second control module 32; transistors N321, N322, and N323 conduct after the voltage at the control terminal of the second control module 32 reaches the first voltage, and transistor N321 saturates after the current at the second terminal of the second control module 32 reaches a predetermined current. Specifically, taking N-type transistors N321, N322, and N323 as an example, the current source Bias transmits a predetermined current i300 to charge the control terminal of the second control module 32, thereby increasing the voltage at the control terminals of transistors N321, N322, and N323. When the voltage at the control terminals of transistors N321, N322, and N323 rises to a first voltage, transistors N321, N322, and N323 are turned on. When the dimensions of transistors N322 and N323 are the same as those of transistor N321, the first voltage can be the threshold voltage of transistor N321; when the dimensions of transistors N322 and N323 are different from those of transistor N321, the first voltage can be the threshold voltage of the transistor with the largest threshold voltage among transistors N321, N322, and N323. The first voltage terminal is the power supply Vdd. When the current flowing from the power supply Vdd through the current source, the first terminal and the second terminal of the first control module 31, and the fourth current path from transistor N321 to ground GND reaches the predetermined current i300, it indicates that the current in the fourth current path meets the requirements. At this point, transistor N321 is saturated, and the second bias voltage output from the control terminal of the second control module 32 can be output to... Figure 2 The second transistor of the cascode operational amplifier 20 shown is exemplarily described. The specific value of the second bias voltage can be calculated by substituting the parameters of transistor N321 into Formula 2 above, referring to... Figure 2The second bias voltage shown is bias voltage Vbn. The second transistor includes transistor N23 and transistor N24, and the dimensions of transistor N23 and transistor N24 are proportional to the dimensions of transistor N321.

[0085] For example, refer to Figure 6 As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The pull-up module 35 in the bias circuit 30 includes a transistor N351; the first terminal of transistor N351 is connected to the first terminal of the pull-up module 35, the second terminal of transistor N351 is connected to the second terminal of the pull-up module 35, and the control terminal of transistor N351 is connected to the control terminal of the pull-up module 35. Transistor N351 conducts after the voltage at the control terminal of the pull-up module 35 reaches the second voltage. Specifically, taking an N-type transistor as an example, the first voltage terminal of transistor N351 is the power supply Vdd, and the second terminal of the current source Bias transmits a predetermined current i300 to charge the control terminal of the pull-up module 35, thereby increasing the voltage at the control terminal of transistor N351. When the voltage at the control terminal of transistor N351 rises to the second voltage, transistor N351 conducts. This second voltage is the threshold voltage of transistor N351. The power supply Vdd charges the control terminal of the first control module 31 through transistor N351, thereby increasing the voltage at the control terminal of the first control module 31. For example, when the threshold voltage at the control terminal of transistor N351 is lower, transistor N351 can turn on more quickly, allowing the power supply Vdd to charge the control terminal of the first control module 31 more rapidly through transistor N351, resulting in a faster voltage rise at the control terminal of the first control module 31. Furthermore, since the first terminal of transistor N351 is connected to the power supply Vdd, while the second terminal is not connected to ground GND, no quiescent current is generated in transistor N351, and there is no power loss.

[0086] For example, refer to Figure 7As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The first control module 31 in the bias circuit 30 includes transistors N311, N312, N313, and N314; the first terminal of transistor N311 is connected to the first terminal of the first control module 31, the second terminal of transistor N311 is connected to the second terminal of the first control module 31, the first terminal of transistor N312 is connected to the third terminal of the first control module 31, the second terminal of transistor N312 is connected to the fourth terminal of the first control module 31, the first terminal of transistor N313 is connected to the fifth terminal of the first control module 31, and the second terminal of transistor N313 is connected to the sixth terminal of the first control module 31. The first terminal of transistor N314 is connected to the seventh terminal of the first control module 31, the second terminal of transistor N314 is connected to the eighth terminal of the first control module 31, and the control terminals of transistors N311, N312, N313, and N314 are connected to the control terminals of the first control module 31. Transistors N311, N312, N313, and N314 are turned on after the voltage at the control terminal of the first control module 31 reaches the third voltage, and transistor N313 saturates after the current at the sixth terminal of the first control module 31 reaches α times the predetermined current i300. Specifically, taking N-type transistors N311, N312, N313, and N314 as an example, the first voltage terminal is the power supply Vdd. When the first terminal of the pull-up module 35 is connected to the second terminal of the pull-up module 35, the power supply Vdd charges the control terminal of the first control module 31, thereby increasing the voltage at the control terminals of transistors N311, N312, N313, and N314. When the voltage at the control terminals of transistors N311, N312, N313, and N314 rises to the third voltage, transistors N311, N312, N313, and N314 are turned on. When the dimensions of transistors N312, N313, and N314 are different from those of transistor N311, N312, N313, and N314, this third voltage can be the threshold voltage of the transistor with the highest threshold voltage among transistors N311, N312, N313, and N314. Specifically, when the current flowing from the power supply Vdd through the first and second terminals of the determining module 36, and from transistor N313 to ground GND in the seventh current path is α times the predetermined current i300, it indicates that the current in the seventh current path meets the requirements. At this time, transistor N313 is saturated, and the first bias voltage output from the control terminal of the first control module 31 can be output to... Figure 2The first transistor of the cascode operational amplifier 20 shown, for example, can have its specific value calculated by substituting the parameters of transistor N313 into formula 2 above, referring to... Figure 2 The first bias voltage shown is the bias voltage Vbnc. The first transistor includes transistor N21 and transistor N22, and the dimensions of transistor N21 and transistor N22 are proportional to the dimensions of transistor N311.

[0087] For example, refer to Figure 8 As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The third control module 33 in the bias circuit 30 includes a transistor P331. The first terminal of transistor P331 is connected to the first terminal of the third control module 33, the second terminal of transistor P331 is connected to the second terminal of the third control module 33, and the control terminal of transistor P331 is connected to the control terminal of the third control module 33. Transistor P331 turns on after the voltage at the control terminal of the third control module 33 reaches the fourth voltage, and saturates after the current at the fourth terminal of the second control module 32 reaches β times the predetermined current i300. Specifically, taking a P-type transistor as an example, the second voltage terminal of transistor P331 is ground (GND). When the third and fourth terminals of the first control module 31 are connected, and the third and fourth terminals of the second control module 32 are connected, ground (GND) discharges to the second terminal of transistor P331. Since the control terminal of transistor P331 is connected to the second terminal of transistor P331, the voltage of the control terminal of transistor P331 is reduced. When the voltage of the control terminal of transistor P331 drops to the fourth voltage, transistor P331 turns on. This fourth voltage is the threshold voltage of transistor P331. The first voltage terminal is the power supply Vdd. When the current flowing from the power supply Vdd through transistor P331, the third and fourth terminals of the first control module 31, the third and fourth terminals of the second control module 32, and down to ground GND in the fifth current path is β times the predetermined current i300, it indicates that the current in the fifth current path meets the requirements. At this point, transistor P331 is saturated and can output the third bias voltage from the control terminal of the third control module 33 to... Figure 2 The third transistor of the cascode operational amplifier 20 shown, exemplarily, has a gate-source voltage Vgs between its gate and source. This voltage can be calculated by substituting the parameters of transistor P331 into formula 2 above. Therefore, the specific value of the third bias voltage is the gate-source voltage Vgs of transistor P331 minus the power supply voltage Vdd. (Refer to...) Figure 2 The third bias voltage shown is the bias voltage Vbpc, and the third transistor includes transistor P23 and transistor P24.

[0088] For example, refer to Figure 9 As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The fourth control module 34 in the bias circuit 30 includes transistors P341 and P342; the first terminal of transistor P341 is connected to the first terminal of the fourth control module 34, the second terminal of transistor P341 is connected to the first terminal of transistor P342, the second terminal of transistor P342 is connected to the second terminal of the fourth control module 34, the control terminal of transistor P341 is connected to the first control terminal of the fourth control module 34, and the control terminal of transistor P342 is connected to the second control terminal of the fourth control module 34; transistor P342 conducts after the voltage at the second control terminal of the fourth control module 34 reaches a fifth voltage, transistor P341 conducts after the voltage at the first control terminal of the fourth control module 34 reaches a sixth voltage, and transistor P341 saturates after the current at the sixth terminal of the second control module 32 reaches γ times the predetermined current. Specifically, transistors P341 and P342 are P-type transistors. The second voltage terminal is ground (GND). When the seventh and eighth terminals of the first control module 31 are connected, and the fifth and sixth terminals of the second control module 32 are connected, ground (GND) discharges to the second terminal of the fourth control module 34. Since the second terminal of the fourth control module 34 is connected to the first control terminal of the fourth control module 34, the voltage of the control terminal of transistor P341 decreases. When the voltage of the control terminal of transistor P341 decreases to the sixth voltage, and the second control terminal of the fourth control module 34 is connected to the control terminal of the third control module 33, after the voltage of the control terminal of transistor P342 decreases to the fifth voltage, transistors P341 and P342 are connected. This fifth voltage is the threshold voltage of transistor P342, and the sixth voltage is the threshold voltage of transistor P341. The first voltage terminal is the power supply Vdd. When the current flowing from the power supply Vdd through transistors P341 and P342, the seventh and eighth terminals of the first control module 31, the fifth and sixth terminals of the second control module 32, and down to ground GND, in the sixth current path, is γ times the predetermined current i300, it indicates that the current in the sixth current path meets the requirements. At this point, transistor P341 is saturated and can output the fourth bias voltage from the first control terminal of the fourth control module 34 to... Figure 2 The fourth transistor of the cascode operational amplifier 20 shown, exemplarily, has a gate-source voltage Vgs between its gate and source. This voltage can be calculated by substituting the parameters of transistor P341 into formula 2 above. Therefore, the specific value of the third bias voltage is the gate-source voltage Vgs of transistor P341 minus the power supply voltage Vdd. (Refer to...) Figure 2The fourth bias voltage shown is the bias voltage Vbp. The fourth transistor includes transistor P25 and transistor P26. The dimensions of transistor P25 and transistor P26 are proportional to the dimensions of transistor P341, and the dimensions of transistor P23 and transistor P24 are proportional to the dimensions of transistor P342.

[0089] For example, refer to Figure 10 As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The determining module 36 in the bias circuit 30 includes transistors P361 and P362; the first terminal of transistor P361 is connected to the first terminal of the determining module 36, the second terminal of transistor P361 is connected to the first terminal of transistor P362, the second terminal of transistor P362 is connected to the second terminal of the determining module 36, the control terminal of transistor P361 is connected to the first control terminal of the determining module 36, and the control terminal of transistor P362 is connected to the second control terminal of the determining module 36; transistor P362 turns on after the voltage at the second control terminal of the determining module 36 reaches the seventh voltage, and transistors P361 and the first control terminal of the determining module 36 turn on after the voltage reaches the eighth voltage. Specifically, transistors P361 and P362 are P-type transistors, with the second voltage terminal being ground (GND). The first control terminal of the determining module 36 is connected to the first control terminal of the fourth control module 34, and the second control terminal of the determining module 36 is connected to the control terminal of the third control module 33. When the voltage at the control terminal of transistor P361 drops to the eighth voltage and the voltage at the control terminal of transistor P362 drops to the seventh voltage, transistors P361 and P362 are turned on. The seventh voltage is the threshold voltage of transistor P362, and the eighth voltage is the threshold voltage of transistor P361.

[0090] It should be noted that the existence of the seventh current path is to determine the specific voltage value of the first bias voltage output by the control terminal of the first control module 31.

[0091] For example, refer to Figure 11As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The pull-down module 37 in the bias circuit 30 includes a transistor P371; the first terminal of transistor P371 is connected to the first terminal of the pull-down module 37, the second terminal of the fifth transistor P371 is connected to the second terminal of the pull-down module 37, and the control terminal of transistor P371 is connected to the control terminal of the pull-down module 37; transistor P371 conducts after the voltage at the control terminal of the pull-down module 37 reaches the ninth voltage. Specifically, taking a P-type transistor as an example, the second voltage terminal is GND. The second voltage terminal discharges to the control terminal of the pull-down module 37 through the seventh and eighth terminals of the first control module 31, and the fifth and sixth terminals of the second control module 32, thereby reducing the voltage at the control terminal of transistor P371. When the voltage at the control terminal of transistor P371 drops to the ninth voltage, transistor P371 conducts. This ninth voltage is the threshold voltage of transistor P371. Ground (GND) discharges to the control terminal of the third control module 33 through transistor P371, causing a decrease in the voltage at the control terminal of the third control module 33. When the absolute value of the threshold voltage at the control terminal of transistor P371 is smaller, transistor P371 can turn on more quickly, allowing ground (GND) to discharge to the control terminal of the third control module 33 more rapidly, resulting in a faster voltage decrease at the control terminal of the third control module 33. Furthermore, since the second terminal of transistor P371 is connected to ground (GND), while the first terminal is not connected to the power supply Vdd, no quiescent current is generated in transistor P371, and there is no power loss.

[0092] Reference Figure 12As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The first control module 31 in the bias circuit 30 includes transistors N311, N312, N313, and N314; the second control module 32 in the bias circuit 30 includes transistors N321, N322, and N323; the third control module 33 in the bias circuit 30 includes transistor P331; the fourth control module 34 in the bias circuit 30 includes transistors P341 and P342; the pull-up module 35 in the bias circuit 30 includes transistor N351; and the determining module 36 in the bias circuit 30 includes transistors P361 and P362. If transistors N322, N323, and N321 have the same dimensions, and transistors N312, N314, and N311 have the same dimensions, then the values ​​of β and γ are both 1, meaning the current in the fifth current path, the current in the sixth current path, and the current in the fourth current path are equal. If transistors P361 and P341 have the same dimensions, and transistors P362 and P342 have the same dimensions, then the values ​​of α and γ are equal.

[0093] For example, in the requirement Figure 12 When α, β, and γ are 1 in the bias circuit 30 shown, the ratio of the dimensions of transistor N321, transistor N322, and transistor N323 can be set to 1:1:1. If the ratio of the dimensions of transistor N321, transistor N322, and transistor N323 does not meet the 1:1:1 requirement, the dimensions of transistor N312, transistor N314, and transistor N311 can be adjusted to make β and γ equal to 1. The ratio of the dimensions of transistor P361 and transistor P341 can be set to 1:1. If the ratio of the dimensions of transistor P361 and transistor P341 does not meet the 1:1 requirement, the dimensions of transistor P362 and transistor P342 can be adjusted to make α equal to 1.

[0094] Figure 12 The working principle of the bias circuit 30 shown is as described above and will not be repeated here.

[0095] Reference Figure 13As shown, the first voltage terminal in the bias circuit 30 is the power supply Vdd, and the second voltage terminal is ground GND. The first control module 31 in the bias circuit 30 includes transistors N311, N312, N313, and N314. The second control module 32 in the bias circuit 30 includes transistors N321, N322, and N323. The third control module 33 in the bias circuit 30 includes transistor P331. The fourth control module 34 in the bias circuit 30 includes transistors P341 and P342. The pull-up module 35 in the bias circuit 30 includes transistor N351. The determining module 36 in the bias circuit 30 includes transistors P361 and P362. The pull-down module 37 in the bias circuit 30 includes transistor P371. Figure 13 The working principle of the bias circuit 30 shown is as described above and will not be repeated here.

[0096] Reference Figure 12 and Figure 13 As shown, it is understood that the module division in the bias circuit 30 provided in the embodiments of this application is illustrative and is only a logical function division. In actual implementation, there may be other division methods, and such changes in division methods are considered to be within the scope of protection of this application.

[0097] For example, embodiments of this application also provide an amplifier circuit, which includes a common-source cascode operational amplifier and a bias circuit as described in the above embodiments, wherein the bias circuit provides a bias voltage for the common-source cascode operational amplifier. The common-source cascode operational amplifier can be... Figure 2 The folded cascode operational amplifier shown may be a sleeve-type cascode operational amplifier. The embodiments of this application do not limit the structure of the cascode operational amplifier.

[0098] For example, embodiments of this application also provide an electronic device, which includes a printed circuit board (PCB) and an amplifier circuit disposed on the PCB. The electronic device includes mobile phones, computers, cameras, video cameras, etc. Embodiments of this application do not impose special limitations on the specific form of the electronic device.

[0099] It should be noted that, in order to clearly describe the various embodiments provided in this application, the types of transistors used in the embodiments of this application are shown. It is understood that, without departing from the spirit of this application, the types of transistors provided in the embodiments of this application can be adaptively changed, and the voltage of the corresponding control terminal of the transistor can also be adaptively changed. Such changes are considered to be within the scope of protection to be protected by this application.

[0100] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A bias circuit, characterized in that, include: Current source, pull-up module, first control module, second control module, third control module, fourth control module, and determination module; Wherein, the first end of the current source is connected to the first voltage terminal, the second end of the current source is connected to the control terminal of the pull-up module, the control terminal of the second control module, and the first end of the first control module; the first end of the pull-up module is connected to the first voltage terminal, the second end of the pull-up module is connected to the control terminal of the first control module; the second end of the first control module is connected to the first end of the second control module, the third end of the first control module is connected to the second end of the third control module, the fourth end of the first control module is connected to the third end of the second control module, the fifth end of the first control module is connected to the second end of the determining module, the sixth end of the first control module is connected to the second voltage terminal, and the seventh end of the first control module is connected to the fourth control module. The second end of the block, the eighth end of the first control module is connected to the fifth end of the second control module; the second end of the second control module is connected to the second voltage terminal, the fourth end of the second control module is connected to the second voltage terminal, and the sixth end of the second control module is connected to the second voltage terminal; the first end of the third control module is connected to the first voltage terminal, and the control terminal of the third control module is connected to the second end of the third control module, the second control terminal of the determining module, and the second control terminal of the fourth control module; the first end of the fourth control module is connected to the first voltage terminal, and the first control terminal of the fourth control module is connected to the first control terminal of the determining module and the second end of the fourth control module; the first end of the determining module is connected to the first voltage terminal; The current source is configured to output a predetermined current at its second terminal; The second control module is configured to, after the voltage at the control terminal of the second control module reaches the first voltage, connect the first terminal of the second control module to the second terminal of the second control module, connect the third terminal of the second control module to the fourth terminal of the second control module, and connect the fifth terminal of the second control module to the sixth terminal of the second control module. The pull-up module is configured to connect the first terminal of the pull-up module to the second terminal of the pull-up module after the voltage at the control terminal of the pull-up module reaches the second voltage. The first control module is configured to connect the first terminal of the first control module to the second terminal of the first control module, connect the third terminal of the first control module to the fourth terminal of the first control module, connect the fifth terminal of the first control module to the sixth terminal of the first control module, and connect the seventh terminal of the first control module to the eighth terminal of the first control module after the voltage at the control terminal of the first control module reaches the third voltage. The third control module is configured to connect the first terminal of the third control module to the second terminal of the third control module after the voltage at the control terminal of the third control module reaches the fourth voltage. The fourth control module is configured to connect the first terminal and the second terminal of the fourth control module after the voltage at the second control terminal of the fourth control module reaches the fifth voltage and the voltage at the first control terminal of the fourth control module reaches the sixth voltage. The determining module is configured to connect the first terminal of the determining module to the second terminal of the determining module after the voltage at the second control terminal of the determining module reaches the seventh voltage and the voltage at the first control terminal of the determining module reaches the eighth voltage.

2. The bias circuit according to claim 1, characterized in that, When the current at the sixth terminal of the first control module reaches α times the predetermined current, the first bias voltage output from the control terminal of the first control module is output to the first transistor of the common-source cascode operational amplifier. The first transistor is an N-type transistor in the common-source cascode structure of the common-source cascode operational amplifier. When the current at the second terminal of the second control module reaches the predetermined current, the second bias voltage output from the control terminal of the second control module is output to the second transistor of the common-source cascode operational amplifier. The first transistor is connected to ground through the second transistor, and the second transistor is of type N. When the current at the fourth terminal of the second control module reaches β times the predetermined current, the third bias voltage output from the control terminal of the third control module is output to the third transistor of the common-source cascode operational amplifier. The third transistor is a P-type transistor in the common-source cascode structure of the common-source cascode operational amplifier. When the current at the sixth terminal of the second control module reaches γ times the predetermined current, the fourth bias voltage output from the first control terminal of the fourth control module is output to the fourth transistor of the common-source cascode operational amplifier. The third transistor is connected to the power supply through the fourth transistor, and the fourth transistor is P-type.

3. The bias circuit according to claim 1, characterized in that, The bias circuit also includes a pull-down module; The control terminal of the pull-down module is connected to the second terminal of the fourth control module, the first terminal of the pull-down module is connected to the control terminal of the third control module, and the second terminal of the pull-down module is connected to the second voltage terminal. The pull-down module is configured to, after the voltage at the control terminal of the pull-down module reaches the ninth voltage, connect the first terminal of the pull-down module to the second terminal of the pull-down module, so as to discharge to the control terminal of the third control module, the second control terminal of the determining module, and the second control terminal of the fourth control module.

4. The bias circuit according to claim 3, characterized in that, The pull-down module includes a fifth transistor; The first terminal of the fifth transistor is connected to the first terminal of the pull-down module, the second terminal of the fifth transistor is connected to the second terminal of the pull-down module, and the control terminal of the fifth transistor is connected to the control terminal of the pull-down module. The fifth transistor turns on after the voltage at the control terminal of the pull-down module reaches the ninth voltage.

5. The bias circuit according to any one of claims 1-3, characterized in that, The determining module includes a sixth transistor and a seventh transistor; The first terminal of the sixth transistor is connected to the first terminal of the determining module, the second terminal of the sixth transistor is connected to the first terminal of the seventh transistor, the second terminal of the seventh transistor is connected to the second terminal of the determining module, the control terminal of the sixth transistor is connected to the first control terminal of the determining module, and the control terminal of the seventh transistor is connected to the second control terminal of the determining module. The seventh transistor turns on after the voltage at the second control terminal of the determining module reaches the seventh voltage, and the sixth transistor turns on after the voltage at the first control terminal of the determining module reaches the eighth voltage.

6. The bias circuit according to any one of claims 1-3, characterized in that, The pull-up module includes an eighth transistor; The first terminal of the eighth transistor is connected to the first terminal of the pull-up module, the second terminal of the eighth transistor is connected to the second terminal of the pull-up module, and the control terminal of the eighth transistor is connected to the control terminal of the pull-up module. The eighth transistor turns on after the voltage at the control terminal of the pull-up module reaches the second voltage.

7. The bias circuit according to any one of claims 1-3, characterized in that, The first control module includes a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor; The first terminal of the ninth transistor is connected to the first terminal of the first control module, the second terminal of the ninth transistor is connected to the second terminal of the first control module, the first terminal of the tenth transistor is connected to the third terminal of the first control module, the second terminal of the tenth transistor is connected to the fourth terminal of the first control module, the first terminal of the eleventh transistor is connected to the fifth terminal of the first control module, the second terminal of the eleventh transistor is connected to the sixth terminal of the first control module, the first terminal of the twelfth transistor is connected to the seventh terminal of the first control module, the second terminal of the twelfth transistor is connected to the eighth terminal of the first control module, and the control terminals of the ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor are connected to the control terminal of the first control module. The ninth, tenth, eleventh, and twelfth transistors turn on after the voltage at the control terminal of the first control module reaches the third voltage, and the eleventh transistor saturates after the current at the sixth terminal of the first control module reaches α times the predetermined current.

8. The bias circuit according to any one of claims 1-3, characterized in that, The second control module includes a thirteenth transistor, a fourteenth transistor, and a fifteenth transistor; The first terminal of the thirteenth transistor is connected to the first terminal of the second control module, the second terminal of the thirteenth transistor is connected to the second terminal of the second control module, the first terminal of the fourteenth transistor is connected to the third terminal of the second control module, the second terminal of the fourteenth transistor is connected to the fourth terminal of the second control module, the first terminal of the fifteenth transistor is connected to the fifth terminal of the second control module, and the second terminal of the fifteenth transistor is connected to the sixth terminal of the second control module; the control terminals of the thirteenth transistor, the fourteenth transistor, and the fifteenth transistor are connected to the control terminal of the second control module. The thirteenth transistor, the fourteenth transistor, and the fifteenth transistor turn on after the voltage at the control terminal of the second control module reaches the first voltage, and the thirteenth transistor saturates after the current at the second terminal of the second control module reaches the predetermined current.

9. The bias circuit according to any one of claims 1-3, characterized in that, The third control module includes a sixteenth transistor. The first terminal of the sixteenth transistor is connected to the first terminal of the third control module, the second terminal of the sixteenth transistor is connected to the second terminal of the third control module, and the control terminal of the sixteenth transistor is connected to the control terminal of the third control module. The sixteenth transistor turns on after the voltage at the control terminal of the third control module reaches the fourth voltage, and saturates after the current at the fourth terminal of the second control module reaches β times the predetermined current.

10. The bias circuit according to any one of claims 1-3, characterized in that, The fourth control module includes a seventeenth transistor and an eighteenth transistor; The first terminal of the seventeenth transistor is connected to the first terminal of the fourth control module, the second terminal of the seventeenth transistor is connected to the first terminal of the eighteenth transistor, the second terminal of the eighteenth transistor is connected to the second terminal of the fourth control module, the control terminal of the seventeenth transistor is connected to the first control terminal of the fourth control module, and the control terminal of the eighteenth transistor is connected to the second control terminal of the fourth control module. The eighteenth transistor turns on after the voltage at the second control terminal of the fourth control module reaches the fifth voltage, the seventeenth transistor turns on after the voltage at the first control terminal of the fourth control module reaches the sixth voltage, and the seventeenth transistor saturates after the current at the sixth terminal of the second control module reaches γ times the predetermined current.

11. An amplifier circuit, characterized in that, It includes a common-source cascode operational amplifier and a bias circuit as described in any one of claims 1-10, wherein the bias circuit provides a bias voltage for the common-source cascode operational amplifier.

12. An electronic device, characterized in that, The electronic device includes a printed circuit board and an amplifier circuit as described in claim 11 disposed on the printed circuit board.

Citation Information

Patent Citations

  • Multimode radio frequency power amplifier circuit and current bias method thereof

    CN103441738A

  • Bias current circuit

    CN108536208A