A circuit package structure based on three-dimensional heterogeneous stack

Abstract

A kind of circuit package structure based on three-dimensional heterogeneous laminated structure, the top layer edge of ceramic substrate is welded metal frame, the top layer of ceramic substrate is welded silicon MEMS substrate, the height of metal frame exceeds silicon MEMS substrate, the top layer of metal frame is welded metal cover plate, ceramic substrate, metal frame, metal cover plate form the cavity of airtight package, MEMS substrate is in the cavity, the top layer of ceramic substrate has pad, the bottom layer of silicon MEMS substrate has pad, all are welded internal BGA, the signal of ceramic substrate and silicon MEMS substrate is interconnected by internal BGA, the bottom layer of ceramic substrate has pad, and is welded external BGA, the signal of ceramic substrate is interconnected by external BGA and other substrate, ceramic substrate and silicon MEMS substrate are all stacked by multiple layers, have multiple vertical through holes and multiple horizontal wiring, each through hole is connected to any layer respectively, each wiring is on the surface or inside of multilayer board and is connected to any through hole respectively, silicon MEMS substrate is internally printed pattern and micro-bump using wafer bonding process.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of circuit packaging, and particularly relates to a multilayer circuit design technology. BACKGROUND

[0002] The echo signal of a phased array antenna is amplified again after primary amplification, and is filtered, frequency-converted, gain-adjusted, and temperature-compensated. This part of circuit is called a receiving frequency conversion filter circuit, which improves the dynamic range, temperature drift resistance, and spurious frequency suppression capability of the system, and is applied to the fields of communication systems, aerospace, etc. The miniaturization trend of phased array radar systems promotes the development of the receiving frequency conversion filter circuit to miniaturization, and there is a problem of trade-off between high performance, multi-function, and miniaturization.

[0003] The function of the receiving frequency conversion filter circuit is directly related to the types of contained elements: the GaAs chip has the functions of amplification, attenuation, packaging, and filtering, the ceramic resistor has the function of temperature compensation, the acoustic filter device has the function of high-performance filtering, the silicon-based MEMS has the function of high-performance gating filtering, the resistor capacitor has the function of suppressing low-frequency interference, and the silicon substrate has the function of power supply processing. Improving the integration of the receiving frequency conversion filter circuit, improving the integration and compatibility of various elements, especially the high-density integration of high-performance and multi-functional receiving frequency conversion filter circuits, becomes particularly urgent.

[0004] The three-dimensional laminated structure of the prior art is isomorphic integration, or has few functions, or has low performance, or cannot be airtight. For example: the ceramic substrate three-dimensional structure has strong wiring capability, but the number of integrated devices, especially passive elements, is small or the performance is low; the silicon substrate three-dimensional structure can manufacture high-performance passive elements, but has poor wiring capability, poor integration capability, and cannot be airtight. SUMMARY

[0005] In order to solve the technical problems of few functions, low performance, and inability to be airtight of three-dimensional isomorphic laminates, a three-dimensional heterogeneous laminate, a combination of a ceramic substrate and a silicon MEMS substrate, a metal frame, and a bonding wire shielding technical solution are adopted, which produces the technical effects of small packaging size, multiple functions, high performance, anti-interference, and compatibility.

[0006] The top edge of the ceramic substrate is welded with a metal surrounding frame, the top middle of the ceramic substrate is welded with a silicon MEMS substrate, the height of the metal surrounding frame exceeds that of the silicon MEMS substrate, the top layer of the metal surrounding frame is welded with a metal cover plate, the ceramic substrate, the metal surrounding frame, and the metal cover plate form an airtight packaging cavity, and the MEMS substrate is in the cavity.

[0007] The top layer of the ceramic substrate has a solder pad, the bottom layer of the silicon MEMS substrate has a solder pad, and the internal BGA is soldered. The signals of the ceramic substrate and the silicon MEMS substrate are interconnected through the internal BGA. The bottom layer of the ceramic substrate has a solder pad, and the external BGA is soldered. The signals of the ceramic substrate are interconnected with other substrates through the external BGA.

[0008] The mounting position of the silicon MEMS substrate is determined by measuring the gap between the edge of the silicon MEMS substrate and the metal frame. The bottom layer solder pad of the silicon MEMS substrate is aligned with the internal BGA and the top layer solder pad of the ceramic substrate. The silicon MEMS substrate is cut at the corners.

[0009] The ceramic substrate and the silicon MEMS substrate are both multi-layer stacked, with multiple vertical through holes and multiple horizontal wires. Each through hole is connected to any layer, can be connected to all layers, can be connected to the top and bottom layers, can be connected to several internal layers, and can be connected to non-adjacent layers. Each wire is on the surface or inside the multi-layer board and is connected to any through hole. It can be used as a ground wire, a signal wire, or a bonding wire. The silicon MEMS substrate is internally printed with patterns and micro-bumps using wafer bonding technology.

[0010] Multiple cavities are excavated in the top layer of the ceramic substrate. The depth of the cavity is adjusted according to the working frequency and the height of the device. The chip is installed at the bottom of the cavity, connected to the wiring through the bonding wire, and connected to the top layer solder pad through the through hole. Multiple cavities are excavated in the silicon MEMS substrate, and the chip is installed. The chip is connected to the pattern and wiring through the bonding wire, and connected to the bottom layer solder pad through the through hole, realizing the signal interconnection of the ceramic substrate chip and the silicon MEMS substrate chip.

[0011] The wiring of the ceramic substrate is connected to the metal frame and the metal cover through the through hole, forming an electromagnetic shielding shell. The wiring of the ceramic substrate is connected to the solder pad, through hole, wiring, and micro-bump of the silicon MEMS substrate through the through hole, solder pad, and internal BGA, forming multiple separate electromagnetic shielding cavities.

[0012] According to the functional and performance requirements of the package, the thickness of the ceramic substrate and the number of layers of the silicon MEMS substrate are adjusted. The ceramic substrate is co-fired at high temperature from aluminum nitride or aluminum oxide. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a side perspective view, Figure 2 is a top view, Figure 3 is a top perspective view, Figure 4 is a side view, Figure 5 is a shielding principle diagram. EMBODIMENTS

[0014] The following will be described in detail in combination with the drawings, taking a 5-layer silicon MEMS substrate as an example.

[0015] A metal frame 103 is welded to the top edge of the ceramic substrate 101, and a silicon MEMS substrate 102 is welded to the middle of the top layer of the ceramic substrate, as shown. Figure 1 and Figure 4 As shown, the height of the metal frame 103 exceeds that of the silicon MEMS substrate 102, and a metal cover plate 104 is welded to the top layer of the metal frame 103, as shown. Figure 2 and Figure 3 As shown, a ceramic substrate, a metal frame, and a metal cover plate form a hermetically sealed cavity, within which a silicon MEMS substrate is housed.

[0016] The top layer of the ceramic substrate 101 has pads 202, and the bottom layer of the silicon MEMS substrate 102 has pads 203, both of which are soldered to the internal BGA 201. Signals from the ceramic substrate and the silicon MEMS substrate are interconnected via the internal BGA. The bottom layer of the ceramic substrate 101 has pads 301, which are soldered to the external BGA 302. Figure 1 and Figure 4 As shown, the signals on the ceramic substrate are interconnected with external BGA and other substrates.

[0017] The mounting position of the silicon MEMS substrate is determined by measuring the gap 121 between the edge of the silicon MEMS substrate 102 and the metal frame 103, so that the bottom pad 203 of the silicon MEMS substrate 102 is aligned with the internal BGA 201 and the top pad 202 of the ceramic substrate, as shown. Figure 1 and Figure 3 As shown, the silicon MEMS substrate has beveled corners around its perimeter.

[0018] Multiple cavities are cut out from the top layer of the ceramic substrate 101, and a chip 107 is installed at the bottom of the cavity 105. Figure 1 and Figure 3 As shown, the chip is connected to wiring 212 via bonding wire 109 and to the top layer pad via via 206. Multiple cavities 106 are cut out inside the silicon MEMS substrate 102 to mount the chip 108. The chip is connected to wiring 111 via bonding wire 110 and to the bottom layer pad via via, thus realizing the signal interconnection between the ceramic substrate chip 107 and the silicon MEMS substrate chip 108.

[0019] The wiring 211 of the ceramic substrate 101 is connected to the metal frame 103 and the metal cover plate 104 through the through-hole 204 to form an electromagnetic shielding shell 112, such as Figure 1 and Figure 5 As shown, the wiring 210 of the ceramic substrate 101 is connected to the pads 203, through-holes 207, wiring 213 and microbumps 208 of the silicon MEMS substrate through through-holes 205, pads 202 and BGA 201 to form multiple separate electromagnetic shielding cavities 209.

[0020] The above is the embodiment of the present application, and does not limit the present application. Any modification, equivalent replacement and improvement within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A circuit packaging structure based on a three-dimensional heterogeneous stack, characterized in that, include: A metal frame is welded to the top edge of the ceramic substrate, and a silicon MEMS substrate is welded to the middle of the top layer of the ceramic substrate. The height of the metal frame exceeds that of the silicon MEMS substrate. A metal cover plate is welded to the top of the metal frame. The ceramic substrate, metal frame, and metal cover plate form a hermetically sealed cavity, within which the silicon MEMS substrate is located. The top layer of the ceramic substrate has pads, and the bottom layer of the silicon MEMS substrate has pads, both for welding internal BGAs. Signals from the ceramic substrate and the silicon MEMS substrate are interconnected via the internal BGAs. The bottom layer of the ceramic substrate has pads for welding external BGAs, and signals from the ceramic substrate are interconnected with other substrates via the external BGAs. Both the ceramic substrate and the silicon MEMS substrate are multi-layered, with multiple vertical vias and multiple horizontal wirings. Each via connects to any layer, and each wiring is located on the surface or inside the multi-layer board, connecting to any via. Patterns and microbumps are printed inside the silicon MEMS substrate using wafer bonding technology. The wiring on the ceramic substrate is connected to the metal frame and metal cover plate through through-holes to form an electromagnetic shielding shell. The wiring on the ceramic substrate is connected to the pads, through-holes, wiring, and micro-bumps of the silicon MEMS substrate through through-holes, pads, and internal BGA to form multiple separate electromagnetic shielding cavities. Multiple cavities are cut out from the top layer of the ceramic substrate, and the cavity depth is adjusted according to the operating frequency and device height. Chips are installed at the bottom of the cavities, and the chips are connected to the wiring through bonding wires and then connected to the top layer pads through through-holes. Multiple cavities are cut out inside the silicon MEMS substrate, and chips are installed. The chips are connected to the pattern and wiring through bonding wires and then connected to the bottom layer pads through through-holes to realize the signal interconnection between the ceramic substrate chip and the silicon MEMS substrate chip. The mounting position of the silicon MEMS substrate is determined by measuring the gap between the edge of the silicon MEMS substrate and the metal frame, so that the bottom pads of the silicon MEMS substrate are aligned with the internal BGA and the top layer pads of the ceramic substrate.

2. The circuit packaging structure based on three-dimensional heterogeneous stacking according to claim 1, characterized in that, The ceramic substrate is formed by high-temperature co-firing of aluminum nitride or aluminum oxide.

3. The circuit packaging structure based on three-dimensional heterogeneous stacking according to claim 1, characterized in that, The thickness of the ceramic substrate and the number of layers of the silicon MEMS substrate are adjusted according to the functional and performance requirements of the packaging.

4. The circuit packaging structure based on three-dimensional heterogeneous stacking according to claim 1, characterized in that, The silicon MEMS substrate has beveled corners around its perimeter.

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