High frequency module and communication device

Abstract

The application is small and improves the detection precision. The high frequency module (100) comprises an antenna terminal, a signal input terminal, a signal output terminal, a mounting substrate (9), a chip inductor (601) and a directional coupler (80). The mounting substrate (9) has a first main surface (91) and a second main surface (92) opposite to each other. The chip inductor (601) is mounted on the first main surface (91) of the mounting substrate (9) and arranged in at least one of a transmission path between the antenna terminal and the signal input terminal and a receiving path between the antenna terminal and the signal output terminal. The directional coupler (80) is mounted on the second main surface (92) of the mounting substrate (9) and at least a part of which is arranged in the transmission path.

Description

TECHNICAL FIELD

[0001] The present application relates generally to a high-frequency module and a communication device, and more particularly to a high-frequency module having a mounting substrate and a communication device having the high-frequency module. BACKGROUND

[0002] A coupler module (high-frequency module) having a module substrate (mounting substrate), a first component, and a second component is described in Patent Literature 1. The first component has a directional coupler including a main line and a sub line. The second component is, for example, constituted by a capacitor and an inductor, and is an LC resonance filter that processes a signal flowing through the main line or the sub line. The first component and the second component are adjacently mounted on the same main surface of the module substrate.

[0003] Patent Literature 1: International Publication No. 2020 / 129892

[0004] In the coupler module described in Patent Literature 1, the first component and the second component are adjacent on the same main surface of the module substrate, and sometimes the detection accuracy is reduced due to interference of signals or jumping of signals. In addition, in the coupler module described in Patent Literature 1, the number of components mounted on the same main surface of the module substrate is large, and there is a case where the module is large-sized. SUMMARY

[0005] An object of the present application is to provide a high-frequency module and a communication device that can be reduced in size and can suppress reduction in detection accuracy.

[0006] A high-frequency module of one embodiment of the present application includes an antenna terminal, a signal input terminal, a signal output terminal, a mounting substrate, a chip inductor, and a directional coupler. The signal input terminal inputs a transmission signal. The signal output terminal outputs a reception signal. The mounting substrate has a first main surface and a second main surface that face each other. The chip inductor is mounted on the first main surface of the mounting substrate, and is provided in at least one of a transmission path between the antenna terminal and the signal input terminal and a reception path between the antenna terminal and the signal output terminal. The directional coupler is mounted on the second main surface of the mounting substrate, and at least a part of the directional coupler is provided in the transmission path.

[0007] A communication device of one embodiment of the present application includes the above high-frequency module and a signal processing circuit. The signal processing circuit is connected to the high-frequency module.

[0008] According to the high-frequency module and the communication device of one embodiment of the present application, the high-frequency module and the communication device can be reduced in size and can suppress reduction in detection accuracy. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1This is a top view of the high-frequency module of Embodiment 1, omitting the shielding layer and the resin layer.

[0010] Figure 2 This is a top view of the aforementioned high-frequency module, showing the second main surface of the mounting substrate and the circuit components and multiple external connection terminals disposed on the second main surface of the mounting substrate, viewed from the first main surface side of the mounting substrate.

[0011] Figure 3 This is a cross-sectional view of the aforementioned high-frequency module.

[0012] Figure 4 This is a circuit diagram of a communication device equipped with the aforementioned high-frequency module.

[0013] Figure 5 This is a circuit structure diagram of the main parts of the aforementioned high-frequency module.

[0014] Figure 6 This is a cross-sectional view of the high-frequency module of a modified embodiment 1.

[0015] Figure 7 This is a circuit structure diagram of the main parts of the high-frequency module in Implementation Method 2.

[0016] Figure 8 This is a circuit structure diagram of the main parts of the high-frequency module in a variation of Embodiment 2, Example 1.

[0017] Figure 9 This is a circuit structure diagram of the main parts of the high-frequency module in a variation of embodiment 2. Detailed Implementation

[0018] The following implementation methods, etc., refer to Figures 1-3 as well as Figure 6 These are all schematic diagrams, and the size and thickness ratios of the constituent elements in the diagrams may not reflect the actual size ratios.

[0019] (Implementation Method 1)

[0020] like Figures 1-4As shown, the high-frequency module 100 of Embodiment 1 is provided with the antenna terminal 81, the signal input terminals 82, 83, the signal output terminals 84, 85, the mounting substrate 9, the chip inductor 601, and the directional coupler 80. The signal input terminals 82, 83 are terminals that input a transmission signal. The signal output terminals 84, 85 are terminals that output a reception signal. The mounting substrate 9 has a first main surface 91 and a second main surface 92 that face each other. The chip inductor 601 is mounted to the first main surface 91 of the mounting substrate 9. The chip inductor 601 is disposed in at least one of the transmission path T1 and the reception path R1. The transmission path T1 is a path between the antenna terminal 81 and the signal input terminals 82, 83. The reception path R1 is a path between the antenna terminal 81 and the signal output terminals 84, 85. The directional coupler 80 is mounted to the second main surface 92 of the mounting substrate 9, and at least a portion (main line 801) thereof is disposed in the transmission path T1.

[0021] In the high-frequency module 100 of Embodiment 1, as described above, the chip inductor 601 is mounted to the first main surface 91 of the mounting substrate 9, and the directional coupler 80 is mounted to the second main surface 92 of the mounting substrate 9. Thereby, compared to a case where both the chip inductor and the directional coupler are mounted to the first main surface of the mounting substrate, it is possible to downsize in a direction that intersects the thickness direction D1 of the mounting substrate 9. In addition, in the high-frequency module 100 of Embodiment 1, it is possible to suppress the jump of signals between the chip inductor 601 and the directional coupler 80, and as a result, it is possible to suppress the reduction in the detection accuracy. That is, according to the high-frequency module 100 of Embodiment 1, it is possible to downsize and suppress the reduction in the detection accuracy.

[0022] Hereinafter, the high-frequency module 100 of Embodiment 1 and the communication device 300 will be described in more detail with reference to Figures 1-5

[0023] (1) High-frequency module and communication device

[0024] (1.1) Circuit structure of high-frequency module and communication device

[0025] First, the circuit structure of the high-frequency module 100 of Embodiment 1 and the communication device 300 will be described with reference to Figure 4

[0026] ​​The high-frequency module 100 is used in, for example, a communication device 300. The communication device 300 is, for example, a mobile phone (for example, a smartphone), but is not limited to a mobile phone, and can be, for example, a wearable terminal (for example, a smartwatch). The high-frequency module 100 is, for example, a module capable of coping with a 4G (fourth generation mobile communication) standard, a 5G (fifth generation mobile communication) standard, and the like. The 4G standard is, for example, a 3GPP (Third Generation Partnership Project) LTE (Long Term Evolution) standard. The 5G standard is, for example, 5G NR (New Radio). The high-frequency module 100 is, for example, a module capable of coping with carrier aggregation and dual connectivity.

[0027] The high-frequency module 100 is capable of coping with simultaneous communication in which a plurality of (two in Embodiment 1) frequency bands (a first frequency band and a second frequency band) are simultaneously used in the uplink. The high-frequency module 100 is configured to be capable of amplifying a transmission signal (a high-frequency signal) of the first frequency band input from the signal processing circuit 301 by the first power amplifier 11 and outputting to the antenna 310. In addition, the high-frequency module 100 is configured to be capable of amplifying a transmission signal (a high-frequency signal) of the second frequency band input from the signal processing circuit 301 by the second power amplifier 12 and outputting to the antenna 310. In addition, the high-frequency module 100 further has a first low-noise amplifier 21 and is configured to be capable of amplifying a reception signal (a high-frequency signal) of the first frequency band input from the antenna 310 by the first low-noise amplifier 21 and outputting to the signal processing circuit 301. In addition, the high-frequency module 100 further has a second low-noise amplifier 22 and is configured to be capable of amplifying a reception signal (a high-frequency signal) of the second frequency band input from the antenna 310 by the second low-noise amplifier 22 and outputting to the signal processing circuit 301. The signal processing circuit 301 is not a structural element of the high-frequency module 100, but is a structural element of the communication device 300 that has the high-frequency module 100. The high-frequency module 100 is controlled by, for example, the signal processing circuit 301 possessed by the communication device 300. The communication device 300 has the high-frequency module 100 and the signal processing circuit 301. The communication device 300 further has the antenna 310. The communication device 300 further has a circuit board (not shown) on which the high-frequency module 100 is mounted. The circuit board is, for example, a printed wiring board. The circuit board has a ground electrode to which a ground potential is applied.

[0028] The signal processing circuit 301 includes, for example, an RF signal processing circuit 302 and a baseband signal processing circuit 303. The RF signal processing circuit 302 is, for example, an RFIC (Radio Frequency Integrated Circuit). The RF signal processing circuit 302 performs signal processing for a high-frequency signal. The RF signal processing circuit 302 performs, for example, signal processing such as up-conversion on a high-frequency signal (a transmission signal) output from the baseband signal processing circuit 303, and outputs the high-frequency signal subjected to the signal processing to the high-frequency module 100. In addition, the RF signal processing circuit 302 performs, for example, signal processing such as down-conversion on a high-frequency signal (a reception signal) output from the high-frequency module 100, and outputs the high-frequency signal subjected to the signal processing to the baseband signal processing circuit 303. The baseband signal processing circuit 303 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 303 generates an I-phase signal and a Q-phase signal from a baseband signal. The baseband signal is, for example, a sound signal, an image signal, or the like input from the outside. The baseband signal processing circuit 303 performs IQ modulation processing by synthesizing the I-phase signal and the Q-phase signal, and outputs a transmission signal. At this time, the transmission signal is generated as a modulated signal (an IQ signal) in which a carrier signal of a prescribed frequency is amplitude-modulated at a period longer than a period of the carrier signal. The reception signal processed by the baseband signal processing circuit 303 is used, for example, as an image signal for image display or as a sound signal for a telephone call. The high-frequency module 100 transmits a high-frequency signal (a reception signal, a transmission signal) between the antenna 310 and the RF signal processing circuit 302 of the signal processing circuit 301.

[0029] The high-frequency module 100 includes a first power amplifier 11, a second power amplifier 12, a first switch 51, a second switch 52, a plurality of (for example, four) filters 61 to 64. In addition, the high-frequency module 100 includes a controller 20. In addition, the high-frequency module 100 includes a first output matching circuit 31, a second output matching circuit 32, a plurality of (for example, four) matching circuits 71 to 74. In addition, the high-frequency module 100 includes a first low-noise amplifier 21, a second low-noise amplifier 22, a first input matching circuit 41, a second input matching circuit 42. In addition, the high-frequency module 100 includes a third switch 53, a fourth switch 54. In addition, the high-frequency module 100 includes a low-pass filter 60. In addition, the high-frequency module 100 includes a fifth switch 55, a sixth switch 56. In addition, the high-frequency module 100 includes a directional coupler 80. In addition, the high-frequency module 100 includes a filter 65 (refer to Figure 1 ), a matching circuit 75 (refer to Figure 1). The filter 61 is a duplexer having a transmission filter 611 and a reception filter 612. The filter 62 is a duplexer having a transmission filter 621 and a reception filter 622. The filter 63 is a duplexer having a transmission filter 631 and a reception filter 632. The filter 64 is a duplexer having a transmission filter 641 and a reception filter 642. The filter 65 is a duplexer having a transmission filter 651 and a reception filter 652.

[0030] In addition, the high-frequency module 100 is provided with a plurality of external connection terminals 8. The plurality of external connection terminals 8 include an antenna terminal 81, two signal input terminals 82, 83, two signal output terminals 84, 85, a plurality of (four) control terminals 86. In addition, the plurality of external connection terminals 8 further include an output terminal 87, a plurality of (for example, three) input terminals 881, 882, 883, a plurality of ground terminals 89 (refer to FIG. 2). Figure 2 Figure 4 In FIG. 1, only one of the four control terminals 86 is illustrated. The plurality of ground terminals 89 are terminals to which a ground potential is applied in electrical connection with the ground electrodes of the circuit board provided in the communication device 300. In the high-frequency module 100 of Embodiment 1, a plurality of signal terminals are constituted by the output terminal 87 and the plurality of input terminals 881, 882, 883.

[0031] Hereinafter, the circuit structure of the high-frequency module 100 will be described in more detail based on FIG. 2. Figure 4

[0032] The first power amplifier 11 has a first input terminal and a first output terminal. The first power amplifier 11 amplifies a transmission signal of a first frequency band input to the first input terminal and outputs from the first output terminal. The first frequency band includes, for example, a transmission frequency band of a first communication band and a transmission frequency band of a second communication band. The first communication band is a communication band corresponding to a transmission signal passing through the transmission filter 611 of the filter 61. The second communication band is a communication band corresponding to a transmission signal passing through the transmission filter 621 of the filter 62.

[0033] ​​The first input terminal of the first power amplifier 11 is connected to a signal input terminal 82. The first input terminal of the first power amplifier 11 is connected to the signal processing circuit 301 via the signal input terminal 82. The signal input terminal 82 is a terminal for inputting a high-frequency signal (a transmission signal) from an external circuit (for example, the signal processing circuit 301) to the high-frequency module 100. The first output terminal of the first power amplifier 11 is connected to a common terminal 510 of the first switch 51 via a first output matching circuit 31. Therefore, the first output terminal of the first power amplifier 11 can be connected to any one of the filters 61, 62 via the first switch 51. The first power amplifier 11 is, for example, a multistage amplifier, a noninverting composite amplifier, an inverting composite amplifier, or a Doherty amplifier.

[0034] The second power amplifier 12 has a second input terminal and a second output terminal. The second power amplifier 12 amplifies a transmission signal of a second frequency band input to the second input terminal and outputs from the second output terminal. The second frequency band is a frequency band different from the first frequency band. More specifically, the second frequency band is a frequency band lower in frequency than the first frequency band. The second frequency band includes, for example, a transmission frequency band of a third communication frequency band, a transmission frequency band of a fourth communication frequency band, and a transmission frequency band of a fifth communication frequency band. The third communication frequency band is a communication frequency band corresponding to a transmission signal passing through a transmission filter 631 of the filter 63. The fourth communication frequency band is a communication frequency band corresponding to a transmission signal passing through a transmission filter 641 of the filter 64. The fifth communication frequency band is a communication frequency band corresponding to a transmission signal passing through a transmission filter 651 of the filter 65.

[0035] The second input terminal of the second power amplifier 12 is connected to a signal input terminal 83. The second input terminal of the second power amplifier 12 is connected to the signal processing circuit 301 via the signal input terminal 83. The signal input terminal 83 is a terminal for inputting a high-frequency signal (a transmission signal) from an external circuit (for example, the signal processing circuit 301) to the high-frequency module 100. The second output terminal of the second power amplifier 12 is connected to a common terminal 520 of the second switch 52 via a second output matching circuit 32. Therefore, the second output terminal of the second power amplifier 12 can be connected to either one of the filters 63, 64 via the second switch 52. The second power amplifier 12 is, for example, a multistage amplifier, a noninverting composite amplifier, an inverting composite amplifier, or a Doherty amplifier.

[0036] The first switch 51 has a common terminal 510, a plurality of (for example, two) selection terminals 511, 512. The common terminal 510 is connected with the first output terminal of the first power amplifier 11 via the first output matching circuit 31. In the first switch 51, the selection terminal 511 is connected with the input terminal of the transmission filter 611 of the filter 61, and the selection terminal 512 is connected with the input terminal of the transmission filter 621 of the filter 62. The first switch 51 is, for example, a switch capable of connecting at least one or more of the plurality of selection terminals 511, 512 with the common terminal 510. Here, the first switch 51 is, for example, a switch capable of one-to-one and one-to-many connection.

[0037] The first switch 51 is, for example, a switch IC (Integrated Circuit). The first switch 51 is controlled by the controller 20, for example. In this case, the first switch 51 is controlled by the controller 20 to switch the connection state of the common terminal 510 and the plurality of selection terminals 511, 512. The first switch 51 can be configured to switch the connection state of the common terminal 510 and the plurality of selection terminals 511, 512 in accordance with a digital control signal input from the controller 20, for example. The first switch 51 can also be controlled by the signal processing circuit 301. In this case, the first switch 51 switches the connection state of the common terminal 510 and the plurality of selection terminals 511, 512 in accordance with a control signal from the RF signal processing circuit 302 of the signal processing circuit 301.

[0038] The second switch 52 has a common terminal 520 and a plurality of (for example, two) selection terminals 521, 522. The common terminal 520 is connected with the second output terminal of the second power amplifier 12 via the second output matching circuit 32. In the second switch 52, the selection terminal 521 is connected with the input terminal of the transmission filter 631 of the filter 63, and the selection terminal 522 is connected with the input terminal of the transmission filter 641 of the filter 64. The second switch 52 is, for example, a switch capable of connecting at least one or more of the plurality of selection terminals 521, 522 with the common terminal 520. Here, the second switch 52 is, for example, a switch capable of one-to-one and one-to-many connection.

[0039] The second switch 52 is, for example, a switch IC. The second switch 52 is controlled by the controller 20, for example. In this case, the second switch 52 is controlled by the controller 20 to switch the connection state of the common terminal 520 and the plurality of selection terminals 521, 522. The second switch 52 can be configured to switch the connection state of the common terminal 520 and the plurality of selection terminals 521, 522 in accordance with a digital control signal input from the controller 20, for example. The second switch 52 can also be controlled by the signal processing circuit 301. In this case, the second switch 52 switches the connection state of the common terminal 520 and the plurality of selection terminals 521, 522 in accordance with a control signal from the RF signal processing circuit 302 of the signal processing circuit 301.

[0040] As described above, the filter 61 is a duplexer having a transmission filter 611 and a reception filter 612. The transmission filter 611 is, for example, a band-pass filter that takes the transmission frequency band of the first communication band as a pass band. The reception filter 612 is, for example, a band-pass filter that takes the reception frequency band of the first communication band as a pass band.

[0041] As described above, the filter 62 is a duplexer having a transmission filter 621 and a reception filter 622. The transmission filter 621 is, for example, a band-pass filter that takes the transmission frequency band of the second communication band as a pass band. The reception filter 622 is, for example, a band-pass filter that takes the reception frequency band of the second communication band as a pass band.

[0042] As described above, the filter 63 is a duplexer having a transmission filter 631 and a reception filter 632. The transmission filter 631 is, for example, a band-pass filter that takes the transmission frequency band of the third communication band as a pass band. The reception filter 632 is, for example, a band-pass filter that takes the reception frequency band of the third communication band as a pass band.

[0043] As described above, the filter 64 is a duplexer having a transmission filter 641 and a reception filter 642. The transmission filter 641 is, for example, a band-pass filter that takes the transmission frequency band of the fourth communication band as a pass band. The reception filter 642 is, for example, a band-pass filter that takes the reception frequency band of the fourth communication band as a pass band.

[0044] As described above, the filter 65 is a duplexer having a transmission filter 651 and a reception filter 652. The transmission filter 651 is, for example, a band-pass filter that takes the transmission frequency band of the fifth communication band as a pass band. The reception filter 652 is, for example, a band-pass filter that takes the reception frequency band of the fifth communication band as a pass band.

[0045] The controller 20 is connected to the first power amplifier 11 and the second power amplifier 12. In addition, the controller 20 is connected to the signal processing circuit 301 via a plurality of (for example, four) control terminals 86. In this case, the controller 20 controls the signal processing circuit 301 to switch the connection state of the common terminal 520 and the plurality of selection terminals 521, 522 of the second switch 52.Figure 4 In the drawing, only one of the four control terminals 86 is illustrated. The plurality of control terminals 86 are terminals for inputting control signals from an external circuit (for example, the signal processing circuit 301) to the controller 20. The controller 20 controls the first power amplifier 11 and the second power amplifier 12 in accordance with the control signals acquired from the plurality of control terminals 86. The controller 20 controls the first power amplifier 11 and the second power amplifier 12 in accordance with the control signals from the RF signal processing circuit 302 of the signal processing circuit 301, for example. The controller 20 can be configured to control the first power amplifier 11 and the second power amplifier 12 in accordance with digital control signals acquired from the signal processing circuit 301, for example.

[0046] The first output matching circuit 31 is provided in a signal path between the first output terminal of the first power amplifier 11 and the common terminal 510 of the first switch 51. The first output matching circuit 31 is a circuit for acquiring impedance matching of the first power amplifier 11 and the transmission filters 611, 621 of the two filters 61, 62. As illustrated in the drawing, the first output matching circuit 31 is configured of two capacitors 311, 312 and one inductor 313, for example. The first output matching circuit 31 is not limited to the above-described configuration, and can be configured of only one inductor or one capacitor, for example. Further, the first output matching circuit 31 can be configured to include a transformer, for example. Figure 1

[0047] The second output matching circuit 32 is provided in a signal path between the second output terminal of the second power amplifier 12 and the common terminal 520 of the second switch 52. The second output matching circuit 32 is a circuit for acquiring impedance matching of the second power amplifier 12 and the transmission filters 631, 641 of the two filters 63, 64. The second output matching circuit 32 is configured of two capacitors and one inductor, for example, like the first output matching circuit 31. The second output matching circuit 32 is not limited to the above-described configuration, and can be configured of only one inductor or one capacitor, for example. Further, the second output matching circuit 32 can be configured to include a transformer, for example.

[0048] The plurality of (for example, four) matching circuits 71 to 74 correspond to the plurality of filters 61 to 64 on a one-to-one basis. The matching circuit 71 is provided in a signal path between the filter 61 and the fifth switch 55. The matching circuit 71 is a circuit for acquiring impedance matching of the filter 61 and the fifth switch 55. As illustrated in the drawing, the matching circuit 71 is configured of one inductor 711 and one capacitor 712, for example. The matching circuit 71 is not limited to the above-described configuration, and can be configured of a plurality of inductors and a plurality of capacitors, or can be configured of only one inductor or one capacitor, for example. Figure 1

[0049] ​​The matching circuit 72 is provided in the signal path between the filter 62 and the fifth switch 55. The matching circuit 72 is a circuit for obtaining impedance matching of the filter 62 and the fifth switch 55. The matching circuit 72 is constituted by, for example, one inductor and one capacitor, like the matching circuit 71. The matching circuit 72 is not limited to the above-described structure, and can be constituted by a plurality of inductors and a plurality of capacitors, or can be constituted by only one inductor or one capacitor.

[0050] The matching circuit 73 is provided in the signal path between the filter 63 and the fifth switch 55. The matching circuit 73 is a circuit for obtaining impedance matching of the filter 63 and the fifth switch 55. The matching circuit 73 is constituted by, for example, one inductor and one capacitor, like the matching circuit 71. The matching circuit 73 is not limited to the above-described structure, and can be constituted by a plurality of inductors and a plurality of capacitors, or can be constituted by only one inductor or one capacitor.

[0051] The matching circuit 74 is provided in the signal path between the filter 64 and the fifth switch 55. The matching circuit 74 is a circuit for obtaining impedance matching of the filter 64 and the fifth switch 55. The matching circuit 74 is constituted by, for example, one inductor and one capacitor, like the matching circuit 71. The matching circuit 74 is not limited to the above-described structure, and can be constituted by a plurality of inductors and a plurality of capacitors, or can be constituted by only one inductor or one capacitor.

[0052] The first low-noise amplifier 21 has a first input terminal and a first output terminal. The first low-noise amplifier 21 amplifies a reception signal of a first frequency band input to the first input terminal and outputs from the first output terminal. The first input terminal of the first low-noise amplifier 21 is connected to the common terminal 530 of the third switch 53 via the first input matching circuit 41. The first output terminal of the first low-noise amplifier 21 is connected to the signal output terminal 84. The first output terminal of the first low-noise amplifier 21 is connected to the signal processing circuit 301 via the signal output terminal 84, for example. The signal output terminal 84 is a terminal for outputting a high-frequency signal (reception signal) from the first low-noise amplifier 21 to an external circuit (for example, the signal processing circuit 301).

[0053] The second low-noise amplifier 22 has a second input terminal and a second output terminal. The second low-noise amplifier 22 amplifies a reception signal of a second frequency band input to the second input terminal and outputs from the second output terminal. The second input terminal of the second low-noise amplifier 22 is connected with the common terminal 540 of the fourth switch 54 via the second input matching circuit 42. The second output terminal of the second low-noise amplifier 22 is connected with the signal output terminal 85. The second output terminal of the second low-noise amplifier 22 is connected with the signal processing circuit 301 via the signal output terminal 85, for example. The signal output terminal 85 is a terminal for outputting a high-frequency signal (reception signal) from the second low-noise amplifier 22 to an external circuit (e.g., the signal processing circuit 301).

[0054] The first input matching circuit 41 is provided in a signal path between the first input terminal of the first low-noise amplifier 21 and the common terminal 530 of the third switch 53. The first input matching circuit 41 is a circuit for obtaining impedance matching of the first low-noise amplifier 21 and the reception filters 612, 622 of the two filters 61, 62. As shown in FIG. 2, for example, the first input matching circuit 41 is composed of four inductors 411 to 414 and one capacitor 415. The first input matching circuit 41 is not limited to the above-described structure, and can be composed of a plurality of inductors and a plurality of capacitors, or can be composed of only one inductor or one capacitor, for example. Figure 1

[0055] The second input matching circuit 42 is provided in a signal path between the second input terminal of the second low-noise amplifier 22 and the common terminal 540 of the fourth switch 54. The second input matching circuit 42 is a circuit for obtaining impedance matching of the second low-noise amplifier 22 and the reception filters 632, 642 of the two filters 63, 64. The second input matching circuit 42 is composed of four inductors and one capacitor, for example, like the first input matching circuit 41. The second input matching circuit 42 is not limited to the above-described structure, and can be composed of a plurality of inductors and a plurality of capacitors, or can be composed of only one inductor or one capacitor, for example.

[0056] The third switch 53 has a common terminal 530 and a plurality of (e.g., two) selection terminals 531, 532. The common terminal 530 is connected with the first input terminal of the first low-noise amplifier 21 via the first input matching circuit 41. In the third switch 53, the selection terminal 531 is connected with the output terminal of the reception filter 612 of the filter 61, and the selection terminal 532 is connected with the output terminal of the reception filter 622 of the filter 62. The third switch 53 is a switch capable of connecting at least one or more of the plurality of selection terminals 531, 532 with the common terminal 530, for example. Here, the third switch 53 is a switch capable of one-to-one and one-to-many connection, for example. ​

[0057] The third switch 53 is, for example, a switch IC. The third switch 53 is controlled by the signal processing circuit 301, for example. In this case, the third switch 53 switches the connection state of the common terminal 530 and the plurality of selection terminals 531, 532 in accordance with the control signal from the RF signal processing circuit 302 of the signal processing circuit 301. The third switch 53 can be configured to switch the connection state of the common terminal 530 and the plurality of selection terminals 531, 532 in accordance with a digital control signal input from the signal processing circuit 301, for example. The third switch 53 can be controlled by the controller 20 instead of being controlled by the signal processing circuit 301.

[0058] The fourth switch 54 has a common terminal 540 and a plurality of (for example, two) selection terminals 541, 542. The common terminal 540 is connected to the second input terminal of the second low-noise amplifier 22 via the second input matching circuit 42. In the fourth switch 54, the selection terminal 541 is connected to the output terminal of the reception filter 632 of the filter 63, and the selection terminal 542 is connected to the output terminal of the reception filter 642 of the filter 64. The fourth switch 54 is, for example, a switch capable of connecting at least one or more of the plurality of selection terminals 541, 542 to the common terminal 540. Here, the fourth switch 54 is, for example, a switch capable of one-to-one and one-to-many connection.

[0059] The fourth switch 54 is, for example, a switch IC. The fourth switch 54 is controlled by the signal processing circuit 301, for example. In this case, the fourth switch 54 switches the connection state of the common terminal 540 and the plurality of selection terminals 541, 542 in accordance with the control signal from the RF signal processing circuit 302 of the signal processing circuit 301. The fourth switch 54 can be configured to switch the connection state of the common terminal 540 and the plurality of selection terminals 541, 542 in accordance with a digital control signal input from the signal processing circuit 301, for example. The fourth switch 54 can be controlled by the controller 20 instead of being controlled by the signal processing circuit 301.

[0060] The fifth switch 55 has a common terminal 550 and a plurality of (for example, six) selection terminals 551 to 556. The common terminal 550 is connected with the antenna terminal 81 via the low pass filter 60 and the directional coupler 80. The antenna 310 is connected to the antenna terminal 81. The selection terminal 551 is connected to a connection point of an output terminal of the transmission filter 611 and an input terminal of the reception filter 612 in the filter 61 via the matching circuit 71. The selection terminal 552 is connected to a connection point of an output terminal of the transmission filter 621 and an input terminal of the reception filter 622 in the filter 62 via the matching circuit 72. The selection terminal 554 is connected to a connection point of an output terminal of the transmission filter 631 and an input terminal of the reception filter 632 in the filter 63 via the matching circuit 73. The selection terminal 555 is connected to a connection point of an output terminal of the transmission filter 641 and an input terminal of the reception filter 642 in the filter 64 via the matching circuit 74. Further, the selection terminals 553 and 556 are not connected to any circuit. The fifth switch 55 is, for example, a switch capable of connecting at least one or more of the plurality of selection terminals 551 to 556 to the common terminal 550. Here, the fifth switch 55 is, for example, a switch capable of one-to-one and one-to-many connection.

[0061] The fifth switch 55 is, for example, a switch IC. The fifth switch 55 is controlled by the signal processing circuit 301, for example. In this case, the fifth switch 55 switches the connection state of the common terminal 550 and the plurality of selection terminals 551 to 556 in accordance with the control signal from the RF signal processing circuit 302 of the signal processing circuit 301. The fifth switch 55 can be configured to switch the connection state of the common terminal 550 and the plurality of selection terminals 551 to 556 in accordance with a digital control signal input from the signal processing circuit 301, for example. The fifth switch 55 can be controlled by the controller 20 instead of being controlled by the signal processing circuit 301.

[0062] The sixth switch 56 has a common terminal 560 and a plurality of (for example, five) selection terminals 561 to 565. The common terminal 560 is connected to the output terminal 87. The selection terminal 561 is connected to the sub line 802 (described later) of the directional coupler 80. The selection terminal 562 is connected to the sub line 803 (described later) of the directional coupler 80. The selection terminal 563 is connected to the input terminal 883 of the plurality of input terminals 881 to 883. The selection terminal 564 is connected to the input terminal 882 of the plurality of input terminals 881 to 883. The selection terminal 565 is connected to the input terminal 881 of the plurality of input terminals 881 to 883.

[0063] The sixth switch 56 is, for example, a switch IC. The sixth switch 56 is controlled by the controller 20, for example. In this case, the sixth switch 56 is controlled by the controller 20 to switch the connection state of the common terminal 560 and the plurality of selection terminals 561 to 565. The sixth switch 56 can be configured to switch the connection state of the common terminal 560 and the plurality of selection terminals 561 to 565 in accordance with a digital control signal input from the controller 20, for example. The sixth switch 56 can also be controlled by the signal processing circuit 301. In this case, the sixth switch 56 switches the connection state of the common terminal 560 and the plurality of selection terminals 561 to 565 in accordance with a control signal from the RF signal processing circuit 302 of the signal processing circuit 301.

[0064] The low-pass filter 60 is connected between the main line 801 (described later) of the directional coupler 80 and the common terminal 550 of the fifth switch 55. As shown in Figure 1 , the low-pass filter 60 includes three inductors 601 to 603 and one capacitor 604. The low-pass filter 60 can also be an IPD (Integrated Passive Device) including a plurality of inductors and a capacitor.

[0065] Although not illustrated in Figure 4 , the matching circuit 75 is provided in the signal path between the input terminal of the first power amplifier 11 and the signal input terminal 82. The matching circuit 75 is a circuit for impedance matching between the RF signal processing circuit 302 of the signal processing circuit 301 and the first power amplifier 11. As shown in Figure 1 , the matching circuit 75 is configured of one inductor 751. The matching circuit 75 is not limited to the above-described configuration, and can be configured of a plurality of inductors and a plurality of capacitors, for example.

[0066] (1.2) Configuration of High Frequency Module

[0067] Next, the configuration of the high frequency module 100 will be described with reference to Figures 1-3 .

[0068] The high-frequency module 100 also has a mounting substrate 9. The mounting substrate 9 has a first main surface 91 and a second main surface 92 that face each other in a thickness direction Dl of the mounting substrate 9. The mounting substrate 9 is, for example, a multilayer substrate that includes a plurality of dielectric layers and a plurality of conductive layers. The plurality of dielectric layers and the plurality of conductive layers are stacked in the thickness direction Dl of the mounting substrate 9. The plurality of conductive layers are formed in a prescribed pattern determined for each layer. The plurality of conductive layers each include one or a plurality of conductor pattern portions in a plane orthogonal to the thickness direction Dl of the mounting substrate 9. The material of each conductive layer is, for example, copper. The plurality of conductive layers include a ground layer. In the high-frequency module 100, the plurality of ground terminals 89 are electrically connected to the ground layer via a via conductor or the like that the mounting substrate 9 has. The mounting substrate 9 is, for example, an LTCC (Low Temperature Co-fired Ceramics) substrate. The mounting substrate 9 is not limited to an LTCC substrate and can be, for example, a printed wiring board, an HTCC (High Temperature Co-fired Ceramics) substrate, or a resin multilayer substrate.

[0069] In addition, the mounting substrate 9 is not limited to an LTCC substrate and can be, for example, a wiring structure body. The wiring structure body is, for example, a multilayer structure body. The multilayer structure body includes at least one insulating layer and at least one conductive layer. The insulating layer is formed in a prescribed pattern. In a case where the insulating layer is a plurality of layers, the plurality of insulating layers are formed in prescribed patterns determined for each layer. The conductive layer is formed in a prescribed pattern different from the prescribed pattern of the insulating layer. In a case where the conductive layer is a plurality of layers, the plurality of conductive layers are formed in prescribed patterns determined for each layer. The conductive layer can include one or a plurality of rewiring portions. In the wiring structure body, a first one of two surfaces of the multilayer structure body that face each other in a thickness direction of the multilayer structure body is the first main surface 91 of the mounting substrate 9, and a second one of the two surfaces is the second main surface 92 of the mounting substrate 9. The wiring structure body can also be, for example, an interposer. The interposer can be an interposer that uses a silicon substrate or a substrate composed of a plurality of layers.

[0070] The first main surface 91 and the second main surface 92 of the mounting substrate 9 are separated in the thickness direction D1 of the mounting substrate 9 and cross the thickness direction D1 of the mounting substrate 9. The first main surface 91 in the mounting substrate 9 is, for example, orthogonal to the thickness direction D1 of the mounting substrate 9, but can include, for example, a side surface of a conductor pattern portion or the like as a surface that is not orthogonal to the thickness direction D1. Also, the second main surface 92 in the mounting substrate 9 is, for example, orthogonal to the thickness direction D1 of the mounting substrate 9, but can include, for example, a side surface of a conductor pattern portion or the like as a surface that is not orthogonal to the thickness direction D1. Also, the first main surface 91 and the second main surface 92 of the mounting substrate 9 can be formed with minute irregularities or recesses or protrusions. For example, in a case where the first main surface 91 of the mounting substrate 9 is formed with a recess, an inner surface of the recess is included in the first main surface 91.

[0071] In the high-frequency module 100 of Embodiment 1, a first group of the plurality of circuit components is mounted to the first main surface 91 of the mounting substrate 9. The first group of the circuit components includes the first power amplifier 11, the second power amplifier 12, the plurality of filters 61 to 65, the first output matching circuit 31, the second output matching circuit 32, the first input matching circuit 41, the second input matching circuit 42, the plurality of matching circuits 71 to 75, and the low-pass filter 60. "The circuit components are mounted to the first main surface 91 of the mounting substrate 9" includes that the circuit components are arranged on the first main surface 91 of the mounting substrate 9 (mechanical connection) and that the circuit components are electrically connected to the mounting substrate 9 (to appropriate conductor pattern portions thereof).

[0072] Also, in the high-frequency module 100, a second group of the plurality of circuit components is mounted to the second main surface 92 of the mounting substrate 9. The second group of the circuit components includes the first to sixth switches 51 to 56, the first low-noise amplifier 21, the second low-noise amplifier 22, the controller 20, and the directional coupler 80. "The circuit components are mounted to the second main surface 92 of the mounting substrate 9" includes that the circuit components are arranged on the second main surface 92 of the mounting substrate 9 (mechanical connection) and that the circuit components are electrically connected to the mounting substrate 9 (to appropriate conductor pattern portions thereof).

[0073] In Figure 1 , the first power amplifier 11 of the first group of the circuit components mounted to the first main surface 91 of the mounting substrate 9, the plurality of filters 61 to 65, the first output matching circuit 31, the first input matching circuit 41, the plurality of matching circuits 71 to 75, and the low-pass filter 60 are illustrated. Also, in Figure 2 , the first low-noise amplifier 21 of the second group of the circuit components mounted to the second main surface 92 of the mounting substrate 9, the first switch 51, the fifth switch 55, the sixth switch 56, the controller 20, and the directional coupler 80 are illustrated. Further, in Figure 4 , the illustration of the filter 65 and the matching circuit 75 is omitted.

[0074] The first power amplifier 11 is an IC chip that includes a circuit section having a first amplification transistor. For example... Figure 1 As shown, the first power amplifier 11 is flip-chip mounted on the first main surface 91 of the mounting substrate 9. Viewed from the thickness direction D1 of the mounting substrate 9, the outer edge of the first power amplifier 11 is quadrilateral. The first amplification transistor is, for example, an HBT (Heterojunction Bipolar Transistor). In this case, the IC chip constituting the first power amplifier 11 is, for example, a GaAs-based IC chip. The first amplification transistor is not limited to bipolar transistors such as HBTs; it can also be, for example, a FET (Field Effect Transistor). FETs are, for example, MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). The IC chip constituting the first power amplifier 11 is not limited to GaAs-based IC chips; it can also be, for example, a Si-based IC chip, a SiGe-based IC chip, or a GaN-based IC chip.

[0075] The second power amplifier 12 is an IC chip that includes a circuit section having a second amplification transistor. Although not shown in the figure, the second power amplifier 12 is flip-chip mounted on the first main surface 91 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edge of the second power amplifier 12 is quadrilateral. The second amplification transistor is, for example, an HBT. In this case, the IC chip constituting the second power amplifier 12 is, for example, a GaAs-based IC chip. The second amplification transistor is not limited to bipolar transistors such as HBTs; for example, it can also be a FET. The IC chip constituting the second power amplifier 12 is not limited to a GaAs-based IC chip; for example, it can also be a Si-based IC chip, a SiGe-based IC chip, or a GaN-based IC chip.

[0076] The first low-noise amplifier 21 is, for example, an IC chip including a substrate and a circuit section (IC section) formed on the substrate. Figure 2 As shown, the first low-noise amplifier 21 is flip-chip mounted on the second main surface 92 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edge of the first low-noise amplifier 21 is quadrilateral. The substrate is, for example, a silicon substrate. The circuit section has the function of amplifying the received signal input to the input terminal of the first low-noise amplifier 21.

[0077] The second low-noise amplifier 22 is, for example, an IC chip including a substrate and a circuit portion (IC portion) formed on the substrate. Although not illustrated, the second low-noise amplifier 22 is flip-chip mounted on the second main surface 92 of the mounting substrate 9. An outer edge of the second low-noise amplifier 22 is a quadrangular shape when viewed from the thickness direction D1 of the mounting substrate 9. The substrate is, for example, a silicon substrate. The circuit portion has a function of amplifying a received signal input to a terminal of the second low-noise amplifier 22.

[0078] The transmission filter 611 and the reception filter 612 of the filter 61 are each, for example, a ladder-type filter having a plurality of (for example, four) series arm resonators and a plurality of (for example, three) parallel arm resonators. The transmission filter 611 and the reception filter 612 are each, for example, an elastic wave filter. The plurality of series arm resonators and the plurality of parallel arm resonators of the elastic wave filter are each constituted by an elastic wave resonator. The elastic wave filter is, for example, a surface elastic wave filter using an elastic surface wave.

[0079] The transmission filter 621 and the reception filter 622 of the filter 62 are each, for example, a ladder-type filter having a plurality of (for example, four) series arm resonators and a plurality of (for example, three) parallel arm resonators. The transmission filter 621 and the reception filter 622 are each, for example, an elastic wave filter. The plurality of series arm resonators and the plurality of parallel arm resonators of the elastic wave filter are each constituted by an elastic wave resonator. The elastic wave filter is, for example, a surface elastic wave filter using an elastic surface wave.

[0080] The transmission filter 631 and the reception filter 632 of the filter 63 are each, for example, a ladder-type filter having a plurality of (for example, four) series arm resonators and a plurality of (for example, three) parallel arm resonators. The transmission filter 631 and the reception filter 632 are each, for example, an elastic wave filter. The plurality of series arm resonators and the plurality of parallel arm resonators of the elastic wave filter are each constituted by an elastic wave resonator. The elastic wave filter is, for example, a surface elastic wave filter using an elastic surface wave.

[0081] The transmission filter 641 and the reception filter 642 of the filter 64 are each, for example, a ladder-type filter having a plurality of (for example, four) series arm resonators and a plurality of (for example, three) parallel arm resonators. The transmission filter 641 and the reception filter 642 are each, for example, an elastic wave filter. The plurality of series arm resonators and the plurality of parallel arm resonators of the elastic wave filter are each constituted by an elastic wave resonator. The elastic wave filter is, for example, a surface elastic wave filter using an elastic surface wave.

[0082] The transmitting filter 651 and the receiving filter 652 of filter 65 are each, for example, trapezoidal filters, having multiple (e.g., four) series-arm resonators and multiple (e.g., three) parallel-arm resonators. The transmitting filter 651 and the receiving filter 652 are each, for example, elastic wave filters. The multiple series-arm resonators and multiple parallel-arm resonators of the elastic wave filter are each composed of elastic wave resonators. The elastic wave filter is, for example, a surface elastic wave filter using elastic surface waves.

[0083] In a surface elastic wave filter, multiple series arm resonators and multiple parallel arm resonators are each, for example, SAW (Surface Acoustic Wave) resonators.

[0084] Surface elastic wave filters include, for example, a substrate and a circuit formed on the substrate. The substrate is, for example, a piezoelectric substrate. The piezoelectric substrate is, for example, a lithium niobate substrate, a lithium tantalate substrate, or a crystal substrate. The circuit has multiple IDT (Interdigital Transducer) electrodes corresponding one-to-one with multiple series arm resonators, and multiple IDT electrodes corresponding one-to-one with multiple parallel arm resonators.

[0085] like Figure 1 As shown, the transmitting filter 611 and the receiving filter 612 of the filter 61 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edges of the transmitting filter 611 and the receiving filter 612 of the filter 61 are quadrilateral.

[0086] like Figure 1 As shown, the transmitting filter 621 and the receiving filter 622 of the filter 62 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edges of the transmitting filter 621 and the receiving filter 622 of the filter 62 are quadrilateral.

[0087] like Figure 1 As shown, the transmitting filter 631 and the receiving filter 632 of the filter 63 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edges of the transmitting filter 631 and the receiving filter 632 of the filter 63 are quadrilateral.

[0088] like Figure 1 As shown, the transmitting filter 641 and the receiving filter 642 of the filter 64 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from above in the thickness direction D1 of the mounting substrate 9, the outer edges of the transmitting filter 641 and the receiving filter 642 of the filter 64 are quadrilateral.

[0089] As shown in FIG. 6, the transmission filter 651 and the reception filter 652 of the filter 65 are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the transmission filter 651 and the reception filter 652 is a quadrangular shape. Figure 1 As shown in FIG. 6, the transmission filter 651 and the reception filter 652 of the filter 65 are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the transmission filter 651 and the reception filter 652 is a quadrangular shape.

[0090] As described above, the first output matching circuit 31 includes two capacitors 311, 312 and one inductor 313. As shown in FIG. 6, the two capacitors 311, 312 and the one inductor 313 are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the two capacitors 311, 312 and the one inductor 313 is a quadrangular shape. The first output matching circuit 31 may, for example, also include an inner-layer inductor provided within the mounting substrate 9. Figure 1

[0091] As described above, the second output matching circuit 32 includes two capacitors and one inductor. Although the illustration is omitted, the two capacitors and the one inductor are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the two capacitors and the one inductor is a quadrangular shape. The second output matching circuit 32 may, for example, also include an inner-layer inductor provided within the mounting substrate 9.

[0092] As described above, the first input matching circuit 41 includes four inductors 411 to 414 and one capacitor 415. As shown in FIG. 6, the four inductors 411 to 414 and the one capacitor 415 are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the four inductors 411 to 414 and the one capacitor 415 is a quadrangular shape. The first input matching circuit 41 may, for example, also include an inner-layer inductor provided within the mounting substrate 9. Figure 1

[0093] As described above, the second input matching circuit 42 includes four inductors and one capacitor. Although the illustration is omitted, the four inductors and the one capacitor are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the four inductors and the one capacitor is a quadrangular shape. The second input matching circuit 42 may, for example, also include an inner-layer inductor provided within the mounting substrate 9.

[0094] As described above, the matching circuit 71 includes one inductor 711 and one capacitor 712. As shown in FIG. 6, the one inductor 711 and the one capacitor 712 are each mounted to the first main face 91 of the mounting substrate 9. When viewed from the thickness direction Dl of the mounting substrate 9, the outer edge of each of the one inductor 711 and the one capacitor 712 is a quadrangular shape. Figure 1 ​​As shown, an inductor 711 and a capacitor 712 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from the thickness direction D1 of the mounting substrate 9, the outer edges of each inductor 711 and capacitor 712 are quadrilateral. The matching circuit 71 may also include an inner layer inductor disposed within the mounting substrate 9.

[0095] As described above, the matching circuit 72 includes an inductor 721 and a capacitor 722. For example... Figure 1 As shown, an inductor 721 and a capacitor 722 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from the thickness direction D1 of the mounting substrate 9, the outer edges of each inductor 721 and capacitor 722 are quadrilateral. The matching circuit 72 may also include an inner layer inductor disposed within the mounting substrate 9.

[0096] As described above, the matching circuit 73 includes an inductor 731 and a capacitor 732. For example... Figure 1 As shown, an inductor 731 and a capacitor 732 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from the thickness direction D1 of the mounting substrate 9, the outer edges of each inductor 731 and capacitor 732 are quadrilateral. The matching circuit 73 may also include an inner layer inductor disposed within the mounting substrate 9.

[0097] As described above, the matching circuit 74 includes an inductor 741 and a capacitor 742. For example... Figure 1 As shown, an inductor 741 and a capacitor 742 are each mounted on the first main surface 91 of the mounting substrate 9. When viewed from the thickness direction D1 of the mounting substrate 9, the outer edges of each inductor 741 and capacitor 742 are quadrilateral. The matching circuit 74 may also include an inner layer inductor disposed within the mounting substrate 9.

[0098] As described above, the matching circuit 75 includes an inductor 751. For example... Figure 1 As shown, an inductor 751 is mounted on the first main surface 91 of the mounting substrate 9. When viewed from the thickness direction D1 of the mounting substrate 9, the outer edge of the inductor 751 is quadrilateral. The matching circuit 75 may also include an inner layer inductor disposed within the mounting substrate 9.

[0099] As described above, the low-pass filter 60 includes three inductors 601-603 and one capacitor 604. Figure 2 As shown, three inductors 601-603 and one capacitor 604 are each mounted on the first main surface 91 of the mounting substrate 9. The outer edges of each of the three inductors 601-603 and the capacitor 604 are quadrilateral. The cutoff frequency of the low-pass filter 60 is, for example, a high frequency compared to the upper limit of the first frequency band.

[0100] As Figure 2 shown, the first switch 51 is mounted to the second main surface 92 of the mounting substrate 9. The outer edge of the first switch 51 is a quadrangular shape when viewed from the thickness direction Dl of the mounting substrate 9. The first switch 51 is, for example, an IC chip including a substrate having a first main surface and a second main surface facing each other, and a circuit portion formed on the first main surface side of the substrate. The substrate is, for example, a silicon substrate. The circuit portion includes a plurality of FETs as a plurality of switching elements. The plurality of switching elements are each not limited to an FET, and can be, for example, a bipolar transistor. The first switch 51 is flip-chip mounted to the second main surface 92 of the mounting substrate 9 so that the first main surface of the substrate and the first main surface of the second main surface become the second main surface 92 side of the mounting substrate 9.

[0101] As Figure 2 shown, the controller 20 is mounted to the second main surface 92 of the mounting substrate 9. The outer edge of the controller 20 is a quadrangular shape when viewed from the thickness direction Dl of the mounting substrate 9. The controller 20 is, for example, an IC chip including a substrate having a first main surface and a second main surface facing each other, and a circuit portion formed on the first main surface side of the substrate. The substrate is, for example, a silicon substrate. The circuit portion includes a control circuit that controls the first power amplifier 11 and the second power amplifier 12 in accordance with a control signal from the signal processing circuit 301. The controller 20 is flip-chip mounted to the second main surface 92 of the mounting substrate 9 so that the first main surface of the substrate and the first main surface of the second main surface become the second main surface 92 side of the mounting substrate 9. The controller 20 can be, for example, included in one IC chip together with the first switch 51 and the second switch 52.

[0102] In the high-frequency module 100 of Embodiment 1, as Figure 2 shown, the IC chip 13 including the first circuit portion 141, the second circuit portion 142, and the third circuit portion 143 is mounted to the second main surface 92 of the mounting substrate 9. The first circuit portion 141 includes the directional coupler 80 described above. The second circuit portion 142 includes the sixth switch 56 described above. The third circuit portion 143 includes the fifth switch 55 described above and a control portion (not shown). Further, regarding the layout of the first circuit portion 141, the second circuit portion 142, and the third circuit portion 143 in the IC chip 13, detailed description is given in "(1.3) Layout of High-Frequency Module".

[0103] Although not shown in the diagram, the second switch 52, the third switch 53, and the fourth switch 54 are mounted on the second main surface 92 of the mounting substrate 9. Viewed from the thickness direction D1 of the mounting substrate 9, the outer edges of each of the second switch 52, the third switch 53, and the fourth switch 54 are quadrilateral. Each of the second switch 52, the third switch 53, and the fourth switch 54 is, for example, an IC chip including a substrate having opposing first and second main surfaces and a circuit portion formed on the first main surface side of the substrate. The substrate is, for example, a silicon substrate. The circuit portion includes multiple FETs as multiple switching elements. The multiple switching elements are not limited to FETs; for example, they could also be bipolar transistors. The second switch 52, the third switch 53, and the fourth switch 54 are each flip-chip mounted on the second main surface 92 of the mounting substrate 9, such that the first main surface of the substrate and the second main surface become the second main surface 92 side of the mounting substrate 9. The third switch 53 and the fourth switch 54 may also be included in a single IC chip, for example, along with the first low-noise amplifier 21 and the second low-noise amplifier 22. Alternatively, the second switch 52 can also be included in an IC chip together with the first switch.

[0104] like Figures 1-3 As shown, a plurality of external connection terminals 8 are disposed on the second main surface 92 of the mounting substrate 9. "External connection terminals 8 disposed on the second main surface 92 of the mounting substrate 9" includes: mechanical connection between the external connection terminals 8 and the second main surface 92 of the mounting substrate 9, and electrical connection between the external connection terminals 8 and (appropriate conductor pattern portion) of the mounting substrate 9. The material of the plurality of external connection terminals 8 is, for example, metal (e.g., copper, copper alloy, etc.). Each of the plurality of external connection terminals 8 is a columnar electrode. The columnar electrode is, for example, a cylindrical electrode. The plurality of external connection terminals 8 are bonded to the conductor pattern portion of the mounting substrate 9, for example, by solder, but are not limited to solder bonding; for example, conductive adhesive (e.g., conductive paste) can also be used for bonding, or they can be directly bonded.

[0105] As described above, the plurality of external connection terminals 8 include the antenna terminal 81, the plurality of signal input terminals 82, 83, the plurality of signal output terminals 84, 85, the plurality of control terminals 86, the output terminal 87, the plurality of input terminals 881, 882, 883, and the plurality of ground terminals 89. In the high-frequency module 100 of Embodiment 1, the plurality of signal terminals are constituted by the output terminal 87 and the plurality of input terminals 881, 882, 883. Therefore, in the high-frequency module 100 of Embodiment 1, the antenna terminal 81, the plurality of signal input terminals 82, 83, the plurality of signal output terminals 84, 85, the plurality of control terminals 86, and the plurality of ground terminals 89 are not included in the plurality of signal terminals. The plurality of ground terminals 89 are electrically connected to the ground layer of the mounting substrate 9. The ground layer is the ground of the circuit of the high-frequency module 100, and the plurality of circuit components of the high-frequency module 100 include circuit components that are electrically connected to the ground layer. Hereinafter, in cases where the plurality of input terminals 881, 882, 883 are distinguished, the plurality of input terminals 881, 882, 883 are sometimes referred to as a first input terminal 881, a second input terminal 882, and a third input terminal 883, respectively.

[0106] The high-frequency module 100 further has a first resin layer 105. The first resin layer 105 covers each of the circuit components of the first group of circuit components mounted on the first main surface 91 of the mounting substrate 9. More specifically, the first resin layer 105 covers the outer peripheral surface of each of the first group of circuit components. In addition, the first resin layer 105 covers the main surface of each of the first group of circuit components on the side opposite to the mounting substrate 9 side. In addition, among the first group of circuit components, in the first power amplifier 11, the second power amplifier 12, the first output matching circuit 31, the second output matching circuit 32, the first input matching circuit 41, the second input matching circuit 42, the plurality of matching circuits 71 to 75, and the low-pass filter 60, the first resin layer 105 is also disposed between each of the circuit components and the first main surface 91 of the mounting substrate 9 in the thickness direction D1 of the mounting substrate 9. The first resin layer 105 includes a resin (for example, an epoxy resin). The first resin layer 105 can include a filler in addition to the resin. In the present specification, the "main surface of a circuit component" refers to the surface of the circuit component on the side opposite to the mounting substrate 9 side. In addition, in the present specification, the "outer peripheral surface of a circuit component" refers to the surface from the outer edge of the main surface of the circuit component in the thickness direction D1 of the mounting substrate 9.

[0107] In addition, the high-frequency module 100 has a second resin layer 107 in addition to the first resin layer 105 provided on the first main surface 91 of the mounting substrate 9. The second resin layer 107 covers the second group of circuit components mounted on the second main surface 92 of the mounting substrate 9 and the outer peripheral surface of each of the plurality of external connection terminals 8. The second resin layer 107 includes a resin (for example, an epoxy resin). The second resin layer 107 can include a filler in addition to the resin. The material of the second resin layer 107 can be the same material as the material of the first resin layer 105 or a different material.

[0108] The second resin layer 107 can be formed so as to expose the main surface of each of the second group of circuit components mounted on the second main surface 92 of the mounting substrate 9 on the side opposite the mounting substrate 9 side.

[0109] In addition, the high-frequency module 100 has a conductive layer 106. The conductive layer 106 has conductivity. The conductive layer 106 is provided for the purpose of electromagnetic shielding of the inside and outside of the high-frequency module 100. The conductive layer 106 has a multilayer structure in which a plurality of metal layers are stacked, but is not limited to a multilayer structure and can be one metal layer. The metal layers include one or a plurality of metals. The conductive layer 106 covers the main surface 151 of the first resin layer 105 on the side opposite the mounting substrate 9 side, the outer peripheral surface 153 of the first resin layer 105, and the outer peripheral surface 93 of the mounting substrate 9. In addition, the conductive layer 106 also covers the outer peripheral surface 173 of the second resin layer 107. The conductive layer 106 is in contact with at least a portion of the outer peripheral surface of the ground layer possessed by the mounting substrate 9. Thus, the potential of the conductive layer 106 can be made the same as the potential of the ground layer.

[0110] (1.3) Layout of High-Frequency Module

[0111] Next, the layout of the high-frequency module 100 of Embodiment 1 will be described with reference to Figure 1 The layout of the high-frequency module 100 of Embodiment 1 will be described.

[0112] In the high-frequency module 100 of Embodiment 1, as described above, the first group of circuit components is mounted on the first main surface 91 of the mounting substrate 9. In Figure 1 In the high-frequency module 100 of Embodiment 1, as described above, the first group of circuit components is mounted on the first main surface 91 of the mounting substrate 9. In

[0113] In the high-frequency module 100 of Embodiment 1, as described above, the first group of circuit components is mounted on the first main surface 91 of the mounting substrate 9. In Figure 1In the first output matching circuit 31, the two capacitors 311, 312 and the one inductor 313 are arranged along the width direction D2 of the mounting substrate 9. In the high-frequency module 100 of Embodiment 1, the width direction D2 of the mounting substrate 9 is the first direction.

[0114] In addition, in the high-frequency module 100 of Embodiment 1, the first input matching circuit 41, the first output matching circuit 31, the first power amplifier 11, and the matching circuit 75 are arranged along the width direction D2 of the mounting substrate 9. Figure 1 In the high-frequency module 100 of Embodiment 1, the four filters 61 to 64 among the plurality of filters 61 to 65 are arranged along the long side direction D3 of the mounting substrate 9. Figure 1 In the high-frequency module 100 of Embodiment 1, the two filters 64, 65 among the plurality of filters 61 to 65 are arranged along the width direction D2 of the mounting substrate 9. Also, in the filter 61, the transmission filter 611 and the reception filter 612 are arranged along the width direction D2 of the mounting substrate 9. Also, in the filter 62, the transmission filter 621 and the reception filter 622 are arranged along the width direction D2 of the mounting substrate 9. Also, in the filter 63, the transmission filter 631 and the reception filter 632 are arranged along the width direction D2 of the mounting substrate 9. Also, in the filter 64, the transmission filter 641 and the reception filter 642 are arranged along the width direction D2 of the mounting substrate 9. Also, in the filter 65, the transmission filter 651 and the reception filter 652 are arranged along the width direction D2 of the mounting substrate 9. In the high-frequency module 100 of Embodiment 1, the long side direction D3 of the mounting substrate 9 is the second direction.

[0115] In addition, in the high-frequency module 100 of Embodiment 1, the first input matching circuit 41, the first output matching circuit 31, the first power amplifier 11, and the matching circuit 75 are arranged along the width direction D2 of the mounting substrate 9. Figure 1 In the high-frequency module 100 of Embodiment 1, the four filters 61 to 64 among the plurality of filters 61 to 65 are arranged along the long side direction D3 of the mounting substrate 9.

[0116] In addition, in the high-frequency module 100 of Embodiment 1, the first input matching circuit 41, the first output matching circuit 31, the first power amplifier 11, and the matching circuit 75 are arranged along the width direction D2 of the mounting substrate 9. Figure 1 In the high-frequency module 100 of Embodiment 1, the four filters 61 to 64 among the plurality of filters 61 to 65 are arranged along the long side direction D3 of the mounting substrate 9. Figure 2In the embodiment 1, the low-pass filter 60 is arranged on the opposite side of the plurality of matching circuits 71 to 74 to the plurality of filters 61 to 63 in the width direction D2 of the mounting substrate 9. In the low-pass filter 60, three inductors 601 to 603 and one capacitor 604 are arranged along the long side direction D3 of the mounting substrate 9.

[0117] In the high-frequency module 100 of the embodiment 1, as described above, the second group of circuit components is mounted to the second main surface 92 of the mounting substrate 9. In the embodiment 1, the controller 20, the first low-noise amplifier 21, the first switch 51, and the IC chip 13 are illustrated as the second group of circuit components. In addition, as described above, the fifth switch 55, the sixth switch 56, the directional coupler 80, and the control section (not illustrated) are included in the IC chip 13. Figure 4

[0118] In addition, in the high-frequency module 100 of the embodiment 1, as described above, the plurality of external connection terminals 8 is arranged on the second main surface 92 of the mounting substrate 9. As described above, the plurality of external connection terminals 8 includes the antenna terminal 81, the two signal input terminals 82, 83 (refer to Figure 4 ), the two signal output terminals 84, 85 (refer to Figure 2 ), the four control terminals 86 (refer to ), the output terminal 87, the three input terminals 881, 882, 883, and the plurality of ground terminals 89.

[0119] Figure 2 In the high-frequency module 100 of the embodiment 1, the mounting substrate 9 is formed in a rectangular shape when viewed from the thickness direction D1 of the mounting substrate 9. More specifically, the mounting substrate 9 is formed in a rectangular shape in which the size (the size in the left-right direction of Figure 1 ) of the long side direction D3 is longer than the size (the size in the up-down direction of Figure 2 ) of the width direction D2. As illustrated in Figure 2 and Figure 2 , the mounting substrate 9 has a first edge 94 and a second edge 95 orthogonal to each other. As illustrated in , the mounting substrate 9 has a first surface 91 and a second surface 92.As shown, the mounting substrate 9 has four regions (a first region 921, a second region 922, a third region 923, a fourth region 924) divided by a first line L1 and a second line L2. The first line L1 is a straight line passing through the center C1 of the mounting substrate 9 and extending along the first edge 94 of the mounting substrate 9. The second line L2 is a straight line passing through the center C1 of the mounting substrate 9 and extending along the second edge 95 of the mounting substrate 9. The "center C1 of the mounting substrate 9" means a point located in the middle of the mounting substrate 9 from the plan view of the thickness direction D1 of the mounting substrate 9. In addition, "orthogonal" includes not only a state in which the angle between the two is strictly 90 degrees, but also a state in which the angle between the two is within a range including a crossing (for example, ±5 degrees) substantially obtaining an effect. The first switch 51 is arranged in the first region 921. The IC chip 13 is arranged in the second region 922. The first low-noise amplifier 21 is arranged in the third region 923. The controller 20 is arranged in the fourth region 924.

[0120] At least one ground terminal 89 is arranged in each of the first region 921, the third region 923, and the fourth region 924. In addition, the antenna terminal 81, the output terminal 87, three input terminals 881, 882, 883, and a plurality of ground terminals 89 are arranged in the second region 922. Figure 2In the embodiment 1, the antenna terminal 81, the second input terminal 882, and the output terminal 87 are arranged in a column (hereinafter, referred to as "first column") along the width direction D2 of the mounting substrate 9. In addition, in the first column, two ground terminals 89 are arranged between the antenna terminal 81 and the second input terminal 882. In addition, in the first column, one ground terminal 89 is arranged between the second input terminal 882 and the output terminal 87. That is, in the high-frequency module 100 of the embodiment 1, the antenna terminal 81, the second input terminal 882, and the output terminal 87 arranged in the first column are not adjacent to each other in the width direction (first direction) D2 of the mounting substrate 9. "The antenna terminal 81 and the second input terminal 882 are not adjacent to each other in the width direction D2 of the mounting substrate 9" means that, when viewed from the thickness direction D1 of the mounting substrate 9, other terminals (ground terminals 89) are present between the antenna terminal 81 and the second input terminal 882 in the width direction D2 of the mounting substrate 9, and the antenna terminal 81 and the second input terminal 882 are not adjacent to each other. In addition, "the second input terminal 882 and the output terminal 87 are not adjacent to each other in the width direction D2 of the mounting substrate 9" means that, when viewed from the thickness direction D1 of the mounting substrate 9, other terminals (ground terminals 89) are present between the second input terminal 882 and the output terminal 87 in the width direction D2 of the mounting substrate 9, and the second input terminal 882 and the output terminal 87 are not adjacent to each other. In addition, the antenna terminal 81, the second input terminal 882, and the output terminal 87 are each adjacent to the ground terminal 89 in the long direction D3 of the mounting substrate 9. That is, the antenna terminal 81, the second input terminal 882, and the output terminal 87 are each not adjacent to each other in the long direction D3 of the mounting substrate 9.

[0121] In addition, in the Figure 2In the embodiment 1, the first input terminal 881 and the third input terminal 883 are arranged in a column (hereinafter, referred to as a "second column") along the width direction D2 of the mounting substrate 9. In addition, in the second column, one ground terminal 89 is arranged between the first input terminal 881 and the third input terminal 883. That is, in the high-frequency module 100 of the embodiment 1, the first input terminal 881 and the third input terminal 883 arranged in the second column are not adjacent to each other in the width direction D2 of the mounting substrate 9. The "first input terminal 881 and the third input terminal 883 are not adjacent to each other in the width direction D2 of the mounting substrate 9" means that, when viewed from the top of the thickness direction Dl of the mounting substrate 9, the first input terminal 881 and the third input terminal 883 are not adjacent to each other in the width direction D2 of the mounting substrate 9 in the presence of other terminals (ground terminals 89) between the first input terminal 881 and the third input terminal 883. In addition, in the second column, two ground terminals 89 are arranged on the side opposite to the side of the third input terminal 883 with respect to the first input terminal 881. In addition, in the second column, one ground terminal 89 is arranged on the side opposite to the side of the first input terminal 881 with respect to the third input terminal 883. In addition, the first input terminal 881 and the third input terminal 883 are each adjacent to the ground terminal 89 in the long direction D3 of the mounting substrate 9. That is, the first input terminal 881 and the third input terminal 883 are each not adjacent to each other in the long direction D3 of the mounting substrate 9.

[0122] In the high-frequency module 100 of the embodiment 1, as described above, the terminal closest to each of the first input terminal 881, the second input terminal 882, the third input terminal 883, and the output terminal 87 is the ground terminal 89. That is, the plurality of signal terminals (input terminals 881 to 883 and the output terminal 87) are arranged so as not to be adjacent to each other in both the first direction (width direction D2) and the second direction (long direction D3) intersecting the thickness direction Dl of the mounting substrate 9. Thereby, it is possible to suppress the jump of the signals between the terminals. In addition, in the high-frequency module 100 of the embodiment 1, as described above, the output terminal 87 is arranged at a position farthest from the antenna terminal 81 in the width direction (first direction) D2 of the mounting substrate 9, compared to any one of the first input terminal 881, the second input terminal 882, and the third input terminal 883. Thereby, it is possible to suppress the jump of the signals received or transmitted via the antenna terminal 81 to the output terminal 87.

[0123] In addition, in the high-frequency module 100 of the embodiment 1, as Figure 2As shown, the second circuit portion 142 and the third circuit portion 143 included in the IC chip 13 are arranged along the long side direction D3 of the mounting substrate 9. More specifically, the third circuit portion 143 is arranged on the opposite side to the side of the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87) with respect to the second circuit portion 142 in the long side direction D3 of the mounting substrate 9. In addition, in the high-frequency module 100 of Embodiment 1, as shown in FIG. 9, the third circuit portion 143 including the fifth switch 55 is arranged on the opposite side to the side of the plurality of signal terminals with respect to the first circuit portion 141 including the directional coupler 80 in the long side direction D3 of the mounting substrate 9. Thus, it is possible to suppress the jump of the signal between the plurality of signal terminals and the fifth switch 55. In the high-frequency module 100 of Embodiment 1, as described above, the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87), the directional coupler 80 (the first circuit portion 141), and the fifth switch 55 (the third circuit portion 143) are arranged in the same region (the second region 922). Figure 3 As shown, the first circuit portion 141 and the second circuit portion 142 included in the IC chip 13 are arranged in the width direction D2 of the mounting substrate 9. That is, in the high-frequency module 100 of Embodiment 1, the third circuit portion 143 including the fifth switch 55 is arranged on the opposite side to the side of the plurality of signal terminals with respect to the first circuit portion 141 including the directional coupler 80 in the long side direction D3 of the mounting substrate 9. Thus, it is possible to suppress the jump of the signal between the plurality of signal terminals and the fifth switch 55. In the high-frequency module 100 of Embodiment 1, as described above, the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87), the directional coupler 80 (the first circuit portion 141), and the fifth switch 55 (the third circuit portion 143) are arranged in the same region (the second region 922).

[0124] In addition, in the high-frequency module 100 of Embodiment 1, as shown in FIG. 9, the third circuit portion 143 including the fifth switch 55 is arranged on the opposite side to the side of the plurality of signal terminals with respect to the first circuit portion 141 including the directional coupler 80 in the long side direction D3 of the mounting substrate 9. Thus, it is possible to suppress the jump of the signal between the plurality of signal terminals and the fifth switch 55. In the high-frequency module 100 of Embodiment 1, as described above, the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87), the directional coupler 80 (the first circuit portion 141), and the fifth switch 55 (the third circuit portion 143) are arranged in the same region (the second region 922). Figure 3 As shown, the inductor 601 of the low-pass filter 60 overlaps the directional coupler 80 included in the IC chip 13 when viewed from the thickness direction D1 of the mounting substrate 9. More specifically, a part of the inductor 601 overlaps a part of the directional coupler 80 when viewed from the thickness direction D1 of the mounting substrate 9. In addition, when viewed from the thickness direction D1 of the mounting substrate 9, it can be that a part of the inductor 601 overlaps the entire directional coupler 80, it can be that the entire inductor 601 overlaps a part of the directional coupler 80, or it can be that the entire inductor 601 overlaps the entire directional coupler 80. In any case, "the inductor 601 overlaps the directional coupler 80 when viewed from the thickness direction D1 of the mounting substrate 9" means that at least a part of the inductor 601 overlaps at least a part of the directional coupler 80 when viewed from the thickness direction D1 of the mounting substrate 9. Thus, it is possible to shorten the wiring length between the inductor 601 and the directional coupler 80, and as a result, it is possible to suppress the deterioration of the characteristics of the high-frequency module 100 caused by the wiring length.

[0125] In addition, in the high-frequency module 100 of Embodiment 1, as shown in FIG. 9, the third circuit portion 143 including the fifth switch 55 is arranged on the opposite side to the side of the plurality of signal terminals with respect to the first circuit portion 141 including the directional coupler 80 in the long side direction D3 of the mounting substrate 9. Thus, it is possible to suppress the jump of the signal between the plurality of signal terminals and the fifth switch 55. In the high-frequency module 100 of Embodiment 1, as described above, the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87), the directional coupler 80 (the first circuit portion 141), and the fifth switch 55 (the third circuit portion 143) are arranged in the same region (the second region 922). Figure 3As shown, the capacitor 604 of the low-pass filter 60 overlaps the fifth switch 55 included in the IC chip 13 when viewed from the thickness direction D1 of the mounting substrate 9. More specifically, a part of the capacitor 604 overlaps a part of the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. Further, it can be that a part of the capacitor 604 overlaps the entire of the fifth switch 55, or that the entire of the capacitor 604 overlaps a part of the fifth switch 55, or that the entire of the capacitor 604 overlaps the entire of the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. In any case, "the capacitor 604 overlaps the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9" means that at least a part of the capacitor 604 overlaps at least a part of the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. Thereby, the wiring length between the capacitor 604 and the fifth switch 55 can be shortened, and as a result, the deterioration of the characteristics of the high-frequency module 100 caused by the wiring length can be suppressed.

[0126] Further, in the high-frequency module 100 of Embodiment 1, as shown in Figure 4 As shown, the transmission filter 611 of the filter 61 overlaps the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. More specifically, a part of the transmission filter 611 overlaps a part of the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. Further, it can be that a part of the transmission filter 611 overlaps the entire of the fifth switch 55, or that the entire of the transmission filter 611 overlaps a part of the fifth switch 55, or that the entire of the transmission filter 611 overlaps the entire of the fifth switch 55 when viewed from the thickness direction D1 of the mounting substrate 9. Thereby, the wiring length between the transmission filter 611 and the fifth switch 55 can be shortened, and as a result, the deterioration of the characteristics of the high-frequency module 100 caused by the wiring length can be suppressed.

[0127] (1.4) Circuit structure of directional coupler

[0128] Next, the circuit structure of the directional coupler 80 will be described with reference to Figure 5 and Figure 4 .

[0129] As shown in Figure 5 and Figure 4 , the directional coupler (coupler) 80 has a main line 801 and a plurality of (for example, two) sub-lines 802, 803. Further, the directional coupler 80 also has a plurality of (for example, six) terminals 806 to 811. Hereinafter, in the case where the plurality of sub-lines 802, 803 are distinguished, the plurality of sub-lines 802, 803 are sometimes referred to as a first sub-line 802 and a second sub-line 803, respectively.

[0130] As Figure 4 shown, the main line 801 is provided in the transmission path T1 between the antenna terminal 81 and the signal input terminals 82, 83. More specifically, as shown in Figure 5 and Figure 4 shown, the main line 801 is provided in the transmission path T1 between the antenna terminal 81 and the low-pass filter 60. The "transmission path T1" is a signal path for transmitting a transmission signal (high-frequency signal) to be transmitted to the outside via the antenna 310. The transmission path T1 includes a first transmission path T11, a second transmission path T12, a third transmission path T13, and a fourth transmission path T14. The first transmission path T11 is a path through the signal input terminal 82, the first power amplifier 11, the first switch 51, the transmission filter 611 of the filter 61, the matching circuit 71, the fifth switch 55, the low-pass filter 60, the main line 801 of the directional coupler 80, and the antenna terminal 81. The second transmission path T12 is a path through the signal input terminal 82, the first power amplifier 11, the first switch 51, the transmission filter 621 of the filter 62, the matching circuit 72, the fifth switch 55, the low-pass filter 60, the main line 801 of the directional coupler 80, and the antenna terminal 81. The third transmission path T13 is a path through the signal input terminal 83, the second power amplifier 12, the second switch 52, the transmission filter 631 of the filter 63, the matching circuit 73, the fifth switch 55, the low-pass filter 60, the main line 801 of the directional coupler 80, and the antenna terminal 81. The fourth transmission path T14 is a path through the signal input terminal 83, the second power amplifier 12, the second switch 52, the transmission filter 641 of the filter 64, the matching circuit 74, the fifth switch 55, the low-pass filter 60, the main line 801 of the directional coupler 80, and the antenna terminal 81. The main line 801 is connected to the antenna terminal 81 via the terminal 806 and to the low-pass filter 60 via the terminal 807.

[0131] The first sub-line 802 is electromagnetically coupled to the main line 801. A first end of the first sub-line 802 is connected to the first termination circuit 804 via the terminal 808. The first termination circuit 804 is a circuit that terminates the first sub-line 802. The first termination circuit 804 includes, for example, a digitally tunable capacitor (not shown). A second end of the first sub-line 802 is connected to the selection terminal 561 of the sixth switch 56 via the terminal 809.

[0132] The second sub-line 803 is electromagnetically coupled with the main line 801. The second sub-line 803 is arranged on the side opposite to the side of the first sub-line 802 with respect to the main line 801. Thereby, the isolation between the first sub-line 802 and the second sub-line 803 can be improved. The first end of the second sub-line 803 is connected with a second termination circuit 805 via a terminal 810. The second termination circuit 805 is a circuit that terminates the second sub-line 803. The second termination circuit 805 includes, for example, a digitally tunable capacitor (not shown). The second end of the second sub-line 803 is connected with the selection terminal 562 of the sixth switch 56 via a terminal 811. The directional coupler 80 includes not only the main line 801, the first sub-line 802, the second sub-line 803, the terminals 806 to 811 described above, but also a first wiring section that connects the main line 801 and the terminals 806 and 807, a second wiring section that connects the first sub-line 802 and the terminals 808 and 809, and a third wiring section that connects the second sub-line 803 and the terminals 810 and 811.

[0133] The low-pass filter 60 is provided in at least one of the transmission path T1 and the reception path R1 between the antenna terminal 81 and the signal output terminals 84 and 85. In the high-frequency module 100 of Embodiment 1, it is provided in both the transmission path T1 and the reception path R1. More specifically, as shown in FIG. 1, the low-pass filter 60 is provided in the transmission path T1 and the reception path R1 between the antenna terminal 81 and the signal output terminals 84 and 85. Figure 5 and Figure 5As shown, the low-pass filter 60 is provided in the signal path between the directional coupler 80 and the fifth switch 55 in the transmission path T1 and the reception path R1. The "reception path R1" is a signal path for transmitting a reception signal (high-frequency signal) received from the outside via the antenna 310. The reception path R1 includes a first reception path R11, a second reception path R12, a third reception path R13, and a fourth reception path R14. The first reception path R11 is a path passing through the antenna terminal 81, the main line 801 of the directional coupler 80, the low-pass filter 60, the fifth switch 55, the matching circuit 71, the reception filter 612 of the filter 61, the third switch 53, the first input matching circuit 41, the first low-noise amplifier 21, and the signal output terminal 84. The second reception path R12 is a path passing through the antenna terminal 81, the main line 801 of the directional coupler 80, the low-pass filter 60, the fifth switch 55, the matching circuit 72, the reception filter 622 of the filter 62, the third switch 53, the first input matching circuit 41, the first low-noise amplifier 21, and the signal output terminal 84. The third reception path R13 is a path passing through the antenna terminal 81, the main line 801 of the directional coupler 80, the low-pass filter 60, the fifth switch 55, the matching circuit 73, the reception filter 632 of the filter 63, the fourth switch 54, the second input matching circuit 42, the second low-noise amplifier 22, and the signal output terminal 85. The fourth reception path R14 is a path passing through the antenna terminal 81, the main line 801 of the directional coupler 80, the low-pass filter 60, the fifth switch 55, the matching circuit 74, the reception filter 642 of the filter 64, the fourth switch 54, the second input matching circuit 42, the second low-noise amplifier 22, and the signal output terminal 85. As described above, the signal path between the antenna terminal 81 and the common terminal 550 of the fifth switch 55 is included in the transmission path T1 and also included in the reception path R1.

[0134] As described above, the high-frequency module 100 of Embodiment 1 is provided with a plurality of input terminals 881, 882, 883. The plurality of input terminals 881, 882, 883 are terminals for inputting a detection signal from another high-frequency module 101 to 103 to the high-frequency module 100. More specifically, the first input terminal 881 is a terminal for inputting a detection signal from another high-frequency module 101. In addition, the second input terminal 882 is a terminal for inputting a detection signal from another high-frequency module 102. In addition, the third input terminal 883 is a terminal for inputting a detection signal from another high-frequency module 103.

[0135] As described above, Figure 5As shown, the other high-frequency module 101 includes a switch 57, a directional coupler 66, an antenna terminal 111, and an output terminal 112. The switch 57 has a common terminal 570 and multiple (e.g., five) select terminals 571-575. The common terminal 570 is connected to a first end of the main line 661 of the directional coupler 66. The second end of the main line 661 is connected to the antenna terminal 111. The directional coupler 66 has the aforementioned main line 661 and a secondary line 662. The secondary line 662 is electromagnetically coupled to the main line 661. The first end of the secondary line 662 is connected to a termination circuit 663. The second end of the secondary line 662 is connected to the output terminal 112. The secondary line 662 transmits (outputs) a detection signal corresponding to the high-frequency signal transmitted through the main line 661. The detection signal transmitted in the secondary line 662 is input to the high-frequency module 100 via the output terminal 112 and the first input terminal 881.

[0136] like Figure 5 As shown, the other high-frequency module 102 includes a switch 58, a directional coupler 67, an antenna terminal 121, and an output terminal 122. The switch 58 has a common terminal 580 and multiple (e.g., five) selectable terminals 581-585. The common terminal 580 is connected to a first end of the main line 671 of the directional coupler 67. The second end of the main line 671 is connected to the antenna terminal 121. The directional coupler 67 has the aforementioned main line 671 and a secondary line 672. The secondary line 672 is electromagnetically coupled to the main line 671. The first end of the secondary line 672 is connected to a termination circuit 673. The second end of the secondary line 672 is connected to the output terminal 122. The secondary line 672 transmits (outputs) a detection signal corresponding to the high-frequency signal transmitted through the main line 671. The detection signal transmitted in the secondary line 672 is input to the high-frequency module 100 via the output terminal 122 and the second input terminal 882.

[0137] like Figure 6 As shown, the other high-frequency module 103 includes a switch 59, a directional coupler 68, an antenna terminal 131, and an output terminal 132. The switch 59 has a common terminal 590 and multiple (e.g., five) select terminals 591-595. The common terminal 590 is connected to a first end of the main line 681 of the directional coupler 68. The second end of the main line 681 is connected to the antenna terminal 131. The directional coupler 68 has the aforementioned main line 681 and a secondary line 682. The secondary line 682 is electromagnetically coupled to the main line 681. The first end of the secondary line 682 is connected to a termination circuit 683. The second end of the secondary line 682 is connected to the output terminal 132. The secondary line 682 transmits (outputs) a detection signal corresponding to the high-frequency signal transmitted through the main line 681. The detection signal transmitted in the secondary line 682 is input to the high-frequency module 100 via the output terminal 132 and the third input terminal 883.

[0138] In the high-frequency module 100 of Embodiment 1, by connecting the common terminal 560 with the selection terminal 561 in the sixth switch 56, it is possible to output a detection signal (first detection signal) transmitted in the first sub-line 802 to a detector (not shown) provided outside via the output terminal 87. In addition, in the high-frequency module 100 of Embodiment 1, by connecting the common terminal 560 with the selection terminal 562 in the sixth switch 56, it is possible to output a detection signal (second detection signal) transmitted in the second sub-line 803 to the detector via the output terminal 87. In addition, in the high-frequency module 100 of Embodiment 1, by connecting the common terminal 560 with the selection terminal 563 in the sixth switch 56, it is possible to output a detection signal from the other high-frequency module 103 to the detector via the output terminal 87. In addition, in the high-frequency module 100 of Embodiment 1, by connecting the common terminal 560 with the selection terminal 564 in the sixth switch 56, it is possible to output a detection signal from the other high-frequency module 102 to the detector via the output terminal 87. In addition, in the high-frequency module 100 of Embodiment 1, by connecting the common terminal 560 with the selection terminal 565 in the sixth switch 56, it is possible to output a detection signal from the other high-frequency module 101 to the detector via the output terminal 87.

[0139] (2) Effects

[0140] (2.1) High-frequency module

[0141] The high-frequency module 100 of Embodiment 1 includes the antenna terminal 81, the signal input terminals 82, 83, the signal output terminals 84, 85, the mounting substrate 9, the chip inductor 601, and the directional coupler 80. The signal input terminals 82, 83 input a transmission signal. The signal output terminals 84, 85 output a reception signal. The mounting substrate 9 has a first main surface 91 and a second main surface 92 that face each other. The chip inductor 601 is mounted to the first main surface 91 of the mounting substrate 9. The chip inductor 601 is provided in at least one of a transmission path T1 and a reception path R1. The transmission path T1 is a path between the antenna terminal 81 and the signal input terminals 82, 83. The reception path R1 is a path between the antenna terminal 81 and the signal output terminals 84, 85. The directional coupler 80 is mounted to the second main surface 92 of the mounting substrate 9, and at least a part thereof (for example, the main line 801) is provided in the transmission path T1.

[0142] In the high-frequency module 100 of Embodiment 1, as described above, the chip inductor 601 is mounted to the first main surface 91 of the mounting substrate 9, and the directional coupler 80 is mounted to the second main surface 92 of the mounting substrate 9. Thereby, compared to a case where both the chip inductor and the directional coupler are mounted to the first main surface of the mounting substrate, it is possible to downsize in a direction intersecting the thickness direction D1 of the mounting substrate 9. In addition, in the high-frequency module 100 of Embodiment 1, in a case where a ground layer is provided within the mounting substrate 9, it is possible to further improve the isolation between the chip inductor 601 and the directional coupler 80. Thereby, it is possible to suppress the jump of signals between the chip inductor 601 and the directional coupler 80, and as a result, it is possible to suppress the reduction in the detection accuracy. That is, according to the high-frequency module 100 of Embodiment 1, it is possible to downsize and suppress the reduction in the detection accuracy.

[0143] In addition, in the high-frequency module 100 of Embodiment 1, as described above, the chip inductor 601 and the directional coupler 80 overlap when viewed from the thickness direction D1 of the mounting substrate 9. Thereby, it is possible to shorten the wiring length between the chip inductor 601 and the directional coupler 80, and as a result, it is possible to suppress the deterioration of the characteristics of the high-frequency module 100 due to the wiring length.

[0144] In addition, in the high-frequency module 100 of Embodiment 1, as described above, the first input terminal 881, the second input terminal 882, the third input terminal 883, and the output terminal 87 are not adjacent to each other in both the width direction D2 and the long direction D3 of the mounting substrate 9. Thereby, it is possible to improve the isolation between the respective signal terminals, and as a result, it is possible to suppress the jump of signals between the respective signal terminals. In addition, in the high-frequency module 100 of Embodiment 1, a ground terminal 89 is arranged between the respective signal terminals, and it is possible to further improve the isolation between the respective signal terminals.

[0145] In addition, in the high-frequency module 100 of Embodiment 1, as described above, the output terminal 87 is arranged at a position farthest from the antenna terminal 81 in the width direction (first direction) D2 of the mounting substrate 9 among the plurality of signal terminals. Thereby, it is possible to improve the isolation between the antenna terminal 81 and the output terminal 87, and as a result, it is possible to suppress the jump of signals transmitted or received via the antenna terminal 81 to the output terminal 87.

[0146] In addition, in the high-frequency module 100 of Embodiment 1, as described above, the plurality of input terminals 881 to 883 and the output terminal 87 are arranged in two rows. Thereby, compared to a case where the plurality of input terminals and the output terminal are arranged in one row, it is possible to shorten the wiring length up to the sixth switch 56, and as a result, it is possible to suppress the deterioration of the characteristics of the high-frequency module 100.

[0147] (2.2) Communication device

[0148] The communication device 300 of Embodiment 1 is provided with the high-frequency module 100 and the signal processing circuit 301 described above. The signal processing circuit 301 is connected to the high-frequency module 100.

[0149] The communication device 300 of Embodiment 1 is provided with the high-frequency module 100, and thus can be downsized and can suppress a decrease in detection accuracy.

[0150] The plurality of electronic components that constitute the signal processing circuit 301 can be mounted, for example, on the circuit board described above, or on a circuit board (second circuit board) different from the circuit board (first circuit board) on which the high-frequency module 100 is mounted.

[0151] (3) Modified Example

[0152] Reference Figure 7 A high-frequency module 100a of a modified example of Embodiment 1 will be described. With regard to the high-frequency module 100a of the modified example, the same reference signs are attached to the same structural elements as those of the high-frequency module 100 of Embodiment 1, and the description thereof will be omitted.

[0153] The high-frequency module 100a of the modified example differs from the high-frequency module 100 of Embodiment 1 in that the plurality of external connection terminals 8 are ball bumps. In addition, the high-frequency module 100a of the modified example differs from the high-frequency module 100 of Embodiment 1 in that the high-frequency module 100a is not provided with the second resin layer 107 of the high-frequency module 100 of Embodiment 1. The high-frequency module 100a of the modified example can be provided with an underfill portion that is provided in a gap between the IC chip 13 mounted on the second main surface 92 of the mounting substrate 9 and the second main surface 92 of the mounting substrate 9.

[0154] The material of the ball bump that constitutes each of the plurality of external connection terminals 8 is, for example, gold, copper, solder, or the like.

[0155] The plurality of external connection terminals 8 can be mixed with the external connection terminals 8 constituted by ball bumps and the external connection terminals 8 constituted by columnar electrodes.

[0156] The high-frequency module 100a of the modified example, like the high-frequency module 100 of Embodiment 1, can be downsized and can suppress a decrease in detection accuracy.

[0157] (Embodiment 2)

[0158] Reference Figure 7 A high-frequency module 100b of Embodiment 2 will be described. With regard to the high-frequency module 100b of Embodiment 2, the same reference signs are attached to the same structural elements as those of the high-frequency module 100 of Embodiment 1, and the description thereof will be omitted.

[0159] The high-frequency module 100b of Embodiment 2 is different from the high-frequency module 100 of Embodiment 1 in that it is configured to output only the detection signals (the first detection signal and the second detection signal) from the directional coupler 80 provided in the high-frequency module 100b to the detector.

[0160] (1) High-frequency module

[0161] First, the structure of the high-frequency module 100b of Embodiment 2 will be described with reference to Figure 4

[0162] In the high-frequency module 100b of Embodiment 2, the directional coupler 80 has a main line 801, a plurality of (for example, two) sub-lines 802, 803. In addition, the directional coupler 80 also has a plurality of (for example, six) terminals 806 to 811. The main line 801 is provided in the signal path between the antenna terminal 81 and the low-pass filter 60 in the transmission path T1 (see FIG. 1). That is, the first end of the main line 801 is connected to the antenna terminal 81 via the terminal 806, and the second end of the main line 801 is connected to the low-pass filter 60 via the terminal 807. Figure 8

[0163] The first sub-line 802 and the second sub-line 803 are electromagnetically coupled to the main line 801. The first end of the first sub-line 802 is connected to the first termination circuit 804 via the terminal 808, and the second end of the first sub-line 802 is connected to the selection terminal 561 of the sixth switch 56b via the terminal 809. The first end of the second sub-line 803 is connected to the second termination circuit 805 via the terminal 810, and the second end of the second sub-line 803 is connected to the selection terminal 562 of the sixth switch 56 via the terminal 811. The common terminal 560 of the sixth switch 56 is connected to the output terminal 87.

[0164] In the high-frequency module 100b of Embodiment 2, by connecting the common terminal 560 to the selection terminal 561 in the sixth switch 56b, it is possible to output the first detection signal transmitted in the first sub-line 802 to the detector (not shown). In addition, in the high-frequency module 100b of Embodiment 2, by connecting the common terminal 560 to the selection terminal 562 in the sixth switch 56b, it is possible to output the second detection signal transmitted in the second sub-line 803 to the detector.

[0165] (2) Modified example

[0166] Next, the modified example of Embodiment 2 will be described with reference to Figure 9 and Figure 8

[0167] (2.1) Modified example 1

[0168] First, the structure of the high-frequency module 100b of Embodiment 2 will be described with reference to​​​Figure 9 A high-frequency module 100c of the modified example 1 will be described. With regard to the high-frequency module 100c of the modified example 1, the same reference numerals are attached to the same structural elements as the high-frequency module 100b of the embodiment 2, and the description will be omitted.

[0169] The high-frequency module 100c of the modified example 1 is different from the high-frequency module 100b of the embodiment 2 in that the first detection signal transmitted in the first sub-circuit 802 and the second detection signal transmitted in the second sub-circuit 803 are output from each output terminal (the first output terminal 871, the second output terminal 872).

[0170] As the output terminal, the high-frequency module 100c of the modified example 1 has the first output terminal 871 and the second output terminal 872. The first output terminal 871 is a terminal for outputting the first detection signal transmitted in the first sub-circuit 802. The second output terminal 872 is a terminal for outputting the second detection signal transmitted in the second sub-circuit 803. That is, the second end of the first sub-circuit 802, in which the first end is connected to the first termination circuit 804 via the terminal 808, is connected to the first output terminal 871 via the terminal 809. In addition, the second end of the second sub-circuit 803, in which the first end is connected to the second termination circuit 805 via the terminal 810, is connected to the second output terminal 872 via the terminal 811.

[0171] In the high-frequency module 100c of the modified example 1, the first detection signal transmitted in the first sub-circuit 802 can be output to a detector (not shown) via the first output terminal 871. In addition, in the high-frequency module 100c of the modified example 1, the second detection signal transmitted in the second sub-circuit 803 can be output to a detector via the second output terminal 872.

[0172] (2.2) Modified Example 2

[0173] Next, the high-frequency module 100d of the modified example 2 will be described with reference to Figure 4 A high-frequency module 100d of the modified example 2 will be described. With regard to the high-frequency module 100d of the modified example 2, the same reference numerals are attached to the same structural elements as the high-frequency module 100b of the embodiment 2, and the description will be omitted.

[0174] The high-frequency module 100d of the modified example 2 is different from the high-frequency module 100c of the modified example 1 in that a plurality of directional couplers 80A, 80B are provided.

[0175] The high-frequency module 100d of the modification 2 is provided with a plurality of (for example, two) directional couplers 80A, 80B, a plurality of (for example, two) low-pass filters 60A, 60B, and a fifth switch 55d. In addition, the high-frequency module 100d of the modification 2 is further provided with a plurality of (for example, two) antenna terminals 81A, 81B, and a plurality of (for example, four) output terminals 871A, 871B, 872A, 872B.

[0176] The directional coupler 80A has a main line 801 and a plurality of sub-lines 802, 803. In addition, the directional coupler 80A further has a plurality of (for example, six) terminals 806 to 811. The main line 801 is provided in the signal path between the antenna terminal 81A and the low-pass filter 60A in the transmission path T1 (refer to FIG. 1). Figure 4 The first sub-line 802 and the second sub-line 803 are electromagnetically coupled to the main line 801. A first end of the first sub-line 802 is connected to the first termination circuit 804 via the terminal 808, and a second end of the first sub-line 802 is connected to the first output terminal 871A via the terminal 809. A first end of the second sub-line 803 is connected to the second termination circuit 805 via the terminal 810, and a second end of the second sub-line 803 is connected to the second output terminal 872A via the terminal 811.

[0177] The directional coupler 80B has a main line 801 and a plurality of sub-lines 802, 803. In addition, the directional coupler 80B further has a plurality of (for example, six) terminals 806 to 811. The main line 801 is provided in the signal path between the antenna terminal 81B and the low-pass filter 60B in the transmission path T1 (refer to FIG. 1). ​ The first sub-line 802 and the second sub-line 803 are electromagnetically coupled to the main line 801. A first end of the first sub-line 802 is connected to the first termination circuit 804 via the terminal 808, and a second end of the first sub-line 802 is connected to the first output terminal 871B via the terminal 809. A first end of the second sub-line 803 is connected to the second termination circuit 805 via the terminal 810, and a second end of the second sub-line 803 is connected to the second output terminal 872B via the terminal 811.

[0178] The low-pass filter 60A is provided in the signal path between the directional coupler 80A and the fifth switch 55d. More specifically, the low-pass filter 60A is provided in the signal path between the main line 801 of the directional coupler 80A and the common terminal 5501 of the fifth switch 55d. The low-pass filter 60B is provided in the signal path between the directional coupler 80B and the fifth switch 55d. More specifically, the low-pass filter 60B is provided in the signal path between the main line 801 of the directional coupler 80B and the common terminal 5502 of the fifth switch 55d.

[0179] The fifth switch 55d has a plurality of (for example, two) common terminals 5501, 5502, a plurality of (for example, six) selection terminals 551 to 556 capable of being connected to the common terminal 5501, and a plurality of (for example, two) selection terminals 557, 558 capable of being connected to the common terminal 5502.

[0180] In the high-frequency module 100d of the modification example 2, the first detection signal transmitted in the first sub-line 802 of the directional coupler 80A can be output to a detector (not shown) via the first output terminal 871A. In addition, in the high-frequency module 100d of the modification example 2, the second detection signal transmitted in the second sub-line 803 of the directional coupler 80A can be output to the detector via the second output terminal 872A. In addition, in the high-frequency module 100d of the modification example 2, the first detection signal transmitted in the first sub-line 802 of the directional coupler 80B can be output to the detector via the first output terminal 871B. In addition, in the high-frequency module 100d of the modification example 2, the second detection signal transmitted in the second sub-line 803 of the directional coupler 80B can be output to the detector via the second output terminal 872B.

[0181] (Other Modification Examples)

[0182] The above-described embodiments 1, 2, and the like are merely one of various embodiments of the present application. The above-described embodiments 1, 2, and the like can be variously changed according to design, and the like, as long as the objects of the present application can be achieved, and the mutually different constituent elements of the mutually different embodiments can be appropriately combined.

[0183] In the high-frequency modules 100, 100a, 100b, 100c, 100d, the conductive layer 106 is not limited to the case of covering the entire main surface 151 of the first resin layer 105, and can cover at least a part of the main surface 151 of the first resin layer 105.

[0184] In addition, the plurality of transmission filters 611, 621, 631, 641, 651 and the plurality of reception filters 612, 622, 632, 642, 652 are each not limited to a surface acoustic wave filter, and can be, for example, a BAW (Bulk Acoustic Wave) filter. The resonator in the BAW filter is, for example, an FBAR (Film Bulk Acoustic Resonator) or an SMR (Solidly Mounted Resonator). The BAW filter has a substrate. The substrate is, for example, a silicon substrate.

[0185] In addition, the plurality of transmission filters 611, 621, 631, 641, 651 and the plurality of reception filters 612, 622, 632, 642, 652 are each not limited to a ladder filter, and can be, for example, a longitudinal coupling resonator type surface acoustic wave filter.

[0186] In addition, the above-described elastic wave filter is an elastic wave filter using a surface elastic wave or a bulk elastic wave, but is not limited thereto, and can be, for example, an elastic wave filter using an elastic boundary wave, a plate wave, or the like.

[0187] In addition, the communication device 300 of Embodiment 1 can also be provided with any one of the high-frequency modules 100a, 100b, 100c, 100d in place of the high-frequency module 100.

[0188] In addition, in the high-frequency modules 100, 100a, 100b, 100c, 100d, the directional coupler 80, 80A, 80B has two sub-lines 802, 803, but is not limited thereto. The directional coupler 80, 80A, 80B can have, for example, only the first sub-line 802, or can have only the second sub-line 803.

[0189] In addition, in the high-frequency module 100 of Embodiment 1, the plurality of input terminals 881 to 883 and the output terminal 87 are arranged in two columns, but are not limited thereto. The plurality of input terminals 881 and the output terminal 87 can be arranged, for example, in three or more columns.

[0190] In addition, in the high-frequency module 100 of Embodiment 1, one ground terminal 89 is arranged between the plurality of signal terminals (the input terminals 881 to 883 and the output terminal 87), but two or more ground terminals 89 can be arranged between the plurality of signal terminals, for example.

[0191] In addition, in the high-frequency modules 100, 100a, 100b, 100c, 100d, the low-pass filter 60, 60A, 60B is provided between the directional coupler 80, 80A, 80B and the fifth switch 55, 55d, but is not limited thereto. The low-pass filter 60, 60A, 60B can be provided between the antenna terminal 81, 81A, 81B and the directional coupler 80, 80A, 80B.

[0192] Further, in the high-frequency module 100d, it is configured to output the two detection signals from the directional coupler 80A and the two detection signals from the directional coupler 80B from the respective output terminals, and for example, it can also be configured to output a part of the four detection signals via the sixth switch. For example, it can also be configured to output the two detection signals output from the directional coupler 80A or the directional coupler 80B to the output terminal via the sixth switch. Further, for example, it can also be configured to output one detection signal of the directional coupler 80A and one detection signal of the directional coupler 80B to the output terminal via the sixth switch.

[0193] Further, in the high-frequency modules 100, 100a, 100b, 100c, 100d, the chip inductor 601 is an inductor that configures the low-pass filter 60, 60A, 60B, but is not limited thereto. The chip inductor 601 may, for example, also be an inductor that configures a matching circuit provided in a signal path between the antenna terminal 81, 81A, 81B and the fifth switch 55, 55d.

[0194] (Method)

[0195] In the present specification, the following method is disclosed.

[0196] The high-frequency module (100; 100a to 100d) of the first method includes an antenna terminal (81; 81A, 81B), a signal input terminal (82, 83), a signal output terminal (84, 85), a mounting substrate (9), a chip inductor (601), and a directional coupler (80; 80A, 80B). The signal input terminal (82, 83) inputs a transmission signal. The signal output terminal (84, 85) outputs a reception signal. The mounting substrate (9) has a first main surface (91) and a second main surface (92) that face each other. The chip inductor (601) is mounted to the first main surface (91) of the mounting substrate (9). The chip inductor (601) is provided in at least one of a transmission path (T1) between the antenna terminal (81; 81A, 81B) and the signal input terminal (82, 83) and a reception path (R1) between the antenna terminal (81; 81A, 81B) and the signal output terminal (84, 85). The directional coupler (80; 80A, 80B) is mounted to the second main surface (92) of the mounting substrate (9), and at least a part (main line 801) is provided in the transmission path (T1).

[0197] According to the method, it is possible to miniaturize and improve detection accuracy.

[0198] According to the first mode, in the high-frequency module (100; 100a to 100d) of the second mode, the chip inductor (601) constitutes a low-pass filter (60; 60A, 60B) or a matching circuit provided in the transmission path (T1). When viewed from the top in the thickness direction (D1) of the mounting substrate (9), the chip inductor (601) overlaps the directional coupler (80; 80A, 80B).

[0199] According to this mode, it is possible to shorten the wiring length between the chip inductor (601) and the directional coupler (80; 80A, 80B), and as a result, it is possible to suppress the deterioration of the characteristics of the high-frequency module (100; 100a to 100d) caused by the wiring length.

[0200] According to the first or second mode, the high-frequency module (100; 100a to 100d) of the third mode further has an output terminal (87; 871, 872; 871A, 871B, 872A, 872B) that outputs a detection signal from the directional coupler (80; 80A, 80B). The directional coupler (80; 80A, 80B) has a main line (801) and at least one sub-line (802, 803). The main line (801) is provided in the transmission path (T1). The sub-line (802, 803) is electromagnetically coupled to the main line (801). The output terminal (87; 871, 872; 871A, 871B, 872A, 872B) is connected to the sub-line (802, 803).

[0201] According to this mode, it is possible to output the detection signal from the directional coupler (80; 80A, 80B) to the outside.

[0202] According to the third mode, the high-frequency module (100) of the fourth mode further has a selection switch (56). The selection switch (56) selects at least one of the detection signal output from the directional coupler (80) and the detection signal output from other directional couplers (66 to 68) provided in other high-frequency modules (101 to 103) and outputs the selected detection signal to the output terminal (87).

[0203] According to this mode, it is possible to output a plurality of detection signals from one output terminal (87).

[0204] According to the third or fourth mode, in the high-frequency module (100; 100a to 100d) of the fifth mode, as the sub-line (802, 803), the directional coupler (80; 80A, 80B) has a first sub-line (802) and a second sub-line (803). The first sub-line (802) outputs a first detection signal corresponding to the transmission signal. The second sub-line (803) outputs a second detection signal corresponding to the reception signal.

[0205] According to this mode, the detection accuracy can be improved for both the transmission signal and the reception signal.

[0206] According to any one of the third to fifth modes, the high-frequency module (100) of the sixth mode further includes a plurality of signal terminals (87, 881-883) and a switch (55). The plurality of signal terminals (87, 881-883) includes an output terminal (87) disposed on the second main surface (92) of the mounting substrate (9). The switch (55) is mounted on the second main surface (92) of the mounting substrate (9) and is connected to the antenna terminal (81). The mounting substrate (9) has a rectangular shape when viewed from the thickness direction (D1) of the mounting substrate (9). The mounting substrate (9) has a first edge (94) and a second edge (95) orthogonal to each other. In a case where the mounting substrate (9) is divided into four regions (921-924) by a first line (L1) passing through the center (C1) of the mounting substrate (9) and extending along the first edge (94) and a second line (L2) passing through the center (C1) of the mounting substrate (9) and extending along the second edge (95), the plurality of signal terminals (87, 881-883), the directional coupler (80), and the switch (55) are disposed in the same region (922).

[0207] According to this mode, the lengths of the wirings between the plurality of signal terminals (87, 881-883) and the directional coupler (80) and between the directional coupler (80) and the switch (55) can be shortened.

[0208] According to the sixth mode, in the high-frequency module (100) of the seventh mode, the plurality of signal terminals (87, 881-883) are disposed so as not to be adjacent to each other in both the first direction (D2) and the second direction (D3) orthogonal to the thickness direction (D1) of the mounting substrate (9).

[0209] According to this mode, the isolation between the signal terminals can be improved, and as a result, the signal jump between the signal terminals can be suppressed.

[0210] According to the seventh mode, the high-frequency module (100) of the eighth mode further includes at least one ground terminal (89). The ground terminal (89) is disposed on the second main surface (92) of the mounting substrate (9). The ground terminal (89) is disposed between two signal terminals in the first direction (D2) or the second direction (D3) among the plurality of signal terminals (87, 881-883).

[0211] According to this mode, the isolation between the signal terminals can be further improved.

[0212] According to the seventh or eighth mode, in the high-frequency module (100) of the ninth mode, the antenna terminal (81) is arranged on the second main surface (92) of the mounting substrate (9). Among the plurality of signal terminals (87, 881-883), the output terminal (87) is arranged at a position farthest from the antenna terminal (81) in the first direction (D2).

[0213] According to this mode, it is possible to improve the isolation between the antenna terminal (81) and the output terminal (87), and as a result, it is possible to suppress the jump of signals between the antenna terminal (81) and the output terminal (87).

[0214] According to any one of the sixth to ninth modes, in the high-frequency module (100) of the tenth mode, the directional coupler (80) and the switch (55) are monolithically integrated. The switch (55) is arranged on the opposite side from the plurality of signal terminals (87, 881-883) with respect to the directional coupler (80) in a direction (for example, the long side direction D3 of the mounting substrate 9) intersecting the thickness direction (D1) of the mounting substrate (9).

[0215] According to this mode, it is possible to improve the isolation between the plurality of signal terminals (87, 881-883) and the switch (55), and as a result, it is possible to suppress the jump of signals between the plurality of signal terminals (87, 881-883) and the switch (55).

[0216] According to any one of the first to tenth modes, the high-frequency module (100; 100a-100d) of the eleventh mode further includes an external connection terminal (8). The external connection terminal (8) includes the antenna terminal (81), the signal input terminals (82, 83), and the signal output terminals (84, 85), and is arranged on the second main surface (92) of the mounting substrate (9).

[0217] According to this mode, it is possible to arrange the IC chip 13 in a gap between the mounting substrate (9) and a mother substrate or the like to which the external connection terminal (8) is connected.

[0218] The communication device (300) of the twelfth mode includes the high-frequency module (100; 100a-100d) of any one of the first to eleventh modes, and a signal processing circuit (301). The signal processing circuit (301) is connected to the high-frequency module (100; 100a-100d).

[0219] According to this mode, it is possible to miniaturize and improve the detection accuracy.

[0220] BRIEF DESCRIPTION OF THE DRAWINGS: 8…external connection terminal; 9…mounting substrate; 11…first power amplifier; 12…second power amplifier; 13…IC chip; 20…controller; 31…first output matching circuit; 32…second output matching circuit; 41…first input matching circuit; 42…second input matching circuit; 51…first switch; 52…second switch; 53…third switch; 54…fourth switch; 55, 55d…fifth switch; 56, 56b…sixth switch (selection switch); 57, 58, 59…switch; 60, 60A, 60B…low-pass filter; 61, 62, 63, 64, 65…filter; 66, 67, 68…directional coupler; 71, 72, 73, 74, 75…matching circuit; 76…digitally tunable capacitor; 77…control power supply; 80, 80A, 80B…directional coupler; 81, 81A, 81B…antenna terminal; 82, 83…signal input terminal; 84, 85…signal output terminal; 86…control terminal; 87…output terminal; 89…ground terminal; 91…first main face; 92…second main face; 93…outer peripheral face; 94…first edge; 95…second edge; 100, 100a, 100b, 100c, 100d…high-frequency module; 101, 102, 103…other high-frequency module; 105…first resin layer; 106…conductive layer; 107…second resin layer; 111, 121, 131…antenna terminal; 112, 122, 132…output terminal; 151…main face; 153…outer peripheral face; 171…main face; 173…outer peripheral face; 300…communication device; 301…signal processing circuit; 302…RF signal processing circuit; 303…baseband signal processing circuit; 310…antenna; 311, 312…capacitor; 313…inductor; 411, 412, 413, 414…inductor; 415…capacitor; 510…common terminal; 511, 512…selection terminal; 520…common terminal; 521, 522…selection terminal; 530…common terminal; 531, 532…selection terminal; 540…common terminal; 541, 542…selection terminal; 550…common terminal; 551, 552, 553, 554, 555, 556…selection terminal; 560…common terminal; 561, 562, 563, 564, 565…selection terminal; 570…common terminal; 571, 572, 573, 574, 575…selection terminal; 580…common terminal; 581, 582, 583, 584, 585…selection terminal; 590…common terminal; 591, 592, 593, 594, 595…selection terminal; 601, 602, 603…inductor; 604…capacitor; 611, 621, 631, 641, 651…transmission filter; 612, 622, 632, 642, 652…reception filter; 661, 671, 681…main line;662, 672, 682…sub-circuit; 663, 673, 683…termination circuit; 711, 721, 731, 741, 751…inductor; 712, 722, 732, 742…capacitor; 801…main circuit; 802…first sub-circuit; 803…second sub-circuit; 804…first termination circuit; 805…second termination circuit; 871, 871A, 871B…first output terminal; 872, 872A, 872B…second output terminal; 881…first input terminal; 882…second input terminal; 883…third input terminal; 921…first region; 922…second region; 923…third region; 924…fourth region; C1…center; D1…thickness direction; D2…width direction (first direction); D3…long direction (second direction); L1, L2…straight line.

Claims

1. A high frequency module, wherein, Possessing: an antenna terminal; a signal input terminal that inputs a transmission signal; a signal output terminal that outputs a reception signal; a mounting substrate that has a first main surface and a second main surface that face each other; a chip inductor that is mounted to the first main surface of the mounting substrate and is provided in at least one of a transmission path between the antenna terminal and the signal input terminal and a reception path between the antenna terminal and the signal output terminal; and a directional coupler that is mounted to the second main surface of the mounting substrate and at least a part of which is provided in the transmission path.

2. The high-frequency module according to claim 1, wherein the chip inductor constitutes a low-pass filter or a matching circuit that is provided in the transmission path, the chip inductor overlaps the directional coupler when viewed from a top direction of a thickness direction of the mounting substrate.

3. The high-frequency module according to claim 1, wherein the high-frequency module further possesses an output terminal that outputs a detection signal from the directional coupler, the directional coupler has: a main line that is provided in the transmission path; and at least one sub line that is electromagnetically coupled to the main line, the output terminal is connected to the sub line.

4. The high-frequency module according to claim 3, wherein the high-frequency module further possesses a selection switch that selects at least one of a detection signal output from the directional coupler and a detection signal output from another directional coupler possessed by another high-frequency module and outputs the selected detection signal to the output terminal.

5. The high-frequency module according to claim 3, wherein as the sub line, the directional coupler has: a first sub line that outputs a first detection signal that corresponds to the transmission signal; and a second sub line that outputs a second detection signal that corresponds to the reception signal.

6. The high-frequency module according to any one of claims 3 to 5, wherein the high-frequency module further possesses: a plurality of signal terminals that include the output terminal and are arranged on the second main surface of the mounting substrate; and a switch that is mounted to the second main surface of the mounting substrate and is connected to the antenna terminal, the mounting substrate is rectangular when viewed from a top direction of a thickness direction of the mounting substrate and has a first side and a second side that are orthogonal to each other, in a case where the mounting substrate is divided into four regions by a first line that passes through a center of the mounting substrate and extends in a direction along the first side and a second line that passes through the center of the mounting substrate and extends in a direction along the second side, the plurality of signal terminals, the directional coupler, and the switch are arranged in the same region.

7. The high-frequency module according to claim 6, wherein the plurality of signal terminals are arranged so as not to be adjacent to each other in both a first direction and a second direction that are orthogonal to the thickness direction of the mounting substrate.

8. The high-frequency module according to claim 7, wherein the high-frequency module further possesses at least one ground terminal that is arranged on the second main surface of the mounting substrate, ​ ​ The ground terminal is arranged between two signal terminals in the first direction or the second direction among the plurality of signal terminals.

9. The high-frequency module according to claim 7, wherein The antenna terminal is arranged on the second main surface of the mounting substrate, The output terminal is arranged at a position farthest from the antenna terminal in the first direction among the plurality of signal terminals.

10. The high-frequency module according to claim 6, wherein The directional coupler and the switch are monolithically integrated, The switch is arranged on the opposite side from the plurality of signal terminals with respect to the directional coupler in a direction intersecting the thickness direction of the mounting substrate.

11. The high-frequency module according to any one of claims 1 to 5 and 7 to 10, wherein The high-frequency module further includes an external connection terminal including the antenna terminal, the signal input terminal, and the signal output terminal, and is arranged on the second main surface of the mounting substrate.

12. A communications device, wherein, comprises: the high-frequency module according to any one of claims 1 to 11; and a signal processing circuit connected to the high-frequency module.

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