A method and device for handling exceptions of system components

Abstract

The present invention discloses a method and device for handling exceptions of system components. The method is applicable to a computing core that is connected to an external bus or an internal bus with different system components. The method comprises: when the working state of a system component is detected to be abnormal in real time, obtaining a component processing request, the component processing request being a processing request sent individually by a component whose working state is abnormal; in response to the processing request, sending a processing command to a component whose working state is abnormal, so that the component whose working state is abnormal performs an exception handling operation individually, and the exception handling operation comprises: restarting or restoring. The present invention can detect the working state of each component connected to the computing core, and when an abnormality is detected, send a restart or recovery instruction to the abnormal component, so that the abnormal component restarts individually, realizes the isolation handling of the abnormality, avoids the interruption of operation, and can also avoid the loss of data of the computing core and avoid the interruption of tasks after restarting, so as to ensure that the tasks can be continuously executed.

Description

Background Art

[0002] For some SOC systems with a division of labor between computing and control (such as notebook servers, etc.), the operating system is usually installed on the computing core (such as the CPU). By controlling the computing core, the computing core calls different operating cores or external components to extract data, and then performs corresponding calculations within the computing core to complete the computing processing.

[0003] However, during the processing, different operating cores or external components may have abnormalities. In the event of an abnormality, information is often sent to the operating system, so that the operating system controls the computing core and each operating core and external components to restart or recover, thereby solving the abnormal problem and restoring everything to normal. However, the currently commonly used exception handling methods, whether it is a single component abnormality or a multi-component abnormality, will trigger the entire system to restart each component. In the case of a single component abnormality, the remaining components are all working normally. If a restart is triggered, other normal processing work of the computing core will be interrupted, resulting in data loss and incomplete tasks. It cannot be continued after the next startup and needs to be restarted, which affects the normal operation of the computing core and the operating system. Summary of the invention

[0004] The present invention proposes a method and device for handling exceptions of system components. The method can detect the working status of each component connected to a computing core and an external operating core, and when an abnormality is detected, a restart or recovery instruction is sent to the abnormal component so that the abnormal component can be restarted individually, thereby achieving isolated handling of the exception and avoiding operation interruption.

[0005] A first aspect of an embodiment of the present invention provides a method for handling exceptions of a system component, the method being applicable to a computing core that is connected to different system components through an external bus or an internal bus, the method comprising:

[0006] When the working state of a component of the real-time detection system is abnormal, a component processing request is obtained, where the component processing request is a processing request sent separately by the component whose working state is abnormal;

[0007] In response to the processing request, a processing command is sent to the component with abnormal working status, so that the component with abnormal working status performs an exception processing operation separately, and the exception processing operation includes: restart or recovery.

[0008] In a possible implementation manner of the first aspect, the system component includes a control core, and the connection manner of the external bus connection includes:

[0009] The computing core is connected to the control core via a bus of an external device.

[0010] In a possible implementation manner of the first aspect, the system components include a control core, a peripheral component, and access hardware, and the connection manner of the internal bus connection includes:

[0011] The control core is connected to the access hardware, and the computing core is connected to the peripheral components and the access hardware respectively through a system bus.

[0012] In a possible implementation manner of the first aspect, after the step of sending a processing command to the component with an abnormal working status in response to the processing request, the method further includes:

[0013] Receive an invalid value replied by the access hardware through the internal bus, and stop sending processing commands to the component with an abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with an abnormal working status does not respond to the processing command, or the access hardware determines that the component with an abnormal working status is marked as a failed state or an invalid state.

[0014] In a possible implementation manner of the first aspect, after the component with an abnormal working status completes an exception handling operation, the method further includes:

[0015] A communication request is sent to the access hardware so that the access hardware stops communication blocking, so that the computing core can resume communication with the control core and the peripheral components.

[0016] In a possible implementation manner of the first aspect, sending a processing command to the component with an abnormal working status in response to the processing request includes:

[0017] Determine, based on the processing request, an abnormal processing method of the component whose working status is abnormal;

[0018] If the exception handling method is restart, a processing command for a restart processing operation is sent to the component whose working state is abnormal;

[0019] If the exception handling method is recovery, a processing command for the recovery processing operation is sent to the component whose working status is abnormal.

[0020] In a possible implementation manner of the first aspect, after the step of sending a processing command for a recovery processing operation to the component in an abnormal working state, the method further includes:

[0021] After the component with abnormal working status completes the recovery operation, a processing command for the restart processing operation is sent to make the component with abnormal working status perform the restart operation.

[0022] In a possible implementation manner of the first aspect, the abnormality handling manner of determining the component whose working status is abnormal based on the processing request includes:

[0023] Acquire a preset value of a register to which the component with abnormal working status is connected, wherein the preset value is a value pre-set in the register by a user;

[0024] If the preset value is a value corresponding to the restart processing operation, determining that the exception processing method is restart;

[0025] If the preset value is a value corresponding to the recovery processing operation, it is determined that the exception processing method is recovery.

[0026] In a possible implementation manner of the first aspect, the method of detecting the working status of the system component in real time includes:

[0027] Call the system's built-in software to perform component detection to determine the working status of the component, or detect the heartbeat packet of the system component to determine the working status of the component.

[0028] A second aspect of an embodiment of the present invention provides an exception handling device for a system component, the device being applicable to a computing core connected to different system components through an external bus or an internal bus, the device comprising:

[0029] The acquisition module 501 is used to acquire a component processing request when the working state of the real-time detection system component is abnormal, wherein the component processing request is a processing request sent separately by the component whose working state is abnormal;

[0030] The processing module 502 is used to send a processing command to the component with abnormal working status in response to the processing request, so that the component with abnormal working status performs an exception processing operation separately, and the exception processing operation includes: restart or recovery.

[0031] In a possible implementation manner of the second aspect, the system component includes a control core, and the connection manner of the external bus connection includes:

[0032] The computing core is connected to the control core via a bus of an external device.

[0033] In a possible implementation manner of the second aspect, the system components include a control core, peripheral components, and access hardware, and the connection manner of the internal bus connection includes:

[0034] The control core is connected to the access hardware, and the computing core is connected to the peripheral components and the access hardware respectively through a system bus.

[0035] In a possible implementation manner of the second aspect, the apparatus further includes:

[0036] A module for receiving invalid values ​​is used to receive the invalid values ​​replied by the access hardware through the internal bus, and stop sending processing commands to the component with abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with abnormal working status does not respond to the processing command, or the access hardware determines that the component with abnormal working status is marked as a failed state or an invalid state.

[0037] In a possible implementation manner of the second aspect, the apparatus further includes:

[0038] The communication request sending module is used to send a communication request to the access hardware so that the access hardware stops communication blocking and allows the computing core to resume communication with the control core and the peripheral components.

[0039] In a possible implementation manner of the second aspect, the processing module is further configured to:

[0040] Determine, based on the processing request, an abnormal processing method of the component whose working status is abnormal;

[0041] If the exception handling method is restart, a processing command for a restart processing operation is sent to the component whose working state is abnormal;

[0042] If the exception handling method is recovery, a processing command for the recovery processing operation is sent to the component whose working status is abnormal.

[0043] In a possible implementation manner of the second aspect, the processing module is further configured to:

[0044] After the component with abnormal working status completes the recovery operation, a processing command for the restart processing operation is sent to make the component with abnormal working status perform the restart operation.

[0045] In a possible implementation of the second aspect, the processing module is further used to obtain a preset value of a register to which the component with abnormal working status is connected, where the preset value is a value pre-set in the register by a user;

[0046] If the preset value is a value corresponding to the restart processing operation, determining that the exception processing method is restart;

[0047] If the preset value is a value corresponding to the recovery processing operation, it is determined that the exception processing method is recovery.

[0048] In a possible implementation manner of the second aspect, the acquisition module is further configured to:

[0049] Call the system's built-in software to perform component detection to determine the working status of the component, or detect the heartbeat packet of the system component to determine the working status of the component.

[0050] Compared with the prior art, the embodiment of the present invention provides an exception handling method and device for system components, which has the beneficial effect that: the present invention can detect the working status of each component connected to the computing core and the external operating core, and when an abnormality is detected, a restart or recovery instruction is sent to the abnormal component to restart the abnormal component separately, thereby realizing isolated processing of the exception, avoiding operation interruption, avoiding data loss of the computing core, and avoiding task interruption after restart, thereby ensuring continuous execution of the task. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 It is a flowchart of a method for handling an exception of a system component provided by an embodiment of the present invention;

[0052] Figure 2 is a schematic diagram of the connection structure of a computing core provided by an embodiment of the present invention;

[0053] Figure 3 It is a schematic diagram of the structure of the external connection mode of the computing core provided by one embodiment of the present invention;

[0054] Figure 4 It is a schematic diagram of the structure of the internal connection method of the computing core provided by an embodiment of the present invention;

[0055] Figure 5 It is an operation flow chart of an exception handling method for a system component provided by an embodiment of the present invention;

[0056] Figure 6 is a schematic diagram of status detection and exception handling of system components provided by an embodiment of the present invention;

[0057] Figure 7 It is a detection operation flow chart of a method for handling an exception of a system component provided by an embodiment of the present invention;

[0058] Figure 8 It is a schematic diagram of the internal connection of the computing core and the control core provided by an embodiment of the present invention;

[0059] Fig. 9 is a schematic diagram of abnormal communication between a computing core and a control core provided by an embodiment of the present invention;

[0060] Fig.10 is a schematic diagram of a blocking function for accessing hardware provided by an embodiment of the present invention;

[0061] Fig.11 It is a structural diagram of an exception handling device for a system component provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0062] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0063] In order to solve the above problems, a method for handling exceptions of system components provided in an embodiment of the present application will be introduced and explained in detail through the following specific embodiments.

[0064] Reference Figure 1 , showing a flow chart of a method for handling exceptions of system components provided by an embodiment of the present invention.

[0065] In one embodiment, the method is applicable to a computing core (such as a CPU). The computing core may be a computing core of a system on chip (SOC system).

[0066] Reference Figure 2 , showing a schematic diagram of the connection structure of the computing core provided by an embodiment of the present invention.

[0067] In one embodiment, various devices in the system are connected via a bus or in a fixed manner. Devices and different processors are interconnected by a bus, and the peripherals are similar.

[0068] Reference Figure 2 , the required operating system can be installed in the computing core, and the computing core can be connected to different operating cores, peripheral components or external components, such as Figure 2 As shown, the operation core may be a baseboard management controller (Baseboard Management Controller, referred to as BMC) or a control core.

[0069] When the host's computing core is working normally, the operating system's tasks are set to a normal working state. Unless the host's computing core or the operating system initiates a recovery request, the computing core is assumed not to be recovered by default.

[0070] For ease of understanding, the specific application scenarios of the present invention are as follows:

[0071] 1. The computing core is started independently, and the firmware startup process of the computing core does not depend on other external components.

[0072] 2. The computing core firmware startup depends on the control core, which starts and guides the computing core.

[0073] 3. The computing core firmware startup depends on the BMC, which starts and guides the computing core.

[0074] 4. The startup of the computing core not only relies on an external processor, but also requires multiple processors or peripheral components to work together.

[0075] Reference Figure 3-4 , respectively showing a schematic diagram of the structure of the external connection method of the computing core provided by an embodiment of the present invention and a schematic diagram of the structure of the internal connection method of the computing core provided by an embodiment of the present invention.

[0076] In one implementation, the system component includes a control core, taking the connection between a computing core and a control core as an example.

[0077] The computing core is connected to the control core via a bus of an external device. The two cores can be connected via some specific external buses, such as I2C, SPI, etc.

[0078] Although the two are connected at this time, the abnormality or restart of any core will not affect the abnormality of other unrelated functions of the other party.

[0079] Reference Figure 4 The system components include a control core, peripheral components and access hardware, and the connection mode of the internal bus connection can be:

[0080] The control core is connected to the access hardware, and the computing core is connected to the peripheral components and the access hardware respectively through a system bus.

[0081] The control core and computing core can be directly connected through the internal logic bus and can access each other's resources.

[0082] As an example, the method for handling exceptions of system components may include:

[0083] S11. When the working state of a component of the real-time detection system is abnormal, a component processing request is obtained, where the component processing request is a processing request sent separately by the component whose working state is abnormal.

[0084] When in use, the working status of each component in the system can be detected in real time. If the working status of any component is abnormal, the component processing request can be obtained immediately, and the abnormal component can be processed accordingly based on the request.

[0085] Moreover, the present invention detects or calculates the working status of each component connected to the core and the external device operating core separately, and processes each abnormal component separately, thereby achieving isolated processing of abnormalities and avoiding operation interruptions.

[0086] Wherein, as an example, the method of real-time detection of the working status of the system components includes:

[0087] Call the system's built-in software to perform component detection to determine the working status of the component, or detect the heartbeat packet of the system component to determine the working status of the component.

[0088] In one implementation, the working state of the component can be determined by detecting the heartbeat packet of the component. Specifically, conventional heartbeat packet detection can be performed to determine the working state of the component. Detection software can also be installed at the computing core to determine the working state of the component through the software.

[0089] Monitoring of components and various processing cores, such as BMC and control core, can implement a function to inform themselves whether they are currently in working condition.

[0090] In one embodiment, whether to enter an abnormal state can be determined through WDT (Watchdog Timer) and real-time background tasks. Here, taking WDT as an example, when a component cannot respond, a WDT-based module will generate an interrupt / exception, triggering or notifying the system, and the working state of the component may be an abnormal state.

[0091] It should be noted that if the component is initialized by external programming, such as SPI is programmed by the CPU, then the interrupt line corresponding to the SPI needs to be physically routed or physically connected to the interrupt signal pin of the CPU. The CPU completes the subsequent work.

[0092] The working status detection can be achieved through the software task background heartbeat, etc. The accuracy will be lower than that achieved through WDT, but the controllability will be more flexible.

[0093] In one embodiment, the computing core can participate in the initialization setting of the system. When starting up, the computing core can call different startup branches to identify whether each component has an abnormality. It can also be used to determine why the current component is started to determine the cause of its abnormality.

[0094] S12. Sending a processing command to the component with abnormal working status in response to the processing request, so that the component with abnormal working status performs an exception processing operation separately, and the exception processing operation includes: restarting or restoring.

[0095] In one embodiment, since the present invention detects each component and performs individual recovery after determining an abnormality, other components except the computing core need to be divided into the system to consider the impact on the actual system, and whether the recovery of each component affects the host's CPU, i.e., the computing core.

[0096] Specifically, when it is determined that an abnormality occurs in components other than the computing core (i.e., the CPU), the component can automatically issue a processing request for recovery or restart to trigger the computing core to restart or recover the abnormal component, so as to avoid operational interruption of some components that are working normally.

[0097] Wherein, as an example, sending a processing command to the component with abnormal working status in response to the processing request includes:

[0098] S121. Determine an exception handling method for the component whose working status is abnormal based on the processing request.

[0099] When it is determined that the working status of the detected component is abnormal, a processing command can be sent to the component individually to allow the component to restart or recover on its own, allowing the component to operate independently without the need for each component and the computing core to operate at the same time, thereby avoiding interruption of the current operation.

[0100] In one of the embodiments, different exceptions may execute different operation modes, such as restart or recovery.

[0101] In one implementation, the processing method of the component may be determined first, and then corresponding instructions may be sent according to the processing method to allow the component or different operating cores to perform operations.

[0102] In order to accurately determine the processing method, as an example, step S121 may include the following sub-steps:

[0103] S1211. Obtain a preset value of a register to which the component with abnormal working status is connected, wherein the preset value is a value set in the register in advance by a user.

[0104] S1212: If the preset value is a value corresponding to the restart processing operation, determine that the exception processing method is restart.

[0105] S1213: If the preset value is a value corresponding to the recovery processing operation, determine that the exception processing method is recovery.

[0106] For example, the user may pre-set a value of 01 in the register for restart and a value of 10 for recovery.

[0107] The value of the register to which the abnormal component is connected can be detected. If the value is 01, the processing method is restart; if the value is 10, the processing method is recovery.

[0108] The specific operation method can be adjusted according to actual needs, and the size of the preset value can also be adjusted according to actual needs.

[0109] S122: If the exception handling method is restart, a processing command for a restart processing operation is sent to the component whose working status is abnormal.

[0110] S123: If the exception handling method is recovery, a processing command for the recovery processing operation is sent to the component whose working status is abnormal.

[0111] In one embodiment, if the exception handling method is restart, a restart processing command can be directly sent to the component or operating core whose working state is abnormal, so that the abnormal component or operating core responds to the restart processing command to perform restart. If the exception handling method is recovery, a recovery processing command can be directly sent to the component or operating core whose working state is abnormal, so that the abnormal component or operating core responds to the recovery processing command to perform recovery operation.

[0112] In order to avoid errors in component startup after recovery, the method may further include, as an example:

[0113] S124: After the component with abnormal working status completes the recovery operation, send a processing command for the restart processing operation to make the component with abnormal working status perform the restart operation.

[0114] After the abnormal component or operating core responds to the processing command of the recovery process and completes the recovery operation, a restart (reset) can be triggered at the same time. A processing command of the restart process can be sent to the component or operating core that has completed the recovery operation. After the restart (reset), the component or operating core can perform branch processing according to the part and module where the problem is determined, so that the component enters the working state.

[0115] Restarting after recovery can prevent component errors and ensure that components can be used again after restart.

[0116] It should be noted that the exception handling methods of each operation core and different components are the same and can be executed in the above manner.

[0117] Optionally, in order to simplify hardware design and processes, recovery (recover) and reset (reset) can be considered to be merged; the state of the BMC / control core can be controlled by the CPU side, sending recovery (recover) and reset (reset) and other signals to the hardware.

[0118] In one embodiment, if the computing core and the control core, the peripheral components and the access hardware are directly connected through an internal bus, when the host and the computing core are working normally, when the peripheral components need to be reset separately, the peripheral components cannot respond to any requests from the host and the computing core, and the internal bus leading to the computing core or the control core by the peripheral components is inaccessible. Therefore, after processing a command to the abnormal component, there may be no response or reply, and the computing core may repeatedly process commands to the abnormal component, causing problems in the computing core.

[0119] In order to avoid the above situation, as an example, after step S12, the method may further include:

[0120] S13. Receive an invalid value replied by the access hardware through the internal bus, and stop sending processing commands to the component with an abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with an abnormal working status does not respond to the processing command, or the access hardware determines that the component with an abnormal working status is marked as a failed status or an invalid status.

[0121] Since the abnormal component may not be able to respond to any request from the host and the computing core, the internal bus is inaccessible at this time, and the access hardware can be provided with a separate access control logic to block the continuous sending of requests or commands from the host and the computing core to the abnormal peripheral components. The access hardware can generate a feedback value (for example, ffff or an invalid value) when it is determined that the component with an abnormal working state does not respond to the processing command, or when it is determined that the component with an abnormal working state does not return data to the computing core, or when it is determined that the component with an abnormal working state is marked as a failed state or an invalid state, and then send the feedback value to the host and the computing core to notify the host and the computing core.

[0122] Another function of the access control logic for accessing the hardware is to return requests that are still waiting in the control core and have not returned, or to return an invalid value, to prevent the computing core from encountering other problems due to the lack of response to the requests sent out.

[0123] In one embodiment, since the access hardware returns a feedback value to the host and the computing core, the host and the computing core cannot access the abnormal component. In order to enable the host and the computing core to re-establish communication with the component that has returned to normal, as an example, the method may further include:

[0124] S14, sending a communication request to the access hardware, so that the access hardware stops communication blocking, so that the computing core can resume communication with the control core and the peripheral components.

[0125] After the abnormal component is reset, the computing core can send a communication request to the access hardware, so that the access hardware stops its function of blocking communication and stops sending feedback values, and then the host and the computing core can resume communication with the component that has returned to normal.

[0126] Reference Figure 5 , shows an operation flow chart of an exception handling method for a system component provided by an embodiment of the present invention.

[0127] Here we only take the control core as an example. When the system starts normally, we can determine which state to start. Three states can be defined here: Normal, recover, and reset.

[0128] During normal startup, the component will enter the working mode after initialization. When an exception occurs, it can be determined whether it is an exception that needs to be recovered or reset, and then the corresponding command or instruction is sent according to different exception handling methods, so that the abnormal component can perform operations independently.

[0129] Today's systems are complex and large, and the host CPU undertakes more computing tasks and maintains a large amount of data. If the system interrupts the CPU's work due to abnormalities in other components, there may be challenges such as data loss, uncompleted tasks, and the next startup cannot be continued and needs to be restarted. After adopting the technical solution of the present invention, it is possible to achieve abnormal isolation processing and increase the availability of the host system.

[0130] In addition, in an optional embodiment, in order to simplify the hardware design and process, recovery and reset can be combined and processed. The state of the BMC / control core can be controlled by the CPU, and the hardware sends the recover, reset and other signals.

[0131] Reference Figure 6 , showing a schematic diagram of status detection and exception handling of system components provided by an embodiment of the present invention.

[0132] Figure 6 In the diagram, T1 is when the component is detected to be in an abnormal state, T2 is when the component is handling the abnormality, and T3 is when it returns to normal.

[0133] Assume that at T1, other components of the system except the computing core, i.e., the CPU, are abnormal, and the component sends a recovery / restart request. Then, the component enters the T2 state to restart or recover. At T3, the component returns to normal, and the system does not perceive the abnormality of other components. During T1 / T2, the communication between the CPU and the component cannot respond normally.

[0134] In addition, for component working status detection, monitoring of components and various processing cores, such as BMC and control core, needs to implement a function to inform themselves whether they are currently in working status.

[0135] The following takes the partial reset and partial recovery of non-computing cores in the SOC system as an example to introduce the specific application of the above-mentioned exception handling method for system components:

[0136] like Figure 5 and Figure 6 As shown in FIG. 1 , each device in the SOC system is connected by a bus or a fixed method. Devices and different processors are interconnected by buses, and the peripherals are similar. When the host's computing core works normally, the operating system's tasks are set to work normally. Unless the host's computing core or the operating system initiates a recovery request, the computing core is assumed not to be recovered by default.

[0137] Here are several ways to illustrate the application scenarios of this function.

[0138] 1. The computing core is started independently, and the firmware startup process of the computing core does not depend on other external components

[0139] 2. The computing core firmware startup depends on the control core, which starts and guides the computing core.

[0140] 3. The computing core firmware startup depends on the BMC, which starts and guides the computing core

[0141] 4. The startup of the computing core not only relies on an external processor, but also requires multiple processors or peripheral components to work together.

[0142] Component behavior: Because the present invention is to restore separately, other components besides the computing core take into account the impact of the actual system. The present invention can divide the system into whether the recovery of each component affects the host CPU, i.e., the computing core. Figure 5-6 As shown in the figure, at T1, the system components other than the computing core, i.e., the CPU, are abnormal. The components send a recovery / restart request, and then the components enter the T2 state to restart or recover. At T3, the components return to normal, and the system does not perceive the abnormalities of other components. During T1 / T2, the communication between the CPU and the components cannot respond normally.

[0143] Component awareness: Monitoring of components and various processing cores, such as BMC and control core, needs to implement a function to inform themselves whether they are currently in working condition.

[0144] How to determine whether you need to enter an abnormal state

[0145] Both WDT and real-time background tasks are possible. Here we take WDT as an example. When a component cannot respond, the WDT-based module will generate an interrupt / exception, triggering the system to switch states.

[0146] If this component is initialized by external programming, such as SPI is programmed by the CPU, then the interrupt line corresponding to the SPI needs to be physically routed or physically connected to the interrupt signal pin of the CPU. The CPU completes the subsequent work.

[0147] Component state machine: Here, only the control core is taken as an example. When the system starts normally, the system needs to determine which state it wants to start. Here, the present invention can define three states:

[0148] Normal, recover, reset

[0149] During normal startup, the component will enter working mode after initialization. In working mode, if an exception occurs in the system, it is necessary to determine whether it is an exception that needs to be recovered or reset. The difference is that when the recovery process is completed, a reset is also required. After reset, the component needs to branch according to the part and module where the problem is determined to enter the working state.

[0150] Components can sense their own working status through software task background heartbeat, etc., which is less accurate than WDT, but more flexible in controllability. In order to simplify hardware design and process, recover and reset can be combined. The status of BMC / control core can be controlled by the CPU, and the hardware sends recover, reset and other signals.

[0151] The SOC system can achieve abnormal isolation and increase the availability of the host system.

[0152] For further explanation, refer to Figure 7 , showing a detection operation flow chart of a method for handling anomalies of system components provided by an embodiment of the present invention

[0153] The present invention mainly participates in the system initialization setting and the identification of different startup branches at startup to determine the reason why the current subsystem is started.

[0154] In one embodiment, the specific physical connection relationship between different components is taken as an example here, and the connection between the computing core and the control core is generally connected in the following two ways:

[0155] In the first case, the two cores are connected through some specific external buses, such as I2C, SPI, etc. At this time, although the two are connected, in fact, the abnormality or restart of any core will only cause the loss of the logical function of the other party that depends on this bus, but will not affect the abnormality of other unrelated functions of the other party. Figure 3 shown.

[0156] Reference Figure 8 , showing a schematic diagram of the internal connection of the computing core and the control core provided by an embodiment of the present invention

[0157] In another case, the two cores are directly connected through the internal logic bus and can access each other's resources. Figure 8 ,Under normal circumstances, the computing core can directly access other peripherals.

[0158] Reference Fig. 9 , showing a schematic diagram of abnormal communication between a computing core and a control core provided by an embodiment of the present invention.

[0159] like Fig. 9 As shown, when the host and the computing core are working normally, when the subsystem is reset alone, the subsystem cannot respond to any request from the host and the computing core, and the internal bus leading to the control core is inaccessible.

[0160] Reference Fig.10 , showing a schematic diagram of the blocking function of accessing hardware provided by an embodiment of the present invention.

[0161] Access to hardware requires a separate access control logic to block requests from the host and computing core to the subsystem, and to return requests that have been sent but not responded to in time to the host and computing core, marking them as special states such as failure or invalid. Another function of the control logic for accessing hardware is to return requests that are still waiting in the control core and have not been returned, or to return an invalid value, otherwise the computing core will encounter other problems because the requests sent out are not responded to.

[0162] After the subsystem is reset, the software needs to set up a separate blocking function to access the hardware logic so that the host and the computing core can communicate normally with the subsystem. Figure 4 shown.

[0163] In this embodiment, the embodiment of the present invention provides an exception handling method for system components, and its beneficial effects are: the present invention can detect the working status of each component connected to the computing core and the external operating core, and when an abnormality is detected, a restart or recovery instruction is sent to the abnormal component to restart the abnormal component separately, thereby realizing isolated processing of the exception, avoiding operation interruption, avoiding data loss of the computing core, and avoiding task interruption after restart, thereby ensuring that the task can be continuously executed.

[0164] The embodiment of the present invention also provides an exception handling device for a system component, see Fig.11 , showing a structural schematic diagram of an exception handling device for a system component provided by an embodiment of the present invention.

[0165] The device is applicable to a computing core that is connected to different system components through an external bus or an internal bus. As an example, the exception handling device for the system component may include:

[0166] The acquisition module 501 is used to acquire a component processing request when the working state of the real-time detection system component is abnormal, wherein the component processing request is a processing request sent separately by the component whose working state is abnormal;

[0167] The processing module 502 is used to send a processing command to the component with abnormal working status in response to the processing request, so that the component with abnormal working status performs an exception processing operation separately, and the exception processing operation includes: restart or recovery.

[0168] Optionally, the system component includes a control core, and the connection mode of the external bus connection includes:

[0169] The computing core is connected to the control core via a bus of an external device.

[0170] Optionally, the system components include a control core, peripheral components and access hardware, and the connection mode of the internal bus connection includes:

[0171] The control core is connected to the access hardware, and the computing core is connected to the peripheral components and the access hardware respectively through a system bus.

[0172] Optionally, the device further comprises:

[0173] A module for receiving invalid values ​​is used to receive the invalid values ​​replied by the access hardware through the internal bus, and stop sending processing commands to the component with abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with abnormal working status does not respond to the processing command, or the access hardware determines that the component with abnormal working status is marked as a failed state or an invalid state.

[0174] Optionally, the device further comprises:

[0175] The communication request sending module is used to send a communication request to the access hardware so that the access hardware stops communication blocking and allows the computing core to resume communication with the control core and the peripheral components.

[0176] Optionally, the processing module is further used to:

[0177] Determine, based on the processing request, an abnormal processing method of the component whose working status is abnormal;

[0178] If the exception handling method is restart, a processing command for a restart processing operation is sent to the component whose working state is abnormal;

[0179] If the exception handling method is recovery, a processing command for the recovery processing operation is sent to the component whose working status is abnormal.

[0180] Optionally, the processing module is further used to:

[0181] After the component with abnormal working status completes the recovery operation, a processing command for the restart processing operation is sent to make the component with abnormal working status perform the restart operation.

[0182] Optionally, the processing module is further used to obtain a preset value of a register to which the component with abnormal working status is connected, and the preset value is a value pre-set in the register by a user;

[0183] If the preset value is a value corresponding to the restart processing operation, determining that the exception processing method is restart;

[0184] If the preset value is a value corresponding to the recovery processing operation, it is determined that the exception processing method is recovery.

[0185] Optionally, the acquisition module is further used to:

[0186] Call the system's built-in software to perform component detection to determine the working status of the component, or detect the heartbeat packet of the system component to determine the working status of the component.

[0187] Those skilled in the art can clearly understand that, for the sake of convenience and brevity of description, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0188] Furthermore, an embodiment of the present application also provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the exception handling method for system components as described in the above embodiment is implemented.

[0189] Furthermore, an embodiment of the present application also provides a computer-readable storage medium, which stores a computer-executable program, and the computer-executable program is used to enable a computer to execute the exception handling method for system components as described in the above embodiment.

[0190] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A method for handling exceptions of system components, characterized in that: The method is applicable to a computing core that is connected to different system components through an external bus or an internal bus, wherein the system component includes a control core, and the connection mode of the external bus connection includes: the computing core is connected to the control core through a bus of an external device; or; the system component includes a control core, a peripheral component and access hardware, and the connection mode of the internal bus connection includes: the control core is connected to the access hardware, and the computing core is respectively connected to the peripheral component and the access hardware through a system bus; The method comprises: When the working state of a component of the real-time detection system is abnormal, a component processing request is obtained, where the component processing request is a processing request automatically generated and sent separately by the component with the abnormal working state, and is used to trigger the computing core to restart or restore the component with the abnormal working state; In response to the processing request, a processing command is sent to the component with abnormal working status, so that the component with abnormal working status performs an exception processing operation separately, and other components with normal working status and the computing core work normally, and the exception processing operation includes: restarting or restoring; The method of real-time detection of the working status of the system components includes: Individually detect the heartbeat packets of each system component to determine the working status of the component; When the system component includes a control core, a peripheral component and access hardware, and the connection mode of the internal bus connection includes: the control core is connected to the access hardware, and the computing core is respectively connected to the peripheral component and the access hardware through the system bus, after the step of sending a processing command to the component with an abnormal working state in response to the processing request, the method further includes: Receive an invalid value replied by the access hardware through the internal bus, and stop sending processing commands to the component with an abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with an abnormal working status does not respond to the processing command, or the access hardware determines that the component with an abnormal working status is marked as a failed state or an invalid state. The access hardware is provided with a separate access control logic.

2. The method for handling exceptions of system components according to claim 1, characterized in that: When the system components include a control core, peripheral components and access hardware, and the connection mode of the internal bus connection includes: the control core is connected to the access hardware, and the computing core is respectively connected to the peripheral components and the access hardware through the system bus, after the component with abnormal working status completes the abnormal processing operation, the method further includes: A communication request is sent to the access hardware so that the access hardware stops communication blocking, so that the computing core can resume communication with the control core and the peripheral components.

3. The method for handling exceptions of system components according to claim 1, characterized in that: The sending a processing command to the component with abnormal working status in response to the processing request includes: Determine, based on the processing request, an abnormal processing method of the component whose working status is abnormal; If the exception handling method is restart, a processing command for a restart processing operation is sent to the component whose working state is abnormal; If the exception handling method is recovery, a processing command for the recovery processing operation is sent to the component whose working status is abnormal.

4. The method for handling exceptions of system components according to claim 3, characterized in that: After the step of sending a processing command for a recovery processing operation to the component whose working status is abnormal, the method further includes: After the component with abnormal working status completes the recovery operation, a processing command for the restart processing operation is sent to make the component with abnormal working status perform the restart operation.

5. The method for handling exceptions of system components according to claim 1, characterized in that: Determining, based on the processing request, an exception handling method of the component whose working status is abnormal, includes: Acquire a preset value of a register to which the component with abnormal working status is connected, wherein the preset value is a value pre-set in the register by a user; If the preset value is a value corresponding to the restart processing operation, determining that the exception processing method is restart; If the preset value is a value corresponding to the recovery processing operation, it is determined that the exception processing method is recovery.

6. An exception handling device for a system component, characterized in that: The device is suitable for a computing core that is connected to different system components through an external bus or an internal bus, wherein the system component includes a control core, and the connection mode of the external bus connection includes: the computing core is connected to the control core through a bus of an external device; or; the system component includes a control core, a peripheral component and access hardware, and the connection mode of the internal bus connection includes: the control core is connected to the access hardware, and the computing core is respectively connected to the peripheral component and the access hardware through a system bus; The device comprises: An acquisition module, used for acquiring a component processing request when the working state of a real-time detection system component is abnormal, wherein the component processing request is a processing request automatically generated and sent separately by the component with the abnormal working state, and is used for triggering the computing core to restart or restore the component with the abnormal working state; a processing module, configured to send a processing command to the component in abnormal working state in response to the processing request, so that the component in abnormal working state performs an exception processing operation separately, and other components in normal working state and the computing core work normally, wherein the exception processing operation includes: restarting or restoring; The method of real-time detection of the working status of the system components includes: Individually detect the heartbeat packets of each system component to determine the working status of the component; When the system components include a control core, peripheral components and access hardware, and the connection mode of the internal bus connection includes: the control core is connected to the access hardware, and the computing core is respectively connected to the peripheral components and the access hardware through the system bus, the device further includes: A module for receiving an invalid value is used to receive an invalid value replied by the access hardware through an internal bus, and stop sending processing commands to the component with an abnormal working status, wherein the invalid value is a feedback value generated after the access hardware determines that the component with an abnormal working status does not respond to the processing command, or a feedback value generated after the access hardware determines that the component with an abnormal working status is marked as a failed state or an invalid state; wherein the access hardware is provided with a separate access control logic.

Images