Image Marking Engine System and Method for Programmable Logic Devices

Abstract

Systems and methods for controlling the operation of an electronic system are disclosed. An example electronic system includes an edge PLD that includes a programmable logic block (PLB) configured to implement an image engine pre-processor and an image engine. The edge PLD is configured to receive a raw image provided by an imaging module of the electronic system via a raw image path of the electronic system; generate an engine quality image corresponding to the received raw image via the image engine pre-processor; and generate one or more image tags associated with the generated engine quality image via the image engine of the edge PLD. The one or more image tags and / or the associated engine quality image are used to control the operation of the electronic system.

Description

[0001] Cross - Reference to Related Applications

[0002] This patent application claims the benefit and priority of U.S. Provisional Patent Application No. 63 / 159,394, entitled "IMAGE TEAGGING ENGINE SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES", filed on Mar. 10, 2021, which is incorporated herein by reference in its entirety. FIELD OF THE INVENTION

[0003] The present invention generally relates to programmable logic devices and, more particularly, to relatively low-power image processing engines implemented by such devices. BACKGROUND OF THE INVENTION

[0004] A programmable logic device (PLD) (e.g., a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a field programmable system-on-chip (FPSC), or other type of programmable device) can be configured with various user designs to implement desired functions. Generally, a user design is synthesized and mapped to configurable resources (e.g., programmable logic gates, look-up tables (LUTs), embedded hardware, or other types of resources) and the interconnects available in a particular PLD. Then, the physical placement and routing of the synthesized and mapped user design can be determined to generate configuration data for the particular PLD.

[0005] Electronic systems (such as personal computers, servers, laptops, smartphones, and / or other personal electronic devices and / or portable electronic devices) increasingly include imaging devices and applications to provide video communication and / or other relatively complex image-based features for their users. However, many such applications are computationally relatively intensive and can result in significant power consumption, which in turn can significantly limit the operational flexibility of such systems, particularly portable electronic devices. Accordingly, there is a need in the art for systems and methods for relatively low-power image processing that are configured to facilitate complex image-based features and applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 A block diagram of a programmable logic device (PLD) in accordance with an embodiment of the present disclosure is illustrated.

[0007] Figure 2 A block diagram of a logic block for a PLD in accordance with an embodiment of the present disclosure is illustrated.

[0008] Figure 3 A design process of a PLD in accordance with an embodiment of the present disclosure is illustrated.

[0009] Figure 4 A block diagram of an electronic system including an edge PLD according to an embodiment of the present disclosure is illustrated.

[0010] Figure 5 A data flow diagram of an electronic system including an edge PLD according to an embodiment of the present disclosure is illustrated.

[0011] Figure 6A A block diagram of a training system for an edge PLD according to an embodiment of the present disclosure is illustrated.

[0012] Figure 6B An image processed by an edge PLD according to an embodiment of the present disclosure is illustrated.

[0013] Figure 7 A process of operating an electronic system including an edge PLD according to an embodiment of the present disclosure is illustrated.

[0014] Embodiments of the present disclosure can be better understood by referring to the following detailed description. It should be understood that like reference numerals are used to identify like elements illustrated in one or more of the figures, and the illustration therein is for the purpose of illustrating embodiments of the present disclosure and not for limiting the present disclosure. Detailed Description

[0015] The present disclosure provides systems and methods for implementing relatively low-power image processing within a programmable logic device (PLD) for use in relatively complex imaging-based applications and architectures as described herein. For example, embodiments provide systems and methods for implementing image-based neural networks, machine learning, artificial intelligence, and / or other relatively complex processing within a relatively low-power PLD, which can be used to control the operation of an electronic system incorporating the PLD.

[0016] Specifically, due to low luminance, over-saturation, and / or other common adverse image capture conditions and / or characteristics, the raw images captured by a camera or other imaging module integrated with a contemporary electronic system are generally not suitable for image tagging (e.g., feature extraction, segmentation, object recognition, classification, and / or other neural network, machine learning, and / or artificial intelligence-based image tagging). The electronic system can use a main controller (e.g., a CPU and / or a GPU) to process such unsuitable raw images into a form suitable for image tagging, but powering such a main controller to do so can consume a significant amount of power reserves, and such processing is typically performed at a human quality level suitable for human viewing, which can consume more than a desired portion of the available computing resources of the (a) main controller.

[0017] Each embodiment reduces or eliminates the need to power or employ such a master controller to perform such processing by implementing the processing within a relatively low-power edge PLD configured to preprocess the raw imagery at an image processing engine quality level suitable for reliable image tagging but lower than the quality level typically suitable for human viewing. For example, such image tagging can be used to control the operation of an electronic system, independent of the power and / or sleep state of the electronic system, and can be linked to a human-quality processed version of the raw imagery to produce a tagged imagery suitable for human viewing and / or other applications, as described herein. Using a human-quality training set of training images and associated image tags, embodiments can be trained to perform reliable image tagging, the training images and associated image tags first being de-optimized to simulate common adverse image capture conditions and / or characteristics, as described herein. The resulting trained image engine can be used for image tagging in a variety of applications, including user-based power-on, power-off, wake-up, sleep, authentication, de-authentication, shoulder surfing detection, and / or other operational control of the electronic system and / or applications executed by such an electronic system.

[0018] In accordance with embodiments presented herein, techniques are provided for implementing a user design in a programmable logic device (PLD). In various embodiments, the user design can be transformed into a set of PLD components (e.g., configured for logic functions, arithmetic functions, or other hardware functions) and their associated interconnections available in the PLD and / or represented thereby. For example, a PLD can include a number of programmable logic blocks (PLBs), each PLB including a number of logic units and configurable routing resources that can be used to interconnect the PLBs and / or the logic units. In some embodiments, each PLB can be implemented using between 2 and 16 or between 2 and 32 logic units.

[0019] Typically, a PLD (e.g., an FPGA) fabric includes one or more routing fabrics and an array of logic elements arranged in a similar fashion, the array of logic elements arranged in programmable functional blocks (e.g., PFBs and / or PLBs). The purpose of the routing fabric is to programmably connect the ports of the logic elements / PLBs to each other in such combinations as are required to implement the desired functionality. An edge PLD (e.g., a PLD configured for relatively low-power operation substantially independent of the electronic system incorporating the edge PLD) may include various additional "hard" or "soft" engines or modules configured to provide a range of image processing functions that may be linked to the operation of the PLD fabric to provide configurable image processing functionality and / or architectures as described herein. For example, an edge PLD may be a PLD integrated with an imaging module and / or otherwise positioned at an image capture point, e.g., or used in situations where all-weather power issues are critical to the general operation of the electronic system incorporating the edge PLD (e.g., a battery-powered electronic system and / or a portable electronic system as used herein). When synthesizing, mapping, placing, and / or routing a user design into a number of PLD components, routing flexibility and configurable functionality embedding may be used. Due to the various user design optimization processes that may incur significant design time and cost, the user design may be implemented relatively efficiently, thus freeing up configurable PLD components that might otherwise be occupied by additional operations and routing resources. In some embodiments, the optimized user design may be represented by a netlist that identifies the various types of components provided by the PLD and their associated signals. In embodiments where a netlist of the transformed user design is generated, optimization processes may be performed on such netlists. Once optimized, such configurations may be encrypted and signed and / or otherwise protected for distribution to edge PLDs as described herein.

[0020] Now, referring to the drawings, Figure 1 FIG. 5 illustrates a block diagram of a PLD 100 in accordance with an embodiment of the present disclosure. The PLD 100 (e.g., a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a field programmable system on chip (FPSC), or other type of programmable device) typically includes input / output (I / O) blocks 102 and logic blocks 104 (e.g., also referred to as programmable logic blocks (PLBs), programmable function units (PFUs), or programmable logic cells (PLCs)). More generally, the various configurable elements of the PLD 100 may be referred to as the PLD fabric.

[0021] The I / O block 102 provides I / O functions for the PLD 100 (e.g., to support one or more I / O and / or memory interface standards), while the programmable logic block 104 provides logic functions for the PLD 100 (e.g., LUT-based logic or logic gate array-based logic). Additional I / O functions can be provided through the serializer / deserializer (SERDES) block 150 and the physical coding sublayer (PCS) block 152. The PLD 100 can also include hard intellectual property core (IP) blocks 160 to provide additional functions (e.g., basic predetermined functions provided in hardware that can be configured with less programming than the logic block 104).

[0022] The PLD 100 can also include memory blocks 106 (e.g., EEPROM blocks, SRAM blocks, and / or flash memory blocks), clock-related circuitry 108 (e.g., clock sources, PLL circuits, and / or DLL circuits), and / or various routing resources 180 (e.g., interconnects and appropriate switching logic to provide paths for routing signals (such as clock signals, data signals, or others) throughout the PLD 100), as appropriate. Generally, the various elements of the PLD 100 can be used to perform its intended functions for a desired application, as understood by those skilled in the art.

[0023] For example, certain I / O blocks 102 can be used to program the memory 106 or transfer information (e.g., various types of user data and / or control signals) to or from the PLD 100. Other I / O blocks 102 include a first programming port (which can represent a central processing unit (CPU) port, a peripheral data port, an SPI interface, and / or a sysCONFIG programming port) and / or a second programming port (such as a Joint Test Action Group (JTAG) port (e.g., by adopting standards such as the Institute of Electrical and Electronics Engineers (IEEE) 1149.1 or 1532 standards)). In various embodiments, I / O blocks 102 can be included to receive configuration data and commands (e.g., through one or more connections 140) to configure the PLD 100 for its intended use and to support serial or parallel device configuration and information transfer using the SERDES block 150, the PCS block 152, the hard IP block 160, and / or the logic block 104, as appropriate.

[0024] It should be understood that the number and placement of the various elements are not restricted and may depend on the desired application. For example, for a desired application or design specification (e.g., for the type of programmable device selected), various elements may not be required.

[0025] In addition, it should be understood that, for clarity, the elements are illustrated in block form and that the various elements may typically be distributed throughout the PLD 100, such as in the logic blocks 104, hard IP blocks 160, and routing resources (e.g., Figure 2 routing resources 180) thereof and between them to perform their conventional functions (e.g., storing configuration data that configures the PLD 100 or providing an interconnect structure within the PLD 100). It should also be understood that the various embodiments disclosed herein are not limited to programmable logic devices such as the PLD 100 and may be applied to various other types of programmable devices, as will be understood by those skilled in the art.

[0026] An external system 130 may be used to create a desired user configuration or design for the PLD 100 and generate corresponding configuration data to program (e.g., configure) the PLD 100. For example, the system 130 may provide such configuration data to one or more I / O blocks 102, SERDES blocks 150, and / or other portions of the PLD 100. As a result, the programmable logic blocks 104, various routing resources, and any other suitable components of the PLD 100 may be configured to operate according to a user-specified application.

[0027] In the illustrated embodiment, the system 130 is implemented as a computer system. In this regard, the system 130 includes, for example, one or more processors 132 that may be configured to execute instructions provided in one or more memories 134 and / or stored in a non-transitory form in one or more non-transitory machine-readable media 136 (e.g., which may be internal or external to the system 130), such as software instructions. For example, in some embodiments, the system 130 may run PLD configuration software, such as the Lattice Diamondsystem Planner software available from Lattice Semiconductor Corporation, to allow a user to create a desired configuration and generate corresponding configuration data to program the PLD 100.

[0028] The system 130 also includes, for example, a user interface 135 (e.g., a screen or display) for displaying information to the user and one or more user input devices 137 (e.g., a keyboard, mouse, trackball, touchscreen, and / or other devices) for receiving user commands or design entries to prepare a desired configuration for the PLD 100.

[0029] Figure 2 A block diagram of a logic block 104 of the PLD 100 in accordance with an embodiment of the present disclosure is illustrated. As discussed, the PLD 100 includes a plurality of logic blocks 104 that include various components for providing logical and arithmetic functions. In Figure 2In the example embodiment shown, logic block 104 includes a plurality of logic units 200 that may be internally and / or externally interconnected within logic block 104 using routing resources 180. For example, each logic unit 200 may include various components such as a look-up table (LUT) 202, pattern logic circuitry 204, a register 206 (e.g., a flip-flop or a latch), and various programmable multiplexers (e.g., programmable multiplexers 212 and 214) for selecting a desired signal path for and / or between logic units 200. In this example, LUT 202 accepts four inputs 220A - 220D, making it a four-input LUT (which may be abbreviated as a "4-LUT" or "LUT4") that may be programmed by the configuration data of PLD 100 to implement any suitable logic operation having four inputs or fewer inputs. Pattern logic 204 may include various logic elements and / or additional inputs (such as input 220E) to support various modes of functionality as described herein. In other examples, LUT 202 may be of any other suitable size having any other suitable number of inputs for a particular implementation of the PLD. In some embodiments, different-sized LUTs may be provided for different logic blocks 104 and / or different logic units 200.

[0030] In some embodiments, output signals 222 from LUT 202 and / or pattern logic 204 may be passed through register 206 to provide output signal 233 of logic unit 200. In various embodiments, output signals 223 from LUT 202 and / or pattern logic 204 may be passed directly to output 223 as shown. Depending on the configuration of multiplexers 210 - 214 and / or pattern logic 204, output signal 222 may be temporarily stored (e.g., latched) in latch 206 according to control signal 230. In some embodiments, the configuration data of PLD 100 may configure output 223 and / or 233 of logic unit 200 to be provided as one or more inputs to another logic unit 200 (e.g., in another logic block or the same logic block) in a hierarchical or cascaded arrangement (e.g., including multiple levels) to configure logic operations that cannot be implemented in a single logic unit 200 (e.g., a logic operation having too many inputs to be implemented by a single LUT 202). Moreover, logic unit 200 may be implemented using multiple outputs and / or interconnections to facilitate selectable modes of operation as described herein.

[0031] The mode logic circuit 204 can be used for some configurations of the PLD 100 to efficiently implement arithmetic operations, such as adders, subtracters, comparators, counters, or other operations, to efficiently form some extended logic operations (e.g., high-order LUTs working on multi-bit data), to efficiently implement relatively small RAMs, and / or to allow selection between logic, arithmetic, extended logic, and / or other optional operation modes. In this regard, the mode logic circuits 204 across multiple logic units 202 can be linked together to transfer carry input signals 205 and carry output signals 207 and / or other signals (e.g., output signal 222) between adjacent logic units 202, as described herein. In Figure 2 the example of, for example, the carry input signal 205 can be directly transferred to the mode logic circuit 204 or can be transferred to the mode circuit 204 by configuring one or more programmable multiplexers, as described herein. In some embodiments, the mode logic circuits 204 can be linked across multiple logic blocks 104.

[0032] Figure 2 The illustrated logic unit 200 is merely an example, and logic units according to different embodiments can include different combinations and arrangements of PLD components. Additionally, although Figure 2 the logic block 104 is illustrated as having eight logic units 200, logic blocks 102 according to other embodiments can include fewer or more logic units 200. Each of the logic units 200 in the logic block 104 of the logic block 104 can be used to implement a part of the user design implemented by the PLD 100. In this regard, the PLD 100 can include a number of logic blocks 104, where each logic block 104 can include logic units 200 and / or other components for jointly implementing the user design.

[0033] As further described herein, when the PLD 100 is configured to implement a user design, parts of the user design can be adjusted to occupy fewer logic units 200, fewer logic blocks 104, and / or impose less burden on the routing resources 180. Such adjustments according to various embodiments can identify certain logic, arithmetic, and / or extended logic operations to be implemented in the arrangements of multiple embodiments that occupy logic units 200 and / or logic blocks 104. As further described herein, the optimization process can route various signal connections associated with the arithmetic / logic operations described herein such that logic operations, ripple arithmetic operations, or extended logic operations can be implemented as one or more logic units 200 and / or logic blocks 104 to be associated with previous arithmetic operations / logic operations.

[0034] Figure 3 Illustrated is a design process 300 of a PLD according to an embodiment of the present disclosure. For example,Figure 3 The process can be performed by system 130 running Lattice Diamond software to configure PLD 100. In some embodiments, Figure 3 The various files and information referenced in can be stored in one or more databases and / or other data structures in, for example, memory 134, machine-readable medium 136, and / or otherwise. In various embodiments, such files and / or information can be encrypted or otherwise protected when stored and / or transported to PLD 100 and / or other devices or systems.

[0035] In operation 310, system 130 receives a user design specifying the desired functionality of PLD 100. For example, a user can interact with system 130 (e.g., via user input device 137 and hardware description language (HDL) code representing the design) to identify various features of the user design (e.g., high-level logic operations, hardware configuration, and / or other features). In some embodiments, the user design can be provided in a register transfer level (RTL) description (e.g., gate-level description). System 130 can perform one or more rule checks to confirm that the user design describes a valid configuration of PLD 100. For example, system 130 can reject invalid configurations and / or request the user to provide new design information as appropriate.

[0036] In operation 320, system 130 synthesizes the design to create a netlist (e.g., the synthesized RTL description), which identifies the abstract logical implementation of the user design as a plurality of logic components (e.g., also referred to as netlist components), which can include both programmable components and hard IP components of PLD 100. In some embodiments, the netlist can be stored in a local generic database (NGD) file in electronic design interchange format (EDIF).

[0037] In some embodiments, synthesizing the design into a netlist in operation 320 may involve: converting (e.g., translating) a high-level description of the logical operations, hardware configuration, and / or other features in the user design into a set of PLD components (e.g., logic blocks 104, logic units 200, and other components of PLD 100, configured for logical functions, arithmetic functions, or other hardware functions to implement the user design) and their associated interconnections or signals. According to an embodiment, the converted user design can be represented as a netlist.

[0038] In some embodiments, synthesizing the design into a netlist in operation 320 may also involve: performing an optimization process on a user design (e.g., a user design that has been converted / translated into a set of PLD components and their associated interconnections or signals) to reduce propagation delay, consumption of PLD resources and routing resources, and / or optimize the performance of the PLD when configured to implement the user design. According to an embodiment, the optimization process may be performed on a netlist representing the converted / translated user design. According to an embodiment, the optimization process may represent the optimized user design in the netlist (e.g., to produce an optimized netlist).

[0039] In some embodiments, the optimization process may include: optimizing certain instances of logic function operations, ripple arithmetic operations, and / or extended logic function operations that may occupy multiple configurable PLD components (e.g., logic units 200, logic blocks 104, and / or routing resources 180) when the PLD is configured to implement the user design. For example, the optimization process may include: detecting multiple patterns or configurable logic units in the user design that implement logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources; swapping the operation modes of the logic units implementing the various operations to reduce the number of PLD components and / or routing resources used to implement the operations, and / or reduce the propagation delay associated with the operations; and / or reprogramming the corresponding LUTs and / or mode logic to account for the swapped operation modes.

[0040] In another example, the optimization process may include: detecting extended logic function operations and / or corresponding routing resources in the user design; implementing the extended logic operations as multiple patterns or convertible logic units with a single physical logic unit output; routing or coupling the logic unit outputs of a first set of logic units to the inputs of a second set of logic units to reduce the number of PLD components used to implement the extended logic operations and / or routing resources, and / or reduce the propagation delay associated with the extended logic operations; and / or programming the corresponding LUTs and / or mode logic to implement the extended logic function operations using at least the first set of logic units and the second set of logic units.

[0041] In another example, the optimization process may include: detecting multiple patterns or configurable logic units in the user design that implement logic function operations, ripple arithmetic operations, extended logic function operations, and / or corresponding routing resources; swapping the operation modes of the logic units implementing the various operations to provide programmable registers along the signal path within the PLD to reduce the propagation delay associated with the signal path; and reprogramming the corresponding LUTs, mode logic, and / or other logic unit control bits / registers to account for the swapped operation modes and / or programming the programmable registers to store or latch signals on the signal path.

[0042] In operation 330, system 130 performs a mapping process that identifies components that can be used to implement the user-designed PLD 100. In this regard, system 130 can map the optimized netlist (e.g., stored in operation 320 due to the optimization process) to the various types of components provided by PLD 100 (e.g., logic blocks 104, logic units 200, embedded hardware, and / or other portions of PLD 100) and their associated signals (e.g., in a logical manner, but without yet specifying placement or routing). In some embodiments, mapping can be performed on one or more previously stored NGD files, where the mapping result is stored as a physical design file (e.g., also referred to as an NCD file). In some embodiments, the mapping process can be performed as part of the synthesis process in operation 320 to produce a netlist mapped to PLD components.

[0043] In operation 340, system 130 performs a placement process to assign the mapped netlist components to specific physical components residing at specific physical locations in PLD 100 (e.g., assigned to specific logic units 200, logic blocks 104, routing resources 180, and / or other physical components of PLD 100), and thus determines the layout of PLD 100. In some embodiments, placement can be performed on one or more previously stored NCD files, where the placement result is stored as another physical design file.

[0044] In operation 350, system 130 performs a routing process to route connections between the components of PLD 100 (e.g., using routing resources 180) based on the placement layout determined in operation 340 to achieve physical interconnection between the placed components. In some embodiments, routing can be performed on one or more previously stored NCD files, where the routing result is stored as another physical design file.

[0045] In various embodiments, routing connections in operation 350 can also involve: performing an optimization process on the user design to reduce propagation delay, consumption of PLD resources and / or routing resources, and / or optimizing the performance of the PLD when configured to implement the user design. In some embodiments, the optimization process can be performed on the physical design file representing the transformed / translated user design, and the optimization process can represent the optimized user design in the physical design file (e.g., producing an optimized physical design document).

[0046] In some embodiments, the optimization process may include: optimizing certain instances of logical function operations, ripple arithmetic operations, and / or extended logical function operations that, when the PLD is configured to implement a user design, will occupy multiple configurable PLD components (e.g., logic units 200, logic blocks 104, and / or routing resources 180). For example, the optimization process may include: detecting multiple patterns or configurable logic units in the user design that implement logical function operations, ripple arithmetic operations, extended logical function operations, and / or corresponding routing resources; swapping the operation modes of the logic units implementing the various operations to reduce the number of PLD components and / or routing resources used to implement the operations, and / or reduce the propagation delay associated with the operations; and / or reprogramming the corresponding LUTs and / or mode logic to account for the swapped operation modes.

[0047] In another example, the optimization process may include: detecting extended logical function operations and / or corresponding routing resources in the user design; implementing the extended logical operations as multiple patterns or convertible logic units with a single physical logic unit output; routing or coupling the logic unit outputs of a first set of logic units to the inputs of a second set of logic units to reduce the number of PLD components used to implement the extended logical operations and / or routing resources, and / or reduce the propagation delay associated with the extended logical operations; and / or programming the corresponding LUTs and / or mode logic to implement the extended logical function operations using at least the first set of logic units and the second set of logic units.

[0048] In another example, the optimization process may include: detecting multiple patterns or configurable logic units in the user design that implement logical function operations, ripple arithmetic operations, extended logical function operations, and / or corresponding routing resources; swapping the operation modes of the logic units implementing the various operations to provide programmable registers along the signal path within the PLD to reduce the propagation delay associated with the signal path; and reprogramming the corresponding LUTs, mode logic, and / or other logic unit control bits / registers to account for the swapped operation modes and / or programming the programmable registers to store or latch signals on the signal path.

[0049] Changes in routing can propagate back to previous operations, such as synthesis, mapping, and / or placement, to further optimize various aspects of the user design.

[0050] Thus, after operation 350, one or more physical design files can be provided that specify the user design after the user design has been synthesized (e.g., transformed and optimized), mapped, placed, and routed (e.g., further optimized) for the PLD 100 (e.g., by combining the results of the corresponding previous operations). In operation 360, the system 130 generates configuration data for the synthesized, mapped, placed, and routed user design. In various embodiments, as part of such a generation process, such configuration data can be encrypted and / or otherwise protected as more fully described herein. In operation 370, the system 130 configures the PLD 100 using the configuration data by loading a configuration data bitstream (e.g., “configuration”) into the PLD 100, for example, via connection 140. For example, such configuration can be provided in encrypted, signed, or unprotected / unverified form, and the PLD 100 can be configured to treat protected and unprotected configurations differently as described herein.

[0051] Figure 4 FIG. illustrates a block diagram of an electronic system 430 including an edge PLD 400 according to an embodiment of the present disclosure. For example, one or more elements of the electronic system 430 and / or the edge PLD 400 can be configured to perform at least a portion of the processes described with respect to Figure 7 Specifically, the electronic system 430 can be configured to use the edge PLD 400 to perform low-power, all-weather but relatively complex image processing on the raw images provided by the imaging module 446, which is substantially independent of the remainder of the electronic system 430, e.g., and / or synchronized with the controller 432 to facilitate operation of the electronic system 430 as described herein. In various embodiments, the edge PLD 400 can be configured to minimally preprocess the raw images provided by the imaging module 446 sufficient to enable the edge PLD to generate reliable image tags within a relatively limited power usage range (e.g., between 1 / 1000 and 1 / 10 of the typical power used by the controller 442 to be powered on and awakened and generate similar image tags).

[0052] In Figure 4 the illustrated embodiment, the electronic system 430 includes a controller 432, a memory 434, a user interface 435, a machine-readable medium 43g, and a user input device 437 (e.g., each similar to an element of the Figure 1 system 130 in Figure 1 ), as well as an imaging module 446, a power supply 444, a communication module 438, and an edge PLD 400 (e.g., an embodiment of the PLD 100 in Figure 4is shown as separate from the imaging module 446, but in some embodiments, the edge PLD 400 can be integrated with the imaging module 446 to minimize power and / or data delivery routing between, for example, the edge PLD and the imaging module 446 and between various components of the electronic system 430. Generally, the edge PLD 400 can be configured to process and label the raw images provided by the imaging module 446 and use such labeling and / or processing to control the operation of the electronic system 430. For example, the edge PLD 400 can occur substantially independently of the power, wake, or sleep state in the electronic system 430. In various embodiments, the edge PLD 400 can be configured to power, power down, wake up, and / or put to sleep the electronic system 430 using the processed raw images to authenticate or de-authenticate user access to the electronic system 430 and / or to otherwise control the operation of the electronic system 430 and / or applications executed by the electronic system 430, as described herein.

[0053] For example, the electronic system 430 can be implemented as a computing device, laptop computer, server, smart phone, or any other personal and / or portable electronic device, and can be implemented similarly to system 130 with respect to Figure 1 In Figure 4 the illustrated embodiment, the controller 432 of the electronic system 430 implements the image processor 430 and / or the operating system 442. The image processor 430 can be configured to receive raw images from the imaging module 446 and generate human-quality images corresponding to the received raw images, where the human-quality images include one or more human-quality image characteristics and / or human-quality processed versions of the raw images. Generally, the human-quality image characteristics can correspond to relatively high-quality images that have structural characteristics in common with the structural characteristics of the raw images provided by the imaging module 446, such as, for example, the resolution, frame rate, bit depth, color fidelity, dynamic range, and / or compression state of the raw images, and that have been processed using relatively resource-intensive image processing techniques to produce images with human-discernible objects and / or object features. The operating system 442 can be configured to apply relatively complex and resource-intensive (e.g., power-consuming) image processing to the human-quality images generated by the image processor 440, such as full-resolution, frame rate, bit depth, color fidelity, and / or other human-quality image characteristic image processing, as used herein, and use the results of such processing to display images, control the operation of the electronic system 430, and / or control the execution of various other applications executed by the controller 432.

[0054] More generally, controller 432 may be implemented by any processor, CPU, GPU, and / or other logic devices configured to execute the various methods described herein. In some embodiments, controller 432 may be configured to generate a human-quality image corresponding to the received raw image, receive one or more image tags and / or an engine-quality image from edge PLD 400, and generate a system response at least in part based on at least one of the generated human-quality image and one or more image tags and / or the generated engine-quality image provided by edge PLD 400. In some embodiments, generating a system response may include: generating a tagged human-quality image corresponding to the received raw image at least in part based on the human-quality image generated by controller 432 and one or more image tags provided by edge PLD 400; and displaying the tagged human-quality image via a display (user interface 435) of electronic system 430, and / or storing the tagged human-quality image according to one or more image tags associated with the human-quality image (e.g., cross-referenced by tag values). In other embodiments, generating a system response may include: generating a system alert (e.g., an audible alert and / or a visible alert), disabling imaging module 446, disabling the display of electronic system 430, and / or powering down electronic system 430.

[0055] In related embodiments, controller 432 may be configured to receive one or more image tags and / or an engine-quality image from edge PLD 400 and generate a system response at least in part based on one or more image tags and / or the engine-quality image provided by the edge PLD. In such embodiments, the system response may include: generating a user input (e.g., a joystick input), generating a system alert, disabling the display, and / or powering down electronic system 430. For example, generating a user input may be performed in the case of providing a user input to a game or simulation environment generated by electronic system 430, where edge PLD 400 is configured to generate an image marker including user face orientation tracking, e.g., the image marker may be used to adjust how the game environment or simulation environment is rendered to the user.

[0056] Memory 434, user interface 435, machine-readable medium 436, and user input device 437 may be in a manner consistent with Figure 1The similar named components of the system 130 are implemented in a similar manner. The power supply 444 can be implemented as any power storage device configured to supply power to each component of the system 430 and / or provide the charging state, power loss, and / or other power characteristics of the power supply 444. The imaging module 446 can be implemented as an array of detector elements, such as visible spectrum sensitive detector elements that can be arranged in a focal plane array (FPA), which is configured to capture and provide a raw image of the surroundings of the electronic system 430.

[0057] The communication module 438 can be implemented as any wired communication module and / or wireless communication module, which is configured to transmit and receive analog signals and / or digital signals between the components of the system 430 and / or remote devices and / or systems. For example, the communication module 438 can be configured to receive control signals and / or data and provide them to the controller 432 and / or the memory 434. In other embodiments, the communication module 438 can be configured to receive images and / or other sensor information from the imaging module 446, the controller 432, and / or the edge PLD 400, and relay the data within the system 430 and / or to an external system. The wireless communication link can include one or more analog and / or digital radio communication links, such as WiFi, as described herein, and can be, for example, a direct communication link or can be relayed through one or more wireless relay stations configured to receive and retransmit wireless communication. The communication link established by the communication module 438 can be configured to transmit data substantially continuously between the components of the system 430 during the entire operation of the system 430, where such data includes various types of sensor data, control parameters, and / or other data, as described herein. For example, the other system module 480 can include other and / or additional sensors, actuators, interfaces, communication modules / nodes, and / or user interface devices. In some embodiments, the other module 480 can include other environmental sensors that provide measurement and / or other sensor signals, which can be displayed to the user and / or used by other devices of the system 430 to provide operation control of the system 430.

[0058] In various embodiments, the edge PLD 400 can be composed of Figure 1implemented by components similar to those described for PLD 100, but with additional configurable and / or hard IP components configured to facilitate image processing by the edge PLD 4, as described herein. Specifically, as shown, the edge PLD 400 may include a PLD fabric that includes a plurality of configurable PLBs configured to implement the image engine pre-processor 460 of the edge PLD 400 and the image engine 462 of the edge PLD 4. More generally, the edge PLD 400 may be implemented by any of the various components described for PLD 100 and may be configured using a design process similar to that described for Figure 3 process 300 to generate and program the edge PLD according to a desired configuration. Specifically, the edge PLD 400 may be configured to process the raw video provided by the imaging module 446 using the various identified hard and / or soft IP components identified in Figure 4 .

[0059] The image engine pre-processor 460 may be implemented by configurable resources of the edge PLD 400 and is configured to generate an engine-quality image corresponding to the received raw video provided by the imaging module 446, as described herein. Such an engine-quality image may be one or more of the following: lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human-quality image characteristics relative to the raw video and / or a human-quality processed version of the raw video. In various embodiments, the image engine pre-processor 460 may be configured to convert the resolution, frame rate, bit depth, color fidelity, dynamic range, compression state, and / or another image characteristic of the raw video to lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human-quality image characteristics relative to the raw video and / or a human-quality processed version of the raw video; apply engine-quality histogram equalization to the raw video; apply engine-quality color correction to the raw video; and / or apply engine-quality exposure control to the raw video. Simplified engine-quality histogram equalization may include: determining three characteristic distribution values corresponding to the distribution of gray-scale pixel values in an image frame (e.g., according to a Gaussian distribution, 10% minimum, mean, 90% maximum); and then applying a gain function (e.g., constant, linear, B-curve, and / or other gain function) to adjust the gray-scale pixel value distribution of the image such that the three characteristic distribution values equal pre-selected target distribution values.

[0060] The image engine 462 can be implemented by configurable resources of the edge PLD 400 and is configured to generate one or more image tags associated with the engine-quality images generated by the image engine preprocessor 460. In some embodiments, the image engine 462 can be implemented as a neural network, machine learning, and / or artificial intelligence-based image processing engine, and the image engine can be trained to generate one or more image tags by: generating an engine-quality training set of training images and associated image markings based at least in part on, for example, a human-quality training set of training images and associated image markings corresponding to the desired selection of image tags; and determining a set of weights of the image engine based at least in part on the engine-quality training set, as described herein. In various embodiments, one or more image tags can include object presence tags (e.g., user presence tags), object bounding box tags (e.g., user face bounding box), and / or one or more object feature status tags (e.g., specific user face tags for authentication, one or more user face orientation tracking tags, user face status tags (one or both eyes open or closed, mouth open or closed, mouth smiling, face frowning), etc.).

[0061] The other PLD modules 482 can include various hard and / or soft modules and / or interlinked buses, such as a security engine, a configuration engine, non-volatile memory (NVM), programmable I / O, and / or other integrated circuit (IC) modules, all of which can be implemented on a single IC. The security engine of the edge PLD 400 can be implemented as a hard IP resource that is configured to provide various security functions for use by the edge PLD and / or the configuration engine of the edge PLD. The configuration engine of the edge PLD 400 can be implemented as a hard IP resource that is configured to manage the configuration of the various elements of the edge PLD 400 and / or the communication between them. The NVM of the edge PLD 400 can be implemented as a hard IP resource that is configured to provide secure non-volatile storage of data for facilitating the secure operation of the edge PLD. The programmable I / O of the edge PLD 400 can be implemented as at least partially configurable resources that are configured to provide or support a communication link between the edge PLD 400 and the elements of the electronic system 430, e.g., across a bus configured to link portions of the edge PLD to the programmable I / O. In some embodiments, such a bus and / or programmable I / O can be integrated with the edge PLD 400.

[0062] More generally, other PLD modules 482 can be implemented as various arbitrary hard and / or configurable IP resources that are configured to facilitate the operation of the edge PLD 400. For example, in addition to image processing, the edge PLD 400 can be configured to control various operations of the electronic system 430. In some embodiments, the edge PLD 400 can be configured to provide image tags and / or engine quality images to the controller 432 and / or the memory 434 of the electronic system 430. In other embodiments, the edge PLD 400 can be configured to power the electronic system 430, wake up the electronic system 430, power down or put the electronic system 430 to sleep, and / or authenticate / derecognize user access to the electronic system 430, which can be at least partially based on the image tags and / or engine quality images.

[0063] For example, the edge PLD 400 can be configured to monitor the raw images provided by the imaging module 446 for image tags indicating the presence of a user, and power the electronic system 430 or wake up the electronic system 430. When waking up the electronic system 430, the edge PLD 400 can be configured to monitor the raw images for image tags indicating the presence of a specific user, and then authenticate the specific user to the electronic system 430 (e.g., trigger the OS 442 to log in the user). The edge PLD 400 can be configured to monitor the raw images for the absence of a user or the presence of a specific user, and de-verify the user (e.g., log out) or control the electronic system 430 to sleep or power down. In an alternative embodiment, the edge PLD 400 can be configured to monitor the charge state of the power supply 444 of the electronic system 430, and control the frame rate of the imaging module 446 at least partially based on the monitored charge state of the power supply 444 (e.g., reduce the frame rate to save power when the charge state is below a pre-selected low power threshold).

[0064] Figure 5 A data flow diagram 500 of an electronic system 430 including an edge PLD 400 according to an embodiment of the present disclosure is illustrated. In Figure 5In FIG., data flow diagram 500 shows that the raw image 510 provided by the imaging module 446 is delivered via the raw image path 511 to the controller 432 and / or the edge PLD 400. In some embodiments, the controller 432 and most of the rest of the electronic system 430 may be in a sleep state or powered down, for example, in addition to the imaging module 446 and the edge PLD 400. In such embodiments, the edge PLD 400 may be configured to receive the raw image provided by the imaging module 446, generate an engine quality image 560 (e.g., via the image engine preprocessor 460), and generate one or more image tags 560 associated with the generated engine quality image (e.g., via the image engine 462) for delivery to the controller 432 via the edge PLD link 562. In various embodiments, the raw image path 511 and / or the edge PLD link 562 may be coupled between the edge PLD 400 and various other elements of the controller 432 and / or the electronic system 430.

[0065] In other embodiments, the controller 432 and / or the system 430 may be powered and / or awakened (e.g., as shown, providing a dual image processing path), and the edge PLD 400 and the controller 432 may be configured to, for example, process the raw image provided by the imaging module 446 substantially simultaneously, such that one or more tags and / or the associated engine quality image 560 provided to the OS 442 of the controller 432 may be linked to a human quality processed version of the same raw image frame (e.g., the human quality image 540) originating from the imaging module 446. In other embodiments, one or more tags and / or the associated engine quality image provided to the OS 442 of the controller 432 may be used to control the operation of the electronic system 430 without being explicitly linked to a human quality processed version of the raw image provided by the imaging module 446, as described herein.

[0066] Figure 6A A block diagram of a training system 600 for the edge PLD 400 according to an embodiment of the present disclosure is illustrated. In Figure 6A the illustrated embodiment, the training system 600 includes a de-optimizer 614 that is configured to generate a relatively low engine quality training set 642 based at least in part on a relatively high human quality training set 640, and the relatively low engine quality training set 642 is then provided to the image engine trainer 630 to determine the weights 632 of the edge PLD 400. In various embodiments, the de-optimizer 614 and / or the image engine trainer 630 may be provided by Figure 1implemented by a computing system 130 similar to that described above. The human-quality training set 640 may include multiple human-quality training images and associated image tags, which may be generated, for example, by individual human-quality image engines or may be annotated / tagged manually. The engine-quality training set 642 may include multiple engine-quality training images and associated image tags generated by the de-optimizer 614 (e.g., based on and / or equal to the image tags of the human-quality training set 640). Such engine-quality training images can be generated to simulate common adverse image capture conditions and / or characteristics, as compared to the engine-quality images 560 generated by the image engine pre-processor 460, which have a reduced quality relative to the original images 510 provided by the imaging module 446. In some embodiments, the de-optimizer 614 may be configured, for example, based on human input selected for common adverse image capture conditions and / or characteristics, according to the de-optimizer parameters 612, and is configured to convert the human-quality training set 640 into the engine-quality training set 642. In alternative embodiments, the de-optimizer parameters 612 may be determined based on the example low-quality original image set 610 provided by the imaging module 446 and / or the comparison of the low-quality original image set 610 with the images within the human-quality training set 640.

[0067] The image engine trainer 630 may be configured to determine the weights 632 of the image engine 462 of the edge PLD 400 based at least in part on the engine-quality training set 642. In alternative embodiments, the image engine trainer 630 may be configured to provide labeled images and / or other imaging marking results 634 to the manual evaluator 668, which may be used to manually adjust such image markings and provide manual feedback 636 to the image engine trainer 630, such that updated weights 632 may be generated based at least in part on the engine-quality training set 642 and the manual feedback 636. In other alternative embodiments, the manual evaluator 668 may generate manual feedback 636 based at least in part on the imaging marking results 634 generated by the edge PLD 400 and the image tags and / or engine-quality images (feedback 664 of the output 662), as shown. In all relevant embodiments, the weights 662 may be integrated with the configuration of the edge PLD 400 and are used to configure the image engine 462 of the edge PLD.

[0068] Figure 6Billustrates an image processed by an edge PLD 400 according to an embodiment of the present disclosure. For example, the raw video frame 616 provided by the imaging module 446 exhibits low luminance and lack of detail and / or other adverse image capture characteristics, and after the processing step 602 performed by the edge PLD 400, the resulting tagged engine quality video frame 667 exhibits a reduction in resolution, bit depth, and / or color fidelity, and is appropriately tagged as no user present. The raw video frame 618 provided by the imaging module 446 also exhibits low luminance and lack of detail and / or other adverse image capture characteristics, and after the processing step 604 performed by the edge PLD 400, the resulting tagged engine quality video frame 669 shows a reduction in resolution, bit depth, and / or color fidelity, and is appropriately tagged as user present (object presence label 670) using a user face bounding box (e.g., object bounding box label 672) but without using a specific user label or face tracking or status label (e.g., object feature status label).

[0069] Figure 7 illustrates a process for operating an electronic system including an edge PLD according to an embodiment of the present disclosure. In some embodiments, Figure 7 the operations may be implemented as software instructions executed by one or more logic devices associated with the corresponding electronic devices, modules, systems, and / or structures shown in Figures 1 to 6B . More generally, Figure 7 the operations may be implemented using any combination of software instructions and / or electronic hardware (e.g., inductors, capacitors, amplifiers, actuators, or other analog and / or digital components). It should be appreciated that any step, sub-step, sub-process, or block of process 700 may be executed in an order or arrangement different from that of the embodiments shown in Figure 7 . For example, in other embodiments, one or more blocks may be omitted from process 700, and other blocks may be included. Additionally, block inputs, block outputs, various sensor signals, sensor information, calibration parameters, and / or other operating parameters may be stored in one or more memories before moving to subsequent portions of process 700. Although process 700 is described with reference to the systems, devices, and elements in Figures 1 to 6B , process 700 may be executed by other systems, devices, and elements and includes different choices of electronic systems, devices, elements, components, and / or arrangements. When starting process 700, for example, various system parameters may be populated by a previous execution of a process similar to process 700, or various system parameters may be initialized to zero and / or one or more values corresponding to typical values, stored values, and / or learned values derived from past operations of process 700, as described herein.

[0070] In block 710, the logic device receives the raw image. For example, the edge PLD 400 (e.g., the image engine 462 of the edge PLD 400) may be configured to receive the raw image provided by the imaging module 446 of the electronic system 430. In some embodiments, for example, both the edge PLD 400 and the controller 432 of the electronic system 430 may be configured to receive the raw image provided by the imaging module 446 and to uniquely identify the image frames within the image in order to be able to link the image tags provided by the edge PLD with the images directly passed to the controller 432 and / or passed through the controller 432, as described herein.

[0071] In block 720, the logic device generates an engine quality image. For example, the image engine preprocessor 460 of the edge PLD 400 may be configured to generate an engine quality image corresponding to the raw image received in block 710. In some embodiments, the engine quality image may be characterized by one or more of the following: lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image. More generally, the image engine preprocessor 460 may be configured to generate the engine quality image by converting the frame rate, bit depth, color fidelity, dynamic range, compression state, and / or another image characteristic of the raw image to lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image. The image engine preprocessor 460 may also be configured to generate the engine quality image by applying engine quality histogram equalization to the raw image, applying engine quality color correction to the raw image, and / or applying engine quality exposure control to the raw image, as described herein.

[0072] In block 730, the logic device generates image tags associated with the engine quality image. For example, the image engine 462 of the edge PLD 400 may be configured to generate one or more image tags associated with the engine quality image generated in block 720 and / or corresponding to the raw image received in block 710. In some embodiments, the one or more image tags may include an object presence tag, an object bounding box tag, and / or one or more object feature status tags, as described herein. In some embodiments, the edge PLD 400 may be configured to provide one or more image tags and / or the generated engine quality image to the controller 432 and / or the memory 434 of the electronic system 430. In other embodiments, the edge PLD 400 may be configured to power, wake up, power down, or put to sleep the electronic system 430, and / or authenticate / demote the user's access to the electronic system 430 at least in part based on the one or more image tags and / or the generated engine quality image. In other embodiments, the edge PLD 400 may be configured to monitor the charge state of the power supply 444 of the electronic system 430 and control the frame rate of the imaging module 446 at least in part based on the monitored charge state of the power supply 444.

[0073] In various embodiments, the image engine 462 may be trained to generate one or more image tags by: generating an engine quality training set 642 of training images and associated image markings at least in part based on a human quality training set 640 of training images and associated image markings corresponding to the desired selection of image tags; and determining a set 632 of weights of the image engine 462 of the edge PLD 400 at least in part based on the engine quality training set 642.

[0074] In block 740, the logic device generates a human quality image. For example, the controller 432 of the electronic system 430 may be configured to generate a human quality image corresponding to the raw image received in block 710, where the human quality image includes one or more human quality image characteristics and / or a human quality processed version of the raw image, as described herein.

[0075] In block 750, the logic device generates a system response. For example, a controller 432 of the electronic system 430 may be configured to receive from the edge PLD 400 one or more image tags and / or engine quality images generated in blocks 720 and 730, and generate a system response at least in part based on at least one of the one or more image tags, engine quality images, and / or human quality images generated in block 740, as described herein. In some embodiments, the controller 432 may be configured to generate a system response at least in part based on at least one of the one or more image tags and engine quality images provided by the edge PLD 400.

[0076] In some embodiments, generating the system response may include: generating a tagged human quality image corresponding to the received original image at least in part based on the generated human quality image and one or more image tags provided by the edge PLD; and displaying the tagged human quality image via a display of the electronic system, and / or storing the tagged human quality image according to one or more image tags associated with the human quality image (such as part of a video conferencing application executed by the electronic system 430). In other embodiments, generating the system response may include: generating a system alert, disabling the imaging module of the electronic system 430, disabling the display of the electronic device 430, and / or powering off the electronic device 430. In other embodiments, generating the system response may include: generating a user input at least in part based on one or more image tags and / or the generated engine quality image, such as a joystick or other user input (e.g., user face orientation) for a game or simulation environment.

[0077] Thus, by employing the systems and methods described herein, embodiments of the present disclosure are capable of providing relatively low-power, flexible, and feature-rich image processing for use in relatively complex image-based features and applications, including providing all-weather operation control for various different electronic systems under non-optimal environmental imaging conditions.

[0078] In applicable cases, the various embodiments provided by the present disclosure may be implemented using hardware, software, or a combination of hardware and software. Additionally, in applicable cases, the various hardware components and / or software components described herein may be combined into composite components including software, hardware, and / or both. In applicable cases, the various hardware components and / or software components described herein may be divided into sub-components including software, hardware, or both without departing from the spirit of the present disclosure. Additionally, in applicable cases, it is contemplated that software components may be implemented as hardware components and vice versa.

[0079] Software according to the present disclosure, such as non-transitory instructions, program code, and / or data, may be stored on one or more non-transitory machine-readable media. It is also contemplated that one or more networked and / or otherwise general purpose or special purpose computers and / or computer systems may be used to implement the software identified herein. Where applicable, the ordering of the various steps described herein may be altered, combined into composite steps, and / or divided into sub-steps to provide the features described herein.

[0080] The embodiments described above illustrate but do not limit the invention. It should also be understood that many modifications and variations are possible in accordance with the principles of the invention. Therefore, the scope of the invention is defined only by the following claims.

Claims

1. An electronic system, comprising: An edge programmable logic device (PLD), wherein the edge PLD includes a plurality of programmable logic blocks (PLBs), the plurality of programmable logic blocks being configured to implement an image engine pre-processor of the edge PLD and an image engine of the edge PLD, wherein the edge PLD is configured to execute a computer-implemented method, the computer-implemented method comprising: Receiving a raw image provided by an imaging module of the electronic system via a raw image path of the electronic system; Generating, via the image engine pre-processor of the edge PLD, an engine quality image corresponding to the received raw image; and Generating, via the image engine of the edge PLD, one or more image tags associated with the generated engine quality image.

2. The electronic system according to claim 1, wherein The engine quality image includes one or more of the following: lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image.

3. The electronic system according to claim 1, wherein generating the engine quality image includes: Converting the resolution, frame rate, bit depth, color fidelity, dynamic range, compression state, and / or another image characteristic of the raw image to lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image; Applying engine quality histogram equalization to the raw image; Applying engine quality color correction to the raw image; and / or Applying engine quality exposure control to the raw image.

4. The electronic system according to claim 1, wherein The one or more image tags include an object presence tag, an object bounding box tag, and / or one or more object feature status tags.

5. The electronic system according to claim 1, wherein the computer-implemented method further comprises: Providing the one or more image tags and / or the generated engine quality image to a controller and / or a memory of the electronic system.

6. The electronic system according to claim 1, wherein the computer-implemented method further comprises: Powering on, waking up, powering off, or putting to sleep the electronic system, and / or authenticating or de-authenticating a user's access to the electronic system, at least in part based on the one or more image tags and / or the generated engine quality image.

7. The electronic system according to claim 1, wherein the computer-implemented method further comprises: Monitoring a charging state of a power supply of the electronic system; And Controlling a frame rate of the imaging module at least in part based on the monitored charging state of the power supply.

8. The electronic system according to claim 1, further comprising: A controller and a memory, the controller and the memory being coupled to the edge PLD and configured to receive the raw video provided by the imaging module via the raw image path, wherein the memory includes machine-readable instructions that, when executed by a processor of an external system, are adapted to cause the external system to: Generate a human-quality image corresponding to the received raw video, wherein the human-quality image includes one or more human-quality image characteristics and / or a human-quality processed version of the raw video; Receive the one or more image tags and / or the generated engine-quality image from the edge PLD; and Generate a system response at least in part based on at least one of the generated human-quality image and the one or more image tags and / or the generated engine-quality image provided by the edge PLD.

9. The electronic system according to claim 8, wherein generating the system response includes: Generating, at least in part based on the generated human-quality image and the one or more image tags provided by the edge PLD, a tagged human-quality image corresponding to the received raw video, and displaying the tagged human-quality image via a display of the electronic system and / or storing the tagged human-quality image according to the one or more image tags associated with the human-quality image; and / or Generating a system alert, disabling the imaging module of the electronic system, disabling the display of the electronic system, and / or powering off the electronic system.

10. The electronic system according to claim 1, further comprising: A controller and a memory, the controller and the memory being coupled to the edge PLD and configured to receive the raw video provided by the imaging module via the raw image path, wherein the memory includes machine-readable instructions that, when executed by a processor of an external system, are adapted to cause the external system to: Receive the one or more image tags and / or the generated engine-quality image from the edge PLD; and Generate a system response at least in part based on the one or more image tags and / or the generated engine-quality image, wherein generating the system response includes: generating a user input, generating a system alert, disabling the display of the electronic system, and / or powering off the electronic system.

11. The electronic system according to claim 1, wherein The image engine of the edge PLD is implemented as a neural network, machine learning, and / or an artificial-intelligence-based image processing engine; and The image engine of the edge PLD is trained to generate one or more image tags by: Generating, at least in part based on a training set of training images and associated image markings of human quality, a training set of engine-quality training images and associated image markings, the associated image markings corresponding to a desired selection of image tags; and Determine a set of weights for the image engine at least in part based on the engine quality training set.

12. A method for operating an electronic system, the electronic system including an edge programmable logic device (PLD) that implements an image engine preprocessor and an image engine, the method including: Receiving a raw image from an imaging module of the electronic system via a raw image path of the electronic system; Generating, via the image engine preprocessor of the edge PLD, an engine quality image corresponding to the received raw image; and Generating, via the image engine of the edge PLD, one or more image tags associated with the generated engine quality image.

13. The method according to claim 12, wherein The engine quality image includes one or more of the following: lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image.

14. The method according to claim 12, wherein generating the engine quality image includes: Converting the resolution, frame rate, bit depth, color fidelity, dynamic range, compression state, and / or another image characteristic of the raw image to lower resolution, lower frame rate, lower bit depth, lower color fidelity, narrower dynamic range, relatively lossy compression state, and / or non-human quality image characteristics relative to the raw image and / or a human quality processed version of the raw image; Applying engine quality histogram equalization to the raw image; Applying engine quality color correction to the raw image; and / or Applying engine quality exposure control to the raw image.

15. The method according to claim 12, wherein The one or more image tags include object presence tags, object bounding box tags, and / or one or more object feature status tags.

16. The method according to claim 12, further including: Providing the one or more image tags and / or the generated engine quality image to a controller and / or memory of the electronic system.

17. The method according to claim 12, further including: Powering the electronic system, waking up the electronic system, powering off the electronic system, or putting the electronic system to sleep, and / or authenticating or de-authenticating a user's access to the electronic system at least in part based on the one or more image tags and / or the generated engine quality image.

18. The method according to claim 12, further including: Monitoring a charging state of a power supply of the electronic system; And Controlling a frame rate of the imaging module at least in part based on the monitored charging state of the power supply.

19. The method according to claim 12, further including: Generating a human quality image corresponding to the received raw image, wherein the human quality image includes one or more human quality image characteristics and / or a human quality processed version of the raw image. Receiving the one or more image tags and / or the generated engine quality image from the edge PLD; and Generating a system response based at least in part on at least one of the generated human quality image and the one or more image tags and / or the generated engine quality image provided by the edge PLD.

20. The method according to claim 19, wherein generating the system response includes: Generating a tagged human quality image corresponding to the received original image based at least in part on the generated human quality image and the one or more image tags provided by the edge PLD, and displaying the tagged human quality image via a display of the electronic system and / or storing the tagged human quality image according to the one or more image tags associated with the human quality image; and / or Generating a system alert, disabling the imaging module of the electronic system, disabling the display of the electronic system, and / or powering off the electronic system.

21. The method according to claim 12, further comprising: Receiving the one or more image tags and / or the generated engine quality image from the edge PLD; And Generating a system response based at least in part on the one or more image tags and / or the generated engine quality image, wherein generating the system response includes: generating a user input, generating a system alert, disabling the display of the electronic system, and / or powering off the electronic system.

22. The method according to claim 12, wherein The image engine of the edge PLD is implemented as a neural network, machine learning, and / or an artificial intelligence-based image processing engine; and The image engine of the edge PLD is trained to generate the one or more image tags by: Generating an engine quality training set of training images and associated image markings based at least in part on a human quality training set of training images and associated image markings, the associated image markings corresponding to a desired selection of image tags; and Determining a set of weights for the image engine based at least in part on the engine quality training set.

Images