A circuit design method and related equipment

Abstract

This application provides a circuit design method and related equipment applicable to the field of integrated circuit technology. The method includes: acquiring a first circuit diagram based on multiple first devices, each first device including first parameters, which are parameters with normalized names used under various processes; then acquiring the electrical parameter indices of the multiple first devices based on the first circuit diagram; and determining multiple second parameters based on the indices of the electrical parameters of the multiple first devices, with each second parameter corresponding one-to-one with the first parameter. The first parameters of the first devices are then replaced with the second parameters to obtain second devices, and a second circuit diagram constructed from the multiple second devices is output. This method reduces the process of adjusting circuit parameters due to changes in electrical parameter indices or process PDK (Power Process Key), followed by running simulations to check results and readjusting, thus reducing multiple iterations and improving circuit design efficiency.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a circuit design method and related equipment. Background Technology

[0002] With the development of semiconductor technology, the models used for simulation of integrated circuits (Simulation Program with Integrated Circuit Emphasis, SPICE) in the process design kits (PDKs) provided by semiconductor manufacturers under advanced semiconductor processes are becoming increasingly complex, meaning that the coupling between model parameters is increasing. Traditional analog integrated circuit design flows require the circuit design specification as input. Designers, based on the circuit design specification, manually derive the approximate circuit structure and device parameters using simplified formulas for the circuit and the device under process. Then, they draw the circuit and build a testbench in electronic design automation (EDA) software, and repeatedly run SPICE at the device level for circuit simulation. Based on the simulation results, circuit outputs, and the device's performance in achieving the specifications, multiple iterations are performed for adjustments. Given the increasing coupling between model parameters, designers find it difficult to manually calculate and predict suitable operating states, noise, and nonlinearity of circuits and devices by simplifying formulas. This leads designers to rely on SPICE simulation results to determine whether the circuit's operating state meets expectations. However, SPICE simulation obtains the circuit's operating state by solving circuit equations. When the circuit and device models are complex, SPICE simulation is time-consuming. The circuit architecture and device parameters are determined through continuous SPICE simulation iterations to obtain the desired performance. However, this process is very time-consuming, resulting in low circuit design efficiency.

[0003] Currently, computers can be used to find the optimal circuit design by adjusting the parameters of the device under test based on simulation results through mathematical optimization algorithms. Typically, the user specifies the design space (e.g., circuit structure, type of device under test, and parameter selection range) as well as design specifications and weights. The computer software then transforms the design problem into a mathematical optimization problem and solves it through numerical algorithms.

[0004] However, when there are too many possible circuit design goals and constraints, the optimizer struggles to provide a complete trade-off between a large number of goals and constraints within a reasonable timeframe. Therefore, determining appropriate weights is difficult, and incorrect weight allocation can lead to inappropriate design. As a result, the larger the circuit size, the more serious the problem of inappropriate design becomes, which in turn reduces the efficiency of circuit design. Summary of the Invention

[0005] This application provides a circuit design method and related equipment to reduce the process of adjusting circuit process parameters, running simulations to view results, and then readjusting again, thereby reducing multiple iterations and improving circuit design efficiency.

[0006] Firstly, this application provides a circuit design method. This method can be executed by a circuit design device or by a chip configured within the circuit design device; this application does not limit the execution of either. The method includes: obtaining a first circuit diagram constructed based on multiple first devices. Specifically, a designer obtains first devices from a standard device library and constructs the first circuit diagram based on the first devices, thereby completing the input of the first circuit diagram. Each first device includes a first parameter, which is a parameter used in various processes and with normalized names. For example, taking a MOS device as an example, the first parameters of a MOS device are length and width. Based on this, the electrical parameters of the multiple first devices are then obtained based on the first circuit diagram (e.g., the index of the unity-gain bandwidth product, the index of the op-amp DC gain, and the index of the load capacitance, etc.). Based on the index of the electrical parameters of the multiple first devices, multiple second parameters are determined. These second parameters are parameters included in a process design toolkit (PDK), and each second parameter corresponds one-to-one with a first parameter. Based on this, the first parameter of the first device is replaced with the second parameter to obtain the second device, which includes the second parameter. Finally, the second circuit diagram constructed by multiple second devices is output.

[0007] In this embodiment, by acquiring the first circuit diagram constructed based on multiple first devices and the indices of the electrical parameters of the multiple first devices respectively, the circuit diagram and the indices of the electrical parameters of the circuit diagram can be decoupled. Therefore, when the indices of the electrical parameters of the circuit diagram are adjusted, the electrical parameters of the circuit diagram do not need to be adjusted. Secondly, since the first device includes parameters used in multiple processes and with normalized names (i.e., parameters included in the specific process design toolkit (PDK)), while the electrical parameters of the second device are parameters included in the PDK, the circuit diagram and the process PDK can be decoupled. Therefore, when the process PDK changes, the electrical parameters of the circuit diagram do not need to be adjusted. Existing technologies require traversing the design space through optimization algorithms to obtain the optimal design result or several optimal outputs for designers to choose from. When adjusting the electrical parameters of the circuit diagram or changing the process PDK, the design space needs to be traversed multiple times to run simulations and determine whether the electrical parameters in the circuit diagram need to be adjusted based on the results. In contrast, this solution does not require adjusting the electrical parameters of the circuit diagram under the above circumstances, thereby reducing multiple iterations and improving the efficiency of circuit design.

[0008] In one possible implementation of the first aspect, the first circuit diagram includes the connection relationships between multiple first devices, and each first device includes device characteristics. The connection relationships between the multiple first devices are the topological relationships formed by connecting the ports of the multiple first devices with wires, and the device characteristics of the first devices are the device attributes of the first devices. Based on this, the indices of the electrical parameters of the first circuit diagram are first obtained. The electrical parameters of the first circuit diagram may include, but are not limited to, the DC gain of the operational amplifier, the unity-gain bandwidth product, and the load capacitance. The specific electrical parameters of the first circuit diagram need to be determined according to the actual requirements of the circuit design. Then, based on the connection relationships between the multiple first devices and the device characteristics of each first device, the indices of the electrical parameters of the first circuit diagram are decomposed to obtain the indices of the electrical parameters of the multiple first devices. Specifically, through the connection relationships between the first devices and the device characteristics of each first device, the indices of the electrical parameters of the multiple first devices are calculated and output based on internally fixed formulas and parameter settings. The fixed formulas and parameter settings are derived from textbooks or from the experience of designers, and designers are also allowed to customize them; no limitation is made here.

[0009] In this embodiment, the electrical parameters of the first circuit diagram are decomposed. Since the connection relationship between the first devices and the device characteristics of each first device can be fully considered, the reasonable decomposition of the circuit parameters is ensured. Therefore, the electrical parameters of the multiple first devices obtained can be closer to the actual parameters of each first device, thereby improving the reliability of the electrical parameters of the first devices and thus improving the reliability of the circuit design.

[0010] In one possible implementation of the first aspect, since the first circuit diagram includes the connection relationships between multiple first devices, and each first device includes device characteristics, multiple second parameters can be determined by formula and simulation decision based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device. Alternatively, multiple second parameters can be determined by using a device feature library lookup table based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device.

[0011] In this embodiment, the connection relationships between the first devices and the device characteristics of each first device are also considered during the determination of multiple second parameters. This further ensures the accurate determination of the second parameters, avoids excessive deviation between the second parameters and the actual parameters, and prevents multiple subsequent adjustments to the second parameters, thereby improving the accuracy of the second parameter determination and thus improving the efficiency of outputting the second circuit diagram, i.e., improving the efficiency of circuit design. Secondly, the second parameters are determined through formulas and simulation decisions or device feature library lookup tables, ensuring that the second parameters can be determined under different environments and different first circuit diagrams in practical applications. This improves both the flexibility and reliability of the second parameter determination, thereby enhancing the flexibility and reliability of the circuit design.

[0012] In one possible implementation of the first aspect, before replacing the first parameter of the first device with the second parameter to obtain the second device, the first circuit diagram can be simulated based on multiple second parameters to obtain multiple circuit simulation results of the first circuit diagram. The multiple circuit simulation results of the first circuit diagram are the electrical parameters obtained after simulating each first device in the first circuit diagram, and it is determined that the multiple circuit simulation results of the first circuit diagram meet the index of the electrical parameters of multiple first devices. At this time, the first parameter of the first device is replaced with the second parameter to obtain the second device.

[0013] In this embodiment, when the simulation results of multiple circuits of the first circuit diagram meet the specifications of the electrical parameters of multiple first devices, it indicates that the determined multiple second parameters can meet the specifications for circuit design of the first circuit diagram. At this time, the second circuit diagram output based on the second parameters is the required circuit, thereby ensuring the reliability of the circuit design.

[0014] In one possible implementation of the first aspect, a process design toolkit (PDK) including multiple device models is first obtained. The process PDK includes multiple device models. Then, the process PDK is called to replace each first device in the first circuit diagram to obtain a third circuit. At this time, the third circuit includes multiple third devices, which are the devices after the first devices have been replaced by device models. The process parameters of the third devices are the second parameters determined in the aforementioned implementation. Then, each third device in the third circuit is simulated to obtain multiple circuit simulation results of the first circuit diagram (e.g., simulation results of the DC gain of the operational amplifier, simulation results of the unity-gain bandwidth product, and simulation results of the load capacitance).

[0015] In this embodiment, the process PDK is called to replace the device, so that the first device that does not reflect the real process parameters is replaced with a third device that has the real process parameters. The simulation based on the third device can better simulate the circuit simulation under actual application and specific process. As a result, the multiple circuit simulation results of the first circuit diagram are close to the actual circuit operation results, ensuring the accuracy of the circuit simulation results.

[0016] In one possible implementation of the first aspect, at least two types of simulations are performed, with different types of simulations used to obtain different circuit simulation results. It should be understood that the simulation types in this embodiment include, but are not limited to, alternating current (AC) simulation, transient (TRAN) simulation, and direct current (DC) simulation.

[0017] In this embodiment, different types of simulations are performed on the characteristics and connection relationships of the devices in different first circuit diagrams. The different types of simulation results can display the characteristics of the first circuit diagram from different dimensions. Furthermore, when the circuit parameter specifications are not met, it is easier to determine which specific second parameter needs to be adjusted, thereby improving the efficiency of second parameter adjustment and thus improving the accuracy and efficiency of circuit design.

[0018] In one possible implementation of the first aspect, when it is determined that multiple circuit simulation results of the first circuit diagram do not meet the specifications of the electrical parameters of multiple first devices, multiple second parameters will be redefined.

[0019] In this embodiment, since the simulation results of multiple circuits do not meet the specifications of the electrical parameters of multiple first devices, that is, some of the determined second parameters may not meet the specifications for circuit design of the first circuit diagram, it is necessary to readjust the second parameters to ensure that the output second circuit diagram is the required circuit.

[0020] In one possible implementation of the first aspect, the first circuit diagram can also be divided to obtain multiple circuit sub-diagrams, each circuit sub-diagram including at least one first device, and there is a processing priority among the multiple circuit sub-diagrams, the processing priority indicating the order in which the multiple circuit sub-diagrams are simulated.

[0021] For example, after dividing the first circuit diagram into circuit sub-diagrams A, B, and C, the processing priority among circuit sub-diagrams A, B, and C is circuit sub-diagram A to circuit sub-diagram C to circuit sub-diagram B. Therefore, in the subsequent parameter confirmation process, the parameters of circuit sub-diagram A should be confirmed first. Only when the simulation results of circuit sub-diagram A meet the circuit specifications of circuit sub-diagram A should the parameters of circuit sub-diagram C be confirmed and simulated. And only when the simulation results of circuit sub-diagram C meet the circuit specifications of circuit sub-diagram C should the parameters of circuit sub-diagram B be confirmed and simulated. This is the processing priority among each circuit sub-diagram.

[0022] In this embodiment, the first circuit diagram is divided into multiple circuit sub-diagrams. Since each sub-diagram contains fewer first devices than the first circuit diagram, and when the first circuit diagram is a large-scale integrated circuit including multiple first devices, the simulation of each sub-diagram is performed according to the processing priority. Parameter verification and simulation are performed on each sub-diagram separately. Only when the simulation result of one sub-diagram meets the corresponding circuit specifications is the parameter verification and simulation process for the next sub-diagram initiated. This reduces the simulation time compared to simulating the first circuit diagram, thereby saving simulation time and improving circuit design efficiency.

[0023] In one possible implementation of the first aspect, it is also possible to obtain the constraints of each circuit sub-graph (e.g., the percentage contribution of the first device to noise in the circuit sub-graph, the allocation of the first-stage gain and the second-stage gain in the circuit sub-graph, etc.) and the tuning objectives of each circuit sub-graph (e.g., optimal area, optimal power consumption, and quality factor values, etc.). The constraints are the range of variation of the electrical parameters of the first device included in the circuit sub-graph, and the tuning objectives are the target values ​​of the electrical parameters of the circuit sub-graph. Based on this, the indices of the electrical parameters of the first circuit diagram are first obtained, and then the indices of the electrical parameters of the first circuit diagram are decomposed based on the constraints of each sub-graph and the tuning objectives to obtain the indices of the electrical parameters of multiple first devices.

[0024] In this embodiment, the electrical parameters of the first circuit diagram are decomposed. When the first circuit diagram is divided into multiple sub-diagrams, the variation range of the electrical parameters of the first devices contained in each sub-diagram and the target values ​​of the electrical parameters of the circuit sub-diagrams can be fully considered to ensure the reasonable decomposition of the circuit parameter indicators. Therefore, the obtained electrical parameter indicators of the multiple first devices can be closer to the actual indicators of each first device, improving the reliability of the electrical parameter indicators of the first devices and thus improving the reliability of the circuit design.

[0025] In one possible implementation of the first aspect, each subgraph includes connection relationships between multiple first devices, and each first device includes device characteristics. The connection relationships between the multiple first devices are the topological relationships formed by connecting the ports of the multiple first devices with wires, and the device characteristics of the first devices are device attributes. Based on this, multiple second parameters are determined by formulas and simulation decisions based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device. Alternatively, multiple second parameters are determined by a device feature library lookup table based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device.

[0026] In this embodiment, during the determination of multiple second parameters, the connection relationships between the first devices and the device characteristics of each first device are considered. This ensures the accurate determination of the second parameters in each circuit sub-diagram, avoiding excessive deviations between the second parameters and the actual parameters, which would otherwise require multiple adjustments to the second parameters. This improves the accuracy of the second parameter determination, thereby increasing the efficiency of outputting the second circuit diagram, and thus improving the efficiency of circuit design. Furthermore, determining the second parameters through formulas and simulation decisions or by using a device feature library lookup table ensures that the second parameters can be determined under different environments and different first circuit diagrams in practical applications. This improves both the flexibility and reliability of the second parameter determination, thereby enhancing the flexibility and reliability of the circuit design.

[0027] In one possible implementation of the first aspect, the multiple circuit sub-graphs include a first circuit sub-graph and a second circuit sub-graph. The simulation order of the first circuit sub-graph precedes the simulation order of the second circuit sub-graph, which is the last circuit sub-graph to be simulated according to the processing priority indicator. Based on this, before replacing the first parameter of the first device with the second parameter to obtain the second device, the first circuit sub-graph and the second circuit sub-graph are first determined from the multiple circuit sub-graphs according to the processing priority. Then, the first circuit sub-graph is simulated based on the multiple second parameters to obtain multiple circuit simulation results of the first circuit sub-graph. These multiple circuit simulation results of the first circuit sub-graph are the electrical parameters obtained after simulating each first device in the first circuit sub-graph.

[0028] Furthermore, it is determined that multiple circuit simulation results of the first circuit sub-diagram satisfy the electrical parameter specifications of multiple first devices. Based on multiple second parameters, the second circuit sub-diagram is simulated to obtain multiple circuit simulation results for the second circuit sub-diagram. These multiple circuit simulation results represent the electrical parameters obtained after simulating each first device in the second circuit sub-diagram. After determining that the multiple circuit simulation results of the second circuit sub-diagram satisfy the electrical parameter specifications of multiple first devices, the first parameters of the first devices are replaced with second parameters to obtain the second devices. Finally, the second circuit diagram constructed from the multiple second devices is output.

[0029] It should be understood that the first circuit sub-diagram and the second circuit sub-diagram can be adjacent circuit sub-diagrams or non-adjacent circuit sub-diagrams. If the first circuit sub-diagram and the second circuit sub-diagram are non-adjacent circuit sub-diagrams, then there is at least one circuit sub-diagram between the first circuit sub-diagram and the second circuit sub-diagram. Therefore, when the simulation results of multiple circuits of the first circuit sub-diagram meet the electrical parameter indicators of multiple first devices of the first circuit sub-diagram, it is necessary to simulate the next circuit sub-diagram of the first circuit sub-diagram. And when the simulation results of the next circuit sub-diagram meet the electrical parameter indicators of multiple first devices of the next circuit sub-diagram, subsequent simulation and judgment are performed until the simulation process of the second circuit sub-diagram is reached. The simulation and judgment process of intermediate circuit sub-diagrams is not described here and should not be construed as a limitation of the embodiments of this application.

[0030] In this embodiment, since the simulation order of the first circuit sub-diagram precedes that of the second circuit sub-diagram, when the simulation results of multiple circuits in the first circuit sub-diagram meet the specifications of the electrical parameters of multiple first devices, it indicates that the determined second parameters of the first circuit sub-diagram can meet the specifications for circuit design of the first circuit sub-diagram. At this time, the simulation of the second circuit sub-diagram can continue. When the simulation results of multiple circuits in the second circuit sub-diagram meet the specifications of the electrical parameters of multiple first devices, it indicates that the determined second parameters of the second circuit sub-diagram can meet the specifications for circuit design of the second circuit sub-diagram. Since the second circuit sub-diagram is the last circuit sub-diagram to be simulated according to the processing priority indicator, the determined second parameters of the first circuit sub-diagram and the second parameters of the second circuit sub-diagram are the process parameters required for the first circuit diagram. Therefore, the second circuit diagram constructed by multiple second devices is the required circuit, thereby ensuring the reliability of the circuit design.

[0031] In one possible implementation of the first aspect, a process design toolkit (PDK) including multiple device models is first obtained. Then, the process PDK is called to replace each first device in the first circuit sub-diagram to obtain a third circuit sub-diagram. At this time, the third circuit sub-diagram includes multiple third devices, which are the devices after the first devices have been replaced by device models. The process parameters of the third devices are the second parameters. Finally, each third device in the third circuit sub-diagram is simulated to obtain multiple circuit simulation results of the first circuit sub-diagram. Similarly, a process design toolkit (PDK) including multiple device models is first obtained. Then, the process PDK is called to replace each first device in the second circuit sub-diagram to obtain a fourth circuit sub-diagram. This fourth circuit sub-diagram includes multiple third devices, which are the devices after the first devices have been replaced by device models. The process parameters of the third devices are the second parameters. Finally, each third device in the fourth circuit sub-diagram is simulated to obtain multiple circuit simulation results of the second circuit sub-diagram.

[0032] In this embodiment, the process PDK is called to replace the device, so that the first device that does not reflect the real process parameters is replaced with a third device that has the real process parameters. The simulation based on the third device can better simulate the circuit simulation under actual application and specific process. As a result, the multiple circuit simulation results of the first circuit sub-diagram and the multiple circuit simulation results of the first circuit sub-diagram can be close to the actual circuit operation results, ensuring the accuracy of the circuit simulation results.

[0033] In one possible implementation of the first aspect, at least two types of simulations are performed, with different types of simulations used to obtain different circuit simulation results. It should be understood that the simulation types in this embodiment include, but are not limited to, AC simulation, TRAN simulation, and DC simulation.

[0034] In this implementation, different types of simulations are performed, and the different types of simulation results can display the characteristics of the first circuit sub-diagram and the features of the second circuit sub-diagram from different dimensions. Furthermore, when the circuit parameter specifications are not met, it is easier to determine which specific second parameter needs to be adjusted, thereby improving the efficiency of second parameter adjustment and thus improving the accuracy and efficiency of circuit design.

[0035] In one possible implementation of the first aspect, when it is determined that multiple circuit simulation results of the first circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices in the first circuit sub-diagram, the second parameters of the first circuit sub-diagram will be redefined. It should be understood that the second parameters of other circuit sub-diagrams will not be redefined in this case. Similarly, when it is determined that multiple circuit simulation results of the second circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices in the second circuit sub-diagram, the second parameters of the second circuit sub-diagram will be redefined. It should be understood that the second parameters of other circuit sub-diagrams will not be redefined in this case.

[0036] In this embodiment, since the simulation results of multiple circuits of the first circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices of the first circuit sub-diagram, that is, some of the determined second parameters of the first circuit sub-diagram may not meet the specifications for circuit design of the first circuit sub-diagram, it is necessary to readjust the second parameters of the first circuit sub-diagram to ensure that the second parameters of the first circuit sub-diagram are accurate. Similarly, it can be seen that the second parameters of the second circuit diagram can also be ensured to be accurate, thereby ensuring that the output second circuit diagram is the required circuit.

[0037] In one possible implementation of the first aspect, before acquiring the first circuit diagram, a circuit input interface can be provided to receive circuit input operations and acquire the first circuit diagram based on the circuit input operations. Secondly, before acquiring the electrical parameters of the first circuit diagram, a process editing interface can be provided to receive parameter input operations and acquire the electrical parameters of the first circuit diagram based on the parameter input operations. Furthermore, a result display interface can be provided to display the second circuit diagram and multiple circuit simulation results of the first circuit diagram.

[0038] In this embodiment, the user can input the first circuit diagram by performing circuit input operations on the circuit input interface, and input the electrical parameters of the first circuit diagram by performing index input operations on the process editing interface. Through the interface, the user can utilize the parameterized background software function library corresponding to the integrated processing and verification modules to build a low-code-like automated design verification software to implement the solution, thereby improving its feasibility and flexibility. Furthermore, the results display interface can show multiple circuit simulation results of the second and first circuit diagrams, allowing the user to more intuitively see the obtained second circuit diagram and corresponding simulation results, thus improving the applicability of the circuit device.

[0039] Secondly, this application provides a circuit design device including a processor. The processor is coupled to a memory and can be used to execute instructions in the memory to implement the methods in any possible implementation of the first aspect described above. Optionally, the terminal device further includes a memory. Optionally, the terminal device further includes a communication interface, with the processor coupled to the communication interface, the communication interface being used for inputting and / or outputting information, the information including at least one of instructions and data. It should be understood that the communication interface can be implemented using the same hardware logic or by different hardware logic; for example, a hardware interface may have only input or output functions, or a hardware interface may have both input and output functions simultaneously.

[0040] In another implementation, the terminal device is a chip or chip system configured in a circuit design device. When the terminal device is a chip or chip system configured in a circuit design device, the communication interface can be an input / output interface, interface circuit, output circuit, input circuit, pins, or related circuits, etc. The processor can also be manifested as a processing circuit or logic circuit.

[0041] In specific implementation, the memory can be a non-transitory memory, such as read-only memory (ROM), which can be integrated with the processor on the same chip or set on different chips. The embodiments of this application do not limit the type of memory or the way the memory and processor are set.

[0042] It should be understood that related information exchange processes, such as sending a message, can be seen as the process of outputting a message from the processor, and receiving a message can be seen as the process of inputting a received message into the processor. Specifically, the information processed can be output to the transmitter, and the input information received by the processor can come from the receiver. Here, the transmitter and receiver can be collectively referred to as a transceiver.

[0043] Thirdly, this application provides a processor, including: an input circuit, an output circuit, and a processing circuit. The processing circuit is used to receive signals through the input circuit and to transmit signals through the output circuit, causing the processor to execute the method in any possible implementation of the first aspect described above.

[0044] In specific implementation, the processor can be a chip, the input circuit can be an input pin, the output circuit can be an output pin, and the processing circuit can be a transistor, gate circuit, flip-flop, and various logic circuits. The input signal received by the input circuit can be received and input by, for example, but not limited to, a receiver, and the signal output by the output circuit can be output to, for example, but not limited to, a transmitter and transmitted by the transmitter. Furthermore, the input circuit and the output circuit can be the same circuit, which is used as the input circuit and the output circuit at different times. This application does not limit the specific implementation of the processor and various circuits.

[0045] Fourthly, this application provides a computer program product comprising: a computer program (also referred to as code or instructions) that, when run, causes a computer to perform the method in any of the possible implementations of the first aspect described above.

[0046] Fifthly, this application provides a computer-readable storage medium storing a computer program (also referred to as code or instructions) that, when run on a computer, causes the computer to perform the method in any of the possible implementations of the first aspect described above.

[0047] In a sixth aspect, this application provides a non-volatile computer-readable storage medium storing a computer program (also referred to as code or instructions) that, when run on a computer, causes the computer to perform the method in any of the possible implementations of the first aspect described above.

[0048] In a seventh aspect, this application provides a chip system including a processor and an interface, wherein the interface is used to obtain a program or instructions, and the processor is used to invoke the program or instructions to implement the functions involved in the first aspect.

[0049] In one possible design, the chip system further includes a memory for storing program instructions and data necessary for circuit design. The chip system may consist of chips or may include chips and other devices.

[0050] It should be noted that the beneficial effects of the embodiments of the second to seventh aspects of this application can be understood with reference to the embodiments of the first aspect, and therefore are not repeated. Attached Figure Description

[0051] Figure 1 This is a schematic diagram of the process structure in an embodiment of this application;

[0052] Figure 2 This is a schematic diagram of one embodiment of the circuit design in this application;

[0053] Figure 3 This is a circuit diagram of the first circuit diagram in the embodiments of this application;

[0054] Figure 4 This is a schematic diagram of the circuit input interface in an embodiment of this application;

[0055] Figure 5 This is a schematic diagram of the process editing interface in an embodiment of this application;

[0056] Figure 6 This is a schematic diagram of one embodiment of a functional component in the functional component library of this application.

[0057] Figure 7 This is a flowchart illustrating the process of obtaining the electrical parameters of multiple first devices by decomposing the electrical parameters of the first circuit diagram in an embodiment of this application.

[0058] Figure 8 This is a flowchart illustrating the determination of the second parameter in an embodiment of this application;

[0059] Figure 9 This is a flowchart illustrating multiple circuit simulation results for obtaining the first circuit diagram in an embodiment of this application.

[0060] Figure 10 This is a schematic flowchart of the circuit design in an embodiment of this application;

[0061] Figure 11 This is a schematic diagram of another embodiment of the circuit design in this application;

[0062] Figure 12 This is a schematic diagram of an embodiment in this application where a first circuit diagram is divided into multiple circuit sub-diagrams;

[0063] Figure 13 This is a schematic diagram of one embodiment of the design flowchart of the first circuit diagram in this application;

[0064] Figure 14 This is a schematic diagram of an embodiment of the circuit sub-diagram design.

[0065] Figure 15 This is a schematic diagram of another embodiment of the circuit sub-diagram design in this application. Detailed Implementation

[0066] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention are within the scope of protection of the present invention.

[0067] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0068] With the development of semiconductor technology, the coupling between model parameters is becoming increasingly complex. Currently, computers can use mathematical optimization algorithms to adjust the parameters of the device under test based on simulation results to find the optimal circuit design. Typically, the user specifies the design space (e.g., circuit structure, device type, and size range) as well as design specifications and weights. The computer software then transforms the design problem into a mathematical optimization problem, which is solved using numerical algorithms. However, when there are too many possible circuit design goals and constraints, the optimizer struggles to provide a complete trade-off between a large number of goals and constraints within a reasonable timeframe. Therefore, determining appropriate weights is difficult, and incorrect weight allocation can lead to inappropriate designs. Consequently, the larger the circuit size, the more severe the problem of inappropriate design becomes, thereby reducing the efficiency of circuit design.

[0069] To address the aforementioned issues, embodiments of this application provide a circuit design method and related equipment that can reduce the process of adjusting circuit process parameters, running simulations to view results, and then readjusting again, thereby reducing multiple iterations and improving circuit design efficiency.

[0070] To facilitate understanding, the technical terms involved in the embodiments of this application will be explained first.

[0071] I. Standard Component Library

[0072] The standard device library is a database that includes multiple standard devices.

[0073] II. Standard Components

[0074] Standard devices are devices whose parameters are standardized across various manufacturing processes and whose names are uniform. For example, a standard MOS device only has the MOS device type and a few parameters related to its size. MOS device types include N-channel and P-channel MOS devices. The size-related parameters, such as the length of the MOS device, have different names in different manufacturing processes, such as L, l, length, and channel length. When using a standard device, the designer only needs to determine the length of the MOS device; they do not need to know the specific names used in different manufacturing processes.

[0075] III. Functional Component Library

[0076] The functional component library provides parameterized functional modules for use, configuration, and symbolic representation in design flowcharts. In this embodiment, functional modules are defined as functional components. The functional components included in the functional component library can be further subdivided according to their functional type into system design functional components, circuit design functional components, circuit simulation functional components, basic process functional components, and observation and positioning functional components, etc.

[0077] Specifically, system design functional components are used to optimize the electrical parameters of circuit diagrams, such as bandwidth and phase margin optimization, or gain and bandwidth optimization. Circuit design functional components are used for table lookup functions, such as transconductance lookup or drain current (intensity of current drain, id) lookup. Circuit simulation functional components are used to simulate circuit diagrams to obtain simulation results, such as alternating current (AC) simulation, transient (TRAN) simulation, and direct current (DC) simulation. Basic process functional components are used to perform decision-making, looping, branching, and nesting functions in the actual executable application. Observation and positioning functional components are used for breakpointing or printing functions. It should be understood that the foregoing examples are only used to introduce some functions of each component. In actual applications, there are other functional components, and each component has many more different functions. Therefore, they should not be construed as limiting the embodiments of this application.

[0078] IV. Design Flowchart

[0079] A design flowchart is a flowchart that is visually displayed on an interface. EDA software needs to provide designers with the functional support required to build visual flowcharts, including component drag-and-drop placement and flow connection functions. Furthermore, the EDA software should be able to convert the user-input design flowchart into an executable application. This executable application processes the circuit diagram input by the designer according to the operations defined in the flowchart to generate the final circuit diagram.

[0080] V. Characteristic Solving Function

[0081] Characteristic solving functions are functional functions used by designers when designing device parameters, with one characteristic solving function corresponding to each device. Based on this, characteristic solving functions are functions that can calculate device parameters (depending on the parameters input by the designer). Therefore, based on characteristic solving functions, the required output can be achieved through parameterized configuration of the functions.

[0082] VI. Operable built-in functions

[0083] Operable built-in functions are the functions of the software program obtained by encapsulating the characteristic solving function.

[0084] VII. Process Design Kit (PDK)

[0085] A process PDK is a design package provided by a semiconductor manufacturer that includes multiple device models. Different semiconductor manufacturers have different process PDKs, meaning that the parameters of the device models included in different process PDKs are different. Therefore, for the same device, the parameters determined for simulation using different process PDKs will be different.

[0086] 8. Circuit Sub-diagram

[0087] A subgraph is a graph whose node set and edge set are subsets of the node set and edge set of a given graph, respectively. Based on this, the circuit subgraph described in this embodiment involves dividing a circuit graph into subgraphs containing at least one device. These subgraphs can form a complete circuit graph. It should be understood that the device attributes of the devices in the subgraphs obtained after dividing the circuit graph remain unchanged, and the topological relationships formed by connecting the ports of each device with wires also remain unchanged.

[0088] IX. Device Attributes

[0089] Device attributes refer to the inherent properties of a device, and these attributes reflect the specific values ​​of its electrical parameters. For example, based on the application of this solution to software (i.e., EDA software), the device attribute of a resistor in the EDA software is specifically displayed as 10 ohms (Ω). Similarly, the device attribute of a capacitor in the EDA software is specifically displayed as 10 farads (F), and the device attribute of an inductor in the EDA software is specifically displayed as 10 henries (H), etc.

[0090] 10. Indicators of electrical parameters

[0091] In the field of circuit design, the electrical parameters of a circuit diagram refer to the specifications that the circuit constructed by the designer should meet based on specific requirements. For example, the electrical parameters of the circuit diagram should include an operational amplifier DC gain (Av) greater than 100dB and a unity-gain bandwidth product (GBW) greater than 500 megawatts (M). The electrical parameters of a device, on the other hand, refer to the specifications that the device should meet. For example, the capacitance of a load capacitor should be less than 10F.

[0092] Based on the foregoing introduction, the specific process structure in the embodiments of this application is described below. Please refer to [link / reference]. Figure 1 , Figure 1 This is a schematic diagram of the process structure in an embodiment of this application, such as... Figure 1 As shown, by introducing the concept of software programming, the circuit design ideas, calculation process and simulation decision of the designer are presented by drawing software flowcharts. The designer obtains the first device from the standard device library 101 and constructs the first circuit diagram 102 based on the first device. Specifically, the first device is the standard device introduced above, and the process parameters of the first device are defined as the first parameter, which is the standard parameter introduced above.

[0093] Based on this, the designer first inputs the electrical parameters of the first circuit diagram 102, then calls system design function components and circuit design function components from the function component library 104, and uses the system design function components in the design flowchart 103 to decompose the electrical parameters of the first circuit diagram 102 to reflect the electrical parameters of each first device in the first circuit diagram 102. Then, the circuit design function components are used to determine the second parameters, and the first parameters of the first device are replaced with the second parameters to obtain the second device. At this point, the second parameters are the parameters of the device model included in the process PDK.

[0094] Therefore, it can be seen that by obtaining the first circuit diagram constructed based on multiple first devices and the electrical parameter indices of the multiple first devices through system design functional components, the circuit diagram and the electrical parameter indices of the circuit diagram can be decoupled. Secondly, by determining the second parameters of the first circuit diagram 102 through circuit design functional components, since the first devices include parameters used under multiple processes and with normalized names (i.e., the parameters included in the specific process design toolkit PDK are not considered), and the electrical parameters of the second devices are the parameters included in the process PDK, the first circuit diagram 102 can be decoupled from the process PDK.

[0095] Specifically, in the different functional components of design flowchart 103, to improve design efficiency and reduce the software programming requirements for designers, the characteristic solving function corresponding to each first device is encapsulated to obtain the corresponding operable built-in function, and a graphical interface is provided to drag and drop components to achieve low-code circuit design. Secondly, the different functional components in design flowchart 103 integrate a use case library, which enables the design iteration to be completed by directly generating SPICE 105 netmarks and performing simulation verification during the design process.

[0096] Based on this, after the low-code design is completed in the design flowchart 103, the software processing framework 106 in the background is started to process the connections between multiple first devices in the first circuit diagram 102 and the characteristics of each first device. Specifically, the code corresponding to different functional components in the design flowchart 103 is combined into a program according to the flow, and the non-simulation code is executed to output typical parameters to the circuit. Then, the device model in the process design toolkit (PDK) is used to replace each first device in the first circuit diagram. At this time, the process parameters of each device model are the second parameters. Therefore, the second parameters can be determined based on the actual process PDK, and the test bench is called to load the circuit for simulation code to perform simulation based on the second parameters. Then, multiple circuit simulation results of the first circuit diagram are obtained.

[0097] Furthermore, as described above, the functional component library includes multiple functional components. Among them, the basic process-type functional components can perform judgment functions in the actual executable application. Therefore, when completing the design flowchart, designers need to drag and drop the basic process-type functional components to perform judgment functions in the actual executable application. Thus, multiple circuit simulation results of the first circuit diagram need to be used as inputs to the basic process-type functional components to ultimately complete the entire simulation design process. When the multiple circuit simulation results of the first circuit diagram meet the specifications of the electrical parameters of multiple first devices, the second circuit diagram 108 is output. It should be understood that when outputting the second circuit diagram 108, multiple circuit simulation results of the first circuit diagram can also be obtained and displayed on the corresponding interface; specific details are not limited here.

[0098] pass Figure 1 As can be seen, compared with the traditional circuit design flow, the circuit design flow structure provided in this embodiment can free designers from the design iteration process. The first circuit diagram 102 records the design circuit diagram excluding process parameters, and the design flowchart 103 records the circuit design flow method. When the designer adjusts the electrical parameters of the first circuit diagram 102, the entire flow structure can get rid of the dependence on the designer. The design flowchart 103 can re-decompose the electrical parameters of the first circuit diagram 102, and obtain the electrical parameters of each first device in the first circuit diagram 102 again. Based on the introduced flow, the simulation results can obtain the process parameters that can meet the electrical parameters of multiple first devices, thereby obtaining the second circuit diagram 108 that meets the electrical parameters of the first circuit diagram 102.

[0099] The foregoing mainly described the process structure of the embodiments of this application. The following will provide a detailed description of the solution provided by the embodiments of this application from a methodological perspective. Please refer to [link / reference]. Figure 2 , Figure 2 This is a schematic diagram of one embodiment of the circuit design in this application, as shown below. Figure 2 As shown, an embodiment of the circuit design method is as follows.

[0100] 201. Obtain the first circuit diagram.

[0101] In this embodiment, a first circuit diagram is obtained. The first circuit diagram is constructed based on multiple first devices, and each first device includes a first parameter. Specifically, the designer obtains the first devices from a standard device library and constructs the first circuit diagram based on the first devices, thereby completing the input of the first circuit diagram. Specifically, the first devices are the standard devices described above, and the process parameters of the first devices are defined as the first parameters, which are the standard parameters described above.

[0102] Specifically, the first circuit diagram also includes the connection relationships between multiple first devices, and each first device includes device characteristics. The connection relationships between the multiple first devices are the topological relationships formed by connecting the ports of the multiple first devices with wires, and the device characteristics included in each first device are the device attributes of the first device.

[0103] In practical applications, when executing the embodiments of this application through software programs, tools can identify that multiple first devices in the first circuit diagram are independent objects and obtain the characteristic calculation function corresponding to each first device. Based on this, the characteristic calculation function corresponding to each first device is encapsulated to obtain a corresponding operable built-in function. Then, the characteristic calculation functions corresponding to multiple first devices are output to the design flowchart as usable device modules, thereby completing the software flow of the software processing framework. Secondly, based on the fact that the first circuit diagram also includes the connection relationship between multiple first devices, and each first device includes device characteristics, the connection relationship between multiple first devices and the device characteristics of each first device are converted into a corresponding SPICE netlist, which is used to generate verification test cases that can be called for simulation in the design flowchart.

[0104] Optionally, to facilitate the differentiation of multiple first devices, each first device can be numbered, with each first device corresponding to an independent and non-repeating number. For example, if the first circuit diagram includes first device A, first device B, and first device C, then the number of first device A can be determined as "1", the number of first device B as "2", and the number of first device C as "3". In this way, when designers and subsequent program products perform process parameters and simulations, they can directly identify the corresponding first device through the number, which can further improve the efficiency of circuit design.

[0105] For easier understanding, please refer to Figure 3 , Figure 3 This is a circuit diagram of the first circuit diagram in the embodiments of this application, such as... Figure 3 As shown, the designer inputs the first circuit diagram to build. This first circuit diagram is a typical two-stage operational amplifier circuit. The first circuit diagram specifically includes MOS devices, coupling capacitors, bias voltage and current sources, load capacitors, and multiple module external ports. Figure 3 The MOS devices in the middle include M1, M2 to M8, Figure 3 The coupling capacitor is Cc, the bias voltage and current source is Ibias, the load capacitor is CL, and the external ports of the multiple modules are Vin-, Vin+, Vout and VDD.

[0106] Specifically, MOS devices M5, M7, and M8 are connected to the module's external port VDD, while the bias voltage and current source Ibias, MOS devices M3, M4, and M6, and the load capacitor CL are grounded. MOS device M8 is connected to the bias voltage and current source Ibias, MOS device M5 is connected to MOS devices M1 and M2, and MOS device M1 is connected to the external port Vin-, while MOS device M2 is connected to the external port Vin+. MOS device M3 is connected to MOS device M1, MOS device M4 is connected to MOS device M2, and MOS device M6 is connected to the coupling capacitor Cc. Both MOS device M6 and coupling capacitor Cc are connected to the load capacitor CL.

[0107] Specifically, MOS devices include standard parameters for width and length, while coupling capacitors (Cc) include standard parameters for capacitance. Bias voltage and current sources include standard parameters for voltage, load capacitors include standard parameters for capacitance, and the external ports Vin-, Vin+, Vout, and VDD of multiple modules all include standard parameters for voltage. It should be understood that the foregoing examples are only for understanding this solution; the specific first circuit diagram needs to be flexibly determined according to design requirements.

[0108] Optionally, in practical applications, a circuit input interface can also be provided to receive circuit input operations and execute the step of obtaining the first circuit diagram based on the circuit input operations. In this embodiment, the circuit input operation is specifically implemented by the designer dragging and dropping the first device on the circuit input interface. That is, the circuit input interface is mainly used by the designer to build the first circuit diagram based on the standard device (i.e., the first device). For easier understanding, please refer to [link to relevant documentation]. Figure 4 , Figure 4 This is a schematic diagram of the circuit input interface in an embodiment of this application, such as... Figure 4 As shown, in the circuit input interface, the designer selects the first device on interface 601, which includes the first device, according to specific design requirements, and drags the selected first device to complete the circuit input operation, thereby obtaining the first circuit diagram 602. It should be understood that... Figure 4 The examples provided are only for illustrating how to perform circuit input operations on the first circuit diagram through the circuit input interface. Therefore, the specific layout and format of the circuit input interface should not be construed as limitations of this solution.

[0109] 202. Obtain the electrical parameters of the first circuit diagram.

[0110] In this embodiment, the indices of the electrical parameters of the first circuit diagram are obtained. These indices are the same as those input in step 201. Specifically, designers can input the desired electrical parameters from the first circuit diagram based on their actual circuit design ideas and requirements. These electrical parameters may include, but are not limited to, op-amp DC gain (Av), unity-gain bandwidth product (GBW), load capacitance (CL), phase margin (PM), slew rate (SR), noise voltage (Vn), and total harmonic distortion (THD). Specific electrical parameters need to be determined based on the actual requirements of the circuit design.

[0111] Optionally, in practical applications, a process editing interface can also be provided to receive indicator input operations and execute the steps of obtaining the electrical parameters of the first circuit diagram based on the indicator input operations. In this embodiment, as described above, the functional components included in the functional component library can be subdivided into system design functional components, circuit design functional components, circuit simulation functional components, basic process functional components, and observation and positioning functional components, etc., according to their functional types. Based on this, designers can operate on the functional components included in the functional component library by dragging and dropping in the process editing interface. That is, they can use system design functional components, circuit design functional components, circuit simulation functional components, basic process functional components, and observation and positioning functional components to build a design flowchart. In the design flowchart, different functional components define specification inputs, set parameters for different functional components, and define the correspondence between each functional component and the first circuit diagram, as well as the indicators of the electrical parameters input to the first circuit diagram. Based on this, the process of building the design flowchart supports a drag-and-drop approach, utilizing the internally integrated functions and verification test case library to achieve the concrete instantiation of each functional component in the design flowchart of the circuit design software, thereby enabling rapid low-code development.

[0112] For easier understanding, please refer to Figure 5 , Figure 5 This is a schematic diagram of the process editing interface in an embodiment of this application, such as... Figure 5 As shown, Figure 5 The functional component library 701 shown in Figure (A) includes various functional components. Designers select specific functional components from the functional component library 701 according to specific design requirements and drag and drop the selected functional components to complete the construction of the design flowchart, thereby obtaining... Figure 5The design flowchart 702 shown in Figure (B) is used to input the electrical parameters of the first circuit diagram into the system design functional component 703 after the design flowchart 702 is completed. This completes the input operation of the electrical parameters of the first circuit diagram and enables the acquisition of the electrical parameters of the first circuit diagram.

[0113] Furthermore, the system design functional component 703 decomposes the electrical parameters of the first circuit diagram to obtain the electrical parameters of multiple first devices. These parameters are then input to the circuit design functional component 704. The circuit design functional component 704 determines a second parameter and, based on this second parameter, calls the process PDK to replace the first devices in the first circuit diagram with device models from the process PDK. The replaced first devices are then input to the circuit simulation functional component 705. The circuit simulation functional component 705 performs circuit simulation based on the replaced first devices to obtain circuit simulation results for the multiple first devices. These simulation results are then input to the basic process functional component 706. The basic process functional component 706 determines whether the circuit simulation results for the multiple first devices meet the electrical parameter specifications of the multiple first devices, and outputs the results if they do, thus ending the process. It should be understood that... Figure 5 The example provided is only for demonstrating how to input electrical parameters of the first circuit diagram in the process editing interface. Therefore, the specific layout and format of the process editing interface should not be construed as limitations of this solution.

[0114] 203. Based on the connection relationship between multiple first devices and the device characteristics of each first device, the electrical parameters of the first circuit diagram are decomposed to obtain the electrical parameters of multiple first devices.

[0115] In this embodiment, since the first circuit diagram also includes the connection relationship between multiple first devices, and each first device includes device characteristics, the electrical parameters of the first circuit diagram obtained in step 202 can be decomposed based on the connection relationship between multiple first devices and the device characteristics of each first device to obtain the electrical parameters of multiple first devices.

[0116] For example, taking the first circuit diagram as an example Figure 3The circuit diagram in the diagram is used as an example. The electrical parameters of the first circuit diagram include the DC gain of the operational amplifier, the unity-gain bandwidth product, the load capacitance, and the coupling capacitor. The first circuit diagram specifically includes MOS devices M1 to M8, coupling capacitor Cc, bias voltage and current source Ibias, and load capacitor CL. After decomposing the electrical parameters of the first circuit diagram, the DC gain of the operational amplifier and the unity-gain bandwidth product of the MOS device M1 can be obtained. Similarly, the DC gain of the operational amplifier and the unity-gain bandwidth product of the MOS device M2 can also be obtained. Likewise, the DC gain of the operational amplifiers of MOS devices M3 to M8 and the unity-gain bandwidth product of the MOS devices M3 to M8 can be obtained. Furthermore, the load capacitance of the load capacitor CL and the coupling capacitor of the coupling capacitor Cc can also be obtained. The foregoing examples are for illustrative purposes only and should not be construed as limiting the scope of this solution.

[0117] Specifically, after inputting the electrical parameters of the first circuit diagram, the designer can call system design function components and circuit design function components from the function component library. Specifically, the system design function components are instantiated, and the electrical parameters of the first circuit diagram are decomposed using the system design function components to obtain the electrical parameters of multiple first devices. This reflects the electrical parameters of each first device in the first circuit diagram. Thus, the process parameters of the first devices in the first circuit diagram can be reflected in different function components. Then, the process parameters of the first devices are transmitted to the system design function components called from the component library through wiring to become actual instantiated functional modules. This decouples the first circuit diagram from the actual process parameters.

[0118] To facilitate understanding, we will first introduce the functional components in the functional component library that are involved in the design process. Please refer to [link / reference]. Figure 6 , Figure 6 This is a schematic diagram of one embodiment of a functional component in the functional component library of this application, as shown below. Figure 6 As shown, the functional component library 301 includes system design functional components 302, circuit design functional components 303, circuit simulation functional components 304, basic process functional components 305, and observation and positioning functional components 306. It should be understood that other functional components exist in practical applications, and therefore should not be construed as limiting the embodiments of this application.

[0119] based on Figure 3 The first circuit diagram shown and Figure 6The example of the functional component library shown is introduced below; please refer to [link / reference]. Figure 7 , Figure 7 This is a flowchart illustrating the process of obtaining the electrical parameter indices of multiple first devices by decomposing the electrical parameters of the first circuit diagram in an embodiment of this application. Figure 7 As shown, the system design functional component 702 in the functional component library 701 contains some fixed formulas and parameter settings. These fixed formulas and parameter settings come from textbooks or are derived from the experience of designers, and designers are also allowed to customize them. For example, the formula for the DC gain of a single-stage operational amplifier is as follows:

[0120] A V =G M *R0;(1)

[0121] Among them, A V For DC gain, G M R is the conductance, and R0 is the resistance.

[0122] Secondly, the formula for the unity-gain bandwidth product of a single-stage operational amplifier is as follows:

[0123]

[0124] Where GBW is the unity-gain bandwidth product, gm is the transconductance, and p i For electrical power, C C The capacitance of the coupling capacitor device.

[0125] It should be understood that the aforementioned formulas are only used to introduce the fixed formulas, and the specific formulas inside the system design functional component 702 are not limited here.

[0126] Based on this, by inputting the electrical parameters of the first circuit diagram into the system design functional component, the system design functional component can calculate and output the electrical parameters of multiple first devices based on the connection relationship between multiple first devices and the device characteristics of each first device, and based on the internal fixed formulas and parameter settings.

[0127] For example, if the electrical parameters of the first circuit diagram include the DC gain of the operational amplifier, the unity-gain bandwidth product, the load capacitance, and the coupling capacitor of the first circuit diagram, based on... Figure 3The first circuit diagram shown is shown. The system design functional component 702 can decompose the DC gain index of the operational amplifier of the first circuit diagram into the DC gain index of the operational amplifiers of MOS devices M1 to M8 based on the connection relationship between multiple first devices and the device characteristics of each first device, and decompose the unity gain bandwidth product index of the first circuit diagram into the unity gain bandwidth product index of MOS devices M1 to M8 based on the connection relationship between multiple first devices and the device characteristics of each first device, and decompose the unity gain bandwidth product index of the first circuit diagram into the unity gain bandwidth product index of MOS devices M1 to M8 based on the connection relationship between multiple first devices and the device characteristics of each first device.

[0128] Similarly, it can be seen that the load capacitance of the load capacitor CL and the coupling capacitor of the coupling capacitor Cc can also be obtained through other formulas (not shown). It should be understood that... Figure 7 The example is only used to introduce the electrical parameters of multiple first devices. In practical applications, it is necessary to decompose the parameters according to the electrical parameters of the specific first circuit diagram and the first circuit diagram. Therefore, it should not be construed as a limitation of the embodiments of this application.

[0129] 204. Based on the electrical parameters of multiple first devices, the connection relationships between multiple first devices, and the device characteristics of each first device, multiple second parameters are determined.

[0130] In this embodiment, since the first circuit diagram also includes the connection relationships between multiple first devices, and each first device includes device characteristics, multiple second parameters can be determined based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device. Specifically, multiple second parameters are determined by formula and simulation decision based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device; alternatively, multiple second parameters are determined by device feature library lookup tables based on the electrical parameters of the multiple first devices, the connection relationships between the multiple first devices, and the device characteristics of each first device. Furthermore, each second parameter corresponds one-to-one with a first parameter.

[0131] For ease of understanding, based on Figures 3 to 7 For an example, please refer to [link / reference]. Figure 8 , Figure 8 This is a flowchart illustrating the determination of the second parameter in an embodiment of this application, as shown below. Figure 8As shown, by inputting the electrical parameters of the first circuit diagram into the system design functional component, the system design functional component can calculate and output the DC gain of the operational amplifiers of MOS devices M1 to M8, the unity gain bandwidth product of MOS devices M1 to M8, the load capacitance of the load capacitor CL, and the coupling capacitor of the coupling capacitor Cc through the connection relationship between the first devices and the device characteristics of each first device.

[0132] Based on this, the designers invoke the system design function component. This component calculates the output transconductance value A based on the input noise index in the electrical parameters of the first circuit diagram, and specifies that the output transconductance value A corresponds to... Figure 3 The transconductance values ​​of MOS device M1 and MOS device M2 can be used to... Figure 3 The first circuit diagram shown generates an association. Then, the system design functional components calculate the output capacitance value A based on the obtained transconductance value A and the calculated unity-gain bandwidth product, and specify that the output capacitance value A corresponds to... Figure 3 The capacitance value of the intermediate coupling capacitor Cc is used by the system design functional components to calculate the first-stage output impedance based on the first-stage gain and transconductance value A, and the corresponding value of the obtained first-stage output impedance is specified. Figure 3 MOS devices M2 and M4.

[0133] Furthermore, the circuit design functional components, based on the transconductance value A output by the noise module, the proportion of the first-stage current allocation, and the output impedance of the first circuit diagram, calculate the length value in the process parameters of MOS devices M1 and M2 by calling the device characteristic lookup table. Then, they continue to call the circuit design functional components in the component library to determine the width value in the process parameters of MOS devices M1 and M2 based on the transconductance value A output by the noise module and the obtained L value, thereby obtaining the second parameters of MOS devices M1 and M2. Similarly, the second parameters of other MOS devices M3 to M8 can be calculated in a similar way, which will not be elaborated here.

[0134] 205. Use the process design toolkit (PDK) to replace each first component in the first circuit diagram to obtain the third circuit.

[0135] In this embodiment, a process design toolkit (PDK) including multiple device models is first obtained. Then, the process PDK is called to replace each first device in the first circuit diagram to obtain a third circuit. At this time, the third circuit includes multiple third devices, which are the devices after the first devices have been replaced by device models in the process PDK, and the process parameters of the third devices are the second parameters determined in step 204. Specifically, since the process PDK includes multiple device models with different process parameters, based on the second parameters determined in step 204, a device model with the second parameter is searched in the process PDK, and the corresponding first device is replaced by this device model. At this time, a third circuit with the second parameter can be obtained.

[0136] 206. Simulate each third device in the third circuit to obtain multiple circuit simulation results of the first circuit diagram.

[0137] In this embodiment, each third device in the third circuit is simulated to obtain multiple circuit simulation results of the first circuit diagram. These multiple circuit simulation results represent the electrical parameters obtained after simulating each first device in the first circuit diagram. Specifically, each third device in the third circuit needs to be simulated using a circuit simulation functional component. The circuit simulation functional component performs at least two types of simulations, with different types used to obtain different circuit simulation results. It should be understood that the simulation types in this embodiment include, but are not limited to, AC simulation, TRAN simulation, and DC simulation. Optionally, the simulation behavior can also be evaluated using the nonlinear distortion value obtained from the THD simulation. The THD value is specifically calculated based on the simulation type, simulation excitation, and the obtained simulation results.

[0138] Furthermore, after obtaining multiple circuit simulation results of the first circuit diagram, it is necessary to determine whether the multiple circuit simulation results of the first circuit diagram meet the specifications of the electrical parameters of multiple first devices. If they meet the specifications, step 207 is executed; otherwise, step 208 is executed.

[0139] For ease of understanding, based on Figures 3 to 8 Examples are provided, and the method of performing AC simulation and evaluating AC simulation using nonlinear distortion values ​​obtained from THD simulation is introduced. Please refer to [link to relevant documentation]. Figure 9 , Figure 9 This is a flowchart illustrating multiple circuit simulation results obtained from the first circuit diagram in an embodiment of this application, such as... Figure 9 As shown, in Figure 8After determining multiple second parameters, the simulation iteration process will begin. The simulation iteration process will be carried out by calling the circuit simulation function component in the function component library. Since step 202 can obtain the electrical parameter index of the first circuit diagram, and the electrical parameter index of multiple first devices can be obtained by decomposing the electrical parameter index of the first circuit diagram through the system design function component.

[0140] Based on this, designers set the electrical parameters of the first circuit diagram in the circuit simulation function component, including the DC gain of the operational amplifier, the unity-gain bandwidth product, the load capacitance, and the coupling capacitors. Users call the basic process function component, which judges the results based on the simulation output of the circuit simulation function component and the electrical parameters of the multiple first devices obtained from the system design function component. Secondly, THD simulation can be used to verify the harmonic distortion performance of the first circuit diagram. The simulation results (i.e., the obtained THD values) after THD simulation also need to be judged against the electrical parameters (i.e., the THD values) of the multiple first devices obtained from the system design function component, thereby determining whether the multiple circuit simulation results of the first circuit diagram meet the electrical parameter specifications of the multiple first devices.

[0141] 207. Determine that the simulation results of multiple circuits in the first circuit diagram meet the specifications of the electrical parameters of multiple first devices, and output the second circuit diagram constructed by multiple second devices.

[0142] In this embodiment, when the simulation results of multiple circuits in the first circuit diagram meet the specifications of the electrical parameters of multiple first devices, a second circuit diagram constructed by multiple second devices can be output. At this time, the second devices include the second parameters determined in step 204. Optionally, in practical applications, a result display interface can also be provided to display the second circuit diagram and the obtained multiple circuit simulation results.

[0143] Specifically, the second circuit diagram also includes the connection relationships between multiple second devices, and each second device includes device characteristics. It should be understood that the connection relationships between the multiple second devices in the resulting second circuit diagram are the same as the connection relationships between the multiple first devices in the first circuit diagram; that is, the topology formed by connecting the ports of the multiple second devices with wires is the same as the topology formed by connecting the ports of the multiple first devices with wires. Secondly, because device characteristics are specific device attributes, the device characteristics also change when the first parameter is replaced with the second parameter. Therefore, the device characteristics of the second device are different from the device characteristics of the first device.

[0144] 208. Determine that multiple circuit simulation results of the first circuit diagram do not meet the specifications of the electrical parameters of multiple first devices, and redetermine multiple second parameters.

[0145] In this embodiment, when the simulation results of multiple circuits in the first circuit diagram do not meet the specifications of the electrical parameters of multiple first devices, multiple second parameters will be re-determined, that is, step 204 will be re-executed.

[0146] To facilitate understanding of steps 207 and 208, based on Figure 9 For an example, please refer to [link / reference]. Figure 10 , Figure 10 This is a schematic flowchart of the circuit design in an embodiment of this application, such as... Figure 10 As shown, when the circuit simulation results output by the AC simulation meet the electrical parameter specifications of multiple first devices, and the circuit simulation results output by the THD simulation also meet the electrical parameter specifications of multiple first devices, a second circuit diagram constructed from multiple second devices is output. Secondly, when the circuit simulation results output by the AC simulation do not meet the electrical parameter specifications of multiple first devices, the system design functional components are connected to trigger subsequent processes in the system design functional components to adjust the second parameters until the output simulation results meet the electrical parameter specifications of multiple first devices.

[0147] Secondly, when the circuit simulation results output by THD simulation do not meet the specifications of the electrical parameters of multiple first devices, it will trigger the adjustment of the first-stage gain and the length value in the second parameter of MOS device M6 until the output meets the specifications of the electrical parameters of multiple first devices. That is, when all the circuit simulation results output by simulation meet the specifications of the electrical parameters of the first devices, the entire design process ends and the second circuit diagram constructed by multiple second devices is output.

[0148] In one possible implementation, the circuit design software framework can convert the design flowchart described in the foregoing embodiments into specific calculation operation programs according to the corresponding functional components and relationships. It can also load external input databases such as standard libraries, device feature libraries, specific process PDKs, simulation model files, and simulation stimuli. The software background executes program actions and calls various circuit simulators to perform corresponding simulation actions and extract simulation results. It executes all process actions according to the process logic and outputs the final circuit diagram (second circuit diagram) based on the actual process and an evaluation report based on SPICE simulation results.

[0149] In one possible implementation, the functional component library can provide functional components with an available flow editing interface and software code for the corresponding function of each functional component, and provide the ability to specify the device parameters corresponding to the first circuit diagram.

[0150] pass Figure 2 as well as Figure 2 As can be seen from the corresponding embodiments, when the designer inputs the first circuit diagram and its electrical parameters, they manually trigger the EDA software to execute the design process according to the design flowchart. First, the design flowchart is converted into actual running program code. Then, based on the functional components in the functional component library, the process parameters of each first device in the first circuit diagram are calculated and processed. The process PDK is then called to replace the device model of the first device in the first circuit diagram to obtain the third circuit. Next, the simulator is called to perform SPICE simulation on the third circuit to obtain simulation results. Based on the simulation results, the process parameters of the devices are judged and adjusted. Finally, the final circuit diagram is output after the design process is completed, and a simulation report can also be output. The entire process is completed automatically. The designer can also add breakpoints and print statements in the design flowchart to achieve interactive operation. Therefore, when the process of the first circuit diagram changes, the designer does not need to input the electrical parameters of the first circuit diagram again. Thus, the second circuit diagram can still be output based on the electrical parameters of the first circuit diagram, enabling the reuse of the electrical parameters of the first circuit diagram. Secondly, after adjusting the electrical parameters of the first circuit diagram, the designer does not need to specify a new process PDK. Therefore, the second circuit diagram can still be output based on the original process PDK, so as to realize the reuse of the process PDK design and thus improve the efficiency of circuit design.

[0151] In another implementation, the circuit can be broken down into multiple circuit sub-diagrams. Parameter verification and simulation are then performed on each sub-diagram separately. Only when the simulation results of one sub-diagram meet the corresponding circuit specifications is the parameter verification and simulation process for the next sub-diagram initiated. For details, please refer to [link to relevant documentation]. Figure 11 , Figure 11 This is a schematic diagram of another embodiment of the circuit design in this application, as shown below. Figure 11 As shown, another embodiment of the circuit design method is as follows.

[0152] 401. Obtain the first circuit diagram.

[0153] In this embodiment, a first circuit diagram is obtained. The first circuit diagram is constructed based on multiple first devices, and each first device includes a first parameter. The specific method for obtaining the first circuit diagram, the first devices, and the first parameters are similar to those described in step 101, and will not be repeated here.

[0154] 402. Divide the first circuit diagram into multiple circuit sub-diagrams.

[0155] In this embodiment, the first circuit diagram obtained in step 401 is divided into multiple circuit sub-diagrams. Each circuit sub-diagram includes at least one first device, and there is a processing priority among the multiple circuit sub-diagrams, which indicates the order in which the multiple circuit sub-diagrams are simulated. For example, after dividing the first circuit diagram, circuit sub-diagrams A, B, and C are obtained. The processing priority among circuit sub-diagrams A, B, and C is from circuit sub-diagram A to circuit sub-diagram C to circuit sub-diagram B. Therefore, in the subsequent parameter confirmation process, the parameters of circuit sub-diagram A should be confirmed first. And if the simulation result of circuit sub-diagram A meets the circuit specifications of circuit sub-diagram A, then the parameter confirmation and simulation of circuit sub-diagram C will be performed. And if the simulation result of circuit sub-diagram C meets the circuit specifications of circuit sub-diagram C, then the parameter confirmation and simulation of circuit sub-diagram B will be performed. This is the processing priority among each circuit sub-diagram.

[0156] For ease of understanding, Figure 3 The first circuit diagram presented is for illustrative purposes only; please refer to [link / reference]. Figure 12 , Figure 12 This is a schematic diagram of an embodiment of the present application in which a first circuit diagram is divided into multiple circuit sub-diagrams, as shown below. Figure 12 As shown, after decomposing the first circuit diagram 500, circuit sub-diagrams 501, 502, 503, 504, and 505 can be obtained. The processing priority among these circuit sub-diagrams is: circuit sub-diagram 501, circuit sub-diagram 502, circuit sub-diagram 503, circuit sub-diagram 504, and circuit sub-diagram 505. It should be understood that... Figure 12 The circuit sub-diagrams shown in the examples and the processing priorities among multiple circuit sub-diagrams are determined based on the first circuit diagram and circuit design requirements, and should not be construed as limitations of this solution.

[0157] Specifically, each sub-diagram includes the connection relationships between multiple first devices, and each first device includes device characteristics. The connection relationships between the multiple first devices are the topological relationships formed by connecting the ports of the multiple first devices with wires, and the device characteristics of the first devices are the device attributes of the first devices. At this time, the connection relationships between the multiple first devices included in each sub-diagram are the same as the connection relationships between the multiple first devices included in the first circuit diagram, and since the parameters of the first devices are not adjusted, the device characteristics of the first devices included in each sub-diagram are also the same as the device characteristics of the first devices included in the first circuit diagram.

[0158] 403. Obtain the electrical parameters of the first circuit diagram.

[0159] In this embodiment, the method of obtaining the electrical parameters of the first circuit diagram and the method of obtaining the electrical parameters of the first circuit diagram are similar to those described in step 102, and will not be repeated here.

[0160] 404. Obtain the constraints and optimization objectives for each circuit subgraph.

[0161] In this embodiment, it is also necessary to obtain the constraints of each circuit sub-graph and the optimization target of each circuit sub-graph. The constraints are the variation range of the electrical parameters of the first device contained in the circuit sub-graph, and the optimization target is the target value of the electrical parameters of the circuit sub-graph.

[0162] Specifically, the constraints of each circuit sub-diagram include, but are not limited to, the percentage contribution of the first device in the circuit sub-diagram to noise, and the allocation of the first-stage gain and the second-stage gain in the circuit sub-diagram. Secondly, the optimization objectives of each circuit sub-diagram include, but are not limited to, optimal area, optimal power consumption, and optimal quality factor. These specific constraints need to be determined by the designer based on the first device included in each sub-diagram; therefore, the constraints and optimization objectives of each circuit sub-diagram are not specifically defined. For ease of understanding, let's use... Figure 12 The circuit sub-diagram 502 shown is illustrated as an example. The constraints of circuit sub-diagram 502 include that MOS device M5 contributes 50% to the noise, MOS device M8 contributes 20% to the noise, and MOS device M7 contributes 30% to the noise. Furthermore, the optimization target of circuit sub-diagram 502 includes that the combined power consumption of MOS devices M5, M8, and M7 accounts for 20% of the total operating power consumption of the first circuit diagram. It should be understood that the foregoing example is only for understanding this scheme; specific constraints and optimization targets need to be determined based on the first devices included in each circuit sub-diagram and the overall requirements of the first circuit diagram.

[0163] 405. Based on the constraints of each subgraph and the optimization objectives of each circuit subgraph, the electrical parameters of the first circuit diagram are decomposed to obtain the electrical parameters of multiple first devices.

[0164] In this embodiment, the electrical parameters of the first circuit diagram are decomposed based on the constraints of each sub-diagram and the tuning objectives of each circuit sub-diagram to obtain the electrical parameters of multiple first devices.

[0165] Specifically, after inputting the electrical parameters of the first circuit diagram, the designer can input the constraints and optimization targets of each circuit sub-diagram. They can then call system design functional components and circuit design functional components from the functional component library. Specifically, the system design functional components are instantiated, and the electrical parameters of the first circuit diagram are decomposed using these components to obtain the electrical parameters of multiple first devices. This reflects the electrical parameters of each first device in the first circuit diagram. This allows for the manipulation of the process parameters of the first devices in the first circuit diagram through different functional components. Then, the process parameters of the first devices are transmitted via connections to the system design functional components retrieved from the component library, becoming actual instantiated functional modules. This decouples the first circuit diagram from the actual process parameters.

[0166] Based on this, the design flowcharts described above are all design flowcharts of the first circuit diagram. Since the first circuit diagram is divided into multiple circuit sub-diagrams in this embodiment, the specific steps of the design flowchart of the first circuit diagram can be broken down into the flowchart of each circuit sub-diagram based on the multiple circuit sub-diagrams obtained from the split. Based on this, the overall first circuit diagram is designed using the design flowchart of the first circuit diagram. Then, the flowchart of each circuit sub-diagram is executed according to the processing priority. Based on whether the simulation results of the circuit sub-diagram meet the specifications of the electrical parameters of the first device in the circuit sub-diagram, it is determined whether to adjust the circuit specifications of the first device in the circuit sub-diagram, or to call the subsequent circuit sub-diagrams to complete the simulation based on the processing priority. The flowchart of each circuit sub-diagram is used to perform simulation on the circuit sub-diagram separately.

[0167] For ease of understanding, based on Figure 12 The multiple circuit sub-diagrams shown illustrate the design flowchart of the first circuit diagram. Please refer to [link / reference]. Figure 13 , Figure 13 This is a schematic diagram of one embodiment of the design flowchart of the first circuit diagram in this application, such as... Figure 13 As shown, circuit sub-diagram-1 is Figure 12 Circuit sub-diagram 501 and circuit sub-diagram -2 are shown in the figure. Figure 12 Circuit sub-diagram 502 and circuit sub-diagram -3 are shown in the figure. Figure 12 Circuit sub-diagram 503 and circuit sub-diagram -4 are shown in the figure. Figure 12 Circuit sub-diagrams 504 and -5 are... Figure 12 The circuit sub-diagram is 505. Based on this, the design flowchart for circuit sub-diagram-1 needs to be completed first, and so on, to complete the design flowcharts for circuit sub-diagrams-2 to-4. Figure 3 The connection relationship of the first circuit diagram shown and Figure 12The connection relationship of the multiple circuit sub-diagrams shown.

[0168] Furthermore, after completing the design flowchart connections for circuit sub-diagrams 1 to 4, it is necessary to determine whether the output stage gain is satisfied. It should be understood that this determination is based on... Figure 3 The connection relationship of the first circuit diagram shown and Figure 12 The judgment process added to the connection relationship of the multiple circuit sub-diagrams shown may have other judgment conditions or no judgment conditions for different first circuit diagrams in practical applications. Therefore, this should not be interpreted as a limitation of this scheme. Based on this, when the output stage gain is satisfied, the design flowchart of circuit sub-diagram-5 is completed, and the second circuit diagram is output after completing the design flowchart of circuit sub-diagram-5. However, when the output stage gain is not satisfied, it is necessary to adjust the electrical parameters of the first device in each circuit sub-diagram and repeat the aforementioned steps until the constraints are met. It should be understood that... Figure 12 The provided information is for understanding this solution only and should not be construed as limiting the solution.

[0169] Furthermore, the following is based on Figure 12 The multiple circuit sub-diagrams shown introduce the electrical parameters of the first device in circuit sub-diagram-1 and the electrical parameters of the first device in circuit sub-diagram-5. As can be seen from the aforementioned embodiments, the system design functional components contain some fixed formulas and parameter settings. These fixed formulas and parameter settings come from textbooks or are derived from the experience of designers, and designers are also allowed to customize them. Therefore, when decomposing the indicators, the system design functional components will decompose the indicators of the first circuit diagram by using the constraints of each sub-diagram and the optimization goals of each circuit sub-diagram, and by calling the fixed formulas and parameter settings.

[0170] For example, regarding the electrical parameter specifications of the first device in circuit sub-diagram-1, it is necessary to decompose the electrical parameter specifications of the first circuit diagram based on a fixed formula (not shown above) and the constraints and tuning objectives of circuit sub-diagram-1 to obtain the electrical parameter specifications of the first device in circuit sub-diagram-1. For example, the constraints of circuit sub-diagram-1 include the effective ratio of the effect, while the tuning objectives of circuit sub-diagram-1 include the output stage gain. Figure 12 The circuit sub-diagram 501 includes the MOS device M6, the load capacitor CL, and the module's external port Vout. Based on the constraints and optimization objectives of the circuit sub-diagram-1, the electrical parameters of the first circuit diagram are decomposed to obtain the electrical parameters of the first device in the circuit sub-diagram-1.

[0171] For example, the electrical parameters of the first device in circuit sub-diagram-1 are the output swing amplitude (i.e., the electrical parameters of the module's external port Vout), the phase margin (i.e., the electrical parameters of the MOS device M6), and the load capacitance (i.e., the electrical parameters of the load capacitor CL).

[0172] Secondly, the constraints of circuit sub-diagram -5 include the initial capacitance, which is specifically the value obtained by dividing the transconductance of the MOS device M1 by the product of its gain and bandwidth. The tuning objectives of circuit sub-diagram -5 include the output stage gain. Figure 12 The circuit sub-diagram 505 includes a coupling capacitor Cc. Using a fixed formula (not shown above) and based on the constraints and tuning objectives of circuit sub-diagram 5, the electrical parameters of the first circuit diagram are decomposed to obtain the electrical parameter indices of the first device in circuit sub-diagram 5. For example, the electrical parameter indices of the first device in circuit sub-diagram 5 are the output swing amplitude and the gain-bandwidth product (i.e., the electrical parameter indices of the coupling capacitor). It should be understood that the foregoing example is not intended to explain this solution; specific indices need to be flexibly determined and decomposed according to the actual situation.

[0173] 406. Based on the electrical parameters of multiple first devices, the connection relationships between multiple first devices, and the device characteristics of each first device, determine the second parameter in each circuit sub-diagram.

[0174] In this embodiment, each sub-graph also includes the connection relationships between multiple first devices, and each first device includes device characteristics. Based on the electrical parameter indices of the first devices obtained in step 405, the connection relationships between multiple first devices, and the device characteristics of each first device, the second parameter in each circuit sub-graph can be determined.

[0175] Specifically, multiple second parameters are determined based on the electrical parameters of multiple first devices, the connection relationships between multiple first devices, and the device characteristics of each first device through formulas and simulation decisions. Alternatively, multiple second parameters are determined based on the electrical parameters of multiple first devices, the connection relationships between multiple first devices, and the device characteristics of each first device through a device feature library lookup table. The method for determining the second parameters in each circuit sub-diagram is similar to that for determining the second parameters in the first circuit diagram in step 404, and will not be repeated here.

[0176] 407. Determine the first circuit sub-diagram and the second circuit sub-diagram from multiple circuit sub-diagrams based on processing priority.

[0177] In this embodiment, a first circuit sub-graph and a second circuit sub-graph are determined from multiple circuit sub-graphs based on the processing priority among them. The simulation order of the first circuit sub-graph precedes the simulation order of the second circuit sub-graph, and the second circuit sub-graph is the last circuit sub-graph to be simulated according to the processing priority indicator. For example, based on Figure 12 The multiple circuit sub-diagrams shown are as follows: the second circuit sub-diagram is circuit sub-diagram 505, while the first circuit sub-diagram can be any one of circuit sub-diagrams 501, 502, 503, and 504, as long as the simulation order of the first circuit sub-diagram is guaranteed to be before the simulation order of the second circuit sub-diagram. There is no limitation here.

[0178] Therefore, it can be seen that the second parameter in each circuit sub-diagram in step 406 includes the second parameter of the first circuit sub-diagram and the second parameter of the second circuit sub-diagram.

[0179] 408. Use the process design toolkit (PDK) to replace each first device in the first circuit sub-diagram to obtain the third circuit sub-diagram.

[0180] In this embodiment, a process design toolkit (PDK) including multiple device models is first obtained. Then, the process PDK is called to replace each first device in the first circuit sub-diagram to obtain a third circuit sub-diagram. At this time, the third circuit sub-diagram includes multiple third devices, which are devices after the first devices have been replaced by device models in the process PDK. The process parameters of the third devices are the second parameters of the first circuit sub-diagram determined in step 406. Specifically, since the process PDK includes multiple device models with different process parameters, based on the second parameters of each circuit sub-diagram determined in step 406, a device model with the second process parameter is searched in the process PDK, and the corresponding first device is replaced by this device model. At this time, a third circuit sub-diagram with the second device parameter can be obtained.

[0181] 409. Simulate each third device in the third circuit sub-diagram to obtain multiple circuit simulation results for the first circuit sub-diagram.

[0182] In this embodiment, each third device in the third circuit sub-diagram is simulated to obtain multiple circuit simulation results for the first circuit sub-diagram. These multiple simulation results are the electrical parameters obtained after simulating each third device in the third circuit sub-diagram. Specifically, each third device in the third circuit sub-diagram needs to be simulated using a circuit simulation functional component. The circuit simulation functional component performs at least two types of simulations, with different types used to obtain different circuit simulation results. It should be understood that the simulation types in this embodiment include, but are not limited to, AC simulation, TRAN simulation, and DC simulation. Optionally, the simulation behavior can also be evaluated using the nonlinear distortion value obtained from the THD simulation. The THD value is specifically calculated based on the simulation type, simulation excitation, and the obtained simulation results.

[0183] Furthermore, after obtaining multiple circuit simulation results of the first circuit sub-diagram, it is necessary to determine whether the multiple circuit simulation results of the first circuit sub-diagram meet the electrical parameter indicators of the multiple first devices in the first circuit sub-diagram. If they meet the requirements, step 410 is executed; otherwise, step 411 is executed.

[0184] For ease of understanding, the following is based on Figure 12 The following describes in detail the simulation process for circuit sub-diagram-1, including the multiple circuit sub-diagrams shown and the specifications of the electrical parameters of the first device in circuit sub-diagram-1 as exemplified in step 405. Please refer to [link / reference]. Figure 14 , Figure 14 This is a schematic diagram of an embodiment of the circuit sub-diagram design in this application, such as... Figure 14 As shown in the flowchart corresponding to circuit sub-diagram-1, since circuit sub-diagram-1 includes MOS device M6, and the electrical parameters of the first device in circuit sub-diagram-1 are the output swing amplitude, phase margin, and load capacitance, the constraints of circuit sub-diagram-1 can also be obtained as output stage gain and effective ratio. Based on designer experience, the MOS device M6 first needs to be determined to operate in the saturation region. Combining numerical calculations and device characteristic lookup tables, the gate voltage range for MOS device M6 operating in the saturation region can be obtained. First, a multi-point scan of the gate voltage range is performed, and during the scan, the transconductance and output impedance of MOS device M6 are determined according to the device characteristic lookup table. Then, the actual output stage gain is calculated, and finally, it is determined whether the actual output stage gain meets the output stage gain constraints.

[0185] Therefore, when the actual output stage gain does not meet the output stage gain constraints, it is necessary to adjust the process parameters of MOS device M6, such as the channel length (L) or channel width (W) of MOS device M6. Based on the adjusted process parameters of MOS device M6, the transconductance and output impedance of MOS device M6 are determined again, and the actual output stage gain is calculated. When the actual output stage gain meets the output stage gain constraints, the transconductance and output impedance that meet the constraints are saved. Since a multi-point scan of the gate voltage range is required, after completing the multi-point scan of the gate voltage range, the calculated values ​​of the multiple saved transconductances and output impedances are selected to obtain the minimum power consumption values ​​as the target transconductance and target output impedance. Based on this, after determining the target transconductance and target output impedance, each third device in the third circuit sub-diagram is simulated to obtain multiple circuit simulation results of the first circuit sub-diagram. This allows it to determine whether the multiple circuit simulation results of the first circuit sub-diagram meet the electrical parameter specifications of the multiple first devices in the first circuit sub-diagram.

[0186] 410. Determine that the simulation results of multiple circuits in the first circuit sub-diagram meet the specifications of the electrical parameters of multiple first devices in the first circuit sub-diagram, and call the process PDK to replace each first device in the second circuit sub-diagram to obtain the fourth circuit sub-diagram.

[0187] In this embodiment, when the simulation results of multiple circuits in the first circuit sub-diagram meet the electrical parameter specifications of multiple first devices in the first circuit sub-diagram, the process PDK can be called again to replace each first device in the second circuit sub-diagram to obtain the fourth circuit sub-diagram. At this time, the fourth circuit sub-diagram includes multiple third devices, which are devices after the first devices are replaced by device models, and the process parameters of the third devices are the second parameters.

[0188] Specifically, first, a process design toolkit (PDK) containing multiple device models is obtained. Then, the process PDK is called to replace each second device in the second circuit sub-diagram to obtain a fourth circuit sub-diagram. At this time, the fourth circuit sub-diagram includes multiple third devices. The third devices are the devices after the second devices have been replaced by device models in the process PDK, and the process parameters of the third devices are the second parameters of the second circuit sub-diagram determined in step 406. Specifically, since the process PDK includes multiple device models with different process parameters, based on the second parameters corresponding to the second parameters in each circuit sub-diagram determined in step 406, the device model with the second parameter is searched in the process PDK, and the corresponding second device is replaced by the device model, thus obtaining a fourth circuit sub-diagram with the second parameter.

[0189] 411. Determine that the simulation results of multiple circuits in the first circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices in the first circuit sub-diagram, and redetermine the second parameters of the first circuit sub-diagram.

[0190] In this embodiment, when it is determined that the simulation results of multiple circuits of the first circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices of the first circuit sub-diagram, the second parameters of the first circuit sub-diagram will be re-determined, that is, the second parameters of the first circuit sub-diagram in step 406 will be re-executed. It should be understood that at this time, it is not necessary to re-determine the second parameters of other circuit sub-diagrams.

[0191] 412. Simulate each third device in the fourth circuit sub-diagram to obtain multiple circuit simulation results for the second circuit sub-diagram.

[0192] In this embodiment, each third device in the fourth circuit sub-diagram is simulated to obtain multiple circuit simulation results for the second circuit sub-diagram. These multiple simulation results for the second circuit sub-diagram are the electrical parameters obtained after simulating each third device in the fourth circuit sub-diagram. Specifically, each third device in the fourth circuit sub-diagram needs to be simulated using a circuit simulation functional component. The circuit simulation functional component performs at least two types of simulations, with different types used to obtain different circuit simulation results. It should be understood that the simulation types in this embodiment include, but are not limited to, AC simulation, TRAN simulation, and DC simulation.

[0193] Furthermore, after obtaining multiple circuit simulation results of the second circuit sub-diagram, it is necessary to determine whether the multiple circuit simulation results of the second circuit sub-diagram meet the specifications of the electrical parameters of the multiple first devices in the second circuit sub-diagram. If they meet the specifications, step 413 is executed; otherwise, step 414 is executed.

[0194] For ease of understanding, the following is based on Figure 12 The following describes in detail the simulation process for circuit sub-diagram -5, including the multiple circuit sub-diagrams shown and the specifications of the electrical parameters of the first device in circuit sub-diagram -5 as exemplified in step 405. Please refer to [link / reference]. Figure 15 , Figure 15 This is a schematic diagram of another embodiment of the circuit sub-diagram design in this application, such as... Figure 15As shown, in the flowchart corresponding to circuit sub-diagram-5, since circuit sub-diagram-1 includes capacitor Cc, and the electrical parameters of the first device in circuit sub-diagram-5 are the output swing amplitude and the gain-bandwidth product, the constraint condition of circuit sub-diagram-5 is the initial capacitor. Based on the initial capacitor, it is necessary to perform a traversal of the initial capacitor from 0.5x to 2x, and combine it with the SPICE netting generated in the first circuit diagram for simulation. The simulation results of multiple circuits in the second circuit sub-diagram corresponding to the initial capacitor at different multiplication factors can be used to determine whether the simulation results of multiple circuits in the second circuit sub-diagram meet the electrical parameter specifications of multiple first devices in the second circuit sub-diagram.

[0195] 413. Determine that the simulation results of multiple circuits in the second circuit sub-diagram satisfy the electrical parameter specifications of multiple first devices in the second circuit sub-diagram, and output the second circuit diagram based on the second parameters.

[0196] In this embodiment, when the simulation results of multiple circuits in the second circuit sub-diagram meet the electrical parameter specifications of multiple first devices in the second circuit sub-diagram, the second circuit diagram will be output based on the second parameters. At this time, the second circuit diagram includes multiple second devices, and the process parameters of the second devices are the second parameters. Specifically, based on... Figure 15 The example process requires traversing the initial capacitor by 0.5 to 2 times and generating SPICE markers in the first circuit diagram for simulation. Therefore, when the simulation results of multiple circuits of the second circuit sub-diagram corresponding to the initial capacitor at different multiples all meet the gain-bandwidth product index of the electrical parameters of the first device in circuit sub-diagram-5, the capacitor value (second parameter) when the phase margin is at its maximum value will be saved, and the second circuit diagram with the capacitor value of the output capacitor Cc being the second parameter will be saved.

[0197] 414. Determine that the simulation results of multiple circuits in the second circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices in the second circuit sub-diagram, and redetermine the second parameters of the second circuit sub-diagram.

[0198] In this embodiment, when it is determined that the simulation results of multiple circuits of the second circuit sub-diagram do not meet the specifications of the electrical parameters of multiple first devices of the second circuit sub-diagram, the second parameters of the second circuit sub-diagram are re-determined, that is, the second parameters of the second circuit sub-diagram are re-executed in step 406. It should be understood that at this time, it is not necessary to re-determine the second parameters of other circuit sub-diagrams.

[0199] In one possible implementation, the circuit design software framework can convert the design flowchart described in the foregoing embodiments into specific calculation operation programs according to the corresponding functional components and relationships. It can also load external input databases such as standard libraries, device feature libraries, specific process PDKs, simulation model files, and simulation stimuli. The software background executes program actions and calls various circuit simulators to perform corresponding simulation actions and extract simulation results. It executes all process actions according to the process logic and outputs the final circuit diagram (second circuit diagram) based on the actual process and an evaluation report based on SPICE simulation results.

[0200] In one possible implementation, the circuit design functional component library can provide functional components with an available flow editing interface and software code for the corresponding function of each functional component, and provide the ability to specify the device parameters corresponding to the first circuit diagram.

[0201] pass Figure 11 as well as Figure 11 As can be seen from the corresponding embodiments, after the development of the analog circuit based on the model devices in the process PDK is completed, the design flowchart (design flowchart of the first circuit diagram and the flowchart of each circuit sub-diagram) introduced in this embodiment can be called to achieve fully automatic circuit design. When the design process does not change (i.e., the process PDK does not change) but the electrical parameters of the first circuit diagram are adjusted, the designer does not need to modify the first circuit diagram and the design flowchart. He only needs to change the electrical parameters of each circuit sub-diagram in the design flowchart of the first circuit diagram to complete the redesign. Secondly, when the design process changes (i.e., the process PDK changes) but the number of ports of the first device in the first circuit diagram remains unchanged, only the device type in the first circuit diagram needs to be modified. If the number of ports of the device changes, the connection relationship of the first circuit diagram will be modified. At this time, the relevant variable configuration of the device ports in the design flowchart can be used to complete the modification. After the modification is completed, the output of the corresponding second circuit diagram that meets the electrical parameter index of the first circuit diagram is generated to achieve design reuse and thus improve the efficiency of circuit design.

[0202] This application provides a computer program product, which includes a computer program (also referred to as code or instructions) that, when run, causes a computer to perform the method in any of the above method embodiments.

[0203] This application also provides a circuit design apparatus including at least one processor, the at least one processor being configured to execute a computer program stored in a memory, such that the circuit design apparatus performs the method in any of the above method embodiments.

[0204] It should be understood that the circuit design device described above can be one or more chips. For example, the circuit design device can be a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), or other integrated chips.

[0205] This application also provides a circuit design device, including a processor and a communication interface. The communication interface is coupled to the processor. The communication interface is used for inputting and / or outputting information. The information includes at least one of instructions and data. The processor is used to execute a computer program to cause the circuit design device to perform the methods in any of the above method embodiments. It should be understood that the communication interface can be implemented by the same hardware logic or by different hardware logic; for example, a hardware interface may have only input or output functions, or a hardware interface may have both input and output functions simultaneously.

[0206] This application also provides a circuit design device, including a processor and a memory. The memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that the circuit design device performs the method in any of the above method embodiments.

[0207] In implementation, each step of the above method can be completed by integrated logic circuits in the processor's hardware or by instructions in software. The steps of the method disclosed in the embodiments of this application can be directly implemented by a hardware processor, or by a combination of hardware and software modules in the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, detailed descriptions are omitted here.

[0208] It should be noted that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0209] It is understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0210] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute... Figure 3 as well as Figure 11 The methods performed by each unit in the illustrated embodiment.

[0211] According to the method provided in the embodiments of this application, this application also provides a computer-readable storage medium storing program code, which, when executed on a computer, causes the computer to perform... Figure 3 as well as Figure 11 The methods performed by each unit in the illustrated embodiment.

[0212] The modules and units in the above-described device embodiments and method embodiments correspond completely, with each module or unit executing a specific step. For example, the communication unit (transceiver) executes the receiving or sending steps in the method embodiment, while other steps besides sending and receiving can be executed by the processing unit (processor). The specific functions of each unit can be found in the corresponding method embodiments. There can be one or more processors.

[0213] As used in this specification, the terms "component," "module," "system," etc., are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0214] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0215] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0216] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0217] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0218] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0219] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0220] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method of circuit design, characterized by, The method comprises the following steps: obtaining a first circuit diagram, wherein the first circuit diagram is constructed based on a plurality of first devices, each first device comprising a first parameter, the first parameter being a parameter used under a plurality of processes and being normalized in name; obtaining indicators of electrical parameters of the plurality of first devices based on the first circuit diagram; determining a plurality of second parameters according to the indicators of electrical parameters of the plurality of first devices, wherein the second parameters are parameters included in a process design kit (PDK), the electrical parameters of the first circuit diagram do not need to be adjusted when the PDK changes, and the second parameters correspond to the first parameters one by one; replacing the first parameters included in the first devices with the second parameters to obtain second devices, wherein the second devices comprise the second parameters; outputting a second circuit diagram constructed based on the plurality of second devices.

2. The method of claim 1, wherein, The first circuit diagram comprises connection relationships between the plurality of first devices, and each first device comprises device characteristics, the connection relationships between the plurality of first devices are topological relationships formed after ports of the plurality of first devices are connected by wires, and the device characteristics of the first devices are electrical parameters of the first devices; The method comprises the following steps: obtaining indicators of electrical parameters of the first circuit diagram; decomposing the indicators of electrical parameters of the first circuit diagram based on the connection relationships between the plurality of first devices and the device characteristics of each first device to obtain the indicators of electrical parameters of the plurality of first devices.

3. The method of claim 2, wherein, The method comprises the following steps: determining the plurality of second parameters by means of formula and simulation judgment based on the indicators of electrical parameters of the plurality of first devices, the connection relationships between the plurality of first devices, and the device characteristics of each first device; or, determining the plurality of second parameters by means of a device feature library lookup table based on the indicators of electrical parameters of the plurality of first devices, the connection relationships between the plurality of first devices, and the device characteristics of each first device.

4. The method according to any one of claims 1 to 3, characterized in that, Before the step of replacing the first parameters included in the first devices with the second parameters to obtain second devices, the method further comprises the following steps: simulating the first circuit diagram based on the plurality of second parameters to obtain a plurality of circuit simulation results of the first circuit diagram, wherein the plurality of circuit simulation results of the first circuit diagram are electrical parameters obtained after each first device in the first circuit diagram is simulated; determining that the plurality of circuit simulation results of the first circuit diagram satisfy the indicators of electrical parameters of the plurality of first devices.

5. The method of claim 4, wherein, The method comprises the following steps: obtaining a process design kit (PDK), wherein the process PDK comprises a plurality of device models; The process PDK is called to replace each first device in the first circuit diagram, to obtain a third circuit, wherein the third circuit includes a plurality of third devices, the third devices are devices after the first devices are replaced by device models, and process parameters of the third devices are the second parameters; Each third device in the third circuit is simulated to obtain a plurality of circuit simulation results of the first circuit diagram.

6. The method of claim 1, wherein, The method further includes: The first circuit diagram is divided to obtain a plurality of circuit subgraphs, wherein the circuit subgraphs include at least one first device, and there is a processing priority between the plurality of circuit subgraphs, the processing priority indicating an order of simulation of the plurality of circuit subgraphs.

7. The method of claim 6, wherein, The method further includes: Constraint conditions of each circuit subgraph and tuning targets of each circuit subgraph are obtained, wherein the constraint conditions are a change range of electrical parameters of the first devices included in the circuit subgraph, and the tuning targets are target values of electrical parameters of the circuit subgraph; The method of obtaining the indicators of the electrical parameters of the plurality of first devices based on the first circuit diagram includes: The indicators of the electrical parameters of the first circuit diagram are obtained; The indicators of the electrical parameters of the plurality of first devices are obtained by decomposing the indicators of the electrical parameters of the first circuit diagram based on the constraint conditions of each subgraph and the tuning targets of each circuit subgraph.

8. The method of claim 7, wherein, Each subgraph includes a connection relationship between the plurality of first devices, and each first device includes device characteristics, the connection relationship between the plurality of first devices is a topological relationship formed after ports of the plurality of first devices are connected by wires, and the device characteristics of the first device are electrical parameters of the first device; The method of determining the plurality of second parameters based on the indicators of the electrical parameters of the plurality of first devices includes: The plurality of second parameters are determined by a formula and simulation decision based on the indicators of the electrical parameters of the plurality of first devices, the connection relationship between the plurality of first devices, and the device characteristics of each first device; Or, The plurality of second parameters are determined by a device feature library lookup table based on the indicators of the electrical parameters of the plurality of first devices, the connection relationship between the plurality of first devices, and the device characteristics of each first device.

9. The method according to any one of claims 6 to 8, characterized in that, The plurality of circuit subgraphs include a first circuit subgraph and a second circuit subgraph, a simulation order of the first circuit subgraph is before a simulation order of the second circuit subgraph, and the second circuit subgraph is a last circuit subgraph indicated by the processing priority to be simulated; Before the first parameters included in the first devices are replaced by the second parameters to obtain second devices, the method further includes: The first circuit subgraph and the second circuit subgraph are determined from the plurality of circuit subgraphs according to the processing priority; The first circuit subgraph is simulated based on the plurality of second parameters to obtain a plurality of circuit simulation results of the first circuit subgraph, wherein the plurality of circuit simulation results of the first circuit subgraph are electrical parameters obtained after each first device in the first circuit subgraph is simulated. determine that the plurality of circuit simulation results of the first circuit subgraph satisfy the indicators of the electrical parameters of the plurality of first devices; simulate the second circuit subgraph based on the plurality of second parameters to obtain a plurality of circuit simulation results of the second circuit subgraph, wherein the plurality of circuit simulation results of the second circuit subgraph are electrical parameters obtained after simulation of each first device in the second circuit subgraph; determine that the plurality of circuit simulation results of the second circuit subgraph satisfy the indicators of the electrical parameters of the plurality of first devices.

10. The method of claim 9, wherein, The simulation of the first circuit subgraph based on the plurality of second parameters to obtain a plurality of circuit simulation results of the first circuit subgraph includes: obtaining a process design kit (PDK), wherein the process PDK includes a plurality of device models; calling the process PDK to replace each first device in the first circuit subgraph to obtain a third circuit subgraph, wherein the third circuit subgraph includes a plurality of third devices, the third devices are devices after the first devices are replaced by device models, and process parameters of the third devices are the second parameters; simulating each third device in the third circuit subgraph to obtain a plurality of circuit simulation results of the first circuit subgraph; The simulation of the second circuit subgraph based on the plurality of second parameters to obtain a plurality of circuit simulation results of the second circuit subgraph includes: obtaining a process design kit (PDK), wherein the process PDK includes a plurality of device models; calling the process PDK to replace each first device in the second circuit subgraph to obtain a fourth circuit subgraph, wherein the fourth circuit subgraph includes a plurality of third devices, the third devices are devices after the first devices are replaced by device models, and process parameters of the third devices are the second parameters; simulating each third device in the fourth circuit subgraph to obtain a plurality of circuit simulation results of the second circuit subgraph.

11. The method according to any one of claims 1 to 10, characterized in that, Before the first circuit graph is obtained, the method further includes: providing a circuit input interface to receive a circuit input operation through the circuit input interface; Before the indicators of the electrical parameters of the first circuit graph are obtained, the method further includes: providing a flow editing interface to receive an indicator input operation through the flow editing interface; The method further includes: providing a result display interface to display the second circuit graph and the plurality of circuit simulation results of the first circuit graph through the result display interface.

12. A circuit design device, characterized by comprising: including: at least one processor and an input / output interface communication interface; the processor is coupled with the communication interface; the processor executes the method of any one of claims 1-11 by running the code stored in the memory.

13. A computer-readable storage medium, characterized in that, The computer readable storage medium stores instructions, when the instructions run on the computer or the processor, cause the computer or the processor to execute the method of any one of claims 1-11.

14. A computer program product, characterised in that, The computer program product includes instructions, when the instructions run on the computer or the processor, cause the computer or the processor to execute the method of any one of claims 1-11.

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