Array substrate, display panel and electronic device

Abstract

The application provides an array substrate, a display panel and an electronic device. The array substrate comprises a pixel electrode arranged in a sub-pixel region, a signal line arranged in a gap region and a shielding electrode. The pixel electrode comprises a plurality of electrode lines. Two adjacent electrode lines form a first gap. The shielding electrode is arranged between the pixel electrode and the signal line and extends from the gap region into the sub-pixel region. In the gap region, the orthogonal projection of the shielding electrode on a bearing substrate covers the orthogonal projection of the signal line on the bearing substrate. In the sub-pixel region, the shielding electrode comprises a plurality of electrode shielding lines. Two adjacent electrode shielding lines form a second gap corresponding to the first gap. In the region of the pixel electrode corresponding to the first gap, there is an area between the shielding electrode and the common electrode that is not overlapped. The liquid crystal corresponding to the area deflects according to the pressure difference between the pixel electrode and the common electrode, thereby improving the light transmittance of the display panel corresponding to the sub-pixel region.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to an array substrate, a display panel, and an electronic device. Background Technology

[0002] Liquid crystal display (LCD) panels have many advantages such as thinness, energy saving, and no radiation, and have been widely used.

[0003] The structure of an LCD panel mainly consists of a thin film transistor array (TFT array), a color filter (CF) substrate, and a liquid crystal layer disposed between the two substrates. Its working principle is to control the rotation of liquid crystal molecules in the liquid crystal layer by applying a driving voltage on the two glass substrates, thereby refracting the light from the backlight module to produce an image.

[0004] COA (Color Filter on Array) technology is an integrated technology that directly fabricates color filter layers (red, green, and blue resists) onto the TFT array substrate. Currently, in addition to COA technology, DBS (Data BM Saving) pixel designs are increasingly being adopted. This involves covering the signal lines located in the gap region of the TFT array substrate with ITO (Indium Tin Oxide) DBS electrodes, with the DBS electrodes being slightly wider than the data lines. The gap region is located between two adjacent sub-pixel regions (i.e., light-emitting regions), and the DBS electrodes are located between two adjacent sub-pixel electrodes. To prevent crosstalk and color mixing between adjacent sub-pixels, the DBS electrodes and the common electrode (COM) are typically set to the same potential. During normal operation of the display panel, the electric field formed by the DBS electrodes and the common electrode keeps the corresponding liquid crystal molecules in a non-deflected state, thus achieving the purpose of light shielding.

[0005] DBS electrodes can also be used to shield signals between signal lines and pixel electrodes, avoiding crosstalk and other quality issues caused by signal line-pixel electrode coupling. However, in related technologies, the overlapping area between the DBS electrode and the common electrode results in low liquid crystal deflection efficiency and low light transmittance, leading to a decrease in the brightness of the display panel. Summary of the Invention

[0006] The purpose of this application is to provide an array substrate to solve the technical problem of low light transmittance of the array substrate.

[0007] In a first aspect, this application provides an array substrate comprising a plurality of sub-pixel regions arranged in an array, with a gap region formed between two adjacent sub-pixel regions, including:

[0008] A pixel electrode is disposed within the sub-pixel region. The pixel electrode includes multiple electrode lines, with two adjacent electrode lines spaced apart to form a first gap.

[0009] Signal lines are disposed within the gap region; and

[0010] A shielding electrode is disposed between the pixel electrode and the signal line in the normal direction of the array substrate, and extends from the gap region into the sub-pixel region. In the gap region, the orthogonal projection of the shielding electrode on the carrier substrate covers the orthogonal projection of the signal line on the carrier substrate. In the sub-pixel region, the shielding electrode includes multiple electrode shielding lines, and two adjacent electrode shielding lines are spaced apart to form a second gap. The electrode shielding lines correspond to the electrode lines, and the first gap corresponds to the second gap.

[0011] In the array substrate provided in this application, pixel electrodes are disposed within sub-pixel areas, signal lines are disposed within gap areas, and shielding electrodes are disposed between the pixel electrodes and signal lines in the normal direction of the array substrate, extending from the gap area into the sub-pixel area. Within the gap area, the orthogonal projection of the shielding electrode onto the carrier substrate overlaps the orthogonal projection of the signal line onto the carrier substrate. Within the sub-pixel area, electrode shielding lines correspond to electrode lines, and a first gap formed by two adjacent electrode lines spaced apart and a second gap formed by two adjacent electrode shielding lines spaced apart are correspondingly disposed. Within the region corresponding to the first gap within the pixel electrode, there is a non-overlapping area between the shielding electrode and the common electrode. The liquid crystal corresponding to this area will deflect according to the voltage difference between the pixel electrode and the common electrode, thereby improving the light transmittance of the display panel corresponding to the sub-pixel area.

[0012] One of the pixel electrodes includes a connected electrode periphery, a keel electrode, and a plurality of electrode portions distributed in a grid pattern. The keel electrode is disposed within the electrode periphery, and the electrode portions are disposed within the space enclosed by the electrode periphery and the keel electrode.

[0013] The shielding electrode includes a main body and multiple extensions. The main body is disposed in the gap region, and the extensions are disposed in the sub-pixel region. The multiple extensions are disposed on one or both sides of the main body. The orthographic projection of the electrode periphery on the carrier substrate and the orthographic projection of the electrode portion on the carrier substrate at least partially overlap with the orthographic projection of the extensions on the carrier substrate.

[0014] One of the electrode portions includes multiple electrode lines spaced apart, and the electrode lines of two adjacent electrode portions extend in different directions;

[0015] One of the extensions includes an outer shielding wire and a plurality of electrode shielding wires spaced apart on the same side of the outer shielding wire, and the electrode shielding wires of two adjacent extensions extend in different directions, and the extension direction of the electrode shielding wires in the extension is the same as the extension direction of the electrode wires in the electrode portion;

[0016] In the extension portion and the electrode portion disposed opposite to each other in the normal direction of the array substrate, the orthographic projection of the outer periphery of the electrode on the carrier substrate and the orthographic projection of the outer shielding line on the carrier substrate at least partially coincide, and the orthographic projection of the electrode line on the carrier substrate and the orthographic projection of the electrode shielding line on the carrier substrate at least partially coincide.

[0017] Among them, on one side of the shielding electrode, a keel shielding portion is also included between two adjacent extensions, and the orthographic projection of the keel electrode portion on the carrier substrate and the orthographic projection of the keel shielding portion on the carrier substrate at least partially coincide.

[0018] In the first direction, the size range of the extension is 6 micrometers to 10 micrometers, and the size range of the keel shield is 6 micrometers to 10 micrometers.

[0019] The signal line is a data line, and the shielding electrode is disposed in two adjacent sub-pixel regions arranged along a first direction, which is the extension direction of the scan line.

[0020] The signal line is a scan line, and the shielding electrode is disposed in two adjacent sub-pixel regions arranged along a second direction, which is the extension direction of the data line.

[0021] In the first direction, the size of the main body portion ranges from 10 micrometers to 14 micrometers.

[0022] Secondly, this application provides a display panel, including a color filter substrate, a liquid crystal module and the array substrate, wherein the liquid crystal module is disposed between the color filter substrate and the array substrate.

[0023] Thirdly, this application provides an electronic device, including a housing and the aforementioned display panel, wherein the display panel is disposed within the housing. Attached Figure Description

[0024] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a cross-sectional structural diagram of a display panel provided in an embodiment of this application;

[0026] Figure 2 This is a schematic diagram of an array substrate region division provided in an embodiment of this application;

[0027] Figure 3 This is a schematic diagram of the structure of a pixel electrode provided in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of the structure of a shielding electrode provided in an embodiment of this application;

[0029] Figure 5 This is a cross-sectional structural diagram of the positions of each electrode in a display panel provided in an embodiment of this application;

[0030] Figure 6 This is a schematic diagram of the structure of a shielding electrode provided in another embodiment of this application;

[0031] Figure 7 This is a schematic diagram of a cross-sectional structure of an array substrate provided in another embodiment of this application;

[0032] Figure 8 This is a schematic diagram of the structure of an array substrate when the signal line is a data line, according to an embodiment of this application.

[0033] Figure 9 This is a schematic diagram of the structure of an array substrate when the signal lines are scan lines, according to an embodiment of this application.

[0034] Figure 10 This is a structural diagram of an electronic device provided in an embodiment of this application.

[0035] Label Explanation:

[0036] Electronic device-1000, display panel-100, housing-200, array substrate-1, sub-pixel area-101, gap area-102, pixel electrode-11, electrode periphery-111, keel electrode-112, electrode part-113, electrode line-1131, first gap-1132, signal line-12, data line-121, scan line-122, shielding electrode-13, main body part-131, extension part-132, peripheral shielding line-1321, electrode shielding line-1322, second gap-1323, keel shielding part-133, via-hole-134, planarization layer-14, color filter substrate-2, common electrode-21, liquid crystal module-3. Detailed Implementation

[0037] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0038] In this document, references to "embodiment" or "implementation" mean that a particular feature, structure, or characteristic described in connection with an embodiment or implementation may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0039] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0040] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the constituent elements being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0041] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of these terms in this disclosure as appropriate.

[0042] Liquid crystal display (LCD) panels have many advantages such as thinness, energy saving, and no radiation, and have been widely used.

[0043] The structure of an LCD panel mainly consists of a thin film transistor array (TFT array), a color filter (CF) substrate, and a liquid crystal layer disposed between the two substrates. Its working principle is to control the rotation of liquid crystal molecules in the liquid crystal layer by applying a driving voltage on the two glass substrates, thereby refracting the light from the backlight module to produce an image.

[0044] COA (Color Filter on Array) technology is an integrated technology that directly fabricates color filter layers (red, green, and blue resists) onto the TFT array substrate. Currently, in addition to COA technology, DBS (Data BM Saving) pixel designs are increasingly being adopted. This involves covering the signal lines located in the gap region of the TFT array substrate with ITO (Indium Tin Oxide) DBS electrodes, with the DBS electrodes being slightly wider than the data lines. The gap region is located between two adjacent sub-pixel regions (i.e., light-emitting regions), and the DBS electrodes are located between two adjacent sub-pixel electrodes. To prevent crosstalk and color mixing between adjacent sub-pixels, the DBS electrodes and the common electrode (COM) are typically set to the same potential. During normal operation of the display panel, the electric field formed by the DBS electrodes and the common electrode keeps the corresponding liquid crystal molecules in a non-deflected state, thus achieving the purpose of light shielding.

[0045] DBS electrodes can also be used to shield signals between signal lines and pixel electrodes, avoiding crosstalk and other quality issues caused by signal line-pixel electrode coupling. However, in related technologies, the overlapping area between the DBS electrode and the common electrode results in low liquid crystal deflection efficiency and low light transmittance, leading to a decrease in the brightness of the display panel.

[0046] Please refer to Figures 1 to 5 , Figure 1This is a cross-sectional structural diagram of a display panel provided in an embodiment of this application. Figure 2 This is a schematic diagram of an array substrate region division provided in an embodiment of this application. Figure 3 This is a schematic diagram of the structure of a pixel electrode provided in an embodiment of this application. Figure 4 This is a schematic diagram of the structure of a shielding electrode provided in an embodiment of this application. Figure 5 This is a cross-sectional structural diagram of the positions of each electrode in a display panel provided in an embodiment of this application.

[0047] The purpose of this application is to provide an array substrate 1 and a display panel 100 to solve the technical problem of low light transmittance of the array substrate in the related art.

[0048] The display panel 100 includes a color filter substrate 2, a liquid crystal module 3, and an array substrate 1 arranged sequentially, with the liquid crystal module 3 sandwiched between the color filter substrate 2 and the array substrate 1. The display panel 100 controls the rotation of liquid crystal molecules in the liquid crystal layer by applying different driving voltages to the color filter substrate 2 and the array substrate 1, thereby refracting light from the backlight module to form a display image.

[0049] Specifically, the color filter substrate 2 includes a common electrode 21, which is used to apply a common voltage.

[0050] The array substrate 1 includes a plurality of sub-pixel regions 101 arranged in an array, with a gap region 102 formed between two adjacent sub-pixel regions 101. The array substrate 1 includes pixel electrodes 11, signal lines 12, and shielding electrodes 13.

[0051] The pixel electrode 11 is disposed within the sub-pixel region 101 and is used to apply a driving voltage. The voltage value of the driving voltage is different from the voltage value of the common voltage applied to the common electrode 21, causing the liquid crystal between the pixel electrode 11 and the common electrode 21 to deflect, so that the liquid crystal module 3 in the region corresponding to the pixel electrode 11 can transmit light emitted by the backlight module. The pixel electrode 11 includes multiple electrode lines 1131, and two adjacent electrode lines 1131 are spaced apart to form a first gap 1132.

[0052] In the normal direction of the array substrate 1, the shielding electrode 13 is disposed between the pixel electrode 11 and the signal line 12, and the common electrode 21, the pixel electrode 11, the shielding electrode 13 and the signal line 12 are arranged sequentially. A portion of the shielding electrode 13 is disposed within the gap region 102, and another portion of the shielding electrode 13 extends from the gap region 102 into the sub-pixel region 101.

[0053] Within the gap region 102, the orthogonal projection of the shielding electrode 13 onto the carrier substrate covers the orthogonal projection of the signal line 12 onto the carrier substrate. The shielding electrode 13 is disposed between the pixel electrode 11 and the signal line 12, and can be used to shield signal interference between the pixel electrode 11 and the signal line 12, avoiding crosstalk and other quality issues caused by coupling between the signal line 12 and the pixel electrode 11. Furthermore, the shielding electrode 13 is also disposed between the common electrode 21 and the signal line 12. The shielding electrode 13 can be used to shield the signal of the signal line 12, causing undesirable deflection of the liquid crystal in the liquid crystal module 3 at the corresponding position of the signal line 12, thereby improving the display effect of the display panel 100.

[0054] Within the sub-pixel region 101, the shielding electrode 13 includes multiple electrode shielding lines 1322. Two adjacent electrode shielding lines 1322 are spaced apart to form a second gap 1323. The electrode shielding lines 1322 correspond to the electrode lines 1131, and the first gap 1132 corresponds to the second gap 1323. In other words, the projection of the first gap 1132 onto the common electrode 21 and the projection of the second gap 1323 onto the common electrode 21 at least partially overlap. This results in a non-overlapping area between the shielding electrode 13 and the common electrode 21 within the region corresponding to the first gap 1132 in the pixel electrode 11 (i.e., the region where the projections of the second gap 1323 and the first gap 1132 onto the common electrode 21 overlap). The liquid crystal corresponding to this area will deflect according to the voltage difference between the pixel electrode 11 and the common electrode 21, thereby increasing the light transmittance of the display panel 100 corresponding to the sub-pixel region 101.

[0055] In the array substrate 1 provided in this application, the pixel electrode 11 is disposed in the sub-pixel region 101, the signal line 12 is disposed in the gap region 102, and in the normal direction of the array substrate 1, the shielding electrode 13 is disposed between the pixel electrode 11 and the signal line 12, and extends from the gap region 102 into the sub-pixel region 101. In the gap region 102, the orthogonal projection of the shielding electrode 13 on the carrier substrate covers the orthogonal projection of the signal line 12 on the carrier substrate. In the sub-pixel region 101, the electrode shielding line 1322 corresponds to the electrode line 1131, and the first gap 1132 formed by two adjacent electrode lines 1131 spaced apart and the second gap 1323 formed by two adjacent electrode shielding lines 1322 spaced apart are correspondingly disposed. Within the region corresponding to the first gap 1132 in the pixel electrode 11, there is a non-overlapping area between the shielding electrode 13 and the common electrode 21. The liquid crystal corresponding to this area will be deflected according to the pressure difference between the pixel electrode 11 and the common electrode 21, thereby improving the light transmittance of the display panel 100 corresponding to the sub-pixel area 101.

[0056] The absolute value of the difference between the width of the electrode shielding line 1322 and the width of the electrode line 1131 ranges from 0 micrometers to 0.7 micrometers. Optionally, the width of the electrode shielding line 1322 can be greater than the width of the electrode line 1131 to improve the signal shielding effect between the electrode shielding line 1322 and the signal line 12; alternatively, the width of the electrode line 1131 can be equal to the width of the electrode shielding line 1322, thereby making the width of the first gap 1132 the same as the width of the second gap 1323, further increasing the area of ​​the overlapping region between the shielding electrode 13 and the common electrode 21, and further increasing the light transmittance of the display panel 100 corresponding to the sub-pixel area 101. Preferably, in one embodiment, the width of the electrode shielding line 1322 is greater than the width of the electrode line 1131, and the difference between the width of the electrode shielding line 1322 and the width of the electrode line 1131 is 0.6 micrometers.

[0057] Compared to the array substrate in related technologies, this application sets the shielding electrode 13 and the pixel electrode 11 in different layers, which makes the shielding electrode 13 too close to the signal line 12, which may cause the signal of the signal line 12 to be interfered with by the shielding electrode 13.

[0058] Please refer to Figure 6 and Figure 7 , Figure 6This is a schematic diagram of the structure of a shielding electrode provided in another embodiment of this application. Figure 7 This is a cross-sectional structural diagram of an array substrate provided in another embodiment of this application.

[0059] In this embodiment, the shielding electrode 13 is provided with a via 134, and the position of the via 134 corresponds to the position of the signal line 12. This can be used to reduce the influence of the shielding electrode 13 on the signal line 12 and improve the signal stability of the signal line 12.

[0060] Furthermore, by providing a via 134 (hollow design) for the shielding electrode 13, the flat layer 14 covering the shielding electrode 13 can be made flatter and will not be affected by the structural protrusion caused by the signal line 12, thereby improving the flatness of the upper surface of the flat layer 14.

[0061] Optionally, the signal line 12 may include, but is not limited to, a scan line 122 and / or a data line 121. In other words, the signal line 12 may be a scan line 122, the signal line 12 may be a data line 121, or the signal line 12 may be both a scan line 122 and a data line 121. The following example in this application uses the signal line 12 as a data line 121 and should not be construed as a limitation of this application.

[0062] For example, please refer to Figure 8 , Figure 8 This is a schematic diagram of the structure of an array substrate when the signal line is a data line, according to an embodiment of this application (the dotted line part in the figure is the shielding electrode 13).

[0063] In one embodiment provided in this application, the signal line 12 is a data line 121, and the shielding electrode 13 is disposed in two adjacent sub-pixel regions 101 arranged along a first direction, which is the extension direction of the scan line 122. The shielding electrode 13 can be used to shield the signal between the data line 121 and the pixel electrode 11, avoiding crosstalk and other quality problems caused by the coupling between the signal line 12 and the pixel electrode 11. Furthermore, the shielding electrode 13 can be used to shield the signal of the data line 121, causing the liquid crystal in the liquid crystal module 3 at the position corresponding to the data line 121 to undergo undesirable deflection, thereby improving the display effect of the display panel 100.

[0064] For example, please refer to Figure 9 , Figure 9 This is a schematic diagram of the structure of an array substrate when the signal line is a scan line, according to an embodiment of this application (the dotted line in the figure represents the shielding electrode 13).

[0065] In one embodiment provided in this application, the signal line 12 is a scan line 122, and the shielding electrode 13 is disposed in two adjacent sub-pixel regions 101 arranged along a second direction, which is the extension direction of the data line 121. The shielding electrode 13 can be used to shield the signal between the scan line 122 and the pixel electrode 11, avoiding crosstalk and other quality problems caused by the coupling between the scan line 122 and the pixel electrode 11. Furthermore, the shielding electrode 13 can be used to shield the signal of the scan line 122, causing the liquid crystal in the liquid crystal module 3 at the position corresponding to the scan line 122 to undergo undesirable deflection, thereby improving the display effect of the display panel 100.

[0066] Please refer to this again. Figures 1 to 5 In one embodiment provided in this application, a pixel electrode 11 includes a connected electrode periphery 111, a keel electrode 112, and a plurality of electrode portions 113 arranged in a grid pattern. The keel electrode 112 is disposed within the electrode periphery 111, and the electrode portions 113 are disposed within the space enclosed by the electrode periphery 111 and the keel electrode 112.

[0067] Each electrode portion 113 includes a plurality of spaced-apart electrode lines 1131, and the electrode lines 1131 of two adjacent electrode portions 113 extend in different directions.

[0068] In this embodiment, the present application uses a pixel electrode 11 comprising four electrode portions 113 as an example for illustration, and this should not be construed as a limitation of the present application. Specifically, the pixel electrode 11 includes a first electrode portion, a second electrode portion, a third electrode portion, and a fourth electrode portion arranged in a grid pattern. The first electrode portion, the second electrode portion, the third electrode portion, and the fourth electrode portion all include multiple electrode lines 1131 arranged at intervals, and the extension directions of the electrode lines 1131 of the first electrode portion, the second electrode portion, the third electrode portion, and the fourth electrode portion are all different.

[0069] The electrode lines 1131 of the first electrode portion, the second electrode portion, the third electrode portion, and the fourth electrode portion all extend in different directions, which enables the liquid crystal between the pixel electrode 11 and the common electrode 21 of the color filter substrate 2 to be divided into four regions, and the liquid crystal deflection angles in the four regions are different, so that the light emitted by the backlight module can be emitted through liquid crystal molecules with different deflection angles, thereby improving the display effect of the display panel 100.

[0070] The shielding electrode 13 includes a main body 131 and a plurality of extensions 132. The main body 131 is disposed within the gap region 102, and the extensions 132 are disposed within the sub-pixel region 101. The plurality of extensions 132 are disposed on one or both sides of the main body 131. In other words, the plurality of extensions 132 can be provided on one side of the main body 131, or the plurality of extensions 132 can be provided on both sides of the main body 131. This application illustrates the example of the plurality of extensions 132 being provided on both sides of the main body 131. The two sides of the main body 131 are those facing closer to different sub-pixel regions 101.

[0071] The orthographic projection of the electrode periphery 111 on the carrier substrate and the orthographic projection of the electrode portion 113 on the carrier substrate at least partially overlap with the orthographic projection of the extension portion 132 on the carrier substrate.

[0072] One of the extension portions 132 includes an outer shielding line 1321 and a plurality of electrode shielding lines 1322 spaced apart on the same side of the outer shielding line 1321. The electrode shielding lines 1322 of two adjacent extension portions 132 extend in different directions. The extension direction of the electrode shielding lines 1322 in the extension portion 132 is the same as the extension direction of the electrode lines 1131 in the electrode portion 113.

[0073] In the extension portion 132 and the electrode portion 113 disposed opposite to each other in the normal direction of the array substrate 1, the orthographic projection of the electrode periphery 111 on the carrier substrate at least partially coincides with the orthographic projection of the periphery shielding line 1321 on the carrier substrate, and the orthographic projection of the electrode line 1131 on the carrier substrate at least partially coincides with the orthographic projection of the electrode shielding line 1322 on the carrier substrate.

[0074] The orthographic projection of the electrode line 1131 on the carrier substrate and the orthographic projection of the electrode shielding line 1322 on the carrier substrate at least partially overlap, including but not limited to the orthographic projection of the electrode line 1131 on the carrier substrate covering the orthographic projection of the electrode shielding line 1322 on the carrier substrate, or the orthographic projection of the electrode shielding line 1322 on the carrier substrate covering the orthographic projection of the electrode line 1131 on the carrier substrate.

[0075] The orthogonal projection of the electrode line 1131 on the carrier substrate covers the orthogonal projection of the electrode shielding line 1322 on the carrier substrate, so that the area between two adjacent electrode lines 1131 does not correspond to the electrode shielding line 1322, so that the liquid crystal corresponding to the area between two adjacent electrode lines 1131 will be deflected normally, and the light transmittance of the area between two adjacent electrode lines 1131 is high.

[0076] It should be noted that, in this embodiment, although the orthogonal projection of the electrode line 1131 on the carrier substrate covers the orthogonal projection of the electrode shielding line 1322 on the carrier substrate, the line width of the electrode line 1131 and the line width of the electrode shielding line 1322 can be equal or approximately equal, that is, the line width of the electrode line 1131 is slightly larger than the line width of the electrode shielding line 1322. This application does not limit this.

[0077] The orthographic projection of the electrode shielding line 1322 on the carrier substrate covers the orthographic projection of the electrode line 1131 on the carrier substrate, which can further improve the signal shielding effect of the electrode shielding line 1322 between the electrode line 1131 and the signal line 12, and improve the quality of the display panel 100.

[0078] In one embodiment provided in this application, the size of the extension 132 in the first direction ranges from 6 micrometers to 10 micrometers.

[0079] If the size of the extension portion 132 is less than 6 micrometers and the size of the keel shield portion 133 is less than 6 micrometers, it will cause the coupling capacitance between the signal line 12 and the pixel electrode 11 to be too large, resulting in crosstalk. It will also cause the storage capacitance formed between the shield electrode 13 and the pixel electrode 11 to be small. If the size of the extension portion 132 is greater than 10 micrometers and the size of the keel shield portion 133 is greater than 10 micrometers, it will cause the storage capacitance formed between the shield electrode 13 and the pixel electrode 11 to be large, which will result in low pixel charging efficiency.

[0080] Therefore, when the size range of the extension 132 is 6 micrometers to 10 micrometers and the size range of the keel shield 133 is 6 micrometers to 10 micrometers, it can ensure that the shield electrode 13 can effectively reduce the coupling capacitance between the signal line 12 and the pixel electrode 11, and also prevent the pixel charging efficiency from decreasing.

[0081] Optionally, in the first direction, the size of the extension 132 can be 6 micrometers, 7 micrometers, 8 micrometers, 9 micrometers, 10 micrometers, or other values ​​within the range of 6 micrometers to 10 micrometers, and this application does not limit it.

[0082] In one embodiment provided in this application, the size of the main body portion 131 in a first direction ranges from 10 micrometers to 14 micrometers.

[0083] Optionally, in the first direction, the size of the main body 131 can be 10 micrometers, or 11 micrometers, or 12 micrometers, or 13 micrometers, or 14 micrometers, or other values ​​within the range of 10 micrometers to 14 micrometers, and this application does not limit it in this regard.

[0084] In one embodiment provided in this application, on one side of the shielding electrode 13, a keel shielding portion 133 is further included between two adjacent extensions 132, and the orthographic projection of the keel electrode 112 on the carrier substrate and the orthographic projection of the keel shielding portion 133 on the carrier substrate at least partially overlap.

[0085] The keel shielding part 133 is used to shield the signal between the signal line 12 and the keel electrode 112, so as to avoid crosstalk and other adverse phenomena between the signal line 12 and the keel electrode 112.

[0086] In the first direction, the size of the keel shield 133 ranges from 6 micrometers to 10 micrometers.

[0087] Optionally, in the first direction, the size of the keel shield 133 can be 6 micrometers, 7 micrometers, 8 micrometers, 9 micrometers, 10 micrometers, or other values ​​within the range of 6 micrometers to 10 micrometers, and this application does not limit it.

[0088] Please refer to Figure 10 , Figure 10 This is a structural diagram of an electronic device provided in one embodiment of this application. In one embodiment provided by this application, an electronic device 1000 is also provided. The electronic device 1000 includes a housing 200 and a display panel 100, the display panel 100 being disposed within the housing 200. The electronic device 1000 can be a mobile phone, display screen, telephone, television, tablet computer, camera, personal computer, laptop computer, in-vehicle equipment, wearable device, base station, or other device with a display panel 100.

[0089] The above description represents some embodiments of this application. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. An array substrate, comprising a plurality of sub-pixel regions arranged in an array, a gap region formed between two adjacent sub-pixel regions, characterized in that, The display panel comprises: a bearing substrate; a pixel electrode arranged in the sub-pixel region, the pixel electrode comprising a plurality of electrode lines, two adjacent electrode lines being arranged at intervals and forming a first gap; a signal line arranged in the gap region; and a shielding electrode arranged between the pixel electrode and the signal line in the normal direction of the array substrate and extending from the gap region into the sub-pixel region, wherein in the gap region, the orthogonal projection of the shielding electrode on the bearing substrate covers the orthogonal projection of the signal line on the bearing substrate, and in the sub-pixel region, the shielding electrode comprises a plurality of electrode shielding lines, two adjacent electrode shielding lines being arranged at intervals and forming a second gap, the electrode shielding lines corresponding to the electrode lines, the orthogonal projection of the electrode lines on the bearing substrate at least partially coinciding with the orthogonal projection of the electrode shielding lines on the bearing substrate, the first gap corresponding to the second gap, and the orthogonal projection of the first gap on the bearing substrate at least partially coinciding with the orthogonal projection of the second gap on the bearing substrate.

2. The array substrate of claim 1, wherein, One of the pixel electrodes comprises an electrode periphery, a keel electrode arranged in the electrode periphery, and a plurality of electrode portions arranged in the space enclosed by the electrode periphery and the keel electrode in a cross shape. The shielding electrode comprises a main body portion arranged in the gap region and a plurality of extension portions arranged in the sub-pixel region, the extension portions being arranged on one side or both sides of the main body portion, and the orthogonal projection of the electrode periphery on the bearing substrate and the orthogonal projection of the electrode portions on the bearing substrate at least partially coinciding with the orthogonal projection of the extension portions on the bearing substrate.

3. The array substrate of claim 2, wherein, One of the electrode portions comprises a plurality of electrode lines arranged at intervals, and the electrode lines of two adjacent electrode portions extend in different directions. One of the extension portions comprises a peripheral shielding line and a plurality of electrode shielding lines arranged at intervals on the same side of the peripheral shielding line, and the electrode shielding lines of two adjacent extension portions extend in different directions, and the extension direction of the electrode shielding lines in the extension portion is the same as the extension direction of the electrode lines in the electrode portion. In the extension portion and the electrode portion arranged opposite to each other in the normal direction of the array substrate, the orthogonal projection of the electrode periphery on the bearing substrate at least partially coincides with the orthogonal projection of the peripheral shielding line on the bearing substrate, and the orthogonal projection of the electrode lines on the bearing substrate at least partially coincides with the orthogonal projection of the electrode shielding lines on the bearing substrate.

4. The array substrate of claim 3, wherein, On one side of the shielding electrode, two adjacent extension portions further comprise a keel shielding portion, and the orthogonal projection of the keel electrode portion on the bearing substrate at least partially coincides with the orthogonal projection of the keel shielding portion on the bearing substrate.

5. The array substrate of claim 1, wherein, The absolute value of the difference between the width dimension of the electrode shielding line and the width dimension of the electrode line ranges from 0 microns to 0.7 microns.

6. The array substrate of claim 1, wherein, The signal line comprises a data line, and the shielding electrode is arranged in two adjacent sub-pixel areas arranged along a first direction, the first direction being an extension direction of a scan line. And / or, the signal line comprises a scan line, and the shielding electrode is arranged in two adjacent sub-pixel areas arranged along a second direction, the second direction being an extension direction of a data line.

7. The array substrate according to any one of claims 1 to 6, wherein, The shielding electrode is provided with a via hole, and a position of the via hole corresponds to a position of the signal line.

8. The array substrate of claim 2, wherein, In the first direction, the size of the main body part ranges from 10 microns to 14 microns.

9. A display panel, characterized by, The display panel comprises a color filter substrate, a liquid crystal module, and the array substrate of any one of claims 1-8, the liquid crystal module being arranged between the color filter substrate and the array substrate.

10. An electronic device, comprising: The display panel comprises a housing and the display panel of claim 9, the display panel being arranged in the housing.

Images