A display substrate

Abstract

Embodiments of the present application provide a display substrate, comprising a pixel array, a data line, a driving power line; a column direction extension part A has a first distance in the row direction relative to the column direction extension part C and is away from the first end of the display substrate, and a column direction extension part G has a first distance in the row direction relative to the column direction extension part I and is away from the first end of the display substrate; the column direction extension part D and the column direction extension part J are located between the third pixel circuit and the fourth pixel circuit; the column direction extension part F and the column direction extension part L are located on the side away from the first end of the third other pixel circuit; by optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is arranged to be offset to the inner side of the display substrate, so that the probability of sputter falling due to corner collision is reduced, thereby reducing the risk of line defects.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display substrate. Background Technology

[0002] COG (Chip On Glass) is a packaging technology for liquid crystal displays. Its characteristic is that the driver IC (Integrated Circuit Chip) is directly packaged on the liquid crystal glass using anisotropic conductive adhesive. The packaging pins on the driver chip are electrically connected to the corresponding packaging pins on the display substrate by pressing with anisotropic conductive film (ACF).

[0003] COG glass-based products are prone to damage to their edges and corners due to the properties of the glass. After such damage, the signal terminals at the bottom of the screen may detach due to the sputter coating process, resulting in signal defects. Summary of the Invention

[0004] This application provides a display substrate, including:

[0005] The system comprises a pixel array, M data lines, and 2N drive power lines. The pixel array includes multiple pixel circuits arranged in a matrix. The drive power lines and the data lines intersect to define the pixel circuits as N rows and M columns of pixels. The data lines are used to provide data signals to the pixel circuits. The drive power lines are used to provide drive voltages to the pixel circuits. Wherein, N and M are both integers greater than 1.

[0006] The 2N drive power lines include N row-direction drive power lines and N column-direction drive power lines; the second to M-1 data lines of the M data lines extend along the column direction, the row-direction drive power lines extend along the row direction, and the second to N-1 column-direction drive power lines extend along the column direction.

[0007] The first data line among the M data lines includes a column-direction extension portion A, a row-direction extension portion B, and a column-direction extension portion C; the Mth data line among the M data lines includes a column-direction extension portion D, a row-direction extension portion E, and a column-direction extension portion F; the first column-direction drive power line among the N column-direction drive power lines includes a column-direction extension portion G, a row-direction extension portion H, and a column-direction extension portion I; the Nth column-direction drive power line among the N column-direction drive power lines includes a column-direction extension portion J, a row-direction extension portion K, and a column-direction extension portion L.

[0008] The column-direction extension portion A and the column-direction extension portion G are located between the first pixel circuit and the second pixel circuit, wherein the first pixel circuit is the pixel circuit on the Nth pixel row and the first pixel column, and the second pixel circuit is the pixel circuit on the Nth pixel row and the second pixel column; the column-direction extension portion C and the column-direction extension portion I are located between the first other pixel circuit and the second other pixel circuit, wherein the first other pixel circuit is the pixel circuit other than the first pixel circuit in the first pixel column, and the second other pixel circuit is the pixel circuit other than the second pixel circuit in the second pixel column;

[0009] The column direction extension portion A has a first distance in the row direction relative to the column direction extension portion C and is far from the first end of the display substrate; the column direction extension portion G has a first distance in the row direction relative to the column direction extension portion I and is far from the first end of the display substrate; wherein the first end of the display substrate is the end where the first column of pixels is located.

[0010] The column-direction extension portion D and the column-direction extension portion J are located between the third pixel circuit and the fourth pixel circuit, wherein the third pixel circuit is the pixel circuit on the Nth pixel row and the (M-1)th pixel column, and the fourth pixel circuit is the pixel circuit on the Nth pixel row and the Mth pixel column; the column-direction extension portion F and the column-direction extension portion L are located on the side of the third other pixel circuit away from the first end, wherein the third other pixel circuit is the other pixel circuits in the Mth pixel column besides the fourth pixel circuit.

[0011] In one possible implementation, the i-th data line is used to provide data signals to the pixel circuits in the i-th pixel column, where i is an integer belonging to 1 to M.

[0012] In one possible implementation, the display substrate further includes a first additional data line and a second additional data line;

[0013] The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The Mth data line is used to provide data signals to the pixel circuits in the Mth column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The second additional data line is used to provide data signals to the fourth pixel circuit. The jth data line is used to provide data signals to the pixel circuits in the jth column of pixels, where j is an integer belonging to 2 to M-1.

[0014] In one possible implementation, the display substrate further includes a first additional data line;

[0015] The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The j-th data line is used to provide data signals to the pixel circuits in the j-th column of pixels, where j is an integer from 2 to M.

[0016] In one possible implementation, the first additional data line is disposed between the first pixel circuit and the second pixel circuit, and the first additional data line has a second distance from the first data line in the row direction and is located on the side closer to the first end.

[0017] In one possible implementation, the second distance is 0.4 mm or more.

[0018] In one possible implementation, the display substrate further includes a second additional data line;

[0019] The Mth data line is used to provide data signals for the pixel circuits in the Mth pixel column and the first to N-1th pixel rows. The second additional data line is used to provide data signals for the fourth pixel circuit. The jth data line is used to provide data signals for the pixel circuits in the jth pixel column, where j is an integer belonging to 1 to M-1.

[0020] In one possible implementation, the second additional data line is disposed on the side of the fourth pixel circuit away from the first end.

[0021] In one possible implementation, the first distance is 0.4 mm or more.

[0022] In one possible implementation, the row direction extension portion B, row direction extension portion E, row direction extension portion H, and row direction extension portion K are straight lines, wedge-shaped lines, or arc-shaped lines.

[0023] Beneficial effects of the embodiments in this application:

[0024] This application provides a display substrate including a pixel array, M data lines, and 2N driving power lines. The pixel array includes multiple pixel circuits arranged in a matrix. The driving power lines and data lines intersect to define N rows and M columns of pixel circuits. The data lines are used to provide data signals to the pixel circuits; the driving power lines are used to provide driving voltages to the pixel circuits. The 2N driving power lines include N row-direction driving power lines and N column-direction driving power lines. The second to M-1 data lines of the M data lines extend along the column direction, and the row-direction driving power lines extend along the row direction. -1 column-direction drive power line extends along the column direction; the first data line of the M data lines includes column-direction extension portion A, row-direction extension portion B and column-direction extension portion C, the Mth data line of the M data lines includes column-direction extension portion D, row-direction extension portion E and column-direction extension portion F; the first column-direction drive power line of the N column-direction drive power lines includes column-direction extension portion G, row-direction extension portion H and column-direction extension portion I; the Nth column-direction drive power line of the N column-direction drive power lines includes column-direction extension portion J, row-direction extension portion K and column-direction extension portion L.

[0025] Column direction extension portions A and G are located between the first pixel circuit and the second pixel circuit; column direction extension portions C and I are located between the first other pixel circuit and the second other pixel circuit; column direction extension portion A has a first distance in the row direction relative to column direction extension portion C and is located away from the first end of the display substrate; column direction extension portion G has a first distance in the row direction relative to column direction extension portion I and is located away from the first end of the display substrate; column direction extension portions D and J are located between the third pixel circuit and the fourth pixel circuit; column direction extension portions F and L are located on the side of the third other pixel circuit away from the first end. By optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line, and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is offset towards the inward side of the display substrate, thereby reducing the probability of sputter detachment due to corner impacts and reducing the risk of wire defects. Of course, implementing any product or method of this application does not necessarily require achieving all of the above-described advantages simultaneously. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0027] Figure 1-1 This is a schematic diagram of a display substrate structure in related technologies;

[0028] Figure 1-2 This is a schematic diagram of a locally magnified portion of a display substrate in related technologies.

[0029] Figure 2 This is a schematic diagram of a first structure of a display substrate provided in an embodiment of this application;

[0030] Figure 3 A first enlarged structural schematic diagram of the first pixel circuit portion in a display substrate provided in an embodiment of this application;

[0031] Figure 4 A first enlarged structural schematic diagram of the fourth pixel circuit portion in a display substrate provided in an embodiment of this application;

[0032] Figure 5 This is a schematic diagram of a second structure of a display substrate provided in an embodiment of this application;

[0033] Figure 6 A second enlarged structural schematic diagram of the first pixel circuit portion in the display substrate provided in an embodiment of this application;

[0034] Figure 7 A second enlarged structural schematic diagram of the fourth pixel circuit portion in the display substrate provided in an embodiment of this application;

[0035] Figure 8 This is a schematic diagram of a third structure of a display substrate provided in an embodiment of this application;

[0036] Figure 9 This is a schematic diagram of a fourth structure of a display substrate provided in an embodiment of this application. Detailed Implementation

[0037] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art based on this application are within the scope of protection of this application.

[0038] To realize a display, a display substrate requires multiple chips, such as driver (IC) chips, power chips, and data signal chips. The driver chip provides driving signals to the pixel units, the power chip provides power signals (e.g., voltage to the pixel units and ground signal to the driver chip), and the data signal chip provides both data and power signals to the driver chip. Typically, the power chip is located above the display substrate, providing power from above, including VR (red pixel power voltage), VG (green pixel power voltage), VB (blue pixel power voltage), and GND (ground). The data signal chip is located below the display substrate, providing data and power signals from below the screen, including Data and VCC (driver chip power signal). The pixel circuits are arranged in a matrix within the display substrate. To provide power and data signals to each pixel circuit, wiring is required from the power chip at the top and the data signal chip at the bottom of the display substrate to connect to each pixel circuit, allowing each pixel circuit to receive its corresponding power and data signals.

[0039] For COG products, the pixel circuit includes a pixel unit and a driver IC chip. For each pixel circuit, the driver IC chip is connected to the pixel unit and provides a drive signal to the pixel unit. Each pixel unit includes red, green, and blue pixels, where the red pixels emit red light, the green pixels emit green light, and the blue pixels emit blue light. The pixel circuits are arranged in a matrix on the display substrate. For each red pixel, the red pixel obtains its power supply voltage from the red pixel power line via a lead; for each green pixel, the green pixel obtains its power supply voltage from the green pixel power line via a lead; for each blue pixel, the blue pixel obtains its power supply voltage from the blue pixel power line via a lead; and for each driver IC chip, the driver IC chip is connected to the ground line GND via a lead; the driver IC chip obtains data signals from the data line Data via a lead; and the driver IC chip obtains its drive voltage from the drive power line VCC via a lead.

[0040] like Figure 1-1 As shown, Figure 1-1This is a schematic diagram of a display substrate wiring structure in related technologies. The display substrate includes multiple pixel circuits, each pixel circuit including a pixel unit and a driver IC chip (IC). For each pixel circuit, the driver IC chip is connected to the pixel unit and provides a driving signal to the pixel unit. Each pixel unit includes a red pixel (R), a green pixel (G), and a blue pixel (B), wherein the red pixel emits red light, the green pixel emits green light, and the blue pixel emits blue light.

[0041] The pixel circuits are arranged in a matrix on the display substrate. For each column of pixel circuits, the ground line of that column is directly led out from the driver IC side and connected to GND through a column-directed lead. The power supply voltage of the pixel unit in that column is led out from the pixel unit side and connected to its corresponding pixel power supply line through a column-directed lead. The data signal of the pixel unit in that column is led out from the driver IC side and connected to its corresponding data signal line through a column-directed lead.

[0042] For each row of pixel circuits, the corresponding driving power supply (VCC) is led out from the bottom of the display substrate and then routed through column leads and row leads.

[0043] Specifically, such as Figure 1-1 For example, VR, VGB, GND, Data, and VCC are all neatly routed in the row and column directions. For each pixel circuit, the driver IC chip of the pixel circuit is located on the right side of the pixel unit. For each red pixel, the red pixel obtains the power supply voltage from the red pixel power line VR via a lead. VR is routed from the left side of the red pixel. For the green and blue pixel power lines, these two power lines are collinear, which is VGB. For each green pixel, the green pixel obtains the power supply voltage from the green pixel power line VGB via a lead. For each blue pixel, the blue pixel obtains the power supply voltage from the blue pixel power line VGB via a lead. VGB is routed from the left side of both the blue and green pixels.

[0044] In other words, the power lines are located above the display substrate, extending from the left side of the red, green, and blue pixels, and then connected to the power lines located above the display substrate via directional wiring to obtain the corresponding power.

[0045] For each driver IC chip, the driver IC chip is connected to the ground line GND via a lead. Since the driver IC chip is located on the right side of the pixel unit, in order to save routing space, the lead is directly led out from the right side of the driver IC chip and connected to the ground line GND through column routing.

[0046] For each driver IC chip, the driver IC chip obtains data signals from the data line Data via leads; the driver IC chip obtains driving voltage from the driving power line VCC via leads. Because the driver IC chip is located on the right side of the pixel unit, and the data signals and the driving power supply of the driver IC are located on the lower side of the substrate, in order to save routing space, leads are directly led out from the right side of the driver IC chip and connected to the data signal lines and driving power supply lines located on the lower side of the substrate through column-oriented wiring.

[0047] For each column of pixel circuits, the ground wire of that column is directly led out from the driver IC side and connected to GND through the column-direction lead. The power supply voltage of the pixel unit of that column is led out from the pixel unit side and connected to its corresponding pixel power supply line through the column-direction lead. The data signal of the pixel unit of that column is led out from the driver IC side and connected to its corresponding data signal line through the column-direction lead.

[0048] For each row of pixel circuits, the corresponding driving power supply (VCC) is led out from the bottom of the display substrate and then routed through column leads and horizontal leads.

[0049] Specifically, such as Figure 1-1 As shown, VR, VGB, GND, Data, and VCC are all neatly routed in both row and column directions, as... Figure 1-2 As shown, Figure 1-2 Yes Figure 1-1 The pixel circuits at the two corners of the signal terminal below the display substrate are shown in magnified form for explanation.

[0050] Figure 1-2 Taking a display substrate comprising 160 columns and 180 rows of pixel circuits as an example, Data1 represents the data signal line corresponding to the first column of pixel circuits, and Data160 represents the data signal line corresponding to the 160th column of pixel circuits.

[0051] Furthermore, for each row of pixel circuits, the corresponding drive power supply (VCC) is led out from the bottom of the display substrate and then routed through column leads and horizontal leads. Therefore, the number of VCC lines in the row direction is equal to the number of rows; that is, the number of VCC lines in the row direction equals the number of pixel circuits. VCC1 is the drive power supply line corresponding to the first row of pixel circuits, and VCC180 is the drive power supply line corresponding to the 180th row of pixel circuits. The pixel circuit in the lower left corner contains Data1 and VCC180, and the one in the lower right corner contains VCC179 and Data160. Because the four corners of the glass substrate are easily damaged, and these signal lines and drive power supply lines are close to the edge of the display substrate, they are prone to sputter detachment, causing poor display circuitry.

[0052] Therefore, this application provides a display substrate, comprising:

[0053] The system comprises a pixel array, M data lines, and 2N drive power lines. The pixel array includes multiple pixel circuits arranged in a matrix. The drive power lines and the data lines intersect to define the pixel circuits as N rows of pixels and M columns of pixels. The data lines are used to provide data signals to the pixel circuits. The drive power lines are used to provide drive voltages to the pixel circuits. N and M are both integers greater than 1.

[0054] The aforementioned 2N drive power lines include N row-direction drive power lines and N column-direction drive power lines; the second to M-1 of the aforementioned M data lines extend along the column direction, the aforementioned row-direction drive power lines extend along the row direction, and the aforementioned second to N-1 column-direction drive power lines extend along the column direction.

[0055] The first data line among the aforementioned M data lines includes a column-direction extension portion A, a row-direction extension portion B, and a column-direction extension portion C; the Mth data line among the aforementioned M data lines includes a column-direction extension portion D, a row-direction extension portion E, and a column-direction extension portion F; the first column-direction drive power line among the aforementioned N column-direction drive power lines includes a column-direction extension portion G, a row-direction extension portion H, and a column-direction extension portion I; the Nth column-direction drive power line among the aforementioned N column-direction drive power lines includes a column-direction extension portion J, a row-direction extension portion K, and a column-direction extension portion L.

[0056] The column-direction extension portion A and the column-direction extension portion G are located between the first pixel circuit and the second pixel circuit, wherein the first pixel circuit is the pixel circuit on the Nth pixel row and the first pixel column, and the second pixel circuit is the pixel circuit on the Nth pixel row and the second pixel column; the column-direction extension portion C and the column-direction extension portion I are located between the first other pixel circuit and the second other pixel circuit, wherein the first other pixel circuit is the pixel circuit other than the first pixel circuit in the first pixel column, and the second other pixel circuit is the pixel circuit other than the second pixel circuit in the second pixel column;

[0057] The column direction extension portion A has a first distance in the row direction relative to the column direction extension portion C and is far away from the first end of the display substrate. The column direction extension portion G has a first distance in the row direction relative to the column direction extension portion I and is far away from the first end of the display substrate. The first end of the display substrate is the end where the first column of pixels is located.

[0058] The column-direction extension portions D and J are located between the third pixel circuit and the fourth pixel circuit, wherein the third pixel circuit is the pixel circuit on the Nth pixel row and the (M-1)th pixel column, and the fourth pixel circuit is the pixel circuit on the Nth pixel row and the Mth pixel column; the column-direction extension portions F and L are located on the side of the third other pixel circuit away from the first end, wherein the third other pixel circuit is the pixel circuit other than the fourth pixel circuit in the Mth pixel column.

[0059] In this embodiment, column direction extension portion A has a first distance in the row direction relative to column direction extension portion C and is far from the first end of the display substrate; column direction extension portion G has a first distance in the row direction relative to column direction extension portion I and is far from the first end of the display substrate. This is equivalent to moving the first data line and the first column direction driving power line inward at the corner. Column direction extension portions D and J are located between the third pixel circuit and the fourth pixel circuit; column direction extension portions F and L are located on the side of the third other pixel circuit far from the first end. This is equivalent to moving the Mth data line and the Nth column direction driving power line inward at the corner. By optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line, and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is offset inward towards the display substrate, reducing the probability of sputter detachment due to corner impact, thereby reducing the risk of wire defects.

[0060] In one example, see Figure 2 , Figure 2 A first structural schematic diagram of a display substrate provided in an embodiment of this application includes:

[0061] The system comprises a pixel array, M data lines, and 2N drive power lines (VCC). The pixel array includes multiple pixel circuits arranged in a matrix. The drive power lines and the data lines intersect to define the pixel circuits as N rows and M columns. The data lines are used to provide data signals to the pixel circuits. The drive power lines are used to provide drive voltages to the pixel circuits. Wherein, N and M are both integers greater than 1.

[0062] The aforementioned 2N drive power lines include N row-direction drive power lines and N column-direction drive power lines; the second to M-1 of the aforementioned M data lines extend along the column direction, the aforementioned row-direction drive power lines extend along the row direction, and the aforementioned second to N-1 column-direction drive power lines extend along the column direction.

[0063] The first data line among the aforementioned M data lines includes a column-direction extension portion A, a row-direction extension portion B, and a column-direction extension portion C; the Mth data line among the aforementioned M data lines includes a column-direction extension portion D, a row-direction extension portion E, and a column-direction extension portion F; the first column-direction drive power line among the aforementioned N column-direction drive power lines includes a column-direction extension portion G, a row-direction extension portion H, and a column-direction extension portion I; the Nth column-direction drive power line among the aforementioned N column-direction drive power lines includes a column-direction extension portion J, a row-direction extension portion K, and a column-direction extension portion L.

[0064] The column-direction extension portion A and the column-direction extension portion G are located between the first pixel circuit and the second pixel circuit, wherein the first pixel circuit is the pixel circuit on the Nth pixel row and the first pixel column, and the second pixel circuit is the pixel circuit on the Nth pixel row and the second pixel column; the column-direction extension portion C and the column-direction extension portion I are located between the first other pixel circuit and the second other pixel circuit, wherein the first other pixel circuit is the pixel circuit other than the first pixel circuit in the first pixel column, and the second other pixel circuit is the pixel circuit other than the second pixel circuit in the second pixel column;

[0065] The column direction extension portion A has a first distance in the row direction relative to the column direction extension portion C and is far away from the first end of the display substrate. The column direction extension portion G has a first distance in the row direction relative to the column direction extension portion I and is far away from the first end of the display substrate. The first end of the display substrate is the end where the first column of pixels is located.

[0066] The column-direction extension portions D and J are located between the third pixel circuit and the fourth pixel circuit, wherein the third pixel circuit is the pixel circuit on the Nth pixel row and the (M-1)th pixel column, and the fourth pixel circuit is the pixel circuit on the Nth pixel row and the Mth pixel column; the column-direction extension portions F and L are located on the side of the other third pixel circuits away from the first end, wherein the other third pixel circuits are the pixel circuits in the Mth pixel column other than the fourth pixel circuit;

[0067] The i-th data line is used to provide data signals to the pixel circuits in the i-th pixel column, where i is an integer belonging to 1 to M.

[0068] Row drive power lines are drive power lines that extend along the row direction, and column drive power lines are power lines that drive along the column direction. In one example, such as... Figure 2As shown, both the row-direction drive power lines and the column-direction drive power lines are VCC lines. Each row-direction drive power line provides a VCC signal source for one row of pixel circuits, and each column-direction drive power line provides a VCC signal source for one row-direction drive power line. In addition to data lines and drive power lines, the display substrate may also include VR, VGB, and GND lines, which will not be described in detail here.

[0069] like Figure 2 As shown, the pixel array in the display substrate includes N pixel rows and M pixel columns. From left to right, the M data lines are sequentially named the first data line, second data line, ..., the (M-1)th data line, and the Mth data line. The N column-direction driving power lines are sequentially named the first column-direction driving power line, second column-direction driving power line, ..., the (N-1)th column-direction driving power line, and the Nth column-direction driving power line. The first end of the display substrate is the left side, i.e., the end where the first pixel column is located. The first pixel circuit is the first pixel circuit in the last pixel row, the second pixel circuit is the second pixel circuit in the last pixel row, the third pixel circuit is the (M-1)th pixel circuit in the last pixel row, and the fourth pixel circuit is the Mth pixel circuit in the last pixel row.

[0070] See Figure 3 , Figure 3 This is a magnified view showing the location of the first pixel circuit in the display substrate. The column-direction extension A of the first data line has a first distance in the row direction relative to the column-direction extension C and is farther from the left end of the display substrate; that is, the first data line has been moved inward at the left corner. The column-direction extension G of the first column-direction driving power line has a first distance in the row direction relative to the column-direction extension I and is farther from the left end of the display substrate; that is, the first column-direction driving power line has been moved inward at the left corner. The distance in the row direction between the column-direction extension A and the column-direction extension C is equal to the distance in the row direction between the column-direction extension G and the column-direction extension I. It can be understood that... Figure 3 The row extension portion B of the first data line and the row extension portion H of the first column drive power line are both schematically shown as straight lines. It is understood that the row extension portion B and the row extension portion H can be straight lines, wedge lines, or arc lines, etc., all of which are within the protection scope of this application.

[0071] See Figure 4 , Figure 4This is a magnified view showing the location of the fourth pixel circuit in the display substrate. The column-direction extension D of the Mth data line is located between the third and fourth pixel circuits, and the column-direction extension F of the Mth data line is located to the right of the other third pixel circuits (the pixel circuits in the last column excluding the fourth pixel circuit). That is, the Mth data line has been moved inward at its right corner. The column-direction extension J of the Nth column-direction driving power line is located between the third and fourth pixel circuits, and the column-direction extension L of the Nth column-direction driving power line is located to the right of the other third pixel circuits. That is, the Nth column-direction driving power line has been moved inward at its right corner. It is understandable that... Figure 4 The row extension portion E of the Mth data line and the row extension portion K of the Nth column drive power line are both schematically shown as straight lines. It is understood that the row extension portion E and the row extension portion K can be straight lines, wedge lines, or arc lines, etc., all of which are within the protection scope of this application.

[0072] like Figure 2 As shown, the i-th data line is used to provide data signals to the pixel circuits in the i-th pixel column. For example, the first data line is used to provide data signals to the pixel circuits in the first pixel column, the second data line is used to provide data signals to the pixel circuits in the second pixel column, and the M-th data line is used to provide data signals to the pixel circuits in the M-th pixel column, etc.

[0073] In this embodiment, the data signal lines (Data) and drive power lines (VCC) of the pixel circuits on both sides of the signal terminal are moved inward. Specifically, the VCC line in the lower right corner is introduced from the left side of the pixel circuit, with only the perforation positions of the vertical and horizontal lines changed. The Data line is also introduced from the left side of the pixel, bypassing the pixel circuit and connecting to the Data terminal of the IC on the right side, then extending upward to connect with the original Data line. The VCC and Data lines in the lower left corner are also moved inward via the illustrated wiring. By optimizing the substrate wiring of the pixel circuits on both sides of the signal terminal below the display substrate, the probability of sputter detachment due to corner impacts is reduced, thereby decreasing the risk of wiring defects.

[0074] In one possible implementation, see Figure 5 The aforementioned display substrate also includes a first additional data line and a second additional data line;

[0075] The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The Mth data line is used to provide data signals to the pixel circuits in the Mth column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The second additional data line is used to provide data signals to the fourth pixel circuit. The jth data line is used to provide data signals to the pixel circuits in the jth column of pixels, where j is an integer from 2 to M-1.

[0076] The first additional data line is disposed between the first pixel circuit and the second pixel circuit. The first additional data line has a second distance from the first data line in the row direction and is located on the side closer to the first end.

[0077] See Figure 6 , Figure 6 This is a second enlarged partial view showing the location of the first pixel circuit in an embodiment of this application. The first column of pixel circuits provides data signals through two data lines: a first data line and a first supplementary data line. The first supplementary data line provides data signals to the first pixel circuit, and the first data line provides data signals to the first other pixel circuits (the pixel circuits in the first column of pixel circuits other than the first pixel circuit).

[0078] See Figure 7 , Figure 7 This is a second enlarged view showing the location of the fourth pixel circuit in an embodiment of this application. The Mth column pixel circuit provides data signals through two data lines: the Mth data line and the second additional data line. The second additional data line provides data signals to the fourth pixel circuit, and the Mth data line provides data signals to the other pixel circuits (the pixel circuits in the Mth column other than the fourth pixel circuit). The routing directions of the first and second additional data lines may be the same or different, both within the scope of protection of this application.

[0079] In one example, the first and second additional data lines can be directly led out from the driver IC chip side and then connected to the Data line from below the substrate. This routing method can reduce the length of the wiring.

[0080] In this embodiment, the first data line and the first column direction driving power line are moved inward at the corners, and the Mth data line and the Nth column direction driving power line are also moved inward at the corners. Even if the first and second additional data lines are detached due to corner impacts, it does not affect the normal display of the first and third other pixel circuits. By optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line, and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is shifted inward to the display substrate, thereby reducing the probability of sputter detachment due to corner impacts and reducing the risk of wire defects.

[0081] In one possible implementation, the display substrate may include a first additional data line, but not a second additional data line, see [link to relevant documentation]. Figure 8 The aforementioned display substrate also includes a first additional data line;

[0082] The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The j-th data line is used to provide data signals to the pixel circuits in the j-th column of pixels, where j is an integer from 2 to M.

[0083] The first additional data line is disposed between the first pixel circuit and the second pixel circuit. The first additional data line has a second distance from the first data line in the row direction and is located on the side closer to the first end.

[0084] See Figure 6 , Figure 6 This is a second enlarged partial view showing the location of the first pixel circuit in an embodiment of this application. The first column of pixel circuits provides data signals through two data lines: a first data line and a first supplementary data line. The first supplementary data line provides data signals to the first pixel circuit, and the first data line provides data signals to the first other pixel circuits (the pixel circuits in the first column of pixel circuits other than the first pixel circuit).

[0085] See Figure 4 , Figure 4This is a magnified view showing the location of the fourth pixel circuit in the display substrate. The column-direction extension D of the Mth data line is located between the third and fourth pixel circuits, and the column-direction extension F of the Mth data line is located to the right of the other third pixel circuits (the pixel circuits in the last column excluding the fourth pixel circuit). In other words, the Mth data line has been moved inward at its right corner. Similarly, the column-direction extension J of the Nth column-direction driving power line is located between the third and fourth pixel circuits, and the column-direction extension L of the Nth column-direction driving power line is located to the right of the other third pixel circuits. This also indicates that the Nth column-direction driving power line has been moved inward at its right corner.

[0086] In this embodiment, the first data line and the first column direction driving power line are moved inward at the corners, and the Mth data line and the Nth column direction driving power line are also moved inward at the corners. Even if the first additional data line falls off due to a corner impact, it does not affect the normal display of the first other pixel circuits. By optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line, and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is shifted inward to the display substrate, thereby reducing the probability of sputter detachment due to corner impact and reducing the risk of wire defects.

[0087] In one possible implementation, the display substrate may include a second additional data line, but not the first additional data line; see [link to relevant documentation]. Figure 9 The aforementioned display substrate also includes a second additional data line;

[0088] The Mth data line is used to provide data signals for the pixel circuits in the Mth pixel column and the first to N-1th pixel rows. The second additional data line is used to provide data signals for the fourth pixel circuit. The jth data line is used to provide data signals for the pixel circuits in the jth pixel column, where j is an integer from 1 to M-1.

[0089] The second additional data line is located on the side of the fourth pixel circuit away from the first end.

[0090] See Figure 3 , Figure 3 This is a magnified partial view showing the location of the first pixel circuit in the display substrate. The column-direction extension A of the first data line has a first distance in the row direction relative to the column-direction extension C and is farther from the left end of the display substrate; that is, the first data line has been moved inward at its left corner. Similarly, the column-direction extension G of the first column-direction driving power line has a first distance in the row direction relative to the column-direction extension I and is farther from the left end of the display substrate; that is, the first column-direction driving power line has been moved inward at its left corner.

[0091] See Figure 7 , Figure 7 This is a second enlarged view showing the location of the fourth pixel circuit in an embodiment of this application. The Mth column pixel circuit provides data signals through two data lines: the Mth data line and the second additional data line. The second additional data line provides data signals to the fourth pixel circuit, and the Mth data line provides data signals to the other third pixel circuits (the pixel circuits in the Mth column other than the fourth pixel circuit).

[0092] In this embodiment, the first data line and the first column direction driving power line are moved inward at the corners, and the Mth data line and the Nth column direction driving power line are also moved inward at the corners. Even if the second additional data line falls off due to a corner impact, it does not affect the normal display of the other pixel circuits. By optimizing the arrangement of the first data line, the Mth data line, the first column direction driving power line, and the Nth column direction driving power line in the display substrate, the substrate wiring of the pixel circuits on both sides below the display substrate is shifted inward to the display substrate, thereby reducing the probability of sputter detachment due to corner impact and reducing the risk of wire defects.

[0093] The second distance can be the same as or different from the first distance, and can be set according to the actual situation. In one possible implementation, the second distance is 0.4 mm or more (including 0.4 mm), and the first distance is 0.4 mm or more (including 0.4 mm).

[0094] The column-direction extension portion A of the first data line and the column-direction extension portion G of the first column-direction drive power line are moved inward by a distance of 0.4 mm or more. The column-direction extension portion D of the Mth data line and the column-direction extension portion J of the Nth column-direction drive power line are moved inward by a distance of 0.4 mm or more. This offsets the substrate wiring of the pixel circuits on both sides below the display substrate towards the inside of the display substrate, thereby reducing the probability of sputter detachment due to corner impacts and reducing the risk of line defects.

[0095] In one possible implementation, the row direction extension portion B, row direction extension portion E, row direction extension portion H, and row direction extension portion K are straight lines, wedge lines, or arc lines.

[0096] The routing shapes of the row direction extension portions B, E, H, and K can be set according to the actual situation and are not limited to straight routing. Other routing shapes, such as wedge-shaped routing or arc-shaped routing, are within the protection scope of this application.

[0097] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0098] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0099] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application are included within the scope of protection of this application.

Claims

1. A display substrate, characterized in that, include: The system comprises a pixel array, M data lines, and 2N drive power lines. The pixel array includes multiple pixel circuits arranged in a matrix. The drive power lines and the data lines intersect to define the pixel circuits as N rows and M columns of pixels. The data lines are used to provide data signals to the pixel circuits. The drive power lines are used to provide drive voltages to the pixel circuits. Wherein, N and M are both integers greater than 1. The 2N drive power lines include N row-direction drive power lines and N column-direction drive power lines; the second to M-1 data lines of the M data lines extend along the column direction, the row-direction drive power lines extend along the row direction, and the second to N-1 column-direction drive power lines extend along the column direction. The first data line among the M data lines includes a column-direction extension portion A, a row-direction extension portion B, and a column-direction extension portion C; the Mth data line among the M data lines includes a column-direction extension portion D, a row-direction extension portion E, and a column-direction extension portion F; the first column-direction drive power line among the N column-direction drive power lines includes a column-direction extension portion G, a row-direction extension portion H, and a column-direction extension portion I; the Nth column-direction drive power line among the N column-direction drive power lines includes a column-direction extension portion J, a row-direction extension portion K, and a column-direction extension portion L. The column-direction extension portion A and the column-direction extension portion G are located between the first pixel circuit and the second pixel circuit, wherein the first pixel circuit is the pixel circuit on the Nth pixel row and the first pixel column, and the second pixel circuit is the pixel circuit on the Nth pixel row and the second pixel column; the column-direction extension portion C and the column-direction extension portion I are located between the first other pixel circuit and the second other pixel circuit, wherein the first other pixel circuit is the pixel circuit other than the first pixel circuit in the first pixel column, and the second other pixel circuit is the pixel circuit other than the second pixel circuit in the second pixel column; The column direction extension portion A has a first distance in the row direction relative to the column direction extension portion C and is far from the first end of the display substrate; the column direction extension portion G has a first distance in the row direction relative to the column direction extension portion I and is far from the first end of the display substrate; wherein the first end of the display substrate is the end where the first column of pixels is located. The column-direction extension portion D and the column-direction extension portion J are located between the third pixel circuit and the fourth pixel circuit, wherein the third pixel circuit is the pixel circuit on the Nth pixel row and the (M-1)th pixel column, and the fourth pixel circuit is the pixel circuit on the Nth pixel row and the Mth pixel column; the column-direction extension portion F and the column-direction extension portion L are located on the side of the third other pixel circuit away from the first end, wherein the third other pixel circuit is the other pixel circuits in the Mth pixel column besides the fourth pixel circuit.

2. The display substrate according to claim 1, characterized in that, The i-th data line is used to provide data signals to the pixel circuits in the i-th pixel column, where i is an integer belonging to 1 to M.

3. The display substrate according to claim 1, characterized in that, The display substrate further includes a first additional data line and a second additional data line; The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The Mth data line is used to provide data signals to the pixel circuits in the Mth column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The second additional data line is used to provide data signals to the fourth pixel circuit. The jth data line is used to provide data signals to the pixel circuits in the jth column of pixels, where j is an integer belonging to 2 to M-1.

4. The display substrate according to claim 1, characterized in that, The display substrate also includes a first additional data line; The first data line is used to provide data signals to the pixel circuits in the first column of pixels and the first to N-1 rows of pixels. The first additional data line is used to provide data signals to the first pixel circuit. The j-th data line is used to provide data signals to the pixel circuits in the j-th column of pixels, where j is an integer from 2 to M.

5. The display substrate according to claim 3 or 4, characterized in that, The first additional data line is disposed between the first pixel circuit and the second pixel circuit. The first additional data line has a second distance from the first data line in the row direction and is located on the side closer to the first end.

6. The display substrate according to claim 5, characterized in that, The second distance is 0.4 mm or more.

7. The display substrate according to claim 1, characterized in that, The display substrate also includes a second additional data line; The Mth data line is used to provide data signals for the pixel circuits in the Mth pixel column and the first to N-1th pixel rows. The second additional data line is used to provide data signals for the fourth pixel circuit. The jth data line is used to provide data signals for the pixel circuits in the jth pixel column, where j is an integer belonging to 1 to M-1.

8. The display substrate according to claim 7, characterized in that, The second additional data line is located on the side of the fourth pixel circuit away from the first end.

9. The display substrate according to claim 1, characterized in that, The first distance is 0.4 mm or more.

10. The display substrate according to claim 1, characterized in that, The row direction extension portions B, E, H, and K are straight lines, wedge-shaped lines, or arc-shaped lines.

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