Package structure and method of forming the same

Abstract

A packaging structure and a forming method thereof, the forming method comprising: mounting a passive device on a first surface of a substrate; forming a first plastic encapsulation layer covering the passive device and the first surface of the substrate; mounting a back surface of the first chip on a second surface of the substrate; providing a metal connection structure comprising a horizontal metal sheet and vertical metal pins electrically connected to the horizontal metal sheet, the vertical metal pins protruding from a bottom surface of the horizontal metal sheet; mounting the metal connection structure on the second surface of the substrate, the vertical metal pins of the metal connection structure being electrically connected to corresponding second connection terminals of the second surface of the substrate, and the horizontal metal sheet of the metal connection structure being electrically connected to corresponding part of outer connection terminals of the functional surface of the first chip. The number of packaged passive devices is increased and the manufacturing cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of packaging, and more particularly to a packaging structure and a method for forming the same. Background Technology

[0002] Passive components, also known as passive devices, are electronic components that do not contain an electronic source and cannot amplify or regulate current or signals. They only participate in basic circuit structures, performing passive functions such as transmitting and distributing electrical energy. The most common examples include resistors, capacitors, inductors, ceramic resonators, crystal oscillators, and transformers. From a working perspective, passive components do not consume electrical energy themselves or convert electrical energy into other forms of energy; they also only require an input signal and do not need an external power supply to operate normally.

[0003] In semiconductor chip packaging, the semiconductor chip and corresponding passive components are usually packaged together to meet specific functions. Currently, when packaging semiconductor chips and passive components, the passive components are usually placed on the back side of the semiconductor chip, and the two are electrically connected through a through-silicon via (TSV) interconnect structure that penetrates the semiconductor chip. This packaging method limits the number of passive components that can be packaged, and the TSV process is complex and costly. Summary of the Invention

[0004] Some embodiments of the present invention provide a method for forming an encapsulation structure, including:

[0005] A substrate is provided, the substrate including opposing first and second surfaces, the first surface of the substrate having a plurality of first connection terminals, the second surface of the substrate having a plurality of second connection terminals, and the first connection terminals being electrically connected to corresponding second connection terminals;

[0006] A passive device is mounted on a first surface of the substrate, and the passive device is electrically connected to a corresponding first connection terminal on the first surface of the substrate.

[0007] A first molding layer is formed that encapsulates the passive device and covers the first surface of the substrate;

[0008] A first chip is provided, the first chip including opposing back sides and functional sides, the functional sides having a plurality of external terminals;

[0009] The back side of the first chip is attached to the second surface of the substrate;

[0010] A metal connection structure is provided, the metal connection structure including a horizontal metal sheet and a vertical metal pin electrically connected to the horizontal metal sheet, the vertical metal pin protruding from the bottom surface of the horizontal metal sheet;

[0011] The metal connection structure is attached to the second surface of the substrate, the vertical metal pins of the metal connection structure are electrically connected to the corresponding second connection terminals on the second surface of the substrate, and the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminals of the functional surface of the first chip.

[0012] A second molding compound is formed to cover the metal connection structure and the first chip, and to cover the second surface of the substrate. The second molding compound exposes the top surface of other external terminals on the functional surface of the first chip.

[0013] A first solder bump is formed on the top surface of the exposed external terminal.

[0014] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are an integral structure.

[0015] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and a portion of the bottom surface of the horizontal metal sheet is soldered to the top surface of the vertical metal pin through a solder layer.

[0016] In some embodiments, the vertical metal pin in the metal connection structure includes a first part and a second part, the first part being located above the second part, the bottom end of the first part being soldered to the top end of the second part through a solder layer, and the first part being integral with the horizontal metal sheet in the metal connection structure.

[0017] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and the horizontal metal sheet is formed on the top surface of the vertical metal pin by an electroplating process.

[0018] In some embodiments, when the metal connection structure is mounted on the second surface of the substrate, the bottom surface of the vertical metal pin of the metal connection structure is electrically connected to the corresponding second connection terminal of the second surface of the substrate through a first bonding auxiliary layer, and the bottom surface of the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminal of the first chip functional surface through a second bonding auxiliary layer.

[0019] In some embodiments, the substrate is a metal lead frame, a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate.

[0020] In some embodiments, the metal lead frame has a plurality of discrete pins, with the upper and lower surfaces of the pins serving as the first connection terminal and the second connection terminal, respectively.

[0021] In some embodiments, the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate all include the opposing first surface and second surface. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and the corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals.

[0022] In some embodiments, the first surface of the substrate further has a first redistribution layer, which serves as a first connection terminal.

[0023] In some embodiments, the first chip has a plurality of third pads on its functional surface, and the functional surface also has a second redistribution layer electrically connected to the corresponding third pads, with a portion of the second redistribution layer serving as an external terminal electrically connected to a horizontal metal sheet in a metal connection structure; a portion of the second redistribution layer also has a raised metal pillar, with the metal pillar serving as an external terminal on which a first solder bump is formed on its top surface.

[0024] In some embodiments, the first chip has a plurality of third pads on its functional surface, and the third pads also have raised metal pillars. Some of the metal pillars serve as external terminals electrically connected to the horizontal metal sheet in the metal connection structure, and some of the metal pillars serve as external terminals with a first solder bump formed on their top surface.

[0025] In some embodiments, the method further includes forming a second solder bump on a portion of the top surface of the horizontal metal sheet of the metal connection structure.

[0026] In some embodiments, the size of the second solder bump is the same as or different from the size of the first solder bump; the second solder bump is located outside or inside the boundary of the first chip.

[0027] In some embodiments, the method further includes: providing a second chip, mounting the second chip on a first surface of the substrate, and electrically connecting the second chip to the substrate.

[0028] In some embodiments, the method further includes: providing a heat sink and attaching the heat sink to a first surface of the substrate.

[0029] Some embodiments of this application also provide a packaging structure, including:

[0030] A substrate, the substrate including opposing first and second surfaces, the first surface of the substrate having a plurality of first connection terminals, the second surface of the substrate having a plurality of second connection terminals, the first connection terminals being electrically connected to corresponding second connection terminals;

[0031] A passive device is mounted on a first surface of the substrate, and the passive device is electrically connected to a corresponding first connection terminal on the first surface of the substrate.

[0032] A first molding compound layer covering the passive device and the first surface of the substrate;

[0033] A first chip, comprising a back side and a functional side, the functional side having a plurality of external terminals, the back side of the first chip being mounted on a second surface of the substrate;

[0034] A metal connection structure includes a horizontal metal sheet and a vertical metal pin electrically connected to the horizontal metal sheet. The vertical metal pin protrudes from the bottom surface of the horizontal metal sheet. The metal connection structure is mounted on the second surface of the substrate. The vertical metal pin of the metal connection structure is electrically connected to a corresponding second connection terminal on the second surface of the substrate. The horizontal metal sheet of the metal connection structure is electrically connected to a corresponding external terminal on the functional surface of the first chip.

[0035] A second molding compound covers the metal connection structure and the first chip, and a second molding compound covers the second surface of the substrate, the second molding compound exposing the top surface of other external terminals on the functional surface of the first chip;

[0036] The first solder bump is located on the top surface of the exposed external terminal.

[0037] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are an integral structure.

[0038] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and a portion of the bottom surface of the horizontal metal sheet is soldered to the top surface of the vertical metal pin through a solder layer.

[0039] In some embodiments, the vertical metal pin in the metal connection structure includes a first part and a second part, the first part being located above the second part, the bottom end of the first part being soldered to the top end of the second part through a solder layer, and the first part being integral with the horizontal metal sheet in the metal connection structure.

[0040] In some embodiments, the horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and the horizontal metal sheet is formed on the top surface of the vertical metal pin by an electroplating process.

[0041] In some embodiments, the bottom surface of the vertical metal pin of the metal connection structure is electrically connected to the corresponding second connection terminal of the second surface of the substrate via a first bonding auxiliary layer, and the bottom surface of the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminal of the first chip functional surface via a second bonding auxiliary layer.

[0042] In some embodiments, the substrate is a metal lead frame, a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate.

[0043] In some embodiments, the metal lead frame has a plurality of discrete pins, with the upper and lower surfaces of the pins serving as the first connection terminal and the second connection terminal, respectively.

[0044] In some embodiments, the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate all include the opposing first surface and second surface. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and the corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals.

[0045] In some embodiments, the first surface of the substrate further has a first redistribution layer, which serves as a first connection terminal.

[0046] In some embodiments, the first chip has a plurality of third pads on its functional surface, and the functional surface also has a second redistribution layer electrically connected to the corresponding third pads, with a portion of the second redistribution layer serving as an external terminal electrically connected to a horizontal metal sheet in a metal connection structure; a portion of the second redistribution layer also has a raised metal pillar, with the metal pillar serving as an external terminal having a first solder bump on its top surface.

[0047] In some embodiments, the first chip has a plurality of third pads on its functional surface, and the third pads also have raised metal pillars. Some of the metal pillars serve as external terminals electrically connected to the horizontal metal sheet in the metal connection structure, and some of the metal pillars serve as external terminals with a first solder bump on their top surface.

[0048] In some embodiments, the first chip has a plurality of third pads on its functional surface, and the functional surface also has a second redistribution layer electrically connected to the corresponding third pads. The second redistribution layer also has raised metal pillars, with the metal pillars located at the edges serving as external terminals electrically connected to the horizontal metal sheets in the metal connection structure, and the metal pillars located in the middle serving as external terminals with first solder bumps on their top surfaces.

[0049] In some embodiments, it further includes: a second solder bump located on a portion of the top surface of the horizontal metal sheet of the metal connection structure.

[0050] In some embodiments, the size of the second solder bump is the same as or different from the size of the first solder bump; the second solder bump is located outside or inside the boundary of the first chip.

[0051] In some embodiments, the substrate further includes a second chip, which is mounted on a first surface of the substrate and is electrically connected to the substrate.

[0052] In some embodiments, the substrate further includes a heat sink, which is attached to a first surface of the substrate.

[0053] The packaging structure and its formation method in some of the foregoing embodiments of the present invention, wherein the formation method first mounts a passive device onto a first surface of a substrate, and then forms a first molding compound covering the passive device and the first surface of the substrate; the back side of the first chip is mounted onto a second surface of the substrate; a metal connection structure is provided, the metal connection structure including a horizontal metal sheet and vertical metal pins electrically connected to the horizontal metal sheet, the vertical metal pins protruding from the bottom surface of the horizontal metal sheet; the metal connection structure is mounted onto the second surface of the substrate, the vertical metal pins of the metal connection structure are electrically connected to corresponding second connection terminals on the second surface of the substrate, and the horizontal metal sheet of the metal connection structure is electrically connected to corresponding external terminals on the functional surface of the first chip. When mounting the passive device, the area of ​​the back side of the first chip is not limited, thus increasing the number of passive devices that can be packaged. Furthermore, mounting the metal connection structure onto the second surface of the substrate interconnects the first chip and the substrate, and the first chip and the passive device are interconnected through the substrate. The mounting process of the metal connection structure is simpler and less expensive than the through-silicon via (TSV) process. Attached Figure Description

[0054] Figures 1-4 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0055] Figure 5 This is a schematic diagram illustrating the formation process of the packaging structure in some other embodiments of the present invention;

[0056] Figure 6 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0057] Figure 7 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0058] Figure 8 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0059] Figure 9 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0060] Figure 10 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0061] Figure 11 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0062] Figure 12 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0063] Figure 13 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention;

[0064] Figure 14 This is a schematic diagram illustrating the formation process of the packaging structure in some embodiments of the present invention. Detailed Implementation

[0065] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings. In describing the embodiments of the present invention in detail, for ease of explanation, the schematic diagrams may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0066] Some embodiments of the present invention first provide a method for forming an encapsulation structure, which will be described in detail below with reference to the accompanying drawings.

[0067] refer to Figure 1 A substrate 100 is provided, the substrate 100 includes a first surface and a second surface opposite to each other, the first surface of the substrate 100 has a plurality of first connection terminals, the second surface of the substrate 100 has a plurality of second connection terminals, the first connection terminals are electrically connected to the corresponding second connection terminals; a passive device 201 is mounted on the first surface of the substrate 100, the passive device 201 is electrically connected to the corresponding first connection terminal of the first surface of the substrate 100.

[0068] In one specific embodiment, the substrate 100 is a metal lead frame having a plurality of discrete pins 101. Adjacent pins 101 are isolated by an isolation layer, and the upper and lower surfaces of the pins 101 serve as the first connection terminal and the second connection terminal, respectively. In other embodiments, the metal lead frame includes the opposing first and second surfaces. A first redistribution layer 102 is also formed on the first surface of the metal lead frame, interconnecting a portion of the pins 101. In this case, the first redistribution layer 102 on the first surface of the metal lead frame serves as the first connection terminal, and the lower surface of the pins 101 serves as the second connection terminal. The material of the first redistribution layer 102 can be one or more of Al, Cu, Ag, Au, Pt, Ni, Ti, TiN, TaN, Ta, TaC, W, and WN.

[0069] In some other embodiments, the substrate 100 can be a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate. Each of the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate includes opposing first and second surfaces. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals. In other embodiments, a first redistribution layer electrically connected to the first pads is formed on the first surface of the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate. In this case, the first redistribution layer 102 on the first surface of the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate serves as the first connection terminal, and the second pads serve as the second connection terminals. The packaging structure of this application enables the packaging of different types of substrates.

[0070] The number of mounted passive devices 201 can be one or more (two or more). This application uses the mounting of two passive devices 201 as an example for illustration. The passive device 201 can be one or more of resistors, capacitors, and inductors. The passive device 201 can also be one or more of ceramic resonators, crystal oscillators, transformers, converters, gradients, matching networks, resonators, filters, mixers, switches, bridges, and antennas.

[0071] The passive device 201 has pins. In some embodiments, the passive device 201 is electrically connected to a corresponding first connection terminal on the first surface of the substrate 100 via a metal bonding auxiliary layer. In some embodiments, the metal bonding auxiliary layer includes a solder layer, and the material of the metal bonding auxiliary layer is one or more of tin, tin-silver, tin-lead, silver-copper, tin-silver-copper, tin-silver-zinc, tin-zinc, tin-bismuth-indium, tin-indium, tin-gold, tin-copper, tin-zinc-indium, or tin-silver-antimony. The material of the metal bonding auxiliary layer may also be silver, nickel-gold, or nickel-palladium-gold.

[0072] refer to Figure 2 A first molding layer 106 is formed that covers the passive device 201 and the first surface of the substrate 100.

[0073] The first molding layer 106 is used to protect and seal the passive device 201.

[0074] In some embodiments, the material of the first molding layer 106 may be a filler-containing epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin; or it may be a filler-containing polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyimide, ethylene-vinyl acetate copolymer, or polyvinyl alcohol. The filler may be an inorganic filler or an organic filler. The forming process of the first molding layer 106 includes injection molding or transfer molding.

[0075] refer to Figure 3 A first chip 301 is provided, the first chip 301 includes an opposing back side and a functional side, the functional side having a plurality of external terminals; the back side of the first chip 301 is attached to the second surface of the substrate 100.

[0076] One portion of the external terminals on the functional surface of the first chip 301 are subsequently used for electrical connection with the horizontal metal sheet in the metal connection structure, and the top surface of the other portion of the external terminals is subsequently formed with a first solder bump.

[0077] In some embodiments, continue to refer to Figure 3The first chip 301 has a plurality of third pads 302 on its functional surface. The functional surface also has a second redistribution layer 308 electrically connected to the corresponding third pads 302. A portion of the second redistribution layer 308 serves as an external terminal for subsequent electrical connection to a horizontal metal sheet in a metal connection structure. A portion of the second redistribution layer 308 also has protruding metal pillars 307, which serve as external terminals for which first solder bumps are subsequently formed on their top surfaces. The third pads 302 are isolated from each other by an insulating layer 305. The second redistribution layers 308 are isolated from each other and from the third pads 302 by a passivation layer 306. The passivation layer 306 has a first opening exposing the surface of the corresponding third pad 302. The second redistribution layer 308 is located in the first opening and on a portion of the passivation layer 306 surface on both sides of the first opening. In other embodiments, the specific structure of the external terminals of the first chip 301 may differ, and will be described in detail in subsequent embodiments.

[0078] In some embodiments, the material of the third pad 302 is one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver, or an alloy thereof. The materials of the second redistribution layer 308 and the metal pillar 307 are one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver, or an alloy thereof. The material of the insulating layer 305 is one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbon oxycarbide, and silicon carbonitride. The material of the passivation layer 306 is a polymer material, such as resin.

[0079] The back side of the first chip 301 is attached to the second surface of the substrate 100 by adhesive 304.

[0080] In some embodiments, the first chip 301 may be one of a signal processing chip, a logic control chip, a memory chip, a sensor chip, a power supply chip, or a radio frequency chip.

[0081] refer to Figure 4 A metal connection structure 400 is provided, the metal connection structure 400 including a horizontal metal sheet 41 and a vertical metal pin 42 electrically connected to the horizontal metal sheet 41, the vertical metal pin 42 protruding from the bottom surface of the horizontal metal sheet 41; the metal connection structure 400 is mounted on the second surface of the substrate 100, the vertical metal pin 42 of the metal connection structure 400 is electrically connected to a corresponding second connection terminal on the second surface of the substrate 100, and the horizontal metal sheet 41 of the metal connection structure 400 is electrically connected to a corresponding external terminal on the functional surface of the first chip 301.

[0082] In one specific embodiment, the horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are an integral structure. Figure 4 (To facilitate distinction, the horizontal metal sheet 41 and the vertical metal pin 42 are separated by a dashed line). The horizontal metal sheet 41 and the vertical metal pin 42 are made of the same material, which can be one or more of W, Al, Cu, Ti, Ag, Au, Pt, and Ni. The metal connection structure 400 can be manufactured by machining or molding. In other embodiments, the specific structure of the metal connection structure 400 may differ, which will be described in detail in subsequent embodiments.

[0083] In one embodiment, the vertical metal pins 42 of the metal connection structure 400 are connected to corresponding second connection terminals (see reference) on the second surface of the substrate 100. Figure 4 The second connection terminal is electrically connected to the lower surface of the pin 101 in the substrate 100. In other embodiments, when the second pad on the second surface of the substrate is used as the second connection terminal, the vertical metal pin 42 of the metal connection structure 400 is electrically connected to the corresponding second pad on the second surface of the substrate.

[0084] In some embodiments, when the metal connection structure 400 is mounted on the second surface of the substrate 100, the bottom surface of the vertical metal pin 42 of the metal connection structure 400 is electrically connected to the corresponding second connection terminal of the second surface of the substrate 100 through the first bonding auxiliary layer 401, and the bottom surface of the horizontal metal sheet 41 of the metal connection structure 400 is electrically connected to the corresponding external terminal (second redistribution layer 308) of the functional surface of the first chip 301 through the second bonding auxiliary layer 402.

[0085] The first bonding auxiliary layer 401 and the second bonding auxiliary layer 402 include solder layers. The materials of the first bonding auxiliary layer 401 and the second bonding auxiliary layer 402 can be one or more of tin, tin silver, tin lead, silver copper, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony. The materials of the first bonding auxiliary layer 401 and the second bonding auxiliary layer 402 can also be silver, nickel gold, or nickel palladium gold.

[0086] In this application, the metal connection structure 400 is formed on the second surface of the substrate 100 by a mounting process, interconnecting the first chip 301 and the substrate 100, and interconnecting the first chip 301 with the passive device 201 through the substrate 100, which simplifies the formation process and reduces the manufacturing cost.

[0087] Continue to refer to Figure 4A second molding compound 116 is formed to cover the metal connection structure 400 and the first chip 301 and to cover the second surface of the substrate 100. The second molding compound 116 exposes the top surface of other external terminals on the functional surface of the first chip 301. A first solder bump 309 is formed on the top surface of the exposed external terminals.

[0088] The second molding layer 116 is used to protect and seal the metal connection structure 400 and the first chip 301.

[0089] In some embodiments, the material of the second molding layer 116 may be a filler-containing epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin; or it may be a filler-containing polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyimide, ethylene-vinyl acetate copolymer, or polyvinyl alcohol. The filler may be an inorganic filler or an organic filler. The forming process of the second molding layer 116 includes injection molding or transfer molding.

[0090] In one specific embodiment, the other external terminal is a metal pillar 307. When forming the second molding layer 116, the second molding layer 116 is subjected to a chemical mechanical polishing process or an etching process, so that the formed second molding layer 116 exposes the top surface of the other external terminal (metal pillar 307).

[0091] The first solder bump 309 can be used to connect other package structures, package substrates, or semiconductor chips. The first solder bump 309 is square, spherical, or ellipsoidal in shape.

[0092] In some embodiments, the material of the first solder bump 309 may be one or more of tin, tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony. The first solder bump 309 is formed by stencil printing and reflow processes.

[0093] In some embodiments, a solder resist layer 117 is formed on the surface of the second molding compound 116 before the first solder bump 309 is formed.

[0094] The method for forming the packaging structure in some of the foregoing embodiments of the present invention first mounts a passive device onto a first surface of a substrate, then forms a first molding compound covering the passive device and the first surface of the substrate; mounts the back side of the first chip onto a second surface of the substrate; provides a metal connection structure, the metal connection structure including a horizontal metal sheet and vertical metal pins electrically connected to the horizontal metal sheet, the vertical metal pins protruding from the bottom surface of the horizontal metal sheet; mounts the metal connection structure onto the second surface of the substrate, the vertical metal pins of the metal connection structure being electrically connected to corresponding second connection terminals on the second surface of the substrate, and the horizontal metal sheet of the metal connection structure being electrically connected to corresponding external terminals on the functional surface of the first chip. When mounting the passive device, the area of ​​the back side of the first chip is not limited, thus increasing the number of passive devices that can be packaged. Furthermore, mounting the metal connection structure onto the second surface of the substrate interconnects the first chip and the substrate, and the first chip and the passive device are interconnected through the substrate. The mounting process of the metal connection structure is simpler and less costly than the through-silicon via (TSV) process.

[0095] Other embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 5 This embodiment is different from the previous embodiment ( Figures 1-4 The main differences in the embodiment shown include: providing a heat sink 204, which is attached to the first surface of the substrate 100; providing a second chip 203, which is attached to the first surface of the substrate 100 and electrically connected to the substrate 103; and having openings 118 in the second molding layer 116 that expose the top surfaces and partial sidewall surfaces of the plurality of metal pillars 307.

[0096] The heat sink 204 is used to improve the heat dissipation performance on the back of the first chip 301 and to increase the rigidity of the corresponding position of the package structure, so as to balance or prevent the warpage of the package structure. The heat sink 204 is made of a material with high thermal conductivity and low coefficient of thermal expansion. The thermal conductivity of the heat sink 204 is ≥50W / mK, and the coefficient of thermal expansion (CTE) of the heat sink 204 is ≤17ppm / C. In a specific embodiment, the coefficient of thermal expansion (CTE) of the heat sink 204 is ≤7ppm / C, which allows the heat sink 204 to better improve the heat dissipation performance on the back of the first chip 301 while also better improving the rigidity of the corresponding position of the package structure, so as to better balance or prevent the warpage of the package structure. In one embodiment, the material of the heat sink 204 can be copper, aluminum, gold, nickel, steel or stainless steel, or carbon-containing materials (such as graphite, graphene or carbon nanotubes), or Si.

[0097] In some embodiments, the mounting process of the heat sink 204 can be performed simultaneously with the mounting process of the passive device 201, or it can be performed after or before the mounting of the passive device 201. The heat sink 204 is mounted on the first surface of the substrate 100 using thermally conductive adhesive or sintered silver. The heat sink 204 can be mounted on a portion of the surface of the first connection terminal on the first surface of the substrate 100. In a specific embodiment, the heat sink 204 can be mounted on the surface of the first redistribution layer 102 on the first surface of the substrate 100.

[0098] In some embodiments, the first molding layer 106 may cover the sidewalls and top surface of the heat sink 204. In other embodiments, the first molding layer 106 may only cover the sidewall surfaces of the heat sink 204, exposing the top surface of the heat sink 204.

[0099] The second chip 203 is flip-mounted onto the first surface of the substrate 100 and electrically connected to the substrate 100. In a specific embodiment, the second chip 203 has a functional side and a back side, the functional side having raised metal bumps. When the second chip 203 is flip-mounted onto the first surface of the substrate 100, the raised metal bumps on the functional side of the second chip 203 are soldered to a portion of the first connection terminals (e.g., a portion of the first redistribution layer 102) on the first surface of the substrate 100.

[0100] In some embodiments, the second chip 203 may be one of a signal processing chip, a logic control chip, a memory chip, a sensor chip, a power supply chip, or a radio frequency chip.

[0101] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 6 This embodiment is different from the previous embodiment ( Figures 1-5 The main differences in the embodiment shown include: the first chip 301 has a plurality of third pads 302 on its functional surface, and the third pads 302 also have raised metal pillars 307. (a) part of the metal pillars 307 are used as external terminals electrically connected to the horizontal metal sheet 41 in the metal connection structure 400, and (another) part of the metal pillars 307 are used as external terminals with a first solder bump 309 formed on the top surface; a second solder bump 310 is formed on part of the top surface of the horizontal metal sheet 41 in the metal connection structure 400.

[0102] The second solder bump 310 can be used to connect other package structures, package substrates, or semiconductor chips. The second solder bump 310 is square, spherical, or ellipsoidal in shape.

[0103] In some embodiments, the material of the second solder bump 310 may be one or more of tin, tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony. The second solder bump 310 is formed by stencil printing and reflow processes.

[0104] In some embodiments, the size of the second solder bump 310 is the same as or different from the size of the first solder bump 309; the second solder bump 310 is located outside or inside the boundary of the first chip 301. In a specific embodiment, refer to... Figure 6 The second solder bump 310 is the same size as the first solder bump 309, and the second solder bump 310 is located inside the boundary of the first chip 301.

[0105] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 7 This embodiment is different from the previous embodiment ( Figures 1-6 The main differences in the embodiment shown include: the horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are separate structures, and part of the bottom surface of the horizontal metal sheet 41 is soldered to the top surface of the vertical metal pin 42 through a solder layer 403.

[0106] The solder layer 403 is made of one or more of the following materials: tin, tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony.

[0107] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 8 This embodiment is different from the previous embodiment ( Figures 1-7 The main differences in the embodiment shown include: the horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are separate structures, and the horizontal metal sheet 41 is formed on the top surface of the vertical metal pin 42 by an electroplating process.

[0108] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 9 This embodiment is different from the previous embodiment ( Figures 1-8 The main differences in the embodiment shown include: the vertical metal pin 42 in the metal connection structure 400 includes a first part 42a and a second part 42b, the first part 42a is located above the second part 42b, the bottom end of the first part 42a and the top end of the second part 42b are soldered together by a solder layer 404, and the first part 42a and the horizontal metal sheet 41 in the metal connection structure 400 are an integral structure.

[0109] The solder layer 404 is made of one or more of the following materials: tin, tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony.

[0110] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 10 This embodiment is different from the previous embodiment ( Figures 1-9 The main differences in the embodiments shown include: the number of the first chips 301 is multiple (greater than or equal to 2). Taking two first chips 301 as an example, after the multiple first chips 301 are encapsulated by the third molding layer 311, the step of attaching the multiple first chips 301 to the second surface of the substrate 100 is performed.

[0111] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 11 , Figure 12 or Figure 13 This embodiment is different from the previous embodiment ( Figures 1-10 The main differences in the embodiment shown include: a second solder bump 310 is formed on a portion of the top surface of the horizontal metal sheet 41 of the metal connection structure 400, and the second solder bump 310 is located outside the boundary of the first chip 301, and the size of the second solder bump 310 is the same as the size of the first solder bump 309 (see reference). Figure 12 or Figure 13 (or different)

[0112] When the size of the second solder bump 310 is different from the size of the first solder bump 309, please refer to the specific details. Figure 11 The size of the second solder bump 310 is larger than the size of the first solder bump 309.

[0113] Some embodiments of the present invention also provide a method for forming an encapsulation structure, see reference. Figure 14 This embodiment is different from the previous embodiment ( Figures 1-10The main differences in the illustrated embodiment include: the first chip 301 has a plurality of third pads 302 on its functional surface, and the functional surface also has a second redistribution layer 308 electrically connected to the corresponding third pads 302. The second redistribution layer 308 also has raised metal pillars 307. The metal pillars 307 located at the edge are used as external terminals electrically connected to the horizontal metal sheet 41 in the metal connection structure 400, and the metal pillars 307 located in the middle are used as external terminals with a first solder bump 309 formed on their top surface. A second solder bump 310 is formed on a portion of the top surface of the horizontal metal sheet 41 in the metal connection structure 400, and the second solder bump 310 is located outside the boundary of the first chip 301. The size of the second solder bump 310 is the same as or different from the size of the first solder bump 309.

[0114] Some embodiments of this application also provide a packaging structure, see reference. Figure 4 ,include:

[0115] The substrate 100 includes opposing first and second surfaces. The first surface of the substrate 100 has a plurality of first connection terminals, and the second surface of the substrate 100 has a plurality of second connection terminals. The first connection terminals are electrically connected to the corresponding second connection terminals.

[0116] A passive device 201 is mounted on the first surface of the substrate 100, and the passive device 201 is electrically connected to a corresponding first connection terminal on the first surface of the substrate 100.

[0117] The passive device 201 is encapsulated and the first molding layer 106 covers the first surface of the substrate 100;

[0118] A first chip 301 includes a back side and a functional side, the functional side having a plurality of external terminals, and the back side of the first chip 301 is attached to the second surface of the substrate 100.

[0119] A metal connection structure 400 includes a horizontal metal sheet 41 and a vertical metal pin 42 electrically connected to the horizontal metal sheet 41. The vertical metal pin 42 protrudes from the bottom surface of the horizontal metal sheet 41. The metal connection structure 400 is mounted on the second surface of the substrate 100. The vertical metal pin 42 of the metal connection structure 400 is electrically connected to a corresponding second connection terminal on the second surface of the substrate 100. The horizontal metal sheet 41 of the metal connection structure 400 is electrically connected to a corresponding external terminal on the functional surface of the first chip 301.

[0120] The metal connection structure 400 and the first chip 301 are covered by a second molding layer 116 covering the second surface of the substrate 100. The second molding layer 116 exposes the top surface of other external terminals on the functional surface of the first chip 301.

[0121] The first solder bump 309 is located on the top surface of the exposed external terminal.

[0122] In some embodiments, reference Figure 4 The horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are an integral structure.

[0123] In some embodiments, reference Figure 7 The horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are separate structures. Part of the bottom surface of the horizontal metal sheet 41 is soldered to the top surface of the vertical metal pin 42 through a solder layer 403.

[0124] In some embodiments, reference Figure 9 The vertical metal pin 42 in the metal connection structure 400 includes a first part 42a and a second part 42b. The first part 42a is located above the second part 42b. The bottom end of the first part 42a and the top end of the second part 42b are welded together by a solder layer 404. The first part 42a and the horizontal metal sheet 41 in the metal connection structure 400 are an integral structure.

[0125] In some embodiments, reference Figure 8 The horizontal metal sheet 41 and the vertical metal pin 42 in the metal connection structure 400 are separate structures. The horizontal metal sheet 41 is formed on the top surface of the vertical metal pin 42 by an electroplating process.

[0126] In some embodiments, reference Figures 4-7 In any of the figures, the bottom surface of the vertical metal pin 42 of the metal connection structure 400 is electrically connected to the corresponding second connection terminal of the second surface of the substrate 100 through the first bonding auxiliary layer 401, and the bottom surface of the horizontal metal sheet 41 of the metal connection structure 400 is electrically connected to the corresponding external terminal of the functional surface of the first chip 301 through the second bonding auxiliary layer 402.

[0127] In some embodiments, the substrate 100 is a metal lead frame, a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate.

[0128] In one specific embodiment, reference is made to Figures 4-14In any of the figures, the metal lead frame has a plurality of discrete pins 101, with the upper and lower surfaces of the pins 101 serving as the first connection terminal and the second connection terminal, respectively.

[0129] In other embodiments, the silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate all include the opposing first surface and second surface. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and the corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals.

[0130] In some embodiments, reference Figures 4-14 In any of the figures, the first surface of the substrate 100 also has a first redistribution layer 102, which serves as a first connection terminal.

[0131] In some embodiments, reference Figure 4 , Figure 5 , Figure 11 or Figure 12 The first chip 301 has a plurality of third pads 302 on its functional surface. The functional surface also has a second redistribution layer 308 electrically connected to the corresponding third pads 302. A portion of the second redistribution layer 308 is used as an external terminal electrically connected to the horizontal metal sheet 41 in the metal connection structure 400. A portion of the second redistribution layer 308 also has a protruding metal pillar 307, which is used as an external terminal with a first solder bump 309 on its top surface.

[0132] In some embodiments, reference Figures 6-10 Any one of the pictures, or Figure 13 The first chip 301 has a plurality of third pads 302 on its functional surface. The third pads 302 also have raised metal pillars 307. Some of the metal pillars 307 are used as external terminals that are electrically connected to the horizontal metal sheet 41 in the metal connection structure 400, and some of the metal pillars 307 are used as external terminals with a first solder bump 309 on the top surface.

[0133] In some embodiments, reference Figure 14The first chip 301 has a plurality of third pads 302 on its functional surface. The functional surface also has a second redistribution layer 308 electrically connected to the corresponding third pads 302. The second redistribution layer 308 also has raised metal pillars 307. The metal pillars 307 located at the edge are used as external terminals electrically connected to the horizontal metal sheet 41 in the metal connection structure 400, and the metal pillars 307 located in the middle are used as external terminals with a first solder bump 309 on the top surface.

[0134] In some embodiments, reference Figures 6-14 Any of the figures also includes: a second solder bump 310 located on a portion of the top surface of the horizontal metal sheet 41 of the metal connection structure 400.

[0135] In some embodiments, the size of the second solder bump 310 is the same as or different from the size of the first solder bump 309; the second solder bump 310 is located outside or inside the boundary of the first chip 301.

[0136] In some embodiments, reference Figure 5 It also includes: a second chip 203, which is attached to the first surface of the substrate 100 and electrically connected to the substrate 100; and a heat sink 204, which is attached to the first surface of the substrate 100.

[0137] It should be noted that the terms "comprising" and "having," and their variations, used in this invention are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context. It should be understood that such data can be used interchangeably where appropriate. Furthermore, embodiments and features within embodiments of this invention can be combined with each other unless otherwise specified. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this invention. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar / identical parts between embodiments can be referred to (or understood) interchangeably.

[0138] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. A method for forming an encapsulation structure, characterized in that, include: A substrate is provided, the substrate including opposing first and second surfaces, the first surface of the substrate having a plurality of first connection terminals, the second surface of the substrate having a plurality of second connection terminals, and the first connection terminals being electrically connected to corresponding second connection terminals; A passive device is mounted on a first surface of the substrate, and the passive device is electrically connected to a corresponding first connection terminal on the first surface of the substrate. A first molding layer is formed that encapsulates the passive device and covers the first surface of the substrate; A first chip is provided, the first chip including opposing back sides and functional sides, the functional sides having a plurality of external terminals; The back side of the first chip is attached to the second surface of the substrate; A metal connection structure is provided, the metal connection structure including a horizontal metal sheet and a vertical metal pin electrically connected to the horizontal metal sheet, the vertical metal pin protruding from the bottom surface of the horizontal metal sheet; The metal connection structure is attached to the second surface of the substrate, the vertical metal pins of the metal connection structure are electrically connected to the corresponding second connection terminals on the second surface of the substrate, and the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminals of the functional surface of the first chip. A second molding compound is formed to cover the metal connection structure and the first chip, and to cover the second surface of the substrate. The second molding compound exposes the top surface of other external terminals on the functional surface of the first chip. A first solder bump is formed on the top surface of the exposed external terminal.

2. The method for forming the packaging structure according to claim 1, characterized in that, The horizontal metal sheet and vertical metal pin in the metal connection structure are an integral structure.

3. The method for forming the packaging structure according to claim 1, characterized in that, The horizontal metal sheet and vertical metal pin in the metal connection structure are separate structures, and part of the bottom surface of the horizontal metal sheet is soldered to the top surface of the vertical metal pin through a solder layer.

4. The method for forming the packaging structure according to claim 1, characterized in that, The vertical metal pin in the metal connection structure includes a first part and a second part. The first part is located above the second part. The bottom end of the first part and the top end of the second part are welded together by a solder layer. The first part and the horizontal metal sheet in the metal connection structure are an integral structure.

5. The method for forming the packaging structure according to claim 1, characterized in that, The horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and the horizontal metal sheet is formed on the top surface of the vertical metal pin by an electroplating process.

6. The method for forming the packaging structure according to any one of claims 1-4, characterized in that, When the metal connection structure is mounted on the second surface of the substrate, the bottom surface of the vertical metal pin of the metal connection structure is electrically connected to the corresponding second connection terminal of the second surface of the substrate through the first bonding auxiliary layer, and the bottom surface of the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminal of the first chip functional surface through the second bonding auxiliary layer.

7. The method for forming the packaging structure according to claim 1, characterized in that, The substrate is a metal lead frame, a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate.

8. The method for forming the packaging structure according to claim 7, characterized in that, The metal lead frame has multiple discrete pins, with the upper and lower surfaces of the pins serving as the first and second connection terminals, respectively.

9. The method for forming the packaging structure according to claim 7, characterized in that, The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate all include the opposite first surface and second surface. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and the corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals.

10. The method for forming the packaging structure according to claim 8 or 9, characterized in that, The first surface of the substrate also has a first redistribution layer, which serves as a first connection terminal.

11. The method for forming the packaging structure according to claim 1, characterized in that, The first chip has multiple third pads on its functional surface, and the functional surface also has a second redistribution layer that is electrically connected to the corresponding third pads. A portion of the second redistribution layer is used as an external terminal that is electrically connected to the horizontal metal sheet in the metal connection structure. Part of the second redistribution layer also has raised metal pillars, which serve as external terminals on which a first solder bump is formed on the top surface.

12. The method for forming the packaging structure according to claim 1, characterized in that, The first chip has multiple third pads on its functional surface, and each third pad has a raised metal pillar. Some of the metal pillars serve as external terminals that are electrically connected to the horizontal metal sheet in the metal connection structure, while others serve as external terminals on which a first solder bump is formed on the top surface.

13. The method for forming the packaging structure according to claim 1, characterized in that, Also includes: A second solder bump is formed on the top surface of a portion of the horizontal metal sheet of the metal connection structure.

14. The method for forming the packaging structure according to claim 13, characterized in that, The size of the second solder bump is the same as or different from the size of the first solder bump; the second solder bump is located outside or inside the boundary of the first chip.

15. The method for forming the packaging structure according to claim 1, characterized in that, Also includes: A second chip is provided and mounted on a first surface of the substrate, and the second chip is electrically connected to the substrate.

16. The method for forming the packaging structure according to claim 1 or 15, characterized in that, Also includes: A heat sink is provided and attached to the first surface of the substrate.

17. A packaging structure, characterized in that, include: A substrate, the substrate including opposing first and second surfaces, the first surface of the substrate having a plurality of first connection terminals, the second surface of the substrate having a plurality of second connection terminals, the first connection terminals being electrically connected to corresponding second connection terminals; A passive device is mounted on a first surface of the substrate, and the passive device is electrically connected to a corresponding first connection terminal on the first surface of the substrate. A first molding compound layer covering the passive device and the first surface of the substrate; A first chip, comprising a back side and a functional side, the functional side having a plurality of external terminals, the back side of the first chip being mounted on a second surface of the substrate; A metal connection structure includes a horizontal metal sheet and a vertical metal pin electrically connected to the horizontal metal sheet. The vertical metal pin protrudes from the bottom surface of the horizontal metal sheet. The metal connection structure is mounted on the second surface of the substrate. The vertical metal pin of the metal connection structure is electrically connected to a corresponding second connection terminal on the second surface of the substrate. The horizontal metal sheet of the metal connection structure is electrically connected to a corresponding external terminal on the functional surface of the first chip. A second molding compound covers the metal connection structure and the first chip, and a second molding compound covers the second surface of the substrate, the second molding compound exposing the top surface of other external terminals on the functional surface of the first chip; The first solder bump is located on the top surface of the exposed external terminal.

18. The packaging structure according to claim 17, characterized in that, The horizontal metal sheet and vertical metal pin in the metal connection structure are an integral structure.

19. The packaging structure according to claim 17, characterized in that, The horizontal metal sheet and vertical metal pin in the metal connection structure are separate structures, and part of the bottom surface of the horizontal metal sheet is soldered to the top surface of the vertical metal pin through a solder layer.

20. The packaging structure according to claim 17, characterized in that, The vertical metal pin in the metal connection structure includes a first part and a second part. The first part is located above the second part. The bottom end of the first part and the top end of the second part are welded together by a solder layer. The first part and the horizontal metal sheet in the metal connection structure are an integral structure.

21. The packaging structure according to claim 17, characterized in that, The horizontal metal sheet and the vertical metal pin in the metal connection structure are separate structures, and the horizontal metal sheet is formed on the top surface of the vertical metal pin by an electroplating process.

22. The packaging structure according to any one of claims 18-20, characterized in that, The bottom surface of the vertical metal pin of the metal connection structure is electrically connected to the corresponding second connection terminal of the second surface of the substrate through a first bonding auxiliary layer, and the bottom surface of the horizontal metal sheet of the metal connection structure is electrically connected to the corresponding external terminal of the functional surface of the first chip through a second bonding auxiliary layer.

23. The packaging structure according to claim 17, characterized in that, The substrate is a metal lead frame, a silicon substrate, a PCB substrate, a resin substrate, a ceramic substrate, or a glass substrate.

24. The packaging structure according to claim 23, characterized in that, The metal lead frame has multiple discrete pins, with the upper and lower surfaces of the pins serving as the first and second connection terminals, respectively.

25. The packaging structure according to claim 23, characterized in that, The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate all include the opposite first surface and second surface. The first surface has a plurality of first pads, and the second surface has a plurality of second pads. The silicon substrate, PCB substrate, resin substrate, ceramic substrate, and glass substrate have connection lines that electrically connect the first pads and the corresponding second pads. The first pads are directly used as first connection terminals, and the second pads are directly used as second connection terminals.

26. The packaging structure according to claim 24 or 25, characterized in that, The first surface of the substrate also has a first redistribution layer, which serves as a first connection terminal.

27. The packaging structure according to claim 17, characterized in that, The first chip has multiple third pads on its functional surface, and the functional surface also has a second redistribution layer that is electrically connected to the corresponding third pads. A portion of the second redistribution layer is used as an external terminal that is electrically connected to the horizontal metal sheet in the metal connection structure. Part of the second redistribution layer also has raised metal pillars, which serve as external terminals with first solder bumps on their top surfaces.

28. The packaging structure according to claim 17, characterized in that, The first chip has multiple third pads on its functional surface, and each third pad has a raised metal pillar. Some of the metal pillars serve as external terminals that are electrically connected to the horizontal metal sheet in the metal connection structure, while others serve as external terminals with a first solder bump on their top surface.

29. The packaging structure according to claim 17, characterized in that, The first chip has multiple third pads on its functional surface, and a second redistribution layer electrically connected to the corresponding third pads on the functional surface. The second redistribution layer also has raised metal pillars. The metal pillars located at the edges are used as external terminals electrically connected to the horizontal metal sheet in the metal connection structure, and the metal pillars located in the middle are used as external terminals with first solder bumps on their top surfaces.

30. The packaging structure according to claim 17, characterized in that, Also includes: A second solder bump located on the top surface of a portion of the horizontal metal sheet of the metal connection structure.

31. The packaging structure according to claim 30, characterized in that, The size of the second solder bump is the same as or different from the size of the first solder bump; the second solder bump is located outside or inside the boundary of the first chip.

32. The packaging structure according to claim 17, characterized in that, Also includes: The second chip is mounted on the first surface of the substrate and is electrically connected to the substrate.

33. The packaging structure according to claim 17 or 32, characterized in that, Also includes: A heat sink is attached to the first surface of the substrate.

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