A low power and low cost digital CMOS temperature sensor

Abstract

The present invention belongs to the technical field of integrated sensors, and proposes a low-power and low-cost digital CMOS temperature sensor. This temperature sensor is implemented under the CMOS process, can work normally at a voltage lower than the digital power supply voltage, and eliminates the need for parasitic transistor matching, occupies a small area and consumes low power. The low-power and low-cost digital CMOS temperature sensor proposed by the present invention includes: a group of parasitic transistors, a mirror current source circuit, an analog-to-digital conversion circuit, a temperature calibration circuit, a control logic module, and a voltage calibration module. The CMOS temperature sensor proposed by the present invention overcomes the limitations of traditional CMOS digital temperature sensors that require matching multiple groups of parasitic transistors, which occupy a large area and enter errors, and at the same time overcomes the problem of the reference voltage V BG The limitation that the temperature sensor cannot work under the digital circuit power supply due to its high voltage makes the temperature sensor have lower operating voltage and power consumption, smaller area and higher detection accuracy.

Description

Technical Field

[0001] The invention relates to the field of temperature sensors, and in particular to a low-power and low-cost digital CMOS temperature sensor and a temperature measurement method. Background Art

[0002] CMOS temperature sensors are widely used in various on-chip systems, industrial and agricultural Internet of Things, wireless sensor networks and other application scenarios due to their small size, easy integration, low cost, and direct digital signal output. However, different specific application scenarios also pose corresponding challenges to the design of CMOS temperature sensors. For example, real-time clock calibration applications in on-chip systems require high-precision temperature sensors; on-chip thermal management applications emphasize ultra-small area and low voltage operation; various Internet of Things applications have strict requirements on their power consumption; in addition, further reducing the calibration cost of temperature sensors in mass production also has important application value.

[0003] Among CMOS temperature sensors, those based on BJT (Bipolar Junction Transistor) are the most widely used due to their stable physical properties and high precision. Figure 1 As shown, the BJT emitter reference voltage The emitter reference voltage of the two BJTs is linearly negatively correlated with temperature. Linearly positively correlated with temperature, taking the reference voltage , independent of temperature. Figure 1 The emitter reference voltage of the two BJTs in enlarge times, and output after digital-to-analog conversion and The larger the value, the higher the temperature (PTAT: proportional to absolute temperature). For details, please refer to Figure 2 However, this type of traditional CMOS temperature sensor has the following limitations: First, in order to generate a voltage positively correlated with temperature Negatively correlated voltage , usually two sets of transistors are needed in the circuit, which increases the overall area and complexity of the circuit; secondly, since two sets of transistors are used, two sets of current sources are required to bias the two sets of transistors respectively, which increases the power consumption of the circuit; thirdly, in order to meet and To maintain a specific ratio, the two sets of transistors need to be matched, which will affect the accuracy of the temperature sensor's temperature measurement; Fourth, due to the reference voltage generated The value is about 1.2V. The operating voltage of such traditional CMOS temperature sensors often needs to be greater than 1V, which is not conducive to low-voltage application scenarios, such as battery-free sensor nodes. Combining the above four aspects, traditional temperature sensors have large areas and complex designs, and are not suitable for multi-point digital integration in on-chip thermal management, as well as low-cost and low-voltage large-scale wireless sensor Internet of Things applications. Therefore, the research of high-precision, small-area, low-voltage, and low-cost all-digital temperature sensors has become a hot spot and difficulty in the industry. Summary of the invention

[0004] The main purpose of the present invention is to overcome the shortcomings of traditional CMOS digital temperature sensor technology that utilizes the temperature-pressure characteristics of parasitic transistors, and to provide a low-power all-digital temperature sensor that can operate normally at a voltage lower than the digital power supply voltage, eliminates the need for parasitic transistor matching, occupies a small area, and uses the same.

[0005] The technical solution provided by the present invention is as follows:

[0006] A low-power all-digital temperature sensor which can work normally at a voltage lower than a digital power supply voltage, does not require parasitic transistor matching, and occupies a small area. The sensor is characterized by comprising: a single group of parasitic transistors, a mirror current source circuit, an analog-to-digital conversion circuit, a temperature calibration circuit, a control logic circuit, a voltage calibration circuit, a DEM control module, a chopping control module, and a temperature calibration module. The base and collector of the single group of parasitic transistors are connected together and connected to the ground, the emitter of the single group of parasitic transistors is simultaneously connected to the mirror current source and the input end of the analog-to-digital conversion circuit, the control logic circuit, the voltage calibration circuit, the DEM control module, and the chopping control module are simultaneously connected to the output of the analog-to-digital conversion circuit, the voltage calibration circuit and the control logic circuit are also simultaneously connected to a switch connected to the mirror current source, the output of the analog-to-digital conversion circuit is connected to the temperature calibration module, and the output of the temperature calibration module outputs a temperature value.

[0007] The parasitic transistor is a PNP parasitic transistor of CMOS chip technology, wherein:

[0008] The base of the PNP parasitic transistor is connected to the collector;

[0009] The emitter of the PNP parasitic transistor is connected to the first branch, the second switch branch and the third switch branch of the mirror current source circuit;

[0010] One implementation of the mirror current source circuit is to use a mirror current source circuit with only three branches;

[0011] Another implementation of the mirror current source circuit is to perform dynamic element matching (DEM) on the mirror current source circuit;

[0012] The first branch is a branch of the mirror current source circuit, which provides a current of ;

[0013] The second switch branch is a branch of the mirror current source circuit. This branch connects the second branch of the mirror current source circuit to the emitter of the PNP parasitic transistor through the first switch, and provides a current of ;

[0014] The third switch branch is a branch of the mirror current source circuit. This branch connects the third branch of the mirror current source circuit to the emitter of the PNP parasitic transistor through the second switch. The current provided by this branch varies with the modulation of the voltage calibration circuit.

[0015] The first switch and the second switch are composed of an NMOS or PMOS tube;

[0016] The emitter of the PNP parasitic transistor is connected to the input end of the analog-to-digital conversion circuit, and outputs a positive temperature coefficient voltage and negative temperature coefficient voltage ;

[0017] The analog-to-digital conversion circuit is a first-order, second-order, or higher-order analog-to-digital conversion circuit under the premise of loop stability;

[0018] The analog-to-digital conversion circuit will directly or indirectly generate a reference voltage that does not change with temperature. This reference voltage is much higher than the 1.2V bandgap reference voltage generated by traditional digital CMOS temperature sensors. To be lower, about ,in, for The voltage generated by biasing a single set of parasitic transistors, After gain block Post Output ;

[0019] The analog-to-digital conversion circuit will directly or indirectly output the The PWM digital signal code stream of the information is used to represent the temperature change information, where: for The ratio of the number of high-level pulses to the total number of pulses in a digital PWM signal, for and Convert analog quantity to digital PWM signal;

[0020] The analog-to-digital conversion circuit includes: a first capacitor, a second capacitor, a third capacitor, a third switch, a fourth switch, a fifth switch, a sixth switch, a first operational amplifier, and a first comparator, wherein:

[0021] The positive terminal of the third switch is connected to the emitter of the PNP parasitic transistor, and the negative terminal is connected to the first capacitor;

[0022] One end of the first capacitor is connected to the emitter of the PNP parasitic transistor, and the other end is connected to the reverse input end of the first operational amplifier, for storing The charge generated by the voltage;

[0023] One end of the second capacitor is connected to the negative end of the third switch and the positive end of the fourth switch, and the other end is connected to the reverse input end of the first operational amplifier, for storing The charge generated by the voltage;

[0024] The cathode of the fourth switch is connected to the ground;

[0025] Two ends of the fifth switch are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier;

[0026] Two ends of the sixth switch are respectively connected in series with the inverting input end of the first operational amplifier and the third capacitor;

[0027] Two ends of the third capacitor are connected to the sixth switch and the output of the first operational amplifier respectively;

[0028] First capacitor , the second capacitor , the third capacitor Its capacitance value should satisfy the relationship: ,in , , V REF A reference voltage that does not change with temperature ;

[0029] The first capacitor , the second capacitor , the third capacitor The capacitance value should be selected to produce a bandgap reference voltage V below 1.2V. Low-REF :

[0030] ,in ,Based on this relationship, low-voltage devices are used to implement it,working under low power supply voltage conditions.

[0031] Optionally, the first operational amplifier in the analog-to-digital conversion circuit is a common operational amplifier or a chopper amplifier;

[0032] The non-inverting input terminal of the first operational amplifier is connected to the ground.

[0033] Optionally, the first comparator in the analog-to-digital conversion circuit is a first differential input comparator;

[0034] The non-inverting input terminal of the first differential input comparator is connected to the output of the first operational amplifier;

[0035] The inverting input terminal of the first differential input comparator is connected to a reference voltage connect;

[0036] The output terminal of the first differential input comparator is the output of the analog-to-digital conversion circuit, and its output signal is a modulated pulse width PWM signal containing temperature information.

[0037] Optionally, the output end of the analog-to-digital conversion circuit is connected to the control logic circuit and the voltage calibration circuit, and is used to feed back a PWM signal containing temperature information to the control logic circuit and the voltage calibration circuit, and use the control logic circuit and the voltage calibration circuit to control the first switch and the second switch respectively.

[0038] Optionally, the voltage calibration circuit receives an output signal of the analog-to-digital conversion circuit and an external control signal, and outputs a digital signal to control the second switch;

[0039] The control logic circuit receives the system clock signal and the output signal of the analog-to-digital conversion circuit, and controls the first switch so that the output of the analog-to-digital conversion circuit achieves charge balance.

[0040] Optionally, the DEM control module receives the output signal of the analog-to-digital conversion circuit, matches the output dynamic element with the DEM digital control signal to perform DEM control on the mirror current source circuit, thereby reducing the error caused by the mismatch;

[0041] The chopping control module receives the output signal of the analog-to-digital conversion circuit and uses the chopping control digital control signal to perform chopping control on the first operational amplifier in the analog-to-digital conversion circuit to reduce the error caused by the offset voltage;

[0042] The input end of the temperature calibration circuit is connected to the output end of the analog-to-digital conversion circuit, and is used to compensate for the calibration temperature detection error in the digital domain and output the temperature value of the detection environment.

[0043] Beneficial effects:

[0044] The low-power and low-cost digital CMOS temperature sensor described in the present invention has lower power consumption, area and circuit design complexity than traditional temperature sensors. In particular, it uses a single set of transistors as temperature sensing devices, eliminating the matching problem caused by using a pair of transistors as temperature sensing devices. It is an economical and effective on-chip temperature sensor design method. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. The drawings in the following description are only one embodiment of the present invention.

[0046] Figure 1 It is a schematic diagram of the principle of the existing traditional CMOS digital temperature sensor technology;

[0047] Figure 2 It is a schematic diagram of the principle of the existing traditional CMOS digital temperature sensor technology;

[0048] Figure 3 A simplified schematic diagram of the technical principle of a single-group triode first-order CMOS digital temperature sensor according to the present invention;

[0049] Figure 4 A simplified schematic diagram of the technical principle of a single-group triode first-order CMOS digital temperature sensor according to the present invention;

[0050] Figure 5 The charge balance described in the present invention Schematic diagram of the technical principle of digital-to-analog conversion circuit;

[0051] Figure 6 It is a structural schematic diagram of the analog-to-digital conversion circuit in one embodiment of the present invention;

[0052] Figure 7 A schematic diagram of the working principle structure of the analog-to-digital conversion circuit in one embodiment of the present invention;

[0053] Figure 8 A schematic diagram of the working principle structure of the analog-to-digital conversion circuit in one embodiment of the present invention;

[0054] Fig. 9 A schematic diagram of the working principle structure of the analog-to-digital conversion circuit in one embodiment of the present invention;

[0055] Fig.10 It is a schematic diagram of the structure of the temperature sensor of the present invention in one embodiment; DETAILED DESCRIPTION

[0056] The present invention is further described in detail below with reference to the accompanying drawings:

[0057] like Figure 3 A low power, low voltage, low cost digital CMOS temperature sensor that relies on a single set of parasitic transistors for temperature measurement includes a single set of parasitic transistors. , mirror current source circuit module, switch ,switch , DEM control module, voltage calibration module, control logic module, analog-to-digital conversion circuit module, chopper control module and temperature calibration module. Among them, a single set of parasitic transistors It is used to sense the change of ambient temperature and reflect the temperature change as voltage change. The mirror current source circuit is used to Provides bias current, switches For regulation The bias current generates ,switch For post-tapeout The DEM control module is used to control the current of each branch of the mirror current source circuit to reduce the error caused by device mismatch. The voltage calibration module is used to control the switch conduct Calibration, control logic module is used to control The analog-to-digital conversion circuit module is used to convert the analog voltage and The digital value is converted into a digital value, the chopping control module is used to reduce the voltage offset of the amplifier in the analog-to-digital conversion circuit, and the temperature calibration module is used to calibrate the temperature sensor in the digital domain.

[0058] In some embodiments, Figure 4 , Figure 3 The DEM control module, voltage calibration module, and chopper control module are omitted. Although this does not affect the function of the temperature sensor circuit, it will reduce the temperature measurement accuracy. Figure 4 In the embodiment shown, when When disconnected, Always Bias voltage generation ,at this time, closure, disconnected, the sample-and-hold circuit 2 will sample the voltage And keep it. When closed, and At the same time Biased, flowing through The current is Generating voltage ( ),at this time, closure, disconnected, the sample-and-hold circuit 1 will sample the voltage And keep it, at this time, the unity gain op amp The output is ,this A voltage proportional to absolute temperature Since the output of the sample and hold circuit 2 is always , after the gain block , the output is , this voltage is inversely proportional to the absolute temperature , and Through the summation module Adding produces a temperature-invariant reference voltage This reference voltage is much higher than the 1.2V bandgap reference voltage generated by traditional digital CMOS temperature sensors. To be lower, about , see the schematic diagram Figure 5 This characteristic ensures the low voltage and low power consumption characteristics of the temperature sensor of the present invention. Figure 4 In The ADC will input and Convert analog quantity to digital quantity and output digital PWM signal . The ratio of high-level pulses to the total number of pulses in a digital PWM signal is , as mentioned before, is a constant that does not change with temperature, A voltage proportional to temperature , the subsequent digital circuit After filtering, a digital signal that is linearly proportional to the temperature can be obtained.

[0059] In some simplified embodiments of the present invention, Figure 3 , Figure 4 shown ADC consists of Figure 6 The charge balance shown When the PWM digital code stream at the output end outputs "1", the switch disconnect, Closed, the system will subtract The corresponding charge is then used to make the analog voltage The quantizer module outputs more "0", which increases the number of "0" in the PWM digital code stream. When the PWM digital code stream outputs "0", the switch closure, Disconnect, the system will add The corresponding charge is then used to make the analog voltage The increase further makes the quantizer module output more "1", which increases the number of "1" in the PWM digital code stream. Under such a control mechanism, it can be achieved and Analog to digital conversion, and the output PWM digital code stream contains Related information.

[0060] An embodiment of the present invention is Figure 7 As shown, based on Figure 4 , 5 , 6 described working principle of the present invention, Figure 7 The circuit shown implements a digital temperature sensor based on a single set of parasitic transistors and a low power supply voltage. , , and operational amplifiers and switch , , , , constitutes Figure 6 The integrator and switch in the circuit shown, Figure 6 The quantizer shown is composed of Figure 7 Medium Comparator composition, is the reference voltage for the comparator. Figure 7 The temperature sensor shown has three working states: Figure 8 , 9 , shown in 10.

[0061] like Figure 8 As shown, in the initial state, , , disconnect, , Closed, operational amplifier The non-inverting input terminal is grounded, and the voltage at point A is always 0. Under bias, The voltage produced is , then stored in the capacitor and Charge on , At this time, the output is 0, and this state is called the "reset state".

[0062] like Fig. 9 As shown, when the PWM digital code stream is output When more "0" is generated, according to Figure 6 The charge balance principle shown, Feedback to the relevant digital control logic circuit to control the switch , , disconnect, , Closed, according to the working principle of the switched capacitor circuit, the integrator output voltage increases , after the comparator Quantization makes the output The number of "1"s in the integrator increases. As a result of this state, the integrator output increases. This state is called the "charge accumulation state", which means that charge is accumulated at the output of the integrator. After the charge accumulation state, the circuit returns to the Figure 8 Reset state shown.

[0063] like Fig.10 As shown, when the PWM digital code stream is output When more "1" is generated, according to Figure 6 The charge balance principle shown, Feedback to the relevant digital control logic circuit to control the switch , disconnect, , , Closed, at this time, the parasitic transistor The current increases to , generating a higher voltage ( ). Since the previous state of the circuit in this state is Figure 8 Reset state, The voltage difference generated on According to the principle of charge conservation and the working principle of the switched capacitor circuit, The charge generated will be provided, therefore, the integrator output voltage will decrease , after the comparator Quantization makes the output The number of "0" in the integrator increases. As a result of this state, the integrator output decreases This state is called the "charge extraction state", which means that charge is extracted from the integrator output to reduce the voltage. After the charge product extraction state, the circuit returns to the Figure 8 Reset state shown.

[0064] Figure 7 , 8 The temperature sensor circuits of the embodiments of the present invention shown in , 9, and 10 are first-order systems, and other embodiments of the present invention are systems higher than the first order.

[0065] The operational amplifier U of the present invention t1 The output waveform of an embodiment of Fig.11 As shown, after the comparator U t2 After quantification, the temperature sensor of the present invention will output a pulse width modulated PWM pulse waveform, and a DC voltage value representing the temperature can be obtained through digital low-pass filtering.

Claims

1. A low power and low cost digital CMOS temperature sensor, the characteristics of which include: A single group of parasitic transistors, a mirror current source circuit, an analog-to-digital conversion circuit, a temperature calibration circuit, a control logic circuit, a voltage calibration circuit, a DEM control module, a chopping control module, and a temperature calibration module, wherein the base and collector of the single group of parasitic transistors are connected together and connected to the ground, the emitter of the single group of parasitic transistors is simultaneously connected to the mirror current source and the input end of the analog-to-digital conversion circuit, the control logic circuit, the voltage calibration circuit, the DEM control module, and the chopping control module are simultaneously connected to the output of the analog-to-digital conversion circuit, the voltage calibration circuit and the control logic circuit are also simultaneously connected to a switch connected to the mirror current source, the output of the analog-to-digital conversion circuit is connected to the temperature calibration module, and the output of the temperature calibration module outputs a temperature value; The parasitic transistor is a PNP parasitic transistor of CMOS chip technology, wherein: The base of the PNP parasitic transistor is connected to the collector; The emitter of the PNP parasitic transistor is connected to the first branch, the second switch branch and the third switch branch of the mirror current source circuit; One implementation of the mirror current source circuit is to use a mirror current source circuit with only three branches; Another implementation of the mirror current source circuit is to perform dynamic element matching (DEM) on the mirror current source circuit; The first branch is a branch of the mirror current source circuit, which provides a current of ; The second switch branch is a branch of the mirror current source circuit. This branch connects the second branch of the mirror current source circuit to the emitter of the PNP parasitic transistor through the first switch, and provides a current of ; The third switch branch is a branch of the mirror current source circuit. This branch connects the third branch of the mirror current source circuit to the emitter of the PNP parasitic transistor through the second switch. The current provided by this branch varies with the modulation of the voltage calibration circuit. The first switch and the second switch are composed of an NMOS or PMOS tube; The emitter of the PNP parasitic transistor is connected to the input end of the analog-to-digital conversion circuit, and outputs a positive temperature coefficient voltage and negative temperature coefficient voltage ; The analog-to-digital conversion circuit is a first-order, second-order, or higher-order analog-to-digital conversion circuit under the premise of loop stability; The analog-to-digital conversion circuit will directly or indirectly generate a reference voltage that does not change with temperature. This reference voltage is much higher than the 1.2V bandgap reference voltage generated by traditional digital CMOS temperature sensors. To be lower, about ,in, for The voltage generated by biasing a single set of parasitic transistors, After gain block Post Output ; The analog-to-digital conversion circuit will directly or indirectly output the The PWM digital signal code stream of the information is used to represent the temperature change information, where: for The ratio of the number of high-level pulses to the total number of pulses in a digital PWM signal, for and Convert analog quantity to digital PWM signal; The analog-to-digital conversion circuit includes: a first capacitor, a second capacitor, a third capacitor, a third switch, a fourth switch, a fifth switch, a sixth switch, a first operational amplifier, and a first comparator, wherein: The positive terminal of the third switch is connected to the emitter of the PNP parasitic transistor, and the negative terminal is connected to the first capacitor; One end of the first capacitor is connected to the emitter of the PNP parasitic transistor, and the other end is connected to the reverse input end of the first operational amplifier, for storing The charge generated by the voltage; One end of the second capacitor is connected to the negative end of the third switch and the positive end of the fourth switch, and the other end is connected to the reverse input end of the first operational amplifier, for storing The charge generated by the voltage; The cathode of the fourth switch is connected to the ground; Two ends of the fifth switch are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier; Two ends of the sixth switch are respectively connected in series with the inverting input end of the first operational amplifier and the third capacitor; Two ends of the third capacitor are connected to the sixth switch and the output of the first operational amplifier respectively; First capacitor , the second capacitor , the third capacitor Its capacitance value should satisfy the relationship: ,in , , VREF is the reference voltage that does not change with temperature; The first capacitor , the second capacitor , the third capacitor The capacitance value should be selected to produce a bandgap reference voltage V below 1.2V. Low-REF : ,in ,Based on this relationship, low-voltage devices are used to implement it,working under low power supply voltage conditions.

2. A low-power, low-cost digital CMOS temperature sensor according to claim 1, characterized in that: The first operational amplifier in the analog-to-digital conversion circuit is a common operational amplifier or a chopper amplifier; The non-inverting input terminal of the first operational amplifier is connected to the ground.

3. A low-power, low-cost digital CMOS temperature sensor according to claim 1, characterized in that: The first comparator in the analog-to-digital conversion circuit is a first differential input comparator; The non-inverting input terminal of the first differential input comparator is connected to the output of the first operational amplifier; The inverting input terminal of the first differential input comparator is connected to a reference voltage connect; The output terminal of the first differential input comparator is the output of the analog-to-digital conversion circuit, and its output signal is a modulated pulse width PWM signal containing temperature information.

4. A low-power, low-cost digital CMOS temperature sensor according to claim 1, characterized in that: The output end of the analog-to-digital conversion circuit is connected to the control logic circuit and the voltage calibration circuit, and is used to feed back the PWM signal containing temperature information to the control logic circuit and the voltage calibration circuit, and use the control logic circuit and the voltage calibration circuit to control the first switch and the second switch respectively.

5. A low-power, low-cost digital CMOS temperature sensor according to claim 4, characterized in that: The voltage calibration circuit receives the output signal of the analog-to-digital conversion circuit and the external control signal, and outputs a digital signal to control the second switch; The control logic circuit receives the system clock signal and the output signal of the analog-to-digital conversion circuit, and controls the first switch so that the output of the analog-to-digital conversion circuit achieves charge balance.

6. A low-power, low-cost digital CMOS temperature sensor according to claim 1, characterized in that: The DEM control module receives the output signal of the analog-to-digital conversion circuit, matches the output dynamic element with the DEM digital control signal to perform DEM control on the mirror current source circuit, thereby reducing the error caused by mismatch; The chopping control module receives the output signal of the analog-to-digital conversion circuit and uses the chopping control digital control signal to perform chopping control on the first operational amplifier in the analog-to-digital conversion circuit to reduce the error caused by the offset voltage; The input end of the temperature calibration circuit is connected to the output end of the analog-to-digital conversion circuit, and is used to compensate for the calibration temperature detection error in the digital domain and output the temperature value of the detection environment.

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