Rectifier Buck with External FET

Abstract

The present disclosure relates to a rectifier-type buck converter with an external FET. A system includes a first circuit comprising: a first receiver configured to receive a wireless power input; a first conductor operably coupled to the first receiver; and a switch network operably coupled to the first conductor, configured to rectify the wireless power input and generate a rectified voltage. The first circuit further includes a first field-effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based on a gate input. In one or more embodiments, the first circuit further includes a first controller configured to determine whether the rectified voltage is greater than a voltage threshold and to transmit the gate input to the first field-effect transistor when the rectified voltage is above the voltage threshold.

Description

Technical Field

[0001] The present disclosure relates to a rectifier buck converter with external FETs. Background Art

[0002] Many communication devices (e.g., smartphones and tablets) use wireless power transfer (WPT) as a method of charging the battery within the communication device without the need for a compatible plug-in charger. In this way, WPT transmitters from different manufacturers can charge the same communication device with WPT reception capabilities. However, WPT transmitters can intentionally or due to a malfunction transmit voltages that are higher than the actual voltage that the communication device can handle. If handled improperly, these overvoltages can damage the components of the communication device. Current solutions for handling overvoltages often cause the charging process to intermittently stop, which is not an effective method for controlling overvoltages and hinders communication between the WPT transmitter and the communication device. Therefore, it is desirable to provide a WPT overvoltage protection system and method that does not cause the charging process to stop. Summary of the Invention

[0003] A system for rectifying electrical power is disclosed. In one or more embodiments, the system includes a first circuit for a first device. In one or more embodiments, the first circuit includes a first receiver configured to receive a wireless power input from a second device; a first conductor operably coupled to the first receiver; and a switch network operably coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage. In one or more embodiments, the first circuit further includes a first field-effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based on a gate input. In one or more embodiments, the first circuit further includes a first controller configured to determine whether the rectified voltage is greater than a voltage threshold and to transmit a gate input to the first field-effect transistor when the rectified voltage is above the voltage threshold.

[0004] Another system is disclosed. In one or more embodiments, the system includes a first circuit for a first device. In one or more embodiments, the first circuit includes: a first receiver configured to receive a wireless power input from a second device; a first conductor operably coupled to the first receiver; and a switch network operably coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage. In one or more embodiments, the first circuit further includes a first field-effect transistor operably coupled to the first conductor and configured to receive the wireless power input and output an output voltage back to the first conductor based on a gate input. In one or more embodiments, the first field-effect transistor includes a source conductor operably coupled to one of a plurality of switches and a drain conductor operably coupled to another of the plurality of switches. In one or more embodiments, the first circuit further includes a first controller configured to determine whether the rectified voltage is greater than a voltage threshold and to transmit the gate input to the first field-effect transistor when the rectified voltage is above the voltage threshold.

[0005] Another system is disclosed that includes a first device. In one or more embodiments, the first device includes a first circuit comprising: a first receiver configured to receive a wireless power input from a second device; a first conductor operably coupled to the first receiver; and a switch network comprising a plurality of switches coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage. In one or more embodiments, the first circuit further includes a first field-effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based on a gate input. In one or more embodiments, the first circuit further includes a first controller configured to determine whether the rectified voltage is greater than a voltage threshold and to transmit a gate input to the first field-effect transistor when the rectified voltage is above the voltage threshold.

[0006] This Summary is merely an introduction to the subject matter fully described in the Detailed Description and drawings. This Summary should not be construed as describing essential features and is not intended to determine the scope of the claims. Furthermore, it should be understood that both the Summary and the Detailed Description are provided for illustration and explanation only and do not necessarily limit the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The detailed description is described with reference to the accompanying drawings. The use of the same reference numerals in different instances in the description and drawings may indicate similar or identical items. Various embodiments or examples ("examples") of the present disclosure are disclosed in the following detailed description and the accompanying drawings. The drawings are not necessarily drawn to scale. In general, the operations of the disclosed processes may be performed in any order unless otherwise provided in the claims. In the drawings:

[0008] Figure 1 is a block diagram of an environment for a user device according to one or more embodiments of the present disclosure;

[0009] Figure 2A is a circuit diagram illustrating a rectifier circuit according to one or more embodiments of the present disclosure;

[0010] Figure 2B C is a diagram illustrating V measured via a rectifier circuit according to one or more embodiments of the present disclosure. rect / Graph of time curves;

[0011] Figure 2D is a circuit diagram illustrating a partial rectifier circuit according to one or more embodiments of the present disclosure;

[0012] Figure 3A B to B are circuit diagrams illustrating a rectifier circuit according to one or more embodiments of the present disclosure;

[0013] Figure 3C is a diagram illustrating V measured via a rectifier circuit according to one or more embodiments of the present disclosure. rect / Graph of time curves;

[0014] Figure 4A is a circuit diagram of a rectifier circuit configured with a backup voltage system according to one or more embodiments of the present disclosure; and

[0015] Figure 4B is a partial circuit diagram of a rectifier circuit configured with a bootstrap scheme according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0016] Before explaining one or more embodiments of the present disclosure in detail, it should be understood that the application of the embodiments is not limited to the details of the construction and arrangement of the components, steps, or methods described in the following description or illustrated in the drawings. In the following detailed description of the embodiments, many specific details may be described to provide a more thorough understanding of the present disclosure. However, those of ordinary skill in the art who benefit from the present disclosure will understand that the embodiments disclosed herein can be practiced without some of these specific details. In other examples, well-known features may not be described in detail to avoid unnecessarily complicating the present disclosure.

[0017] As used herein, a letter following an element number is intended to refer to an embodiment of a feature or element that may be similar, but not necessarily identical, to the preceding element or feature having the same element number (e.g., 1, 1a, 1b). Such shorthand notation is used merely for convenience and should in no way be construed as limiting the present disclosure unless expressly stated to the contrary.

[0018] Furthermore, unless expressly stated to the contrary, "or" refers to an inclusive or rather than an exclusive or. For example, condition A or B satisfies any of the following: A is true (or exists) and B is false (or does not exist); A is false (or does not exist) and B is true (or exists); and both A and B are true (or exist).

[0019] In addition, the use of "a" and "an" may be used to describe elements and components of the embodiments disclosed herein. This is done for convenience only and "a" is intended to include "one" or "at least one" and the singular also includes the plural unless it is obvious that it is intended otherwise.

[0020] It should be understood that the depicted architecture is for illustration only and many other architectures that can implement the same functionality. In a conceptual sense, any arrangement of components for implementing the same functionality is effectively "associated" to achieve the desired functionality, common goal, purpose, and / or result. Therefore, any two components combined herein to achieve a specific functionality can be considered to be "associated" with each other to achieve the desired functionality, common goal, purpose, and / or result, regardless of the architecture or intermediate components. Similarly, any two components so associated can also be considered to be "connected" or "coupled" to each other to achieve the desired functionality, and any two components that can be so associated can also be considered to be "coupleable" to each other to achieve the desired functionality (e.g., "operably coupled" or "electrically coupled"). In addition, unless otherwise indicated, descriptions indicating that a component is "connected to" another component or "between" two components indicate that such components are functionally connected and do not necessarily indicate that such components are physically in contact. Specifically, such components may be in physical contact or alternatively include an intermediary element. Similarly, descriptions that a particular component is "manufactured on another component" (alternatively, "located on...", "placed on...", etc.) indicate the relative position of such components, but do not necessarily indicate that such components are in physical contact. Such components may be in physical contact or may alternatively include intervening elements.

[0021] Finally, as used herein, any reference to "one embodiment" or "some embodiments" means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment disclosed herein. The appearances of the phrase "in some embodiments" in various places in the specification are not necessarily all referring to the same embodiment, but rather, an embodiment may include any combination of one or more of the features explicitly described or inherently present herein, or any subcombination of two or more such features, as well as any other features not necessarily explicitly described or inherently present in this disclosure.

[0022] A wireless power transfer (WPT) receiving circuit is disclosed. The WPT receiving circuit includes wireless power receiving circuitry (e.g., a coil) that effectively reduces the voltage of an incoming power signal, rectifier circuitry, and circuitry including field-effect transistors (FETs). The FETs allow the WPT receiving circuit to reduce the incoming voltage during overvoltage conditions without stopping the charging process or interrupting communication between the charging and charging devices. Specifically, the voltage reduction process is accomplished by dynamically changing the input impedance via the FETs.

[0023] Figure 1 is a block diagram of an environment 90 for a user device 100 (e.g., a first device) according to one or more embodiments of the present disclosure. The user device 100 can be configured as any type of powered device. For example, the user device 100 can be configured as a mobile communication device including, but not limited to, a smartphone, a cell phone, or a tablet computer. In another example, the user device 100 can be configured as a media device (e.g., a media playback and / or recording device). For example, the user device 100 can include an audio device such as a voice recorder, an audio converter, an audio player, or a speaker (e.g., a Bluetooth-enabled speaker). In another example, the user device 100 can include a video device such as a video display, a video recorder, a camera, or other video device. In another example, the user device 100 can be configured as a driving assistance module in a vehicle, an emergency responder, a pager, a watch, a satellite TV receiver, a stereo receiver, a computer system, a music player, a laptop or tablet computer, a household appliance, or virtually any other device. In another example, the user device 100 can be configured as a computer (e.g., a laptop computer). In another example, the user device 100 can be configured as a computing / entertainment device for a vehicle.

[0024] User device 100 can communicate with a network controller, such as an enhanced Node B (eNB) or other base station. For example, the network controller can establish communication channels, such as control channels and data channels, and exchange data via these channels. User device 100 can also be exposed to many other wireless signal sources (e.g., from a wireless charging pad), and the wireless signals can be harvested in conjunction with WPT and the techniques described below. User device 100 can also support one or more subscriber identity modules (SIMs).

[0025] User device 100 may include a user interface 102 and a rechargeable battery 104 that powers the electronic components within user device 100. Battery 104 is configured to be charged via a wireless charger 108 (e.g., a second device). For example, wireless charger 108 may be plugged into an electrical outlet 112, where power is received by power receiving circuitry 116 within wireless charger 108 and output as a wireless power signal 120 via a wireless power transmitter 124. Wireless power transmitter 124 includes at least one coil and uses inductive coupling via a magnetic field to transmit wireless power signal 120 to a receiving coil on a wireless power receiver 128 (e.g., a first receiver) of user device 100. Once received, the power received from wireless power signal 120 may be referred to herein as wireless power input. The wireless power input received by wireless power receiver 128 is then rectified into a current (e.g., a DC current) by rectification circuitry 132, as needed by user device 100 and / or battery 104, with a portion of the power used to charge battery 104.

[0026] Generally speaking, rectification is the conversion of AC current, which periodically reverses direction, into DC current that flows in only one direction. In a general example, a rectifier may receive an input of 120 volt AC current from an electrical outlet and rectify the AC current to produce a 5 volt output DC current. In another general example, a rectifier circuit receives a 5 volt AC input current to produce a 5 volt output DC current. As described herein, the rectification of the input AC current may be rectification of a directly received AC input (e.g., from an AC source) or may be rectification of an indirectly received AC input that has been modified (e.g., based on a signal of the AC input). For example, a component within user device 100 may modify the AC input from power receiving circuitry 116, and the modified AC input or signal is then rectified by rectification circuitry 132.

[0027] The power reception and modulation of the wireless power receiver 128 and the rectifier circuitry 132 are controlled by the rectifier control circuitry 136 (e.g., a first controller). The rectifier control circuitry 136 performs the processing functions required for wireless power reception and battery charging. The user device 100 can operate using power directly from the wireless charger 108 or the battery 104.

[0028] User device 100 further includes a system controller 140, which includes one or more processors 144, a memory 148, and a communication interface 152. The one or more processors 144 may include any processor or processing element known in the art. For the purposes of this disclosure, the term "processor" or "processing element" may be broadly defined to encompass any device having one or more processing or logic elements (e.g., one or more microprocessor devices, one or more application-specific integrated circuit (ASIC) devices, one or more field-programmable gate arrays (FPGAs), one or more digital signal processors (DSPs), or a state machine). In this sense, the one or more processors 144 may include any device configured to execute algorithms and / or instructions (e.g., program instructions stored in memory 148).

[0029] Memory 148 may include any storage medium known in the art suitable for storing one or more sets of program instructions executable by the associated processor(s) 144. For example, memory 148 may include non-transitory storage media. For example, memory 148 may include, but is not limited to, read-only memory (ROM), random access memory (RAM), magnetic or optical storage devices (e.g., magnetic disks), tape, solid-state drives, etc. Memory 148 may be configured to provide information to system controller 140 or other components of user device 100. Additionally, memory 148 may be configured to store user input. Memory 148 may be housed in a common controller housing with processor(s) 144. Alternatively, or in addition, memory 148 may be remotely located relative to the spatial location of processor(s) 144 or system controller 140. For example, processor(s) 144 and / or system controller 140 may access remote memory 148 accessible via a network (e.g., a wireless network, etc.) via one or more communication interfaces 152.

[0030] The one or more communication interfaces 152 may be operatively configured to communicate with components of the system controller 140 or any other components within the user device 100. For example, the one or more communication interfaces 152 may be configured to retrieve data from the one or more processors 144 or other devices, transmit data for storage in the memory 148, retrieve data from storage in the memory 148, and so on. The one or more communication interfaces 152 may also be communicatively coupled with the one or more processors 144 to facilitate data transfer between components of the system controller 140 and the user device 100 (including the rectifier circuitry 132 and / or the rectifier control circuitry 136). It should be noted that while the one or more communication interfaces 152 are described as components of the system controller 140, one or more components of the one or more communication interfaces 152 may be implemented as external components communicatively coupled to the system controller 140 via wired and / or wireless connections. It should also be noted that the rectifier control circuitry 136 may also include one or more processors 144 , memory 148 , and a communication interface 152 for performing the functions described herein.

[0031] In an embodiment, the user device is configured to communicate unidirectionally and / or bidirectionally with the wireless charger 108 via wireless communication signals 156 (e.g., controlled by the system controller 140 or the rectifier control circuitry 136). The wireless communication signals 156 may be communicated (e.g., transmitted) via induction by coils of the wireless charger 108 and / or the user device 100, or via other wireless signaling methods including, but not limited to, Bluetooth, Wi-Fi, and ZigBee. Communication from the user device 100 to the wireless charger 108 creates a feedback loop, wherein the user device 100 may transmit instructions to the wireless charger 108 to change the current state of the wireless power transmitter 124 (e.g., to reduce the wireless power signal 120 caused by an overvoltage). For example, the wireless power receiver 128 may be configured to transmit a signal (e.g., an amplitude shift keying (ASK) signal, a frequency shift keying (FSK) signal, or other modulation-based signal) to the wireless power transmitter 124, and the wireless power transmitter may be configured to receive and process the signal. The wireless power transmitter 128 may also be configured to receive and process a communication signal (eg, ASK, FSK, or another modulated signal).

[0032] Figure 2Ais a circuit diagram illustrating a rectifier circuit 200 (e.g., a first circuit) according to one or more embodiments of the present disclosure. The rectifier circuit 200 may include some or all of the components of the wireless power receiver 128, the rectifier circuitry 132, and the rectifier control circuitry 136. The rectifier circuit 200 may harvest wireless power from any wireless power source. For example, the rectifier circuit 200 may harvest 6.78 MHz Alliance for Wireless Power (A4WP, also known as AirFuel) power transmissions. The rectifier circuit 200 facilitates receiving the transmitted energy and delivering it (e.g., as a rectified direct current (DC) voltage Vrect) to subsequent energy consuming stages in the device (such as via V out 204 is delivered to the battery 104) is improved.

[0033] Wireless power transmission suffers from efficiency losses at several stages, such as converting power to a radio frequency (RF) wireless power signal for transmission, receiving the RF flux of wireless power signal 120, and converting the RF flux to a usable DC voltage in the receiving device. Wireless power receiver 128 can employ magnetic resonance achieved by matching the inductor and capacitor to the transmitter system to achieve a high-Q receiver that is very sensitive to the fundamental frequency (e.g., 6.78 MHz) of wireless power signal 120. In this regard, the inductor can be provided by a receive coil 208 that receives the flux of the wireless power signal. For example, the inductor can also be one or more turns of a conductor on a printed circuit board or another type of antenna. Inductor 202 generates an alternating current (AC) current, and first capacitor 212 can be tuned relative to receive coil 208 to achieve a resonance that results in a fundamental response to wireless power signal 120. Wireless power receiver 128 provides the AC current to rectifier circuit 200 via AC positive conductor 216 and AC negative conductor 220 (e.g., collectively referred to as first conductor 224).

[0034] The rectifier circuit 200 rectifies the AC current into a DC voltage Vrect. Vrect can provide energy for any subsequent processing circuitry. In one embodiment, the rectifier circuit 200 is fully or partially integrated into an integrated circuit chip 268. The integrated circuit chip 268 may also be referred to as a "device." In other embodiments, discrete components may be used. The switch network 228 receives power from the first conductor 224 and includes a plurality of switches (e.g., switches 230, 232, 234, and 236) arranged to rectify the wireless power input and generate a rectified voltage. For example, switches 230 to 236 may be metal oxide semiconductor FETs (MOSFETs) or other types of transistors or other types of switches.

[0035] The rectifier control circuitry 136 communicates with the switch network 228. For example, the rectifier control circuitry 136 can control the on and off states of switches 230-236 to rectify the wireless power input using the switch control outputs. Once generated, the rectified wireless power input 162, Vrect, comprises a full-wave rectified version of the wireless power input. The rectifier control circuitry 136 can include a processing unit (e.g., a state machine 240 including one or more processors 144), an analog-to-digital converter (ADC 242), and a control loop mechanism such as a proportional-integral-derivative (PID) controller 244 (e.g., analog or digital). Other control loop mechanisms may be utilized. The state machine can include any finite state processor, including, but not limited to, a central processing unit (CPU) or an application-specific integrated circuit (ASIC).

[0036] Rectifier circuit 200 further includes a plurality of leads 246, 248, 250, 252, 254, 256, 258, 260, 262, 264 that can be accessed by rectifier control circuitry 136. For example, rectifier control circuitry 136 can detect the state of power (e.g., current, voltage, oscillation) via one or more leads 246-264 and can affect the state of power at one or more leads (e.g., by injection). For example, rectifier control circuitry 136 can communicate with switch network 228 to control switches 230, 232 to deliver power (e.g., power amplified by gate driver 266) at leads 250, 252, respectively. Leads 246-264 can be arranged on an integrated circuit chip 268 (represented by dashed squares). The rectifier circuit can also include current sensing circuitry 270 and voltage regulation circuitry 272.

[0037] In one embodiment, the rectifier circuit 200 further includes a buck switch configured to control (e.g., step down) an incoming voltage (e.g., incoming power from the coil 208). For example, the switch may be configured as or include a first field-effect transistor (e.g., first FET 274). The first FET 274 may be incorporated into one of several locations within the rectifier circuit 200. The first FET 274 can handle high power inputs that are harmful to the integrated circuit chip 268 and may therefore be disposed outside the integrated circuit chip 268 (e.g., as an external FET 274). For example, the first FET may be configured as an external FET that can effectively handle 115 volts or a maximum of 117 volts VDS. However, in some embodiments, the first FET 274 may be incorporated into the integrated circuit chip 268. The first FET may be configured as an insulated gate FET (MOSFET), a junction FET (JET), or a metal semiconductor FET (MESFET). When operating as a buck converter, the first FET 274 operates to facilitate stepping down the voltage from an input (e.g., a portion of the wireless power input) to an output controlled by an input signal at the gate of the first FET 274. Using the first FET 274 , the rectifier circuit 200 may regulate the output voltage continuously or only when the voltage rises above a threshold value (eg, semi-continuously).

[0038] In an embodiment, the drain of the first FET 274 is coupled to the AC positive conductor 216 via a drain conductor 276 (e.g., the drain conductor 276 is configured as a conductive element) and the source of the first FET 274 is coupled to the AC positive conductor 216 via a source conductor 278 (e.g., the source conductor 278 is configured as a conductive element). A second capacitor 280 is disposed within the drain conductor 276. This arrangement forms a FET loop 282 (e.g., an arrangement forming a first loop) with parallel capacitors (e.g., the first capacitor 212 and the second capacitor 280). The gate of the first FET 274 is coupled to a lead 254 that can be accessed by the rectifier control circuitry 136. In this arrangement, the first FET 274 / FET loop 282 acts as a dynamic capacitive switch for modulating the magnitude of the network reactance that can be controlled by a control loop mechanism (e.g., the PID controller 244) and the state machine 240. For example, the PID controller 244 can receive V rect Value and V rect threshold or predetermined V rect A threshold value (eg, V set before transient operation of the rectifier circuit 200) rect threshold, such as during configuration / programming of the rectifier control circuitry 136). If V rect Value higher than the predetermined V rectthreshold, the PID controller 244 may transmit a pulse width modulation (PWM) instruction to the state machine 240, which then applies a PWM signal (e.g., a gate input) to the first FET 274 via the lead 254. The PWM signal may be synchronized with the power (e.g., AC positive and / or AC negative waveforms) running through the AC positive conductor 216, such that the first FET 274 is controlled by the PWM. For example, the state machine 240 may modify the period or other PWM signal characteristics of the PWM signal based on the power input received from the first conductor 224 to effectively synchronize the PWM signal with the wireless power input.

[0039] The ability of the first FET 274 to reduce the input voltage is based on the ability of the first FET 274 to dynamically modulate the impedance created by the power flowing along the first conductor 224 through the field coil 208 and the first capacitor 212 to the switching network 228 (e.g., the first FET 274 receives a portion of the AC input as a derived signal). For example, if the impedance of the signal along the first conductor 224 increases, then the output signal V rect falls, and the rectification control circuit system 136 can then send a control signal to the gate of the first FET 274 to open or close the first FET 274 accordingly, so that V rect Keep it at normal level.

[0040] In addition to synchronizing the PWM signal with the AC waveform, other methods can be used to control the first FET 274. For example, the first FET 274 can be controlled by hysteretic switching (e.g., synchronous or asynchronous). For example, the rectifier circuit 200 can use a hysteretic comparator to generate an input signal at the gate of the first FET 274, where the hysteretic comparator compares V rect With a threshold or reference voltage. In another example, the rectifier circuit 200 can employ static control, where the first FET 274 is cut off when the input voltage is high or near an overvoltage protection (OVP) threshold. The rectifier circuit 200 can then use voltage collapse control to perform fine regulation or can dynamically adjust the load ballast to provide fine output voltage control. In another example, the signal to the gate of the first FET 274 can be controlled via a set / reset latch (e.g., an SR latch) or hysteretic on / off control.

[0041] In some examples, the rectifier control circuitry 136 controls the current flow by using a current limit value (i LIM) (e.g., a current threshold, such as a rectifier cutoff threshold) to control the operation of the first FET 274. Adjusting this threshold can control the rectifier input impedance. For example, when the threshold is a negative current, the rectifier input capacitance increases. As long as the coil network impedance is capacitive, controlling the input capacitance is one method of buck regulation, which can be ensured by switching through the first FET 274. In another example, the PID controller 244 can i LIM The input is provided to the state machine 240, where the state machine compares i LIM With the average measured current i DC (For example, from i LIM Subtract i DC ) to determine the set current limit value i for generating the gate input to the gate of the first FET 274 to cause a negative phase shift LIM To effectively adjust V rect Because the rectifier circuit 200 is capacitive and the switch network 228 modulates the capacitance, the rectifier circuit 200 can reduce V rect Voltage when using i LIM For example, by using state machine 240, the input capacitance can be shifted using a negative phase shift (e.g., by using a negative i LIM However, if the rectifier circuit 200 is inductive and the rectifier modulates the input inductance, the rectifier circuit 200 can also reduce V rect For example, using the modified state machine 240, the input inductor can be shifted using a positive phase shift (e.g., by using a positive i LIM If the rectifier circuit 200 includes a true isolation switch function and the duty cycle regulates the current to C rect Or if the rectifier circuit 200 is detuned to adjust V rect If the total reactance is controlled (e.g., the greater the reactance, the greater the voltage drop), the state machine 240 can also reduce V rect .

[0042] According to one or more embodiments of the present disclosure, Figure 2B The ability of the external first FET 274 to rectify the input voltage is shown in the graphs 288 and 290 from the test voltage C. Figure 2A The rectifier circuit 200 (eg, where PWM is synchronized with the AC waveform) derives the drawing data to create the V rect (e.g., in Volts) versus time (ms) and shows the buck switch in a variable series capacitor using PID control with PWM signaling to the first FET 274. Graph line 292 represents a normal system V without any buck circuitry or control. rectThe disturbance at 1ms is the result of the test system operating with an ASK modulated load pulse. Graph line 293 represents the control voltage to the PID controller V controlled by the step-down system represented by graph line 294. rect As shown in graph 188, applying an overvoltage (e.g., 25 volts via the ramp control input) at time 0 causes the V rect The rectifier circuit 200 prevents V rect When the test input ramps down to approximately 7.5 volts, the V rect Follow the ramp voltage.

[0043] Figure 2B Similar results are seen in the graph 290 of FIG. 1 , which uses plotted data derived from the test rectifier circuit 200, where the PID controller 244 uses a negative phase shift (e.g., by using a negative i LIM Here, the external FET is turned on statically to ensure that the network is capacitive and then the i LIM threshold to reduce the voltage (e.g., i LIM The change in threshold adjusts the rectifier input capacitance.) Thus, the external first FET 274 can use different control signal schemes to step down the input voltage.

[0044] The sub-components or sub-circuits of the rectifier circuit 200 may have more than one possible arrangement. For example, according to one or more embodiments of the present disclosure, the rectifier circuit 200 may include Figure 2D One of the two or more possible arrangements FET loops 282a to b shown in FIG. For example, similar to Figure 2A , FET loop 282a is shown with a second capacitor 280 positioned in series between the external first FET 274 and the junction 296 leading to the field coil 208 and the AC positive conductor 216. In another example, FET loop 282b shows the second capacitor 280 positioned in series between the junction 296 and the field coil 208. This second arrangement of FET loop 282b for switching series capacitance shows an improved, lower breakdown voltage than FET loop 282b.

[0045] In some embodiments, the first FET 274 can be disposed inside the switch network 228 (e.g., an internal FET). For example, the first FET 274 can be coupled to the gate driver 266 at the gate and operably coupled to the switches 230, 232 at the source and drain, as shown in FIG. Figure 3A In another example, the source and drain of the first FET 274 are operatively coupled to switches 232, 236, as shown in FIG. Figure 3BOther configurations are possible. The first FET 274 is placed within the switching network to stop current conduction during the portion of the duty cycle during operation. The PID controller 244 can then send a signal to adjust the duty cycle, which is then synchronized with the AC waveform via the state machine 240.

[0046] Further testing Figure 3A The rectifier circuit 200 is capable of rectifying voltages such as Figure 3C Similar to the results of testing the rectifier circuit 200 in graphs 288 and 290, graph 302 also shows that the internal FET 274 rectifies the overvoltage and maintains a steady-state V of approximately 16 volts. rect voltage capability, where V rect Decreases as the ramp control input (eg, line 294) falls below 15 volts.

[0047] During startup, the rectifier circuit 200 requires voltage to turn on the first FET 274. In some embodiments, the first capacitor 212 carries enough current to support the startup condition so that the rectifier circuit 200 can get enough voltage to then turn on the first FET 274. However, if the parallel capacitor is too large (e.g., has too high a capacitance), then V rect A higher load is required to maintain buck regulation. If the load is too weak, it may be difficult to turn on the first FET 274. However, there are several potential solutions for turning on the first FET 274. For example, the rectifier circuit 200 can use an alternative voltage system to turn on the first FET 274, such as Figure 4A For example, the battery 104 may be electrically coupled to the battery input 400 and supply a battery voltage (v bat 402). For example, the battery 104 can supply a small load of approximately 1 μA. After the integrated circuit chip 268 is powered on, the gate of the first FET 274 can be controlled via a gate input transmitted by the rectifier control circuitry 136 or another processor 144 (e.g., a CPU). The charging rail 404 for the high-side rectifier FETs (e.g., switches 230, 232) can also be used to drive the first FET 274 when the system is powered on.

[0048] In another example, the first FET 274 is switched on at startup via Figure 4B The bootstrap scheme shown in the figure is switched on, Figure 4B2 represents a portion of the rectifier circuit 200. For example, a diode 408 and a third capacitor 412 can be coupled to the drain conductor 276 to lead to the first FET 274 and the gate driver 266. This diode-capacitor subcircuit generates a bootstrap voltage and transmits the bootstrap voltage signal to the gate driver 266. The gate driver 266 then transmits a gate input to the first FET 274 based on the bootstrap voltage, which operates until the rectifier circuit 200 is powered on and running. The first FET 274 can be configured to operate in a depletion mode, where the FET is normally closed (on) to allow current to pass, but is triggered open (off) to block current. In some embodiments, the first FET 274 can be configured to operate in an enhancement mode, where the transistor is normally open (off) but is triggered closed (on).

[0049] The ability of the first FET 274 to step down the voltage without causing intermittent cessation of the charging scheme allows the user device 100 to have an uninterrupted back-and-forth conversation with the wireless charger 108 (e.g., via ASK / FSK). This continuous communication allows the user device 100 to quickly communicate to the wireless charger 108 whether the power from the wireless charger 108 is dangerous or causes an overvoltage event (e.g., the first FET 274 can communicate during an overvoltage condition). For example, the user device 100 can send a request to the wireless charger 108 to modify / reduce the power it transmits (e.g., modulate a wireless signal, such as the signal generated by the coil 208). The rectifier circuit 200 can operate in a tightly coupled wireless power transmission scheme (e.g., with the receive coil 208 matched to a specific / similar transmit coil), but is also capable of operating in a loosely coupled configuration (e.g., where the receive coil 208 is matched to a generally larger transmit coil).

[0050] Transistor switching (such as turning the first FET 274 on and off) can cause noise / EMI that can disrupt communication with the wireless charger 108. Noise can be controlled by adjusting the ratio of the capacitors (e.g., 10 to 20 nanofarads to 700 nanofarads). Noise issues can also be mitigated by switching at a sufficiently high frequency, exceeding the communication band between the user device 100 and the wireless charger 108. Noise can also be mitigated by controlling the frequency through dither modulation or PWM frequency.

[0051] The rectifier circuit 200 can be designed to work with any chipset and can be used in user devices 100 that use multiple coils 208 or devices that use multi-band charging schemes (e.g., a single coil with frequency tuning). For example, the rectifier circuit 200 can utilize multiple first FETs 274 that can receive different wireless power inputs from multiple coils 208 or a tunable coil 208.

[0052] The rectifier circuit 200 may include two or more coils 208 and a plurality of first FETs 274 and / or sets or switch networks 228 that are matched to a particular coil 208 or a group of particular coils 208. For example, the rectifier circuit 200 may include two or more coils 208 arranged in parallel or in series. Each coil 208 may have different operating characteristics, wherein a particular coil 208 is more suitable for receiving power from a particular wireless charger 108 that transmits power with a particular wireless power characteristic (e.g., frequency). The rectifier circuit 200 may also have multiple (e.g., or more) sets of switch networks 228 and / or first FETs 274, each operating with a particular coil 208 or a group of particular coils to perform rectification based on the wireless power characteristics of the wireless power unit (e.g., carrier frequency). For example, the rectifier circuit 200 may include two coils 208: a high-frequency coil and a low-frequency coil capable of receiving a high-frequency wireless power input signal (e.g., 205 kHz) and a low-frequency wireless power input signal (e.g., 110 kHz), respectively. The rectifier circuit 200 may then include two first FETs 274 and / or two switch networks 228 designed to specifically engage the high-frequency coil and the low-frequency coil to produce two sets of coils 208 matched to the FETs 274 / switch networks 228. These matched sets of coils 208 and FETs 274 / switch networks 228 ensure efficient reception and rectification of the incoming wireless power input signal.

[0053] It should be understood that embodiments of the methods disclosed herein may include one or more of the steps described herein. Furthermore, such steps may be performed in any desired order, and two or more steps may be performed concurrently with one another. Two or more steps disclosed herein may be combined into a single step, and in some embodiments, one or more steps may be performed as two or more sub-steps. Furthermore, other steps or sub-steps may be performed in addition to or in place of one or more steps disclosed herein.

[0054] Although the inventive concepts have been described with reference to the embodiments illustrated in the accompanying drawings, equivalents and substitutions may be employed herein without departing from the scope of the claims. The components illustrated and described herein are merely examples of systems / devices and components that may be used to implement embodiments of the inventive concepts and may be substituted with other devices and components without departing from the scope of the claims. Furthermore, any dimensions, degrees, and / or numerical ranges provided herein should be understood as non-limiting examples unless otherwise specified in the claims.

Claims

1. A system comprising: A first circuit, which is used for a first device, comprising: a first receiver configured to receive wireless power input from a second device; a first conductor operatively coupled to the first receiver; a switching network operably coupled to the first conductor, wherein the switching network is configured to rectify the wireless power input and generate a rectified voltage; a first field effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based on a gate input, wherein the first field effect transistor includes a source conductor and a drain conductor, the source conductor operably coupled to a source of a first switch of the switch network and a drain of a second switch of the switch network via the first conductor, and the drain conductor operably coupled to the first conductor via a first capacitor; and A first controller is configured to: determining whether the rectified voltage is greater than a voltage threshold; and If the rectified voltage is above the voltage threshold, then transmission of the gate input is transmitted to the first field effect transistor.

2. The system of claim 1, wherein: The drain conductor is operatively coupled to the first conductor to form a first loop including the first conductor, the source conductor, and the drain conductor, wherein the first loop further comprises: the first capacitor; and A second capacitor is disposed on the first conductor. 3 . The system of claim 2 , wherein the gate input is configured as a pulse width modulated signal, wherein the pulse width modulated signal is synchronized with the wireless power input at the first conductor.

4. The system of claim 1 , further comprising a battery input electrically coupled to a battery and operably coupled to the first controller and configured to deliver a battery voltage to the first controller, wherein the first controller transmits the gate input based on the battery voltage.

5. The system of claim 1 , further comprising a gate driver operably coupled to a gate of the first field effect transistor and a diode coupled to a drain conductor of the first field effect transistor and the gate driver, wherein the gate driver transmits the gate input based on a voltage signal transmitted from the diode to the gate driver. The system of claim 1 , wherein the gate input is based on a current threshold.

7. The system of claim 1, wherein the first controller comprises a state machine and a proportional-integral-derivative (PID) controller.

8. The system of claim 1, wherein the controller includes a hysteretic on / off control.

9. The system of claim 1, wherein the first controller is configured to send a communication to the second device based on the wireless power input or the rectified voltage, wherein the communication is a request to modify a wireless power signal transmitted from the second device to the first device.

10. A device comprising: A first circuit, which is used for a first device, comprising: a first conductor operatively coupled to a first receiver configured to receive wireless power input from a second device; a switching network comprising a plurality of switches coupled to the first conductor, wherein the switching network is configured to rectify the wireless power input and generate a rectified voltage; a first field effect transistor operably coupled to the first conductor and configured to receive a wireless power input and output an output voltage back to the first conductor based on a gate input, the first field effect transistor comprising: a source conductor operatively coupled to a source of a first switch of the plurality of switches and to a drain of a second switch of the plurality of switches via the first conductor; and a drain conductor operatively coupled to the first conductor via a first capacitor; A first controller is configured to: determining whether the rectified voltage is greater than a voltage threshold; and If the rectified voltage is above the voltage threshold, then transmission of the gate input is transmitted to the first field effect transistor.

11. The device of claim 10, further comprising a gate driver configured to amplify the gate input.

12. A system comprising: A first device comprising: A first circuit comprising: a first receiver configured to receive wireless power input from a second device; a first conductor operatively coupled to the first receiver; a switching network comprising a plurality of switches coupled to the first conductor, wherein the switching network is configured to rectify the wireless power input and generate a rectified voltage; a first field effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based on a gate input, wherein the first field effect transistor includes a source conductor and a drain conductor, the source conductor operably coupled to a source of a first switch of the switch network and a drain of a second switch of the switch network via the first conductor, and the drain conductor operably coupled to the first conductor via a first capacitor; and A first controller is configured to: determining whether the rectified voltage is greater than a voltage threshold; and If the rectified voltage is above the voltage threshold, then transmission of the gate input is transmitted to the first field effect transistor.

13. The system of claim 12 , wherein the first receiver comprises a plurality of coils, wherein the first circuit comprises at least one of a plurality of first field effect transistors or a plurality of switch networks, wherein at least two of the plurality of first field effect transistors or two of the plurality of switch networks are each matched to a coil or a group of coils based on characteristics of the wireless power input.

14. The system of claim 12, wherein the first controller is configured to send a communication to the second device based on the wireless power input or the rectified voltage, wherein the communication is a request to modify a wireless power signal transmitted from the second device to the first device.

15. The system of claim 12, wherein communication is transmitted via a modulated wireless signal received by a coil on the second device.

16. The system of claim 12, wherein the gate input is configured as a pulse width modulated signal, wherein the pulse width modulated signal is synchronized with the wireless power input at the first conductor.

17. The system of claim 12, wherein the first controller comprises a state machine and a proportional-integral-derivative (PID) controller.

18. The system of claim 12, wherein: The drain conductor is operatively coupled to the first conductor to form a first loop including the first conductor, the source conductor, and the drain conductor, wherein the first loop further comprises: the first capacitor; and A second capacitor is disposed on the first conductor.

19. The system of claim 12, wherein the first apparatus is configured as a mobile communication device.

20. The system of claim 12, wherein the first device is configured as a media device.

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