A cascaded half-bridge active capacitor equalizer

Abstract

The application discloses a kind of cascaded half-bridge active capacitor equalizers, including equalization circuit, module driving circuit, voltage sampling circuit and single-chip microcomputer minimum system, single-chip microcomputer minimum system includes single-chip microcomputer and LDO power supply, equalization circuit includes multiple modules, multiple modules are sequentially cascaded connection settings, module includes multiple strings of battery cells respectively, each module simultaneously equalizes multiple strings of battery cells respectively, wherein the highest string battery cell of first module and the lowest string battery cell of second module are the same equalization unit, play the role of equalization transmission and cascade, odd module and even module alternate work, module driving circuit and voltage sampling circuit two ends are electrically connected with module and single-chip microcomputer minimum system respectively.The technical scheme of the application is based on the existing capacitor active equalization scheme, by improving circuit topology scheme and connection mode, realize cascaded half-bridge structure circuit, greatly improve the equalization efficiency of lithium battery pack, while being able to realize the active equalization of high string number battery cell.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of lithium battery equalizer, and particularly relates to a cascaded half-bridge active capacitor equalizer. BACKGROUND

[0002] When charging and discharging a group of lithium ion batteries, considering the inconsistency of each single battery, equalization measures can be taken to ensure safety and stability. The meaning of equalization is to use electronic technology to keep the voltage deviation of lithium ion battery single within the expected range, so as to ensure that each single battery maintains the same state during normal use, so as to avoid overcharging and overdischarging. If no equalization control is performed, with the increase of charging and discharging cycles, the voltage of each single battery gradually differentiates, and the service life of the lithium battery group will be greatly reduced. The principle of lithium battery equalizer is to ensure that the capacity of each battery in the battery group is consistent, so as to prolong the service life and improve the performance of the whole battery group. When one or more batteries in the battery group have too high or too low capacity, the equalizer will adjust to make the capacity of all batteries return to the equalization state, so as to ensure that each single battery of the battery group can be fully utilized, which helps to prolong the service life of the whole battery group, improve the performance and avoid potential safety risks.

[0003] At present, there are many methods for equalizing lithium ion battery group, such as passive equalization, inductive active equalization, full-bridge capacitor type and active equalization. However, the above equalization methods mainly have the following defects:

[0004] 1. Passive equalization consumes the energy of single battery and releases the capacity in the form of heat, and the equalization time is long;

[0005] 2. Passive equalization is based on the lowest remaining capacity battery for equalization, and cannot increase the capacity of the battery with less capacity;

[0006] 3. Inductive equalization uses multi-tap transformer as energy transfer, which has complex structure design, large volume, and the equalization efficiency and speed are also easily limited by the transformer itself;

[0007] 4. Inductive active equalization has poor string expansion due to the fixed transformer skeleton, and has poor flexible application;

[0008] 5. Common full-bridge capacitor active equalization has low efficiency and slow equalization speed, and the number of MOS tubes and related driving circuits is twice that of half-bridge type, so the cost is high;

[0009] 6. Common capacitor active equalization is difficult to achieve high string number capacitor equalization due to the problem of capacitor voltage resistance. SUMMARY

[0010] The main purpose of the present application is to propose a cascade half-bridge active capacitor equalizer, aiming at solving the defects of the lithium ion battery pack equalization method mentioned in the background art.

[0011] To achieve the above-mentioned purpose, the cascade half-bridge active capacitor equalizer provided by the present application comprises an equalization circuit, a module driving circuit, a voltage sampling circuit and a single-chip microcomputer minimum system, the single-chip microcomputer minimum system comprises a single-chip microcomputer and an LDO power supply, the LDO power supply is electrically connected with the single-chip microcomputer, the equalization circuit comprises a plurality of modules, the plurality of modules are sequentially connected in cascade, each of the modules comprises a plurality of strings of battery cells, each of the modules simultaneously equalizes the plurality of strings of battery cells, wherein the highest string of battery cells of the first module and the lowest string of battery cells of the second module are the same equalization unit, which plays the role of equalization transmission and cascade, and the odd-numbered modules and the even-numbered modules work alternately, the module driving circuit and the voltage sampling circuit are electrically connected with the modules and the single-chip microcomputer minimum system at both ends, respectively, the module further comprises a central control unit, a communication output interface, an energy transfer half-bridge MOS tube driving circuit, a voltage acquisition control circuit and an energy storage capacitor, the battery cells in each of the modules are sequentially electrically connected, the battery cells are electrically connected with the central control unit, respectively, the communication output interface is electrically connected with the central control unit, one end of the energy transfer half-bridge MOS tube driving circuit and the voltage acquisition control circuit is electrically connected with the central control unit, respectively, the other end of the energy transfer half-bridge MOS tube driving circuit and the voltage acquisition control circuit is electrically connected with the battery cells, respectively, one end of the energy storage capacitor is electrically connected with the battery cells, and the other end of the energy storage capacitor is sequentially connected in series.

[0012] Optionally, the module driving circuit comprises a communication isolation circuit, a driving circuit and a controllable power supply circuit, one end of the communication isolation circuit is electrically connected with the single-chip microcomputer, the other end of the communication isolation circuit is electrically connected with the driving circuit, the driving circuit is electrically connected with the module, and the controllable power supply circuit is electrically connected with the communication isolation circuit and the driving circuit, respectively.

[0013] Optionally, the voltage sampling circuit comprises a shift register and an electronic switch sampling circuit, the shift register is electrically connected with the single-chip microcomputer, and the electronic switch sampling circuit is electrically connected with the shift register and the module, the single-chip microcomputer completes serial data input and parallel data output by controlling the data line and the clock line of the shift register.

[0014] The technical scheme of the present application has the following beneficial effects:

[0015] 1. By adopting the half-bridge equalization topology structure, energy can be transferred from high potential to low potential at the same time, the equalization efficiency is improved, and the equalization effect of full-bridge large current can be well achieved;

[0016] 2. By adopting the inter-group cascading mode, the problem of capacitor voltage resistance of the high string number equalization scheme is solved;

[0017] 3. By adopting the inter-group cascading mode, the selection of string number can be well realized, better compatibility is achieved, and the battery equalization can be self-adapted to different string numbers;

[0018] 4. By adopting the isolation driving scheme, the safety and reliability of the circuit can be improved, the damage of components caused by external impact or interference to the equalization module is avoided. Meanwhile, the low-cost driving control can also be realized by using the isolation device;

[0019] 5. Ultra-high equalization precision, the voltage of each string of batteries is detected by a high-precision scanning sampling circuit, the detection result is sent to the MCU for judgment and processing, so that the final pressure difference is less than 5mv. Meanwhile, the 74 series logic expansion chip is adopted on the circuit, the application of the single-chip microcomputer port line is reduced, and the production cost is reduced;

[0020] 6. Ultra-low sleep power consumption, when the battery voltage difference is detected to be less than 5mV, the MCU cuts off the power supply of all the sub-systems, and only the working power supply of the MCU itself is reserved. The MCU sleeps through the timing wake-up mode, so that the overall power consumption of the equalization module is less than 10uA;

[0021] 7. Intelligent detection control, when the battery voltage is abnormal, the working temperature is abnormal, or the driving is abnormal, or the equalization is completed, the equalization board stops working and automatically enters the timing wake-up sleep state. When the protection event is detected to be removed again or the battery voltage difference exceeds the set value, the equalization board will re-enter the work. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained according to the structures shown in the drawings without creative labor for those skilled in the art.

[0023] Figure 1 The overall frame structure schematic diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application is shown in the figure.

[0024] Figure 2 The overall frame structure schematic diagram of a module of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application is shown in the figure.

[0025] Figure 3The equalization circuit principle diagram of a 16-string equalization scheme of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0026] Figure 4 The module driving circuit principle diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0027] Figure 5 The voltage acquisition circuit principle diagram of an equalization module of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0028] Figure 6 The single-chip microcomputer minimum system circuit principle diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0029] Figure 7 The equalization circuit principle diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0030] Figure 8 The driving circuit principle diagram of an equalization module of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0031] Figure 9 The module voltage sampling circuit principle diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application;

[0032] Figure 10 The module single-chip microcomputer minimum system principle diagram of a cascaded half-bridge active capacitor equalizer according to an embodiment of the present application.

[0033] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0035] It should be noted that all directionality indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between components in a certain posture (as shown in the drawings), and if the certain posture changes, the directionality indications also change accordingly.

[0036] Furthermore, the technical solutions of the various embodiments can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0037] This invention proposes a cascaded half-bridge active capacitor equalizer.

[0038] like Figures 1 to 10 As shown, in one embodiment of the present invention, the cascaded half-bridge active capacitor equalizer includes an equalization circuit 100, a module driving circuit 200, a voltage sampling circuit 300, and a microcontroller minimum system 400. The microcontroller minimum system 400 includes a microcontroller 401 and an LDO power supply 402, which is electrically connected to the microcontroller 401. The equalization circuit 100 includes multiple modules 101, which are cascaded sequentially. Each module 101 includes multiple strings of capacitor cells 1011. Each module 101 simultaneously equalizes multiple strings of capacitor cells 1011. The highest-valued capacitor cell in the first module and the lowest-valued capacitor cell in the second module are the same equalization unit, which serves to transmit and cascade the equalization. Odd-numbered and even-numbered modules work alternately. The two ends of the module driving circuit 200 and the voltage sampling circuit 300 are respectively connected to the module 101 and the microcontroller minimum system. The module 101 also includes a central control unit 1012, a communication output interface 1013, an energy transfer half-bridge MOSFET drive circuit 1014, a voltage acquisition control circuit 1015, and an energy storage capacitor 1016. The battery cells 1011 in each module 101 are connected in sequence. The battery cells 1011 are connected to the central control unit 1012. The communication output interface 1013 is connected to the central control unit 1012. One end of the energy transfer half-bridge MOSFET drive circuit 1014 and the voltage acquisition control circuit 1015 are connected to the central control unit 1012. The other end of the energy transfer half-bridge MOSFET drive circuit 1014 and the voltage acquisition control circuit 1015 are connected to the battery cells 1011. One end of the energy storage capacitor 1016 is connected to the battery cells 1011, and the other end of the energy storage capacitor 1016 is connected in series.

[0039] Specifically, the module driving circuit 200 includes a communication isolation circuit 201, a driving circuit 202, and a controllable power supply circuit 203. One end of the communication isolation circuit 201 is electrically connected to the microcontroller 401, and the other end of the communication isolation circuit 201 is electrically connected to the driving circuit 202. The driving circuit 202 is electrically connected to the module 101, and the controllable power supply circuit 203 is electrically connected to both the communication isolation circuit 201 and the driving circuit 202.

[0040] Specifically, the voltage sampling circuit 300 includes a shift register 301 and an electronic switch sampling circuit 302. The shift register 301 is electrically connected to the microcontroller 401, and the electronic switch sampling circuit 302 is electrically connected to the shift register 301 and the module 101. The microcontroller 401 completes serial data input and parallel data output by controlling the data line and clock line of the shift register 301.

[0041] The technical solution of this invention improves the balancing efficiency of lithium battery packs by modifying the circuit topology and connection method based on the existing capacitive active balancing method, thereby realizing a cascaded half-bridge structure circuit. This also enables active balancing of high-series-number cells.

[0042] Specifically, the functional description of the technical solution of the present invention is as follows:

[0043] 1. Equalization circuit

[0044] like Figure 3 As shown, Figure 3 This is a 16-cell equalization scheme, divided into 5 functional modules, each balancing four cells simultaneously. The highest-value cell in the first module and the lowest-value cell in the second module share the same equalization unit, serving as a balance transfer and cascading mechanism. During operation, odd-numbered and even-numbered modules alternate, avoiding the issue of capacitors experiencing high voltage withstands when modules operate simultaneously. Each functional module is driven by a pair of complementary PWM waves. During the first half-cycle of the PWM wave, the upper bridge of the half-bridge circuit conducts, charging the electrolytic capacitor connected to the upper half-bridge MOSFET until its voltage matches that of the connected battery pack. In the second half-cycle, the lower bridge of the half-bridge circuit conducts, connecting the battery pack connected to the lower half-bridge MOSFET and the already charged electrolytic capacitor. At this point, the higher-voltage battery pack charges the capacitor, and the lower-voltage battery pack is charged by the capacitor, until the voltages are equal. This completes the voltage and energy exchange between the odd-numbered and even-numbered battery packs. When the first half of the PWM wave restarts in the next cycle, the even-numbered battery packs will again exchange voltage and energy with the odd-numbered battery packs. Through capacitors acting as carriers, the voltage of the battery packs is repeatedly exchanged, ultimately achieving a consistent voltage difference between the cells and completing energy transfer, thus achieving capacity balancing. This scheme is an example and is not limited to the maximum number of cascaded cells or the number of cells that can be balanced simultaneously in the module. The specific number of cells that can be balanced within the module and the number of cascaded modules can be adjusted according to the actual application.

[0045] 2. Module drive circuit

[0046] The driver module mainly consists of a communication isolation circuit, a driver circuit, and a controllable power supply circuit. A set of complementary PWM signals output from the microcontroller is sent to the driver IC after passing through the communication isolation IC. The driver IC boosts the drive voltage, ensuring that the MOSFETs in the equalization circuit can be fully turned on, avoiding switching losses. The power control uses optocoupler isolation, which effectively ensures complete isolation between low-voltage and high-voltage sections, improving circuit stability and reliability. Both the power supply to the communication isolation IC and the driver IC are controlled by the controllable power supply. When the equalization effect meets the set requirements, the microcontroller cuts off the external controllable power supply, ensuring that the system current reaches a minimum, achieving low power consumption.

[0047] 3. Voltage sampling circuit

[0048] like Figure 5 As shown, Figure 5 This is the voltage acquisition circuit of the equalization module. It mainly consists of a shift register and an electronic switch sampling circuit. The microcontroller controls the data and clock lines of the shift register to achieve the effect of serial data input and parallel data output. During operation, the shift register outputs high-level signals sequentially from the least significant bit to the most significant bit, at which point the voltage sampling circuit connected to each cell is activated sequentially. High-precision resistor voltage division is used to acquire voltages of different serial numbers. The sampled voltages are sent to the microcontroller for filtering and calculation, and finally, the actual cell voltage is calculated based on the voltage division ratio. Using a shift register method saves on the microcontroller's I / O detection lines. Simultaneously, switching the voltage detection method via an electronic switch reduces power consumption, ensures consistent sampling current consumption, and avoids inconsistent voltage differences between cell outputs.

[0049] 4. Microcontroller Minimum System

[0050] like Figure 6 As shown, Figure 6 The minimum microcontroller system consists of a 32-bit microcontroller and an LDO power supply. The microcontroller has a built-in high-precision ADC and multiple complementary PWM outputs, which support dead-time adjustment. The power supply section is powered by five independent equalization modules, each with its own power supply terminal, allowing for flexible and stable power supply to the microcontroller regardless of the specific number of series connections.

[0051] Furthermore, the technical solution of the present invention is described in detail below:

[0052] 1. Equalization circuit

[0053] like Figure 7As shown, H5 / L5, H4 / L4 are complementary PWM signal input terminals. GND connects the negative pole of the first string of batteries, B1 connects the positive pole of the first string of batteries and the negative pole of the second string of batteries, B2 connects the positive pole of the second string of batteries and the negative pole of the third string of batteries, B3 connects the positive pole of the third string of batteries and the negative pole of the fourth string of batteries, and then the batteries of the remaining number of strings are connected in the same way. F6, F7, F11, F12, F16 are fuses, which play a good protection role in the case of excessive equalization current or short circuit. When H5 is high, L5 is low, MOS tubes Q1, Q11, Q21 and Q31 are turned on. B4 returns to B3 through C6, C11, C16, C31, C36 and C41, B3 returns to B2 through C31, C36, C41, C56, C61 and C66, and B2 returns to B1 through C56, C61, C66, C81, C86 and C91. When H5 is low, L5 is high, MOS tubes Q6, Q16, Q26 and Q36 are turned on. B3 returns to B2 through C6, C11, C16, C31, C36 and C41, B2 returns to B1 through C31, C36, C41, C56, C61 and C66, and B2 returns to GND through C56, C61, C66, C81, C86 and C91. Therefore, the voltage on the capacitor C6, C11, C16, C31, C36 and C41 is exchanged from B4 to B3 to B3 to B2, and at this time the fourth string of batteries exchanges the voltage to the third string of batteries through the electrolytic capacitor. The voltage on the capacitor C31, C36, C41, C56, C61 and C66 is exchanged from B3 to B2 to B2 to B1. At this time, the third string of batteries exchanges the voltage to the second string of batteries through the electrolytic capacitor. The voltage on the capacitor C56, C61, C66, C81, C86 and C91 is exchanged from B2 to B1 to B1 to GND. At this time, the second string of batteries exchanges the voltage to the first string of batteries through the electrolytic capacitor. According to this way of analysis, when the equalization of the next cycle is completed, the voltage on the capacitor C6, C11, C16, C31, C36 and C41 is exchanged from B3 to B2 to B4 to B3, and at this time the third string of batteries exchanges the voltage to the fourth string of batteries through the electrolytic capacitor. The voltage on the capacitor C31, C36, C41, C56, C61 and C66 is exchanged from B2 to B1 to B3 to B2. At this time, the second string of batteries exchanges the voltage to the third string of batteries through the electrolytic capacitor. The voltage on the capacitor C56, C61, C66, C81, C86 and C91 is exchanged from B1 to GND to B2 to B1. At this time, the first string of batteries exchanges the voltage to the second string of batteries through the electrolytic capacitor. Therefore, the four strings of batteries in module one complete the battery equalization in the module, and module two will also complete the battery equalization in the module in the same way.Because the highest string of module one and the lowest string of module two share B4 and B3, the balanced exchange and cascade effect can be achieved, the requirement of independent work between modules is met, and the problem of capacitor voltage resistance is solved.

[0054] 2、Module driving circuit

[0055] As Figure 8 shown, Figure 8 is the driving circuit of the balancing module, and each balancing module is driven to work by an independent driving module. The driving module 1 and the driving module 2 are alternately operated. TIME1_H and TIME1_L are connected with the pins of the single-chip microcomputer, and are also the input ends of the complementary PWM signals. The communication U16 and U21 isolation communication module mainly isolates the communication ground and the driving ground, and solves the problem of unmatched driving level. U18 and U23 are driving chips, and output driving signals H5, L5 and H4, L4, which control the driving of the balancing module one and the balancing module two, respectively. Q53 and Q58 are the control pins of the high-side power supply of the driving chip, and are controlled by the optocoupler U17 and U22. The MOS tube Q55 and Q61 control the power supply end of the communication isolation chip. When the DRV_PWR_EN end is pulled low, the Q61 MOS tube is turned off, and the Q55 MOS tube is also cut off, so that the CVDD network voltage is zero, that is, the U16 and U21 isolation communication module stops working. U19 and U24 optocouplers are mainly used for power isolation, and V4, V3 and V2 represent the fourth string, the third string and the second string of battery cell voltage, respectively. Through the Q59 MOS tube, the input LDO is output, and then the other side of the communication isolation IC is provided with a power supply voltage. The VDD_1_3_5 network and the VDD_2_4 network control whether the optocouplers U18, U19, U22 and U24 work, so as to control the working of the communication isolation module U16, U21 and the driving chip U18, U23, and the low-power function can be realized.

[0056] 3、Voltage sampling circuit

[0057] As Figure 9As shown, U29 and U30 are shift registers, the CLK end is a clock control end connected to the I / O port of the single-chip microcomputer, the A, B interfaces are data input ends, and are also controlled by the DATA pin of the single-chip microcomputer. The RST pin can clear the output of the shift register. The QA-QH are output ports of the shift register. The R152, R151, R164, R176 resistances are voltage division sampling resistances, the BT1, BT2, BT3 ends are sequentially opened, when the BT1 end is at a high level, the MOS tube Q75 passes through, the gate of the MOS tube Q70 and Q71 is pulled low, and thus the Q70 and Q71 are turned on, and the voltage of the first string battery can be directly detected at the BAT_AD end. When the BT2 end is at a high level, the voltage of V2 passes through the resistances R164 and R143 to form a loop to the ground. Since the R151 and R152 have the same resistance value, the voltage sampled at the BAT_AD end is 1 / 2 of the voltage of V2, and whether the first string battery and the second string battery complete equalization is judged by comparing whether 1 / 2 of the voltage of V2 and the voltage of V1 are the same.

[0058] 4, the minimum system of the single-chip microcomputer

[0059] As shown in the figure, Figure 10 U26 is a 32-bit single-chip microcomputer. The TIM1_H and TIME_L ends are complementary PWM output ends, the TXD can be used to connect with the upper computer to read voltage data, and can also be externally connected with a Bluetooth module, and a mobile phone APP can be connected to read information. U27 is an indicator light of the single-chip microcomputer, which is in a flickering state during normal operation. When the operation is abnormal, the indicator light is always on, and when the equalization module enters sleep, the indicator light is extinguished. VIN1, VIN2, VIN3, VIN4 and VIN5 are power supplies from the first to the fifth string modules. Any number of battery strings can provide power for the LDO to provide a VDD power voltage for the single-chip microcomputer. The NTC is a temperature sensor, and when high or low temperature is detected, the equalization module will automatically stop equalization and enter sleep state, and when the temperature returns to the set value, the equalization module will start working again.

[0060] The present application aims at the defects of the lithium ion battery pack equalization method in the prior art, and the problems to be solved are mainly as follows:

[0061] 1. Solve the problem that the passive equalization scheme cannot complete energy transfer and energy loss;

[0062] 2. Through active equalization, the charge is redistributed from the battery cell unit with more remaining power to the battery cell unit with less remaining power, so as to ensure that the voltage of each battery cell unit remains consistent, and the service life of the battery cell is prolonged;

[0063] 3. Solve the problem of large volume and poor expansibility of the inductive equalization, and realize free combination of different string numbers through cascading;

[0064] 4. Solve the problem of capacitive active balancing that cannot be used for high string number active balancing scheme due to the capacitor voltage withstand problem. The inter-group cascading scheme solves the capacitor voltage withstand problem, and also realizes inter-group balancing transmission;

[0065] 5. Solve the problem of the full-bridge type balancing topology, the large number of MOS tubes and the large number of components in the balancing drive circuit, and the high cost problem;

[0066] 6. Solve the problem of long balancing time, low balancing efficiency and poor balancing effect of the full-bridge type active balancing scheme.

[0067] Specifically, the technical scheme of the present application at least achieves the following beneficial effects:

[0068] 1. 3-5A super large balancing current, fast balancing speed, and the battery pack single cell can be pulled to balance in a short time;

[0069] 2. The inter-group cascading can be performed in the balancing module, effectively solving the problem of insufficient electrolytic capacitor voltage withstand, and supporting high string number cell balancing;

[0070] 3. The half-bridge type circuit topology is used, balancing is performed in the whole working cycle, the balancing efficiency is higher, and the number of MOS tubes and related drive circuits can be saved, thereby saving the production cost;

[0071] 4. The balancing precision is high, and the voltage balancing precision can reach 5mV, solving the problem of short cycle number and service life caused by inconsistent battery capacity, voltage difference and internal resistance;

[0072] 5. Compared with passive balancing, the capacitive balancing scheme consumes very little battery energy, and realizes the final balancing effect through active energy transfer. The energy loss is small, and the balancing effect is good;

[0073] 6. Continuous and efficient balancing in charging, discharging and static state can be realized;

[0074] 7. The input end of each string balancing circuit is connected in series with an overcurrent fuse, which can automatically protect when abnormal current impact or short circuit fault occurs;

[0075] 8. The sleep power consumption is very low, and the module automatically enters the sleep mode after balancing is completed, and the power consumption is as low as 10uA;

[0076] 9. The isolation drive scheme is adopted, and the anti-interference performance and stability are high;

[0077] 10. The balancing data can be read by the upper computer or mobile phone APP.

[0078] Specifically, there are many alternative schemes for the technical scheme of the present application, mainly as follows:

[0079] 1、MCU control chip can select 8-bit, 32-bit, DSP, FPGA, etc. main control unit;

[0080] 2、Circuit board can realize different PCBA appearance according to the shape of the application product;

[0081] 3、The number of battery strings can not be limited, and the equalization application within 200 strings can be realized through cascading mode;

[0082] 4、Not limited to Bluetooth or host computer mode to read equalization and other related information;

[0083] 5、The equalization current can be adjusted according to actual demand;

[0084] 6、The driving circuit and driving frequency can be different according to different products;

[0085] 7、The power MOSFET tube can select different parameters from different manufacturers;

[0086] 8、Communication isolation module can choose different manufacturers;

[0087] 9、The silk screen symbol on the circuit board can be adjusted in position and size according to different product numbers and the shape of the battery pack;

[0088] 10、The ink of the circuit board can be adjusted in color according to the realization of the application;

[0089] 11、The position area of the components on the circuit board can be adjusted in position and size according to the shape of different battery packs;

[0090] 12、The connector seat on the circuit board can be designed by selecting different shapes;

[0091] 13、The circuit board can be divided into multiple module combination mode, or only one module implementation mode;

[0092] 14、The existing same type product scheme can also integrate multiple tasks and multiple interface functions to realize similar or same functions as the product of the company.

[0093] The above only describes the preferred embodiments of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation, direct / indirect application in other related technical fields based on the content of the present application specification and drawings are included in the patent protection scope of the present application.

Claims

1. A cascaded half-bridge active capacitor equalizer, characterized in that, The system includes an equalization circuit, a module driving circuit, a voltage sampling circuit, and a microcontroller minimum system. The microcontroller minimum system includes a microcontroller and an LDO power supply, with the LDO power supply electrically connected to the microcontroller. The equalization circuit includes multiple modules cascaded sequentially. Each module comprises multiple strings of battery cells, and each module simultaneously equalizes multiple strings of cells. The highest-value string of cells in the first module and the lowest-value string of cells in the second module share the same equalization unit, serving to transmit and cascade the equalization. Odd-numbered and even-numbered modules operate alternately. The two ends of the module driving circuit and the voltage sampling circuit are electrically connected to the module and the microcontroller minimum system, respectively. The module further includes a central control unit, a communication output interface, an energy transfer half-bridge MOSFET driving circuit, a voltage acquisition and control circuit, and an energy storage capacitor. The battery cells in each module are connected in sequence. The battery cells are each connected to the central control unit. The communication output interface is connected to the central control unit. One end of the energy transfer half-bridge MOSFET driving circuit and the voltage acquisition and control circuit are each connected to the central control unit. The other end of the energy transfer half-bridge MOSFET driving circuit and the voltage acquisition and control circuit are each connected to the battery cells. One end of the energy storage capacitor is connected to the battery cells, and the other end of the energy storage capacitor is connected in series. The module driving circuit includes a communication isolation circuit, a driving circuit, and a controllable power supply circuit. One end of the communication isolation circuit is electrically connected to the microcontroller, and the other end of the communication isolation circuit is electrically connected to the driving circuit. The driving circuit is electrically connected to the module, and the controllable power supply circuit is electrically connected to both the communication isolation circuit and the driving circuit. The high-side power supply pin of the driving circuit is controlled by an optocoupler and controlled by the microcontroller to enable / disable; the power supply side of the communication isolation circuit is connected and disconnected via a controlled power supply link composed of a MOSFET and an LDO, which is gated by the power enable pin of the microcontroller; when the equalization effect meets the set requirements, the microcontroller cuts off the external controllable source and enters a low-power state. The voltage sampling circuit includes a shift register and an electronic switch sampling circuit. The shift register is electrically connected to the microcontroller, and the electronic switch sampling circuit is electrically connected to the shift register and the module. The microcontroller completes serial data input and parallel data output by controlling the data line and clock line of the shift register.

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