Method for preparing solar cell, solar cell and photovoltaic module

Abstract

The present application relates to a method for preparing a solar cell, a solar cell and a photovoltaic module. The method for preparing a solar cell includes forming a heavily doped region of a first preset width in a substrate, forming an atomic film layer on the surface of the substrate, preparing a gate electrode of a second preset width in the heavily doped region, the gate electrode passing through at least a portion of the atomic film layer, and forming a sintering region along the edge of the gate electrode to prepare a solar cell, wherein the second preset width is smaller than the first preset width, and can ensure that even if the gate electrode printing is offset, the printing position of the gate electrode can be controlled within the heavily doped region, and the third preset width is smaller than or equal to the difference between the first preset width and the second preset width and is greater than 0, thereby avoiding the sintering region from exceeding the heavily doped region, thereby ensuring that while completing the auxiliary sintering of the gate electrode, more non-heavily doped regions are not damaged.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic cells, and in particular to a method for preparing a solar cell, a solar cell and a photovoltaic module. Background Art

[0002] In the field of photovoltaic cell technology, the traditional metal electrode metallization method currently adopted by the industry is still screen printing plus chain sintering. Since the sintering temperature on the front side is too high, the thickness of the glass layer will easily become thicker. The thicker glass layer causes less carrier transport, resulting in current and voltage loss, and then efficiency loss. Therefore, it is necessary to reduce the sintering temperature of the front grid line of the battery.

[0003] Currently, laser-assisted sintering is used to process metal grid lines to increase the contact between metal and silicon substrate, which can avoid the problem of cell efficiency loss caused by excessive temperature. However, the coordination between laser-assisted sintering and the previous process is not mature, which can easily cause damage to the battery cell and loss of solar cell efficiency. Summary of the invention

[0004] Based on this, it is necessary to provide a method for preparing a solar cell, a solar cell and a photovoltaic module that can reduce damage to the cell to address the above technical problems.

[0005] In a first aspect, the present application provides a method for preparing a solar cell, comprising:

[0006] forming a substrate;

[0007] forming a heavily doped region of a first preset width in the substrate;

[0008] forming an atomic film layer on the surface of the substrate; at least a portion of the atomic film layer covers the heavily doped region;

[0009] A gate line electrode with a second preset width is prepared in the heavily doped region; the gate line electrode passes through at least a portion of the atomic film layer; the second preset width is smaller than the first preset width;

[0010] A sintering region is formed along the edge of the gate electrode to manufacture a solar cell, wherein the sintering region is a region within the heavily doped region with a third preset width away from the edge of the gate electrode; the third preset width is less than or equal to the difference between the first preset width and the second preset width and is greater than 0.

[0011] In one embodiment, forming a heavily doped region of a first preset width in the substrate includes:

[0012] A first preset laser with a target power and a target speed is used to form a heavily doped region with a first preset width at a target depth of the substrate, wherein the doping concentration of the heavily doped region is a target doping concentration.

[0013] In one embodiment, forming a sintering region along the edge of the gate line electrode comprises:

[0014] A second preset laser with a target voltage is used to form a sintering area with a target current density along the edge of the gate line electrode.

[0015] In one embodiment, forming a substrate comprises:

[0016] Providing a battery cell;

[0017] Performing texturing on a surface of the battery cell;

[0018] A borosilicate glass layer is prepared on a surface of the cell after texturing to form the substrate; the heavily doped region is formed in the borosilicate glass layer.

[0019] In one embodiment, the surface of the substrate includes a front side and a back side disposed opposite to each other, wherein the side on which the borosilicate glass layer is formed serves as the front side of the substrate; and forming an atomic film layer on the surface of the substrate includes:

[0020] preparing a tunneling layer on the back side of the substrate;

[0021] A conductive doping layer is prepared on a side of the tunneling layer that is away from the back side of the substrate; the conductive doping layer is doped with phosphorus atoms;

[0022] Preparing a passivation layer on the front side of the substrate;

[0023] Preparing a positive anti-reflection layer on a side of the passivation layer facing away from the front side of the substrate;

[0024] Preparing a back anti-reflection layer on a side of the conductive doped layer away from the tunneling layer;

[0025] The tunneling layer, the conductive doping layer, the passivation layer, the front anti-reflection layer and the back anti-reflection layer together constitute the atomic film layer.

[0026] In one embodiment, the substrate further includes a side surface adjacent to the surface; before preparing the tunneling layer on the back side of the substrate, the method further includes:

[0027] performing oxidation treatment on the front side of the substrate;

[0028] The borosilicate glass layer coated around the back surface and the side surfaces is removed.

[0029] In one embodiment, the substrate further includes a side surface adjacent to the surface; before the passivation layer is prepared on the front surface of the substrate, the invention further includes:

[0030] removing the conductive doping layer plated around the front surface and the side surface;

[0031] The phosphosilicate glass layer on the front side and the side side is etched; the phosphosilicate glass layer is a film layer formed on the front side and the side side when the conductive doping layer is doped with phosphorus atoms.

[0032] In a second aspect, the present application further provides a solar cell, the solar cell comprising:

[0033] A substrate having a heavily doped region of a first preset width formed therein;

[0034] An atomic film layer is formed on the surface of the substrate; at least a portion of the atomic film layer covers the heavily doped region; a gate line electrode of a second preset width is formed in the heavily doped region, and the gate line electrode passes through at least a portion of the atomic film layer; the second preset width is smaller than the first preset width; the heavily doped region also forms a sintering region of a third preset width away from the edge of the gate line electrode; the third preset width is smaller than or equal to the difference between the first preset width and the second preset width and is greater than 0.

[0035] In one embodiment, the surface of the substrate includes a front side and a back side disposed opposite to each other; the substrate includes:

[0036] Battery cells;

[0037] The borosilicate glass layer is disposed on a surface of the battery cell, and the heavily doped region is disposed in the borosilicate glass layer.

[0038] In one embodiment, the atomic film layer comprises:

[0039] A tunneling layer, disposed on the back side of the substrate;

[0040] A conductive doping layer, disposed on a side of the tunneling layer away from the back side of the substrate; the conductive doping layer is doped with phosphorus atoms;

[0041] A passivation layer, disposed on the front surface of the substrate;

[0042] A positive anti-reflection layer, disposed on a side of the passivation layer away from the front side of the substrate;

[0043] The back anti-reflection layer is arranged on a side of the conductive doped layer away from the tunneling layer.

[0044] In one embodiment, the solar cell comprises a TOPcon cell.

[0045] In a third aspect, the present application further provides a photovoltaic module, including a solar cell prepared by the above-mentioned method for preparing a solar cell or the above-mentioned solar cell.

[0046] The above-mentioned solar cell preparation method, solar cell and photovoltaic module, the solar cell preparation method includes forming a heavily doped area of ​​a first preset width in a substrate, forming an atomic film layer on the surface of the substrate, preparing a gate electrode of a second preset width in the heavily doped area, the gate electrode passes through at least a part of the atomic film layer, and a sintering area is formed along the edge of the gate electrode to prepare a solar cell, wherein the second preset width is smaller than the first preset width, which can ensure that even if the gate electrode printing is offset, the printing position of the gate electrode can be controlled within the heavily doped area, and the third preset width is less than or equal to the difference between the first preset width and the second preset width and is greater than 0, thereby avoiding the sintering area from exceeding the heavily doped area, thereby ensuring that while completing the auxiliary sintering of the gate electrode, more non-heavily doped areas are avoided from being damaged. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 One of the schematic flow diagrams of a method for preparing a solar cell in an embodiment;

[0048] Figure 2 is a cross-sectional view showing the positional relationship between the heavily doped region, the gate line electrode and the sintering region in one embodiment;

[0049] Figure 3 is a schematic diagram of a process for forming a substrate in one embodiment;

[0050] Figure 4 is a schematic diagram of a process of forming an atomic film layer on the surface of a substrate in one embodiment;

[0051] Figure 5 A schematic diagram of a process before preparing a tunneling layer on the back side of a substrate in one embodiment;

[0052] Figure 6 It is a schematic diagram of a process before preparing a passivation layer on the front side of a substrate in one embodiment;

[0053] Figure 7 The second schematic diagram is a process flow diagram of a method for preparing a solar cell in an embodiment;

[0054] Figure 8 is a schematic structural diagram of a solar cell in one embodiment;

[0055] Fig. 9 Schematic diagram of the structure of an atomic film layer in one embodiment. DETAILED DESCRIPTION

[0056] In order to facilitate understanding of the embodiments of the present disclosure, the embodiments of the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the embodiments of the present disclosure are shown in the drawings. However, the embodiments of the present disclosure can be implemented in many different forms and are not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the embodiments of the present disclosure more thorough and comprehensive.

[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the technical field of the disclosed embodiments. The terms used herein in the specification of the disclosed embodiments are only for the purpose of describing specific embodiments and are not intended to limit the disclosed embodiments. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0058] In the description of the embodiments of the present disclosure, it should be understood that the terms "upper", "lower", "vertical", "horizontal", "inside", "outside", etc. indicating orientations or positional relationships are based on the methods or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present disclosure.

[0059] It is understood that the terms "first", "second", etc. used in the present disclosure may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of the present disclosure, the first preset width may be referred to as the second preset width or the third preset width, and similarly, the second preset width may be referred to as the first preset width or the third preset width, and the third preset width may also be referred to as the first preset width or the second preset width. The first preset width, the second preset width, and the third preset width are all characterization width quantities, and their specific data quantities may be equal or unequal, but the objects of the width quantities characterized by the three are different.

[0060] Solar cells are devices that convert solar energy into electrical energy. Its core part is composed of a series of grid electrodes. Grid electrodes are wires used to collect and transmit current, and their width has an important impact on the performance of solar cells. First, the width of the grid electrode can directly affect the light absorption capacity of the prepared solar cell. When the width of the grid electrode is narrow, the light absorption area on the surface of the cell can be increased, the opportunity for light energy conversion can be increased, and thus the photoelectric conversion efficiency of the cell can be improved. When the width of the grid electrode is too wide, it will block the incidence of sunlight, reduce the absorption of light energy, and thus reduce the conversion efficiency of the cell. Therefore, when preparing solar cells, a suitable width of the grid electrode should be selected to ensure the light absorption effect of the prepared solar cell. Second, the width of the grid electrode will also affect the current collection capacity of the prepared solar cell. When the width of the grid electrode is narrow, the path of the current through the grid electrode is relatively long, and the resistance is relatively large, resulting in certain restrictions on the concentration and transmission of the current, thereby reducing the output current of the battery. When the width of the grid electrode is too wide, the concentration and transmission capacity of the current will be improved, thereby increasing the output current of the battery. Therefore, the needs of current collection need to be comprehensively considered when selecting the width of the gate electrode. Third, the width of the gate electrode is also related to the detailed structure and manufacturing process of the solar cell. During the manufacturing process, the selection of the width of the gate electrode needs to take into account the feasibility and cost-effectiveness of the process. A narrower width of the gate electrode may require higher manufacturing precision and more complex process steps, increasing the manufacturing cost. Therefore, in actual production, it is necessary to comprehensively consider the balance between the width of the gate electrode and the manufacturing process. Fourth, the width of the gate electrode is also related to the reliability and stability of the solar cell. A narrower width of the gate electrode may increase the fragility of the gate electrode, which is easily affected by the external environment and broken or damaged, thereby affecting the service life and stability of the battery. The wider width of the gate electrode can improve the stability and reliability of the battery and reduce the energy loss caused by the breakage of the gate electrode.

[0061] In the preparation process of solar cells, laser-assisted sintering essentially uses the highly concentrated and controllable characteristics of lasers to separate the two key steps of passivation layer erosion and contact formation during high-temperature sintering, thereby achieving further precise control of the sintering process. In principle, the current formed by the laser is transmitted along the low contact resistance path, triggering silver-silicon diffusion, thereby reducing the contact resistance; and the duration of the entire sintering process matches the carrier lifetime, and the laser stops quickly after passing, thereby achieving maximum retention of the original passivation layer and avoiding carrier recombination caused by direct contact between the metal and silicon substrate. Laser-assisted sintering is suitable for all high-temperature burn-through silver paste sintering processes, such as the preparation of PERC (Passivated Emitter and Rear Contact) cells, TOPcon (Tunnel Oxide Passivated Contact solar cell, tunnel oxide passivated contact solar cell) cells and xBC (X Back Contact, cross-finger back contact) cells. For TOPcon cells, since burn-through slurries are used on both the front and back sides, laser-assisted sintering can significantly improve the cell's photoelectric conversion efficiency. Since laser-assisted sintering can precisely control the sintering process, it reduces the difficulty of thinning the back side of the TOPcon cell with poly (polycrystalline silicon material), and can also improve the cell's photoelectric conversion efficiency by reducing parasitic absorption.

[0062] Therefore, auxiliary sintering and setting the gate electrode width are very important for improving the photoelectric conversion efficiency of solar cells and ensuring the quality of solar cells.

[0063] In one embodiment, the present application provides a method for preparing a solar cell, such as Figure 1 One of the flow charts of the method for preparing a solar cell is shown. The method for preparing a solar cell includes the following steps 102 to 110.

[0064] Step 102, forming a substrate.

[0065] The above-mentioned substrate may be a composite substrate including a battery cell, a diffusion layer and a borosilicate glass layer.

[0066] Step 104: forming a heavily doped region with a first preset width in the substrate.

[0067] Among them, the method of forming the heavily doped area can be laser doping. Laser doping irradiates a high-energy laser beam onto the surface of the material, introduces some high-energy particles into the material, causes corresponding changes to occur, and thus achieves the purpose of changing the material properties. In the laser doping process, the high energy of the laser can excite some atoms or molecules of the material, thereby producing various chemical reactions. These reactions can change the crystal structure, chemical properties and electrical properties of the material, etc., so that it has better performance. For example, in the process of preparing solar cells, laser doping is used to perform heavy doping on the contact part between the gate electrode and the cell, while the position outside the gate electrode remains lightly doped (low concentration doping). The cell is provided with one surface and another surface disposed opposite to each other, the surface of the substrate includes a front side and a back side disposed opposite to each other, and a borosilicate glass layer is sequentially provided on one surface of the cell, and a side formed with a borosilicate glass layer is used as the front side of the substrate, and the other surface is used as the back side of the substrate. Through thermal diffusion, light-concentration boron diffusion is carried out on the surface of the battery cell, and one surface of the battery cell is converted into a high square resistance area to form a BSG (borosilicate glass) layer. Then, the corresponding BSG layer is removed by laser film opening in a predetermined area, so that a boron heavy diffusion area of ​​a first preset width can be formed only in different areas where there is no BSG layer, thereby obtaining a boron selective emitter. The setting of the boron selective emitter can improve the open circuit voltage and power generation efficiency of the solar cell.

[0068] Step 106, forming an atomic film layer on the surface of the substrate; at least a portion of the atomic film layer covers the heavily doped region.

[0069] The surface of the substrate includes a front side and a back side that are arranged opposite to each other, and the atomic film layer may include any functional film layer in the components of the solar cell, such as a passivation layer, an anti-reflection layer, a mask layer, a tunneling layer, etc. Each film layer may be partially arranged on the front side of the substrate, and the other part may be arranged on the back side of the substrate.

[0070] Step 108, preparing a gate line electrode with a second preset width in the heavily doped region; the gate line electrode passes through at least a portion of the atomic film layer; the second preset width is smaller than the first preset width.

[0071] Exemplarily, it is assumed that part of the atomic film layer is set on the front side of the substrate, and the other part of the atomic film layer is set on the back side of the substrate. If the heavily doped region is set on the front side of the substrate, the gate line electrode passes through the part of the atomic film layer set on the front side of the substrate; if the heavily doped region is set on the back side of the substrate, the gate line electrode passes through the other part of the atomic film layer set on the back side of the substrate.

[0072] Step 110, forming a sintering region along the edge of the gate electrode to manufacture a solar cell, wherein the sintering region is a region within the heavily doped region with a third preset width from the edge of the gate electrode; the third preset width is less than or equal to the difference between the first preset width and the second preset width and is greater than 0.

[0073] Specifically, refer to Figure 2 The cross-sectional view shows the positional relationship between the heavily doped region 811, the gate electrode 830 and the sintered region 840. The two tops of the gate electrode 830 are aligned with the two tops of the sintered region 840. The edge direction of the gate electrode 830 is perpendicular to the top direction of the gate electrode 830. The sintered region 840 formed along the edge of the gate electrode 830 can be a region along the two edge sides of the gate electrode 830 located in the heavily doped region 811. At this time, the number of sintered regions 840 is two, and the widths of the two sintered regions 840 can be the same or different. The edge direction of the gate electrode 830 is perpendicular to the top direction of the gate electrode 830. The sintered region 840 formed along the edge of the gate electrode 830 can also be a region along any one of the two edge sides of the gate electrode 830 located in the heavily doped region 811. Figure 2 The figure shows that the sintering region 840 is located in the heavily doped region 811 along the two edge sides of the gate line electrode 830, and the widths of the two sintering regions 840 are different (the third preset width of one sintering region 840 is d3, and the third preset width of the other sintering region 840 is d3').

[0074] Exemplarily, if the first preset width is between X1μm and X2μm (X2>X1, and X1>0), and the second preset width is between Y1μm and Y2μm (Y2>Y1, and 0<Y2<X1), then the third preset width is between (X1-Y2)μm and (X2-Y1)μm. As another example, the first preset width can be any width between 80μm and 90μm, such as 80μm, 81μm, 82μm, 83μm, 84μm, 85μm, 86μm, 87μm, 88μm, 89μm, 90μm, etc.; the second preset width can be any width between 20μm and 30μm, such as 20μm, 21μm, 22μm, 23μm, 24μm, 25μm, 26μm, 27μm, 28μm, 29μm, 30μm, etc.; correspondingly, the third preset width range can be any width between 50μm and 70μm, such as 50μm, 51μm, 52μm, 53μm, 54μm, 55μm, 56μm, 57μm, 58μm, 59μm, 60μm, 65μm, 70μm, etc.

[0075] In the above-mentioned method for preparing a solar cell, a heavily doped region of a first preset width is formed in a substrate, an atomic film layer is formed on the surface of the substrate, a gate electrode of a second preset width is prepared in the heavily doped region, the gate electrode passes through at least a portion of the atomic film layer, and a sintering region is formed along the edge of the gate electrode to prepare a solar cell, wherein the second preset width is smaller than the first preset width, and can ensure that even if the gate electrode printing is offset, the printing position of the gate electrode can be controlled within the heavily doped region, and the third preset width is smaller than or equal to the difference between the first preset width and the second preset width and is greater than 0, thereby avoiding the sintering region from exceeding the heavily doped region, thereby ensuring that while completing the auxiliary sintering of the gate electrode, damage to more non-heavily doped regions is avoided.

[0076] In one embodiment, forming a heavily doped region of a first preset width in a substrate includes: using a first preset laser with a target power and a target speed to form a heavily doped region of a first preset width at a target depth of the substrate, wherein the doping concentration of the heavily doped region is a target doping concentration.

[0077] The target power and the target speed can be flexibly set according to actual needs. Furthermore, the target power and the target speed are set according to the needs of the target depth and the target doping concentration. The first preset laser with the target power and the target speed refers to the device that emits the first preset laser emitting the first preset laser at the target speed under the action of the target power.

[0078] It is understandable that the purpose of heavy doping is to form a heavily doped area in the substrate, thereby improving the photoelectric conversion efficiency of the prepared solar cell. Different solar cells are prepared in which the doped elements are also different. For example, the laser doping of PERC cells is phosphorus, while the laser doping of TOPcon cells is boron. Due to the separation coefficient of boron and phosphorus, phosphorus is more easily diffused from silicon dioxide to silicon, while boron is more easily diffused from silicon dioxide. More energy is required to promote doping, and excessive laser energy is easy to cause damage to silicon wafers. Therefore, it is more difficult to dope boron into silicon. Compared with traditional boron diffusion, TOPcon cells superimposed SE (laser doping) technology can theoretically achieve efficiency improvement. The above method in this embodiment can meet the requirements for doping depth and doping concentration in heavily doped areas, thereby ensuring the doping quality of heavily doped areas, so that the prepared solar cells can have better power generation efficiency.

[0079] In one embodiment, forming a sintering region along an edge of a gate line electrode includes: using a second preset laser with a target voltage to form a sintering region with a target current density along the edge of the gate line electrode.

[0080] The second preset laser using the target voltage refers to the device emitting the second preset laser emitting the second preset laser under the action of the target voltage, wherein the target voltage refers to the reverse bias voltage, so that the area where the gate electrode contacts the substrate forms a high current density, thereby generating a high temperature in the area in contact with the gate electrode in the highly doped area in a very short time, thereby improving the contact between the gate electrode and the substrate. The first preset laser and the second preset laser have different spot widths, speeds, and intensities, but the spot types of the two can be the same.

[0081] In one embodiment, Figure 3 The schematic diagram of the process of forming a substrate is shown, and forming a substrate includes the following steps 302 to 306.

[0082] Step 302, providing a battery cell.

[0083] The cell has one surface and another surface opposite to each other. Taking TOPcon cells as an example, one surface and another surface of the cell can be used to receive incident light and generate photogenerated carriers. One of the two surfaces can be understood as the surface facing the sunlight, also known as the light-receiving surface; the other surface can be understood as the surface facing away from the sunlight, also known as the backlight surface. Optionally, the cell can be a silicon wafer doped with N-type elements or P-type elements; the N-type element can be, for example, any one of phosphorus, arsenic or antimony, and the P-type element can be, for example, boron.

[0084] Step 304: texturing a surface of the battery cell.

[0085] Texturing the surface of the cell can remove the surface damage caused by the cutting process of the cell and increase the surface area of ​​the cell. Reduce the reflectivity of the cell surface. Since the texturing process includes pickling, the hydrogen fluoride used can remove oil stains on the cell surface, and the hydrogen chloride can remove metal impurities on the cell surface, thereby enhancing the light trapping effect of the cell surface. Due to the difference in crystal structure between single and polycrystalline cells, considering the efficiency factor, acid is often used for polycrystalline, and alkali is often used for single crystal. The textured surface of polycrystalline is an irregular concave-convex surface, and the textured surface of single crystal is a regulated pyramid structure. The process steps of texturing can be texturing tank → water washing → alkali washing → water washing → acid washing → water washing → blow drying.

[0086] Step 306, preparing a borosilicate glass layer on one surface of the cell after texturing to form a substrate; a heavily doped region is formed in the borosilicate glass layer.

[0087] Taking the preparation of TOPcon cells as an example for explanation, the cell is an N-type silicon wafer doped with phosphorus atoms. The main function of step 306 is to prepare a PN junction (i.e., a space charge region) by boron diffusion. Therefore, boron diffusion is performed on one surface of the doped N-type silicon wafer to form a P+ layer on one surface of the N-type silicon wafer. Specifically, under certain concentrations, temperatures, pressures, and times, after the boron source (such as BBr3, BCl3) is vaporized in a boron diffusion device (such as a tubular furnace), it is deposited on the surface of the N-type silicon wafer through a series of chemical reactions to obtain a suitable doping concentration, junction depth, and square resistance. According to the different technical routes of the TOPcon cell laser doping process, according to the different times of entering the boron diffusion device, one boron diffusion and two boron diffusions can be performed successively. According to the different ways of using the first laser, step 306 can be specifically two boron diffusions + laser grooving, two boron diffusions + laser doping, or one laser doping.

[0088] In one embodiment, the surface of the substrate includes a front side and a back side disposed opposite to each other, wherein the side on which the borosilicate glass layer is formed serves as the front side of the substrate; Figure 4 The schematic diagram of the process of forming an atomic film layer on the surface of a substrate is shown. The process of forming an atomic film layer on the surface of a substrate includes the following steps 402 to 410.

[0089] Step 402, preparing a tunneling layer on the back side of the substrate.

[0090] The purpose of preparing a tunneling layer on the back of the substrate is to utilize the tunneling effect. When electrons are confined to a very thin interface, they can pass through the interface through the forbidden band gap, making it easier to transmit. The tunneling layer in this embodiment can be prepared using materials with a thickness of several nanometers, such as germanium, silicon, carbon, etc. Preferably, SiO2 can be prepared as a tunneling layer. Further, the tunneling layer can be prepared by PECVD (plasma enhanced chemical vapor deposition, chemical vapor deposition) method. The tunneling layer is the above-mentioned "very thin interface", so when photons enter the solar cell, they will excite the electrons on one side and push them to the tunneling layer. In the tunneling layer, electrons will pass through the forbidden band through the tunneling effect and reach the other side. These electrons can generate current or voltage, thereby converting light energy into electrical energy. Therefore, the setting of the tunneling layer can improve the transmission efficiency of the charge.

[0091] Step 404, preparing a conductive doping layer on the back side of the tunneling layer away from the substrate; the conductive doping layer is doped with phosphorus atoms.

[0092] The conductive layer doping layer has good conductivity and insulation. Specifically, a conductive doping layer is prepared on the back side of the penetration layer away from the substrate, and the conductive doping layer is phosphorus-doped to obtain a conductive doping layer doped with phosphorus atoms. The conductive doping layer in step 404 can be Poly-Si, and is prepared by PECVD method. The poly-Si layer doped with phosphorus can provide field effect passivation and carrier selectivity.

[0093] Step 406, preparing a passivation layer on the front side of the substrate.

[0094] There are many ways to prepare the passivation layer. Taking the preparation of TOPcon batteries as an example, the passivation layer can be prepared by LPCVD (Low Pressure Chemical Vapor Deposition), PECVD, PVD (Physical Vapor Deposition), ALD (Atomic Layer Deposition) and other methods. Preferably, ALD can be used for preparation. The above-mentioned passivation layer can be a film layer formed by materials such as silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, etc. Preferably, it can be an aluminum oxide layer. The preparation of the passivation layer can greatly improve the absorption rate of the solar cell facing the sunlight.

[0095] Step 408, preparing a front anti-reflection layer on the side of the passivation layer facing away from the front side of the substrate.

[0096] Step 410, forming a back anti-reflection layer on a side of the conductive doping layer away from the tunneling layer, wherein the tunneling layer, the conductive doping layer, the passivation layer, the front anti-reflection layer and the back anti-reflection layer together constitute an atomic film layer.

[0097] Among them, the front anti-reflection layer and the back anti-reflection layer can be prepared on the front and back of the solar cell respectively by the PECVD method, wherein the front anti-reflection layer and the back anti-reflection layer can be made of SiN X Material preparation, the anti-reflection layer can reduce the Fresnel reflection at the gas-solid interface of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

[0098] In one embodiment, the substrate further comprises a side surface adjacent to the surface; Figure 5 The process diagram shown in FIG. 1 before forming a tunneling layer on the back side of the substrate further includes the following steps 502 to 504 before forming a tunneling layer on the back side of the substrate.

[0099] Step 502, performing oxidation treatment on the front side of the substrate.

[0100] Specifically, the front side of the substrate is oxidized to reduce the concentration on the front side of the substrate, in preparation for further preparing a passivation layer on the front side of the substrate, so as to improve the photoelectric conversion efficiency of the overall solar cell.

[0101] Step 504, removing the borosilicate glass layer coated on the back and sides.

[0102] It is understandable that in the process of boron diffusion to prepare the borosilicate glass layer, it is inevitable that a borosilicate glass layer will be coated on the back side and the side adjacent to the back side of the substrate. The borosilicate glass layer coated on the side is prone to short circuit, and the borosilicate glass layer formed on the back side is easy to affect the subsequent passivation. Therefore, it is necessary to remove the borosilicate glass layer coated on the back and side to improve the quality of the solar cell.

[0103] In one embodiment, the substrate further comprises a side surface adjacent to the surface; Figure 6 The schematic diagram of the process before preparing the passivation layer on the front side of the substrate shows that the process also includes the following steps 602 to 604 before preparing the passivation layer on the front side of the substrate.

[0104] Step 602, removing the conductive doping layer plated around the front and side surfaces.

[0105] Step 604, etching the phosphosilicate glass layer on the front and side surfaces; the phosphosilicate glass layer is a film layer formed on the front and side surfaces when the conductive doping layer is doped with phosphorus atoms.

[0106] In this embodiment, the conductive doping layer coated on the front and side surfaces is removed, and the phosphosilicate glass layer formed on the front and side surfaces when the conductive doping layer is doped with phosphorus atoms is etched, which can effectively avoid the influence of unnecessary conductive doping layers and phosphosilicate glass layers on the solar cell.

[0107] In one embodiment, Figure 7 The second flow chart of the method for preparing a solar cell is shown. The method for preparing a solar cell includes the following steps 702 to 726 .

[0108] Step 702, providing a battery cell.

[0109] Step 704, texturing is performed on a surface of the battery cell.

[0110] Step 706, preparing a borosilicate glass layer on a surface of the textured cell.

[0111] Step 708 , forming a heavily doped region with a first predetermined width in the borosilicate glass layer.

[0112] Step 710, performing oxidation treatment on the borosilicate glass layer.

[0113] Step 712, removing the borosilicate glass layer coated on the other surface and side of the cell.

[0114] Step 714: prepare a tunneling layer on the other surface of the battery cell.

[0115] Step 716, preparing a conductive doping layer on the other surface of the tunneling layer away from the solar cell; the conductive doping layer is doped with phosphorus atoms.

[0116] Step 718, removing the conductive doping layer plated around the front and side surfaces.

[0117] Step 720, etching the phosphosilicate glass layer on the front and side surfaces; the phosphosilicate glass layer is a film layer formed on the front surface when the conductive doping layer is doped with phosphorus atoms.

[0118] Step 722: Prepare a passivation layer on the side of the borosilicate glass layer facing away from the surface of the cell.

[0119] Step 724 , preparing a front anti-reflection layer on a surface of the passivation layer that is away from a surface of the solar cell.

[0120] Step 726 , forming a back anti-reflection layer on a side of the conductive doped layer away from the tunneling layer.

[0121] The same technical effect as that achieved by the method for preparing solar cells in any of the above-mentioned embodiments, the method for preparing solar cells in this embodiment can ensure that while completing the auxiliary sintering of the gate line electrode, damage to more non-heavily doped areas is avoided. With the cooperation of laser-assisted sintering and laser doping, the contact between the gate line electrode and the heavily doped layer area can be effectively increased, thereby increasing the photoelectric conversion efficiency of the solar cell.

[0122] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0123] In one embodiment, Figure 8 The solar cell 800 includes a substrate 810 and an atomic film layer 820, and the substrate 810 is provided with an atomic film layer 820. Figure 2A heavily doped region 811 with a first preset width d1 is formed in the substrate 810; at least a portion of the atomic film layer covers the heavily doped region 811; a gate line electrode 830 with a second preset width d2 is formed in the heavily doped region 811, and the gate line electrode 830 passes through at least a portion of the atomic film layer; the second preset width d2 is smaller than the first preset width d1; the heavily doped region 811 also forms a sintering region 840 with a third preset width (d3 and d3') away from the edge of the gate line electrode 830, and the third preset width (d3 and d3') is less than or equal to the difference between the first preset width d1 and the second preset width d2 and is greater than 0.

[0124] In this embodiment, the second preset width d2 is smaller than the first preset width d1, which can ensure that even if the gate line electrode 830 is offset, the printing position of the gate line electrode 830 can be controlled within the heavily doped area 811, and the third preset width (d3 and d3') is smaller than or equal to the difference between the first preset width d1 and the second preset width d2 and is greater than 0, thereby avoiding the sintering area 840 from exceeding the heavily doped area 811, thereby ensuring that while completing the auxiliary sintering of the gate line electrode 830, damage to more non-heavily doped areas is avoided.

[0125] In one embodiment, the surface of the substrate 811 includes a front side and a back side that are disposed opposite to each other; Figure 7 The schematic structural diagram of the solar cell shown in the figure, the substrate includes a cell 812 and a borosilicate glass layer 813, the borosilicate glass layer 813 is arranged on a surface of the cell 812, and a heavily doped region 811 is arranged in the borosilicate glass layer 813.

[0126] In one embodiment, Fig. 9 The schematic diagram of the structure of the atomic film layer 820 shown in the figure, the atomic film layer 820 includes a tunneling layer 821, a conductive doping layer 822, a passivation layer 823, a front anti-reflection layer 824 and a back anti-reflection layer 825. The tunneling layer 821 is arranged on the back side of the substrate 810; the conductive doping layer 822 is arranged on the side of the tunneling layer 821 away from the back side of the substrate 810; the conductive doping layer 822 is doped with phosphorus atoms; the passivation layer 823 is arranged on the front side of the substrate 810; the front anti-reflection layer 824 is arranged on the side of the passivation layer 823 away from the front side of the substrate 810; and the back anti-reflection layer 825 is arranged on the side of the conductive doping layer 822 away from the tunneling layer 821.

[0127] In one embodiment, the solar cell includes a photovoltaic cell such as a TOPcon cell, a PERC cell, or an xBC cell that requires heavy doping and auxiliary sintering.

[0128] In one embodiment, the present application further provides a photovoltaic module, which includes a solar cell prepared by a method for preparing a solar cell in any of the above embodiments or a solar cell in any of the above embodiments. Based on the method for preparing a solar cell in the above embodiments, the photovoltaic module of this embodiment has good photoelectric properties and can perform efficient photoelectric conversion.

[0129] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0130] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for preparing a solar cell, characterized in that: include: forming a substrate; forming a heavily doped region of a first preset width in the substrate; forming an atomic film layer on the surface of the substrate; at least a portion of the atomic film layer covers the heavily doped region; A gate line electrode with a second preset width is prepared in the heavily doped region; the gate line electrode passes through at least a portion of the atomic film layer; the second preset width is smaller than the first preset width; A sintering region is formed along the edge of the gate line electrode to make a solar cell, wherein the sintering region is a region within the heavily doped region and has a third preset width away from the edge of the gate line electrode; the third preset width is less than or equal to the difference between the first preset width and the second preset width and is greater than 0; the sintering region includes two regions along the two edge sides of the gate line electrode within the heavily doped region, and the widths of the two sintering regions are the same or different.

2. The method for preparing a solar cell according to claim 1, characterized in that: The step of forming a heavily doped region with a first preset width in the substrate comprises: A first preset laser with a target power and a target speed is used to form a heavily doped region with a first preset width at a target depth of the substrate, wherein the doping concentration of the heavily doped region is a target doping concentration.

3. The method for preparing a solar cell according to claim 1, characterized in that: The forming of the sintering region along the edge of the gate line electrode comprises: A second preset laser with a target voltage is used to form a sintering area with a target current density along the edge of the gate line electrode.

4. The method for preparing a solar cell according to claim 1, characterized in that: The forming of a substrate comprises: Providing a battery cell; Performing texturing on a surface of the battery cell; A borosilicate glass layer is prepared on a surface of the cell after texturing to form the substrate; the heavily doped region is formed in the borosilicate glass layer.

5. The method for preparing a solar cell according to claim 4, characterized in that: The surface of the substrate includes a front side and a back side arranged opposite to each other, wherein the side on which the borosilicate glass layer is formed serves as the front side of the substrate; The step of forming an atomic film layer on the surface of the substrate comprises: preparing a tunneling layer on the back side of the substrate; A conductive doping layer is prepared on a side of the tunneling layer that is away from the back side of the substrate; the conductive doping layer is doped with phosphorus atoms; Preparing a passivation layer on the front side of the substrate; Preparing a positive anti-reflection layer on a side of the passivation layer facing away from the front side of the substrate; Preparing a back anti-reflection layer on a side of the conductive doped layer away from the tunneling layer; The tunneling layer, the conductive doping layer, the passivation layer, the front anti-reflection layer and the back anti-reflection layer together constitute the atomic film layer.

6. The method for preparing a solar cell according to claim 5, characterized in that: The substrate is also provided with a side surface adjacent to the surface; before the tunneling layer is prepared on the back side of the substrate, the invention further comprises: performing oxidation treatment on the front side of the substrate; The borosilicate glass layer coated around the back surface and the side surfaces is removed.

7. The method for preparing a solar cell according to claim 5 or 6, characterized in that: The substrate is also provided with a side surface adjacent to the surface; before the passivation layer is prepared on the front surface of the substrate, the substrate further comprises: removing the conductive doping layer plated around the front surface and the side surface; The phosphosilicate glass layer on the front side and the side side is etched; the phosphosilicate glass layer is a film layer formed on the front side and the side side when the conductive doping layer is doped with phosphorus atoms.

8. A solar cell, characterized in that: The solar cell comprises: A substrate having a heavily doped region of a first preset width formed therein; An atomic film layer is formed on the surface of the substrate; at least a portion of the atomic film layer covers the heavily doped region; a gate electrode of a second preset width is formed in the heavily doped region, and the gate electrode passes through at least a portion of the atomic film layer; the second preset width is smaller than the first preset width; the heavily doped region also forms a sintering region of a third preset width away from the edge of the gate electrode; the third preset width is smaller than or equal to the difference between the first preset width and the second preset width and is greater than 0; the sintering region includes two regions along the two edge sides of the gate electrode in the heavily doped region, and the widths of the two sintering regions are the same or different.

9. The solar cell according to claim 8, characterized in that The surface of the substrate includes a front side and a back side that are arranged opposite to each other; the substrate includes: Battery cells; The borosilicate glass layer is disposed on a surface of the battery cell, and the heavily doped region is disposed in the borosilicate glass layer.

10. The solar cell according to claim 8 or 9, characterized in that: The atomic film layer comprises: A tunneling layer, disposed on the back side of the substrate; A conductive doping layer, disposed on a side of the tunneling layer away from the back side of the substrate; the conductive doping layer is doped with phosphorus atoms; A passivation layer, disposed on the front surface of the substrate; A positive anti-reflection layer, disposed on a side of the passivation layer away from the front side of the substrate; The back anti-reflection layer is arranged on a side of the conductive doped layer away from the tunneling layer.

11. A photovoltaic module, characterized in that: It comprises a solar cell prepared by the method for preparing a solar cell according to any one of claims 1 to 7 or a solar cell according to any one of claims 8 to 10.

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