A control circuit and control method for a bridge arm multiplexing Buck-Boost LLC converter

Abstract

The present invention discloses a control circuit and control method of a bridge arm multiplexing Buck-Boost LLC converter, wherein the control circuit includes an output voltage regulating circuit, a multiplexing bridge arm driving circuit, a phase-shift clock generating circuit, and a limiting module, and the control method is as follows: the output voltage sampling signal generates a duty cycle of a switch tube Q1 after passing through a voltage regulator to control the shutdown of Q1, and its inverted signal controls the shutdown of Q2; the valley value of the inductor current is sampled and used to generate a phase-shift duty cycle, and two narrow pulses are generated to control the opening of the switch tubes Q1 and Q3 respectively; the minimum value of the phase-shift signal is limited under low and high voltage light load conditions by the limiting module. The present invention realizes the soft switching of all switch tubes of the converter within the full voltage and full load range, and ensures that the inductor current pulsation is minimized, thereby optimizing the soft switching and dynamic performance of the bridge arm multiplexing Buck-Boost LLC converter.

Description

Technical Field

[0001] The invention belongs to the technical field of power converter control, and in particular relates to a control circuit and a control method of a bridge arm multiplexing Buck-Boost LLC converter. Background Art

[0002] For wide input applications such as distributed power systems, electric propulsion systems, and fuel cell systems, power converters not only need to have electrical isolation functions, but also should ensure high conversion efficiency over the entire input voltage range. A common solution is to adopt a two-stage structure, namely a cascade of a pre-regulator + an isolation converter, where the pre-regulator is used to adjust the voltage and the isolation converter is used to achieve electrical isolation and voltage matching. The pre-regulator usually uses a four-tube Buck-Boost converter, which can achieve zero-voltage switching (Zero-voltage-switching, ZVS) of the switch tube over the full input voltage and load range and ensure the minimum inductor current pulsation, thereby achieving high conversion efficiency. The isolation converter usually uses an LLC resonant converter, which works in a fixed-frequency open-loop mode, and can also achieve ZVS of the switch tube and zero current shutdown (Zero-current-switching, ZCS) of the secondary rectifier diode, thereby reducing switching losses and improving conversion efficiency.

[0003] After connecting the two topologies in cascade mode, the resulting combined topology can take into account the characteristics of wide range voltage regulation, high switching frequency, high efficiency, etc. However, the number of power tubes in the Buck-Boost+LLC cascade converter is large, which increases the volume and cost. By fixing the duty cycle of the rear bridge arm of the four-tube Buck-Boost converter to 50% and then reusing it with the bridge arm of the LLC, the number of devices can be reduced, thereby forming a bridge arm reused Buck-Boost LLC converter to further improve the power density of the converter.

[0004] For the reused Buck-Boost LLC converter, the front stage can still be regarded as a four-tube Buck-Boost converter. The existing control methods include single-mode control, dual-mode control and quadrilateral inductor current control. Among them, quadrilateral inductor current control has attracted widespread attention because it can realize soft switching of all switch tubes. After the bridge arm is reused, since the duty cycle of the switch tube of the reused bridge arm is fixed at 50%, the control freedom of the converter changes from three to two. In order to still control the inductor current as a quadrilateral, the only method at present is to establish a mathematical model of the inductor current and then implement it through the table lookup method. When the switching frequency increases, the storage resources occupied by the table lookup method increase, resulting in problems such as poor control accuracy and poor dynamic performance. At the same time, the soft switching of light load and other working conditions will be lost, sacrificing the performance of the converter and increasing the complexity of the system.

[0005] Therefore, in the quadrilateral inductor current control of the bridge arm multiplexing Buck-Boost LLC converter, how to achieve soft switching of all switches and ensure minimum inductor current pulsation, and find a simple and feasible control scheme is an urgent problem to be solved by researchers in this field. Summary of the invention

[0006] The technical problem to be solved by the present invention is to address the deficiencies of the above-mentioned prior art and to provide a control circuit and a control method for a bridge arm multiplexing Buck-Boost LLC converter. While ensuring the normal operation of the LLC resonant converter, the inductor current valley value is obtained by direct sampling, and the relationship between the phase-shift duty cycle and the inductor current pulsation is utilized to directly adjust the phase-shift duty cycle to minimize the inductor current pulsation, thereby simplifying the control complexity.

[0007] In order to achieve the above technical objectives, the technical solution adopted by the present invention is:

[0008] A control circuit of a bridge arm multiplexing Buck-Boost LLC converter, the converter comprising four switch tubes Q1, Q2, Q3, Q4 and a filter inductor L b , filter inductor L b The two ends of are connected to the midpoints of the bridge arms of the switch tubes Q1 and Q2 and the midpoints of the bridge arms of the switch tubes Q3 and Q4 respectively, and the switch tubes Q1 and Q2 are complementary turned on, where the duty cycle of Q1 is D y1 , the switch tubes Q3 and Q4 are complementary turned on and the duty cycle is fixed at 50%; the control circuit includes:

[0009] Output voltage regulation circuit, used to sample the converter output voltage V o And compared with the given voltage reference, the voltage regulator closes the loop to adjust the stable output voltage, and combines it with the triangle wave of the same phase as CLK1 to obtain the duty cycle D of the switch tube Q1. y1 , and combined with CLK1 to drive switch tubes Q1 and Q2;

[0010] The multiplexed bridge arm driving circuit is used to delay the CLK2 pulse by half a switching cycle to obtain a shutdown signal with a fixed duty cycle of 50% to drive the switch tubes Q3 and Q4;

[0011] Phase-shifted clock generation circuit for sampling filter inductor L b The inductor current i Lb The valley current i Lb_min , after the inverter becomes -i Lb_min and with a given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ, according to the phase shift signal V θ First generate the phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The controlled narrow pulses CLK1 and CLK2 control the turn-on time of the switch tubes Q1 and Q3 respectively;

[0012] The first limiting module is used to limit the phase shift signal V under low voltage and light load conditions. θ The minimum value of , realizes the soft switching of the switch tube Q2;

[0013] The second limiting module is used to limit the phase shift signal V under high voltage and light load conditions. θ The minimum value of Q3 is realized to realize soft switching of the switch tube Q3.

[0014] To optimize the above technical solutions, the specific measures taken also include:

[0015] The above-mentioned output voltage regulation circuit includes a voltage regulator, a first comparator and a first RS trigger;

[0016] Converter output voltage V o The sampled signal v os With a given voltage reference V o_ref The difference signal is input to the voltage regulator and the output is v error , v error After the triangle wave with the same phase as CLK1 is sent to the first comparator for comparison, the duty cycle D of the switch tube Q1 is obtained. y1 , D y1 and CLK1 are sent to the first RS trigger, the positive output signal of the first RS trigger is the driving signal of the switch tube Q1, and the negative output signal thereof is the driving signal of the switch tube Q2.

[0017] The above-mentioned multiplexed bridge arm driving circuit includes a delay module and a second RS trigger;

[0018] The delay module delays the CLK2 pulse signal by T s / 2 and then sent to the second RS trigger together with CLK2 to generate a shutdown signal of 1 / 2 switching cycle. The positive output signal of the second RS trigger is the driving signal of the switch tube Q3, and its inverted signal is the driving signal of the switch tube Q4.

[0019] The above-mentioned phase-shift clock generating circuit comprises a phase-shift signal generating module and a phase-shift pulse generating module;

[0020] The phase shift signal generating module includes a valley current detection circuit, an inverter and a PI regulator. The valley current detection circuit samples the inductor current i Lb The valley value i Lb_min ,i Lb_min After the inverter, it becomes -iLb_min , and compare it with the given current reference I zvs The difference is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ ;

[0021] The phase shift pulse generating module receives the phase shift signal V θ After that, V θ With triangle wave v saw1 After being sent to the second comparator for comparison, the output phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The narrow pulses CLK1 and CLK2 are controlled, wherein CLK1 is used to control the turn-on time of the switch tube Q1, and CLK2 is used to control the turn-on time of the switch tube Q3.

[0022] The above current reference I zvs for:

[0023]

[0024] In the formula, C oss is the switch junction capacitance, t d is the dead time of the switch commutation, L b is the inductance value, V in is the converter input voltage, H i is the proportionality coefficient.

[0025] The first limiting module includes an adder and a diode D1. The adder generates a phase shift signal V under low voltage and light load conditions. θ The minimum value of V θ_min1 , V θ_min1 After passing through diode D1, it is connected to V θ superior:

[0026]

[0027] In the formula, I zvs_ref Indicates the minimum soft switching current of switch tube Q2 to achieve soft switching, L b is the inductance value, V M is a triangle wave v saw1 The peak value, V bus is the converter intermediate bus voltage, T s It is the switching cycle of the switching tube.

[0028] The second limiting module includes a divider and a diode D2. The divider generates a phase shift signal V under high voltage light load conditions. θ The minimum value of V θ_min2 , V θ_min2 After passing through diode D2, it is connected to V θsuperior:

[0029]

[0030] Where V in is the converter input voltage, H i is the proportionality coefficient.

[0031] The first limiting module and the second limiting module limit the phase shift signal V θ The minimum value of is:

[0032] When the converter works under heavy load condition, V θ_min1 and V θ_min2 Smaller, phase-shifted signal V θ Regulated by PI regulator;

[0033] When the converter is operating under light load conditions, -i Lb_min Large, PI regulator negative saturation output, under low input voltage conditions, V θ_min2 Smaller, diode D2 is cut off, V θ_min1 The diode D1 is turned on, limiting the phase shift signal to the minimum value V θ_min1 ; Under high input voltage conditions, V θ_min1 Smaller, diode D1 is cut off, V θ_min2 The diode D2 is turned on, limiting the phase shift signal to the minimum value V θ_min2 .

[0034] A control method for a bridge arm multiplexing Buck-Boost LLC converter, comprising:

[0035] Output voltage regulation circuit sampling converter output voltage V o And compared with the given voltage reference, the voltage regulator closes the loop to adjust the stable output voltage, and combines it with the triangle wave of the same phase as CLK1 to obtain the duty cycle D of the switch tube Q1. y1， And combined with CLK1 to drive switch tubes Q1 and Q2;

[0036] The multiplexed bridge arm driving circuit delays the CLK2 pulse by half a switching cycle to obtain a shutdown signal with a fixed duty cycle of 50% to drive the switch tubes Q3 and Q4;

[0037] Phase shift clock generation circuit sampling filter inductor L b The inductor current i Lb The valley current i Lb_min , after the inverter becomes -i Lb_min and with a given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ, according to the phase shift signal V θ First generate the phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The controlled narrow pulses CLK1 and CLK2 control the turn-on time of the switch tubes Q1 and Q3 respectively;

[0038] The first limiting module limits the phase shift signal V under low voltage and light load conditions. θ The minimum value of , realizes the soft switching of the switch tube Q2;

[0039] The second limiting module limits the phase shift signal V under high voltage and light load conditions. θ The minimum value of Q3 is realized to realize soft switching of the switch tube Q3.

[0040] The present invention has the following beneficial effects:

[0041] The control circuit of the present invention comprises an output voltage regulating circuit, a multiplexed bridge arm driving circuit and a phase shift clock generating circuit. The specific control method is: the output voltage sampling signal is passed through the voltage regulator to generate the duty cycle D of the switch tube Q1. y1 , used to control the shutdown of Q1, and its inverted signal is used to control the shutdown of Q2; sampling the valley value of the inductor current, after passing through the inverter and PI regulator, the phase shift signal is output and the phase shift duty ratio D is generated. θ , two narrow pulses CLK1 and CLK2 are generated by the phase-shift pulse generation module to control the opening of the switch tubes Q1 and Q3 respectively, where CLK2 generates a shutdown signal of Q3 after a delay of half a switching cycle; under light load conditions, a limiting module is added to limit the minimum value of the phase-shift signal. The control method proposed in the present invention realizes the soft switching of all switch tubes of the converter within the full voltage and full load range, and ensures the minimization of the inductor current pulsation, solves the problem that the traditional control strategy cannot realize soft switching in the full range and needs to determine the phase-shift duty cycle through a complex table lookup method, and optimizes the soft switching and dynamic performance of the bridge arm multiplexing Buck-Boost LLC converter.

[0042] The present invention adopts a real-time control method, which can realize the soft switching of all switch tubes in the entire voltage range and load range, and ensure the minimization of the inductor current pulsation, reduce the conduction loss of the switch tube, and improve the converter efficiency; directly sample the inductor current valley value, use the monotonicity of the phase shift signal and the inductor current valley value, and directly use the PI regulator to adjust the phase shift signal size. Compared with the traditional table lookup method, it no longer depends on the mathematical model of the inductor current, avoids complex calculations and control circuit structures, occupies less storage resources, and the implementation method is simple and reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 The circuit structure diagram of the bridge arm multiplexing Buck-Boost LLC converter.

[0044] Figure 2 is the working waveform diagram of the bridge-arm multiplexed Buck-Boost LLC converter; Figure 2 In a, V in <V bus , Figure 2 In b, V in >V bus .

[0045] Figure 3 is the overall block diagram of the control circuit of the bridge-arm multiplexed Buck-Boost LLC converter.

[0046] Figure 4 is the current waveform diagram when the inductor current changes with the load under heavy load, Figure 4 In a, V in <V bus , Figure 4 In b, V in >V bus .

[0047] Figure 5 is the current waveform diagram when the inductor current changes with the load under light load, Figure 5 In a, V in <V bus , Figure 5 In b, V in >V bus .

[0048] Figure 6 is the simulation waveform diagram of the present invention when the input voltage is 60V, Figure 6 a is the simulation waveform diagram of full load when the input voltage is 60V, Figure 6 b is the simulation waveform diagram of half load when the input voltage is 60V, Figure 6 c is the simulation waveform diagram of 10% load when the input voltage is 60V in the present invention.

[0049] Figure 7 is the simulation waveform diagram of the present invention when the input voltage is 120V, Figure 7 a is the simulation waveform diagram of full load when the input voltage is 120V in the present invention, Figure 7 b is the simulation waveform diagram of half load when the input voltage is 120V in the present invention, Figure 7 c is the simulation waveform diagram of 10% load when the input voltage is 120V in the present invention.

[0050] Figure 8 is the simulation waveform of the load jumping from full load - 10% - full load in the present invention, Figure 8 a is the simulation waveform of the load jumping from full load - 10% - full load when the input voltage is 60V in the present invention, Figure 8 b is the simulation waveform of the load jumping from full load-10% to full load when the input voltage is 84V in the present invention, Figure 8 c is a simulation waveform of the load jumping from full load-10%-full load when the input voltage is 120V in the present invention.

[0051] Fig. 9 It is a simulation waveform diagram of the input voltage jumping from 60V-120V-60V when fully loaded in the present invention;

[0052] Fig.10 It is the control circuit principle block diagram of the bridge arm multiplexing Buck-Boost LLC converter. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0054] Although the steps in the present invention are arranged with numbers, they are not used to limit the order of the steps. Unless the order of the steps is clearly stated or the execution of a certain step requires other steps as a basis, the relative order of the steps can be adjusted. It is understood that the term "and / or" used in this article involves and covers any and all possible combinations of one or more of the associated listed items.

[0055] like Figure 1 , 3 As shown in FIG10 , the present invention provides a control circuit for a bridge arm multiplexing Buck-Boost LLC converter. Figure 1 This is the circuit structure diagram of the bridge arm multiplexing Buck-Boost LLC converter, which is mainly composed of a four-tube Buck-Boost converter and a half-bridge LLC converter by multiplexing a group of bridge arm power tubes. First, the circuit structure and function are explained: four switch tubes Q1, Q2, Q3, Q4 and a filter inductor L b and bus capacitance C bus The Buck-Boost converter is constructed, where Q1 and Q2 are turned on complementary to form a bridge arm unit, Q3 and Q4 have a fixed duty cycle of 50% and are turned on complementary to form another bridge arm unit, and the filter inductor L b They are connected to the midpoints of the two bridge arms to store and transfer energy. The bus capacitor C bus They are connected to the source of the switch tube Q3 and the ground respectively, playing the role of energy storage and voltage balance; the bridge arm composed of the switch tubes Q3 and Q4 is a multiplexed bridge arm, forming an inverter network, C r , L r and L mThe resonant network is formed, and the transformer T r , diode D R1 , D R4 , D R3 and D R4 Form a rectifier network, and filter capacitor C o Together they form a half-bridge LLC converter. By multiplexing the connection of the bridge arms, a bridge arm multiplexing Buck-Boost LLC converter is formed.

[0056] The control method includes two control degrees of freedom: the duty cycle D of the switch tube Q1 y1 The phase difference between the turn-on time of Q1 and Q3 is defined as the phase shift duty cycle D θ . Control degree of freedom D y1 It is used to control the switching action of the switch tube of Q1, and its inverted signal is used to control the switching action of the switch tube of Q2. θ It is used to control the phase difference between the opening moments of the switch tubes Q1 and Q3. In order to ensure the normal operation of the half-bridge LLC, the duty cycle of the switch tube Q3 is fixed at 50%, and its inverted signal is used to control the switching action of the switch tube Q4.

[0057] To achieve soft switching of the switch tubes Q1 and Q4, it is necessary to ensure that the inductor current is too negative before the switch tube is turned on, discharge the junction capacitance of the switch tube to zero, and make its reverse parallel diode naturally turn on. The magnitude of the negative current required to achieve is defined as -I zvs To achieve soft switching of the switch tubes Q2 and Q3, it is necessary to ensure that the inductor current is positive before the switch tube is turned on, discharge the junction capacitance of the switch tube to zero, and make its reverse parallel diode naturally turn on. The magnitude of the positive current required to achieve this is defined as I zvs .

[0058] The control principle of a bridge arm multiplexing Buck-Boost LLC converter proposed in the present invention includes:

[0059] 1): Sample the inductor current i Lb The valley value of the soft switching current reference I required by the given soft switching is obtained after passing through the inverter. zvs For comparison, the soft switching current reference I zvs By input voltage H i The sampling coefficient is sampled, and the error value is passed through the PI regulator to obtain the phase shift signal V θ , V θ After comparing with the triangle wave, the phase shift duty ratio D is obtained. θ The phase-shift duty cycle is set to ensure soft switching of the switch tube and minimize the inductor current pulsation.

[0060] 2): Sample output voltage v os With a given voltage reference Vo_ref By comparison, the voltage regulator closes the loop to adjust the stable output voltage, and the duty cycle D of the switch tube Q1 is obtained. y1 .

[0061] 3): Delay the CLK2 pulse signal generated in 1) by T s / 2 is used as the turn-off signal of the switch tube Q3 to control the duty cycle D of the switch tube Q3. y3 Fixed at 50%.

[0062] Rated input voltage V in and rated output voltage V o With duty cycle D y1 The relationship between them is:

[0063]

[0064] Where M LLC is the LLC voltage gain, where LLC works in the switching fixed frequency state, and its switching frequency is slightly lower than the resonant frequency, and M LLC =1, N is the transformer turns ratio, which is a fixed constant.

[0065] From this relationship, we can see that the relationship between input and output is only related to D y1 The second control degree of freedom D is introduced θ The adjustable inductor current waveform also makes it possible to realize the soft switching of the four switch tubes. Therefore, how to select the appropriate D θ This is the focus of the present invention.

[0066] As long as D y1 The value of remains unchanged to satisfy the input-output relationship. Under the same output power, adjust the second control degree of freedom D θ Different inductor current waveforms can be obtained when the phase shift duty ratio D θ As the inductor current ripple increases, the phase shift duty ratio D θ The inductor current ripple is reduced. On the basis of ensuring the soft switching of all switch tubes, in order to reduce the inductor current ripple as much as possible, the value of the phase shift duty cycle should be adjusted so that the inductor current valley value I Lb_min Exactly equal to -I zvs ,like Figure 2 a and Figure 2 As shown in b, this regulation link is realized by a PI regulator.

[0067] For the phase shift duty ratio D θDetermination of the value range of: First, in order to ensure that all switches can achieve soft switching, the converter needs to work in the following timing: Q1 should be turned off before Q3, Q3 should be turned off before Q2, Q2 should be turned off before Q4, and Q4 should be turned off before Q1. It is referred to as the optimal switching timing. Under this timing, the phase shift duty ratio D θ The value range of is as follows:

[0068]

[0069] At the same time, under light load conditions, the inductor current curve will drop, causing the switch tube Q3 or Q2 to lose soft switching, so the phase shift duty cycle D θ Limit the range as follows:

[0070]

[0071] Phase shift duty ratio D θ The limiting is achieved by controlling the phase shift signal V θ Realize and satisfy the relationship: D θ =V θ / V M , where V M is a triangle wave v saw1 Optionally, the phase shift signal V θ The limits can be programmed in digital devices or clamped by diodes in analog circuits.

[0072] The present invention is implemented by using an analog control circuit as an example, and its principle schematic diagram is shown as follows Figure 3 As shown, the circuit mainly includes three components: a phase shift signal generating module, an output voltage stabilizing module, a valley current control module and a limiting module.

[0073] The control circuit comprises:

[0074] (1) The output voltage regulation circuit is used to obtain the driving signals of the switch tubes Q1 and Q2.

[0075] Output voltage regulation circuit sampling converter output voltage V o , output voltage v o The sampled signal v os The voltage regulator (consisting of operational amplifier EA1 and its external circuit) is used to close the loop and adjust the stable output voltage. The output of the voltage regulator is a triangular wave v with the same phase as CLK1. saw1 After comparison, the duty cycle D of the switch tube Q1 is obtained. y1 , and combined with CLK1 to drive switch tubes Q1 and Q2;

[0076] Specifically, the output voltage regulation circuit includes a voltage regulator, a first comparator and a first RS trigger;

[0077] Converter output voltage V o The sampled signal v os With a given voltage reference V o_ref The difference signal is input to the voltage regulator and the output is v error , the output of the voltage regulator v error After the triangle wave with the same phase as CLK1 is sent to the first comparator for comparison, the duty cycle D of the switch tube Q1 is obtained. y1 , D y1 and CLK1 are sent to the first RS trigger. The positive output signal Q of the first RS trigger is the driving signal of the switch tube Q1, and its inverted signal That is the driving signal of the switch tube Q2.

[0078] (2) The multiplexed bridge arm drive circuit is used to obtain the drive signal of the switch tubes Q3 and Q4, which delays the CLK2 pulse by half a switching cycle T s / 2 generates a shutdown signal for Q3, and the duty cycle of the switch tube Q3 is fixed to 50% to drive the switch tubes Q3 and Q4;

[0079] The multiplexed bridge arm driving circuit includes a delay module and a second RS trigger;

[0080] The delay module delays the CLK2 pulse signal by T s / 2 and CLK2 are then sent to the reset input port R of the second RS flip-flop to generate a 1 / 2 switching cycle off signal, that is, a 50% fixed duty cycle to drive LLC to work normally. The positive output signal Q of the second RS flip-flop is the drive signal of the switch tube Q3, and its inverted signal That is the driving signal of the switch tube Q4.

[0081] (3) Phase-shifted clock generation circuit for sampling the filter inductor L b The inductor current i Lb The valley current i Lb_min , after the inverter becomes -i Lb_min and with a given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ The phase-shift pulse generation module generates a phase-shift signal V θ First generate the phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The controlled narrow pulses CLK1 and CLK2 control the turn-on time of the switch tubes Q1 and Q3 respectively;

[0082] The phase-shift clock generating circuit comprises a phase-shift signal generating module and a phase-shift pulse generating module;

[0083] The phase shift signal generation module includes a valley current detection circuit, an inverter and a PI regulator. The valley current detection circuit is composed of an RC parallel circuit and a diode. Since the valley value of the inductor current is less than 0, the diode is reversely connected in series at the current input end. The inverter is constructed by an operational amplifier to sample the inductor current i Lb The valley value i Lb_min ,i Lb_min After the inverter, it becomes -i Lb_min , and compare it with the given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ ;

[0084] The phase shift pulse generating module receives the phase shift signal V θ After that, V θ With triangle wave v saw1 After being sent to the second comparator for comparison, the output phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The narrow pulses CLK1 and CLK2 are controlled, wherein CLK1 is used to control the turn-on time of the switch tube Q1, and CLK2 is used to control the turn-on time of the switch tube Q3.

[0085] (4) The first limiting module is used to limit the phase shift signal V under low voltage and light load conditions. θ The minimum value of ensures the soft switching of the switch tube Q2;

[0086] Under low input voltage and light load conditions, the phase shift signal V θ The first limiting module uses a proportional addition circuit built with an operational amplifier to sample the inductor current valley value i at this time. Lb_min , and the output voltage regulator output signal v error , soft switching current I zvs , DC bias 0.5V M , perform proportional addition operation on the four, and the output signal V θ_min1 The resulting phase-shifted signal V θ Restrictions are imposed. The details are as follows:

[0087] The first limiting module includes an adder and a diode D1. The adder generates a phase shift signal V under low voltage and light load conditions. θ The minimum value V θ_min1 , V θ_min1 After passing through diode D1, it is connected to V θsuperior:

[0088]

[0089] In the formula, I zvs_ref Indicates the minimum soft switching current of switch tube Q2 to achieve soft switching, L b is the inductance value, V M is a triangle wave v saw1 The peak value, V bus is the converter intermediate bus voltage, T s It is the switching cycle of the switching tube.

[0090] The second limiting module is used to limit the phase shift signal V under high voltage and light load conditions. θ The minimum value ensures the soft switching of the switch tube Q3.

[0091] Under high input voltage and light load conditions, the phase shift signal V θ The second limiting module is built with a divider to sample the inductor current valley value i Lb_min And the input voltage sampling signal v ins , divide the two, and the output signal V θ_min2 The resulting phase-shifted signal V θ The restrictions are as follows:

[0092] The second limiting module includes a divider and a diode D2. The divider generates a phase shift signal V under high voltage light load conditions. θ The minimum value V θ_min2 , V θ_min2 After passing through diode D2, it is connected to V θ superior:

[0093]

[0094] Where, L b is the inductance value, V in is the converter input voltage, H i is the proportionality coefficient, V M is a triangle wave v saw1 peak value.

[0095] The soft switching current reference I zvs , through the sampling converter input voltage V in Then multiply by the proportionality factor H i Get, I zvs With H i The relationship between them is:

[0096]

[0097] In the formula, Coss is the switch junction capacitance, t d is the dead time of the switch commutation, L b is the inductance value, V in is the converter input voltage, H i is the proportionality coefficient.

[0098] It should be noted that the phase shift signal is generated by the PI regulator under heavy load conditions and is determined by the limiting link under light load conditions. The light load condition is generally set to 1 / 3 of the full load power.

[0099] The minimum phase shift signal V generated by the first limiting module and the second limiting module θ_min1 and V θ_min2 After passing through diodes, they are connected to V θ superior.

[0100] The phase shift signal V θ And the limiter module to shift the phase duty ratio D θ Further explanation of the regulation:

[0101] When the converter works under heavy load condition, V θ_min1 and V θ_min2 Smaller, phase-shifted signal V θ Regulated by PI regulator; Figure 4 As shown in a and 4b, under the same input voltage, as the load continues to decrease, the phase shift signal V θ After passing through the PI regulator, the current pulsation decreases continuously.

[0102] When the converter is operating under light load conditions, -i Lb_min Large, PI regulator negative saturation output, under low input voltage conditions, V θ_min2 Smaller, diode D2 is cut off, V θ_min1 The diode D1 is turned on, limiting the phase shift signal to the minimum value V θ_min1 :

[0103]

[0104] like Figure 5 a, When the load is light and the input voltage is low, the inductor current waveform decreases as the load decreases.

[0105] At high input voltage conditions, V θ_min1 Smaller, diode D1 is cut off, V θ_min2 The diode D2 is turned on, limiting the phase shift signal to the minimum value V θ_min2 :

[0106]

[0107] like Figure 5As shown in Figure b, when the load is light and the input voltage is high, the inductor current waveform decreases as the load decreases.

[0108] In order to further illustrate the superiority of the present control method, a simulation example of the present invention is given below.

[0109] According to the 420W bridge arm multiplexing Buck-Boost LLC converter parameters given in Table 1, a simulation circuit was built using Saber simulation software. Figure 6 a-6c shows the simulation waveforms of the bridge arm multiplexing Buck-Boost LLC converter under different load currents when the input voltage is 120V, where: Figure 6 a is the simulation waveform of full load when the input voltage is 120V. Figure 6 b is the simulation waveform of half load when the input voltage is 120V. Figure 6 c is the simulation waveform of 10% load when the input voltage is 120V. Figure 7 a-7c shows the simulation waveforms of the bridge arm multiplexing Buck-Boost LLC converter under different load currents when the input voltage is 60V, where: Figure 7 a is the simulation waveform of full load when the input voltage is 60V. Figure 7 b is the simulation waveform of half load when the input voltage is 60V. Figure 7 c is the simulation waveform of 10% load when the input voltage is 60 V. It can be seen that all switches can achieve ZVS and the inductor current pulsation is small. Figure 8 a-8c shows the simulation waveform of load jump, where: Figure 8 a is the simulation waveform of load jump when the input voltage is 60V. Figure 8 b is the simulation waveform of load jump when the input voltage is 84V. Figure 8 c is the simulation waveform of load jump when the input voltage is 120V. It can be seen that the output voltage can be stabilized at 84V and has a faster dynamic response speed. Fig. 9 The simulation waveform of input voltage jump at full load is given. It can be seen that the output voltage can be stabilized at 84V and has a faster dynamic response speed.

[0110] Table 1 Main parameters of bridge arm multiplexing Buck-Boost LLC converter

[0111]

[0112] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0113] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A control circuit of a bridge arm multiplexing Buck-Boost LLC converter, wherein the bridge arm multiplexing Buck-Boost LLC converter is composed of a four-tube Buck-Boost converter and a half-bridge LLC converter by multiplexing a group of power tubes of the bridge arm, and the four-tube Buck-Boost converter includes four switch tubes Q1, Q2, Q3, Q4 and a filter inductor L b and bus capacitance C bus , where Q1 and Q2 are complementary turned on to form a bridge arm unit, the two ends of the bridge arm unit serve as the input of the bridge arm multiplexing Buck-Boost LLC converter, Q3 and Q4 have a fixed duty cycle of 50% and are complementary turned on to form another bridge arm unit, L b Connected to the midpoints of the two bridge arm units respectively, C bus are connected to the source of Q3 and the ground respectively; the half-bridge LLC converter includes an inverter network, a resonant network, a rectifier network and a filter capacitor C o , where the inverter network is the multiplexed bridge arm composed of Q3 and Q4, and the resonant network includes a resonant capacitor C r , resonant inductor L r and the magnetizing inductance L m , the rectifier network includes transformer T r , diode D R1 , D R2 , D R3 and D R4 , D R1 and D R3 Series, D R2 and D R4 After connecting in series with C o Parallel, C o Connected in parallel with the load as the bridge arm to multiplex the output of the Buck-Boost LLC converter, T r One end of the original side passes through L r With Q 3、 The bridge arm midpoint of Q4 is connected and the other end is connected through C r Ground, and L m Connect in parallel with T r Primary side, T r One end of the secondary side is connected to D R1 and D R3 The other end is connected to D R2 and D R4 A connection point; characterized in that The control circuit comprises: Output voltage regulation circuit, used to sample the converter output voltage V o And compared with the given voltage reference, the voltage regulator closes the loop to adjust the stable output voltage, and combines it with the triangle wave of the same phase as CLK1 to obtain the duty cycle D of the switch tube Q1. y1， And combined with CLK1 to drive switch tubes Q1 and Q2; The multiplexed bridge arm driving circuit is used to delay the CLK2 pulse by half a switching cycle to obtain a shutdown signal with a fixed duty cycle of 50% to drive the switch tubes Q3 and Q4; Phase-shifted clock generation circuit for sampling filter inductor L b The inductor current i Lb The valley current i Lb_min , after the inverter becomes -i Lb_min and with a given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ , according to the phase shift signal V θ First generate the phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The controlled narrow pulses CLK1 and CLK2 control the turn-on time of the switch tubes Q1 and Q3 respectively; The first limiting module is used to limit the phase shift signal V under low voltage and light load conditions. θ The minimum value of , realizes the soft switching of the switch tube Q2; The second limiting module is used to limit the phase shift signal V under high voltage and light load conditions. θ The minimum value of Q3 is realized to realize soft switching of the switch tube Q3.

2. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 1, characterized in that: The output voltage regulation circuit includes a voltage regulator, a first comparator and a first RS trigger; Converter output voltage V o The sampled signal v os With a given voltage reference V o_ref The difference signal is input to the voltage regulator and the output is v error , v error After the triangle wave with the same phase as CLK1 is sent to the first comparator for comparison, the duty cycle D of the switch tube Q1 is obtained. y1 , D y1 and CLK1 are sent to the first RS trigger, the positive output signal of the first RS trigger is the driving signal of the switch tube Q1, and the negative output signal thereof is the driving signal of the switch tube Q2.

3. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 1, characterized in that: The multiplexed bridge arm driving circuit includes a delay module and a second RS trigger; The delay module delays the CLK2 pulse signal by T s / 2 and then sent to the second RS trigger together with CLK2 to generate a shutdown signal of 1 / 2 switching cycle. The positive output signal of the second RS trigger is the driving signal of the switch tube Q3, and its inverted signal is the driving signal of the switch tube Q4.

4. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 1, characterized in that: The phase-shift clock generating circuit comprises a phase-shift signal generating module and a phase-shift pulse generating module; The phase shift signal generating module includes a valley current detection circuit, an inverter and a PI regulator. The valley current detection circuit samples the inductor current i Lb The valley value i Lb_min ,i Lb_min After the inverter, it becomes -i Lb_min , and compare it with the given current reference I zvs The difference is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ ; The phase shift pulse generating module receives the phase shift signal V θ After that, V θ With triangle wave v saw1 After being sent to the second comparator for comparison, the output phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The narrow pulses CLK1 and CLK2 are controlled, wherein CLK1 is used to control the turn-on time of the switch tube Q1, and CLK2 is used to control the turn-on time of the switch tube Q3.

5. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 1, characterized in that: The current reference I zvs for: In the formula, C oss is the switch junction capacitance, t d is the dead time of the switch commutation, L b is the inductance value, V in is the converter input voltage, H i is the proportionality coefficient.

6. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 2, characterized in that: The first limiting module includes an adder and a diode D1. The adder generates a phase shift signal V under low voltage and light load conditions. θ The minimum value V θ_min1 , V θ_min1 After passing through diode D1, it is connected to V θ superior: In the formula, I zvs_ref Indicates the minimum soft switching current of switch tube Q2 to achieve soft switching, L b is the inductance value, V M is a triangle wave v saw1 The peak value, V bus is the converter intermediate bus voltage, T s It is the switching cycle of the switching tube.

7. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 6, characterized in that: The second limiting module includes a divider and a diode D2. The divider generates a phase shift signal V under high voltage light load conditions. θ The minimum value V θ_min2 , V θ_min2 After passing through diode D2, it is connected to V θ superior: Where V in is the converter input voltage, H i is the proportionality coefficient.

8. The control circuit of a bridge arm multiplexing Buck-Boost LLC converter according to claim 7, characterized in that: The first limiting module and the second limiting module limit the phase shift signal V θ The minimum value of is: When the converter works under heavy load condition, V θ_min1 and V θ_min2 Smaller, phase-shifted signal V θ Regulated by PI regulator; When the converter is operating under light load conditions, -i Lb_min Large, PI regulator negative saturation output, under low input voltage conditions, V θ_min2 Smaller, diode D2 is cut off, V θ_min1 The diode D1 is turned on, limiting the phase shift signal to the minimum value V θ_min1 ; Under high input voltage conditions, V θ_min1 Smaller, diode D1 is cut off, V θ_min2 The diode D2 is turned on, limiting the phase shift signal to the minimum value V θ_min2 .

9. A control method for a bridge arm multiplexing Buck-Boost LLC converter, wherein the bridge arm multiplexing Buck-Boost LLC converter is composed of a four-tube Buck-Boost converter and a half-bridge LLC converter by multiplexing a group of power tubes of the bridge arm, wherein the four-tube Buck-Boost converter includes four switch tubes Q1, Q2, Q3, Q4 and a filter inductor L b and bus capacitance C bus , where Q1 and Q2 are complementary turned on to form a bridge arm unit, the two ends of the bridge arm unit serve as the input of the bridge arm multiplexing Buck-Boost LLC converter, Q3 and Q4 have a fixed duty cycle of 50% and are complementary turned on to form another bridge arm unit, L b Connected to the midpoints of the two bridge arm units respectively, C bus are connected to the source of Q3 and the ground respectively; the half-bridge LLC converter includes an inverter network, a resonant network, a rectifier network and a filter capacitor C o , where the inverter network is the multiplexed bridge arm composed of Q3 and Q4, and the resonant network includes a resonant capacitor C r , resonant inductor L r and the magnetizing inductance L m , the rectifier network includes transformer T r , diode D R1 , D R2 , D R3 and D R4 , D R1 and D R3 Series, D R2 and D R4 After connecting in series with C o Parallel, C o Connected in parallel with the load as the bridge arm to multiplex the output of the Buck-Boost LLC converter, T r One end of the original side passes through L r With Q 3、 The bridge arm midpoint of Q4 is connected and the other end is connected through C r Ground, and L m Connect in parallel with T r Primary side, T r One end of the secondary side is connected to D R1 and D R3 The other end is connected to D R2 and D R4 A connection point; characterized in that The control method comprises: Output voltage regulation circuit sampling converter output voltage V o And compared with the given voltage reference, the voltage regulator closes the loop to adjust the stable output voltage, and combines it with the triangle wave of the same phase as CLK1 to obtain the duty cycle D of the switch tube Q1. y1， And combined with CLK1 to drive switch tubes Q1 and Q2; The multiplexed bridge arm driving circuit delays the CLK2 pulse by half a switching cycle to obtain a shutdown signal with a fixed duty cycle of 50% to drive the switch tubes Q3 and Q4; Phase shift clock generation circuit sampling filter inductor L b The inductor current i Lb The valley current i Lb_min , after the inverter becomes -i Lb_min and with a given current reference I zvs The error value is sent to the PI regulator, which generates a phase shift signal V between the opening moments of the switch tubes Q1 and Q3. θ , according to the phase shift signal V θ First generate the phase shift duty ratio D θ , and finally generate two phase differences affected by D θ The controlled narrow pulses CLK1 and CLK2 control the turn-on time of the switch tubes Q1 and Q3 respectively; The first limiting module limits the phase shift signal V under low voltage and light load conditions. θ The minimum value of , realizes the soft switching of the switch tube Q2; The second limiting module limits the phase shift signal V under high voltage and light load conditions. θ The minimum value of Q3 is realized to realize soft switching of the switch tube Q3.

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