Systems and apparatuses for circuitry on a substrate configured to operate as a transformer

Abstract

This application relates to apparatus, systems, and communication devices for on-substrate circuitry configured to operate as a transformer. The apparatus includes a substrate and circuitry formed on the substrate. The circuitry includes a first transformer having a first input node and a first output node. The circuitry further includes a second transformer having a second input node and a second output node. The first input node of the first transformer and the second input node of the second transformer are connected. At least one of the first output nodes of the first transformer and at least one of the second output nodes of the second transformer are connected. The circuitry further includes a first capacitor connected to one of the first output nodes of the first transformer and one of the second output nodes of the second transformer. The first capacitor is connected to a first ground.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to transformers, and more particularly to transformers in communication devices. BACKGROUND

[0002] In a voltage mode (VM) driver, the transmit output swing can be determined by the resistor division between the termination resistor (RT) and the differential output resistance (R out ): Typically, to meet the return loss specification, the differential output resistance R out may be designed to be about RT=100 ohms. Thus, the output swing can be limited by the power supply voltage and V DD return loss (ppd). As technology scales, the power supply voltage tends to decrease; however, unfortunately, in wireless applications (e.g., fifth generation technology standard (5G) applications), the transmit output power specification determined by the overall system noise performance is typically greater than what the VM driver can provide at the nominal power supply voltage in the prior art.

[0003] Prior transmit digital-to-analog converters (DACs) typically have insufficient single-ended distortion performance. Prior resistive digital-to-analog converters (RDACs) are pseudo-differential circuits and typically lack inherent high common mode rejection ratio (CMRR). CMRR can be a measure of the ability of a quantizing device to reject common mode signals. Thus, the single-ended distortion (HD2) can not be as good as the differential distortion (HD3). For example, a 12.5 ohm DAC can have poorer HD2 performance compared to a 50 ohm DAC, which can require a subsequent off-chip balun stage with higher CMRR.

[0004] Some prior solutions have used VM drivers with high power and cascode devices to boost the output amplitude; however, such solutions increase power consumption and require level shifters from core to high power while maintaining the reliability of the pre-driver and driver circuits. Additionally, achieving high linearity (e.g., 10 bits or more) is a challenge for such solutions. Furthermore, such prior solutions reduce the VM driver output impedance to less than 100 ohms to increase the swing, which sacrifices the return loss (S11, which is another important transmitter specification).

[0005] Some prior solutions have used Guanella transformers in a capacitive DAC (C-DAC) transmitter architecture, which can reduce the DAC output impedance by a factor of 4 and amplify the voltage amplitude by a factor of 2 through such transformers. However, such prior Guanella transformer solutions fail to provide sufficient signal common mode rejection ratio (CMRR) and fail to provide sufficient improvement in signal single-ended distortion (HD2).

[0006] Some existing solutions have used off-chip (e.g., off-chip compared to VM drivers) balun transformers in wireless (e.g., 5G wireless) converters to improve HD2 performance; however, such improvements are limited by the CMRR of the off-chip balun transformer, which depends on its amplitude and phase balance. As such, very expensive balun transformers can be required to obtain sufficiently high HD2 performance. Additionally, such off-chip solutions can require additional components implemented on a circuit board. SUMMARY

[0007] An apparatus is disclosed in accordance with one or more illustrative embodiments. In one illustrative embodiment, the apparatus includes a substrate and a circuit formed on the substrate. The circuit includes a first transformer having a first input node and a first output node. The circuit further includes a second transformer having a second input node and a second output node. The first input node of the first transformer and the second input node of the second transformer are connected. At least one of the first output nodes of the first transformer and at least one of the second output nodes of the second transformer are connected. The circuit further includes a first capacitor connected to one of the first output nodes of the first transformer and one of the second output nodes of the second transformer. The first capacitor is connected to a first ground.

[0008] A system is disclosed in accordance with one or more illustrative embodiments. In one illustrative embodiment, the system includes circuitry, at least one first driver, and at least one second driver. The circuitry includes a first transformer having a first input node and a first output node. The circuitry further includes a second transformer having a second input node and a second output node. The first input node of the first transformer and the second input node of the second transformer are connected. At least one of the first output node of the first transformer and at least one of the second output node of the second transformer are connected. The circuitry further includes a first capacitor connected to one of the first output node of the first transformer and one of the second output node of the second transformer. The first capacitor is connected to a first ground. The circuitry includes a first input terminal connected to a first of the first input node and a first of the second input node. The circuitry includes a second input terminal connected to a second of the first input node and a second of the second input node. The circuitry includes a first output terminal and a second output terminal. The at least one first driver is connected to the first input terminal. The at least one second driver is connected to the second input terminal. The circuitry is configured to: receive at least one first input signal from the at least one first driver; and receive at least one second input signal from the at least one second driver.

[0009] A communication device is disclosed in accordance with one or more illustrative embodiments. In one illustrative embodiment, the communication device includes circuitry. The circuitry includes a first transformer having a first input node and a first output node. The circuitry further includes a second transformer having a second input node and a second output node. The first input node of the first transformer and the second input node of the second transformer are connected. At least one of the first output node of the first transformer and at least one of the second output node of the second transformer are connected. The circuitry further includes a first capacitor connected to one of the first output node of the first transformer and one of the second output node of the second transformer. The first capacitor is connected to a first ground. The circuitry includes a second capacitor connected to a second ground. The circuitry includes a switch. The first capacitor is connected between one of the first output node of the first transformer and the switch. The second capacitor is connected between one of the second output node of the second transformer and the switch.

[0010] It should be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and do not necessarily limit the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the general description, serve to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Those skilled in the art may better appreciate the numerous advantages of the present disclosure by referring to the accompanying drawings.

[0012] Figure 1A is a conceptual diagram of an exemplary substrate including exemplary circuitry according to one or more embodiments of the present disclosure.

[0013] Figure 1B is a conceptual diagram of another exemplary substrate including another exemplary circuit according to one or more embodiments of the present disclosure.

[0014] Figure 2 is the use according to one or more embodiments of the present disclosure Figure 1A Circuit 106A or Figure 1B An exemplary graph of total AC gain versus frequency for an exemplary embodiment of circuit 106B is shown, as compared to a graph without Figure 1A Circuit 106A or Figure 1B 1. A graph of total AC gain versus frequency is compared to a prior art embodiment of circuit 106B.

[0015] Figure 3 is the use according to one or more embodiments of the present disclosure Figure 1A 1B , as compared to (a) a graph of single-ended HD2 distortion versus signal frequency for an exemplary implementation using a prior art guanella transformer and (b) a graph of single-ended HD2 distortion versus signal frequency for an exemplary implementation using a prior art solution without a transformer.

[0016] Figure 4 is implemented in a communication device according to one or more embodiments of the present disclosure Figure 1A Or the block diagram of the circuit of 1B. DETAILED DESCRIPTION

[0017] Reference will now be made in detail to the disclosed subject matter, which is illustrated in the accompanying drawings. The present disclosure has been shown and described with respect to certain embodiments and specific features thereof. The embodiments described herein are illustrative and not restrictive. It will be readily apparent to those skilled in the art that various changes and modifications in form and details may be made without departing from the spirit and scope of the present disclosure.

[0018] Some embodiments of the disclosure relate to systems, devices, and / or communication apparatuses having circuitry. Circuitry can be a collection of connected electrical and / or optical components. In some embodiments, circuitry can be formed on a substrate. A substrate can be a sheet of semiconductor material used in the manufacture of integrated circuits. When an element is referred to herein as being "formed on" another element, it is understood that the element can be formed directly on the other element, or that intervening elements can be present between the elements. In some embodiments, circuitry can operate as a transformer and / or a balun. A transformer can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or circuits. A balun can be an electrical device that allows for balanced and unbalanced line interfacing without disturbing the impedance of either line. In some embodiments, circuitry can provide voltage mode (VM) transmitter amplitude and linearity enhancement by operating as an integrated transformer (e.g., an integrated wideband transformer) or as an integrated transformer.

[0019] Reference is now made to Figures 1A to 4 Systems and methods for providing circuitry 106A or 106B (e.g., which can operate as a transformer, such as a wideband transformer) are described in greater detail in accordance with one or more embodiments of the disclosure. For example, circuitry 106A or 106B can be configured to enhance amplitude and linearity in accordance with one or more embodiments of the disclosure.

[0020] Figure 1A is a conceptual diagram of a substrate 100A that can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 102-1, 102-2,..., 102-N), and / or circuitry 106A formed on the substrate 100A in accordance with one or more embodiments of the disclosure. In some embodiments, the substrate 100A can be connected to an apparatus 122 (e.g., an antenna 404 or a transmitter 406, such as shown in Figure 4

[0021] In some embodiments, the substrate 100A can be formed of any suitable material, such as a semiconductor material (e.g., silicon, germanium, or gallium arsenide). In some embodiments, the substrate 100A, in combination with any suitable electronic devices (e.g., drivers 102-1,..., 102-N, drivers 104-1,..., 104-N, and / or circuitry 106A) formed on the substrate 100A, can form an integrated circuit (IC), a radio frequency IC (RFIC), and / or a system on a chip (SoC).

[0022] ​In some embodiments, the substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or at least one second driver (e.g., 104-1, 104-2,..., 104-N) formed on the substrate 100A. In some embodiments, the at least one first driver (e.g., 102-1, 102-2,..., 102-N) can be connected to a first input terminal 108-1 of the circuit 106A. In some embodiments, the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be connected to a second input terminal 108-2 of the circuit 106A. In some embodiments, the at least one first driver (e.g., 102-1, 102-2,..., 102-N) can be a single first driver 102-1. In some embodiments, the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be a single second driver 104-1. In some embodiments including multiple first drivers (e.g., 102-1, 102-2,..., 102-N), some or all of the first drivers (e.g., 102-1, 102-2,..., 102-N) can output signals relative to (e.g., in parallel with) other first drivers (e.g., 102-1, 102-2,..., 102-N). In some embodiments including multiple second drivers (e.g., 104-1, 104-2,..., 104-N), some or all of the second drivers (e.g., 104-1, 104-2,..., 104-N) can output signals relative to (e.g., in parallel with) other second drivers (e.g., 104-1, 104-2,..., 104-N). In some embodiments including multiple first drivers (e.g., 102-1, 102-2,..., 102-N), some or all of the multiple first drivers (e.g., 102-1, 102-2,..., 102-N) can output, for example, in parallel and time-synchronized signals that can be combined into one signal having multiple channels and / or multiple signal characteristics, and such combined signals can be output to another electronic device (e.g., the circuit 106A). In some embodiments including multiple second drivers (e.g., 104-1, 104-2,..., 104-N), some or all of the multiple second drivers (e.g., 104-1, 104-2,..., 104-N) can output, for example, in parallel and time-synchronized signals that can be combined into one signal having multiple channels and / or multiple signal characteristics, and such combined signals can be output to another electronic device (e.g., the circuit 106A).

[0023] In some embodiments, each of the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be any suitable electronic device configured to output (e.g., drive) a signal to another electronic device (e.g., circuit 106A). For example, each of the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be a VM driver. For example, some or all of such signals can be output signals from a VM driver; and in such embodiments, the driver can be considered to be operating as a VM driver. In some embodiments, each of such VM drivers can include at least one inverter 126 (e.g., a complementary metal-oxide-semiconductor (CMOS) inverter) and at least one resistor 128 (e.g., a linear resistor connected in series) configured to achieve a desired impedance, some or all of which can be connected to each other. In some embodiments, such VM drivers can operate as VM digital-to-analog converters (DACs).

[0024] In some embodiments, substrate 100A can have circuit 106A formed on substrate 100A.

[0025] In some embodiments, circuit 106A can have at least one first transformer (e.g., first transformer 112-1), at least one second transformer (e.g., second transformer 112-2), at least one capacitor (e.g., capacitor 118A), at least one ground (e.g., ground 120A), at least one first input terminal (e.g., first input terminal 108-1), at least one second input terminal (e.g., second input terminal 108-2), at least one first output terminal (e.g., first output terminal 110-1), and / or at least one second output terminal (e.g., second output terminal 110-2).

[0026] First transformer 112-1 can have a first input node 114 and a first output node 116. In some embodiments, first transformer 112-1 can have a voltage conversion ratio of 1:1. First transformer 112-1 can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or multiple circuits.

[0027] Second transformer 112-2 can have a second input node 114 and a second output node 116. In some embodiments, second transformer 112-2 can have a voltage conversion ratio of 1:1. Second transformer 112-2 can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or multiple circuits.

[0028] The first input node 114 of the first transformer 112-1 and the second input node 114 of the second transformer 112-2 can be connected (e.g., in parallel). At least one (e.g., one or both) of the first output nodes 116 of the first transformer 112-1 and at least one (e.g., one or both) of the second output nodes 116 of the second transformer 112-2 can be connected (e.g., in series).

[0029] In some embodiments, the first transformer 112-1 and the second transformer 112-2 can have the same size, configuration, and / or electrical properties.

[0030] The first input terminal 108-1 can be connected (e.g., in parallel) to a first one of the first input nodes 114 and a first one of the second input nodes 114. The second input terminal 108-2 can be connected (e.g., in parallel) to a second one of the first input nodes 114 and a second one of the second input nodes 114.

[0031] The first output terminal 110-1 can be connected to one or more on- substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4). The second output terminal 110-2 can be connected to one or more on- substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4). Figure 4 Figure 4

[0032] The capacitor 118A (e.g., a first plate of the capacitor 118A) can be connected to both one of the first output nodes 116 of the first transformer 112-1 and one of the second output nodes 116 of the second transformer 112-2.

[0033] The ground 120A can be connected to the capacitor 118A (e.g., a second plate of the capacitor 118A). In some embodiments, the capacitor 118A can be configured to receive a common mode (CM) signal from the first transformer 112-1 and the second transformer 112-2. The common mode signal can be a voltage common to both input terminals of an electrical device.

[0034] ​​In some embodiments, the circuit 106A can be configured to receive at least one first input signal from at least one first driver 102 (e.g., 102-1, 102-2,..., 102-N). In some embodiments, the circuit 106A can be configured to receive at least one second input signal from at least one second driver (e.g., 104-1, 104-2,..., 104-N). In some embodiments, each of the at least one first input signal can be a first voltage mode (VM) signal, and each of the at least one second input signal can be a second VM signal. In some embodiments, the circuit 106A can be configured to output common mode (CM) and differential signals at the first output terminal 110-1 and the second output terminal 110-2.

[0035] In some embodiments, the circuit 106A can operate as a transformer and / or can be a transformer, such as a narrowband or wideband transformer. For example, wideband can refer to when a message bandwidth exceeds (e.g., significantly exceeds) a coherence bandwidth of a channel. In some embodiments, the circuit can operate as a transformer, which can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or circuits. For example, if the circuit 106A operates as a transformer, in some embodiments, the circuit 106A can have a voltage conversion ratio of 1:2 and an impedance conversion ratio of 1:4; for example, the circuit 106A can boost at least one driver output voltage by a factor of two and can match impedance to the termination resistor 124 by a factor of four. In some embodiments, the circuit 106A can function similarly to existing Guanella transformers, which are well known in the art, except, for example, and without limitation: the circuit 106A can be implemented on-chip; and / or the circuit 106A can include the capacitor 118A (e.g., which can be arranged and function as disclosed throughout), such that the circuit 106A can provide significant and unexpected advantages over existing Guanella transformer implementations (e.g., as disclosed throughout).

[0036] In some embodiments, the circuit 106A can operate as a balun. In some embodiments, a balun can be an electrical device that allows for balanced and unbalanced line interfaces without disturbing the impedance arrangement of either line. In some embodiments, a balun can take many forms and can include devices that also transform impedance but are not required to do so. In some embodiments, a transformer balun can use magnetic coupling, but is not required to do so. In some embodiments, the circuit 106A can operate as a balun and as a transformer.

[0037] In some embodiments, the circuit 106A can be configured to boost the amplitude of the signal. In some embodiments, the circuit 106A can be further configured to improve the common mode rejection ratio (CMRR) of the signal. In some embodiments, the circuit can be further configured to improve the single ended distortion (HD2) of the signal. In some embodiments, the circuit 106A can be configured to boost the amplitude of the signal, improve the common mode rejection ratio (CMRR) of the signal, and improve the single ended distortion (HD2) of the signal simultaneously.

[0038] In some embodiments, the circuit 106A can be configured to provide a common mode rejection ratio (CMRR) that enhances single ended distortion (HD2) linearity.

[0039] In some embodiments, the first implementation using the circuit 106A formed on the substrate 100A can provide improved amplitude and phase balance compared to another implementation with equivalent circuits formed outside (e.g., off-chip) of the substrate 100A.

[0040] In some embodiments, when the substrate 100A can have at least one first driver (e.g., 102-1, 102-2, …, 102-N), at least one second driver (e.g., 104-1, 104-2, …, 104-N), and the circuit 106A formed on the substrate 100A, such a substrate on implementation of such components can provide higher amplitude and phase balance compared to an implementation where the circuit 106A is on the substrate 100A and the at least one first driver (e.g., 102-1, 102-2, …, 102-N) and the at least one second driver (e.g., 104-1, 104-2, …, 104-N) are on another substrate.

[0041] In some embodiments, when substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106A formed on substrate 100A, circuit 106A can achieve large output swing without voltage stress on the output connected transistors. In some embodiments, when substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106A formed on substrate 100A, circuit 106A can not require thick oxide cascode devices often used in high swing, high voltage drivers (e.g., greater than the technology core supply voltage) that tend to slow down the output stage. In some embodiments, when substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106A formed on substrate 100A, high CMRR (e.g., > 30 dB) provided by circuit 106A can significantly enhance single ended HD2 linearity. In some embodiments, when substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106A formed on substrate 100A, large transmitter output swing can be achieved with relaxed requirements on output driver device linearity. In some embodiments, when a system and / or device includes substrate 100A can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106A formed on substrate 100A, the system and / or device can provide highly linear (> 10 bits), high swing digital-to-analog converter (DAC) drivers using low supply voltage. In some embodiments, when a system and / or device includes substrate 100A having at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 102-1, 102-2,..., 102-N), and circuit 106A formed on substrate 100A, the system and / or device can provide large output power radio frequency (RF) DAC transmitters with high linearity (> 10 bits) and low power consumption (e.g., compared to DAC transmitters using cascode devices operating at higher than nominal supply voltage).In some embodiments, when the system and / or device includes a substrate 100A having at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and a circuit 106A formed on the substrate 100A, the system and / or device can reduce cost by meeting single-ended HD2 linearity specifications without requiring an expensive off-chip balun.

[0042] In some embodiments, the circuit 106A can be used in devices that are considered PHYs and devices that include RF and / or wireless transmitters.

[0043] Figure 1B is a conceptual diagram of a substrate 100B that can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and / or a circuit 106B formed on the substrate 100B in accordance with one or more embodiments of the present disclosure. In some embodiments, the substrate 100B can be connected to a device 122 (e.g., an antenna 404 or a transmitter 406, such as shown in FIG. 4) having a termination resistor 124. Figure 4

[0044] In some embodiments, the substrate 100B can be formed of any suitable material, such as a semiconductor material (e.g., silicon, germanium, or gallium arsenide). In some embodiments, the substrate 100B, in combination with any suitable electronic devices (e.g., drivers 102-1,..., 102-N, drivers 104-1,..., 104-N, and / or circuit 106B) formed on the substrate 100B, can form an integrated circuit (IC), a radio frequency IC (RFIC), and / or a system on a chip (SoC).

[0045] ​In some embodiments, the substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or at least one second driver (e.g., 104-1, 104-2,..., 104-N) formed on the substrate 100B. In some embodiments, the at least one first driver (e.g., 102-1, 102-2,..., 102-N) can be connected to the first input terminal 108-1 of the circuit 106A. In some embodiments, the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be connected to the second input terminal 108-2 of the circuit 106A. In some embodiments, the at least one first driver (e.g., 102-1, 102-2,..., 102-N) can be a single first driver 102-1. In some embodiments, the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be a single second driver 104-1. In some embodiments including multiple first drivers (e.g., 102-1, 102-2,..., 102-N), some or all of the first drivers (e.g., 102-1, 102-2,..., 102-N) can output signals relative to (e.g., in parallel with) other first drivers (e.g., 102-1, 102-2,..., 102-N). In some embodiments including multiple second drivers (e.g., 104-1, 104-2,..., 104-N), some or all of the multiple second drivers (e.g., 104-1, 104-2,..., 104-N) can output, for example, (e.g., in parallel with) and time-synchronized signals that can be combined into one signal having multiple channels and / or multiple signal characteristics, and such combined signals can be output to another electronic device (e.g., the circuit 106B).

[0046] In some embodiments, each of the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be any suitable electronic device configured to output (e.g., drive) a signal to another electronic device (e.g., circuit 106B). For example, each of the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and / or the at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be a VM driver. For example, some or all of such signals can be output signals from a VM driver; and in such embodiments, the driver can be considered to be operating as a VM driver. In some embodiments, each of such VM drivers can include at least one inverter 126 (e.g., a complementary metal-oxide-semiconductor (CMOS) inverter) and at least one resistor 128 (e.g., a linear resistor connected in series) configured to achieve a desired impedance, some or all of which can be connected to each other. In some embodiments, such VM drivers can operate as VM digital-to-analog converters (DACs).

[0047] In some embodiments, substrate 100B can have circuit 106B formed on substrate 100B.

[0048] In some embodiments, circuit 106B can have at least one first transformer (e.g., first transformer 112-1), at least one second transformer (e.g., second transformer 112-2), at least two capacitors (e.g., first capacitor 118B and second capacitor 118B), at least two grounds (e.g., first ground 120B and second ground 120B), at least one first input terminal (e.g., first input terminal 108-1), at least one second input terminal (e.g., second input terminal 108-2), at least one first output terminal (e.g., first output terminal 110-1), and / or at least one second output terminal (e.g., second output terminal 110-2).

[0049] First transformer 112-1 can have a first input node 114 and a first output node 116. In some embodiments, first transformer 112-1 can have a voltage conversion ratio of 1:1. First transformer 112-1 can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or multiple circuits.

[0050] Second transformer 112-2 can have a second input node 114 and a second output node 116. In some embodiments, second transformer 112-2 can have a voltage conversion ratio of 1:1. Second transformer 112-2 can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or multiple circuits.

[0051] The first input node 114 of the first transformer 112-1 and the second input node 114 of the second transformer 112-2 can be connected (e.g., in parallel). At least one (e.g., one or both) of the first output nodes 116 of the first transformer 112-1 and at least one (e.g., one or both) of the second output nodes 116 of the second transformer 112-2 can be connected (e.g., in series).

[0052] In some embodiments, the first transformer 112-1 and the second transformer 112-2 can have the same size, configuration, and / or electrical properties.

[0053] The first input terminal 108-1 can be connected (e.g., in parallel) to a first one 114 of the first input nodes 114 and a first one 114 of the second input nodes 114. The second input terminal 108-2 can be connected (e.g., in parallel) to a second one 114 of the first input nodes 114 and a second one 114 of the second input nodes 114.

[0054] The first output terminal 110-1 can be connected to one or more on- substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4). The second output terminal 110-2 can be connected to one or more on-substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4). Figure 4 Figure 4 The first output terminal 110-1 can be connected to one or more on- substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4). The second output terminal 110-2 can be connected to one or more on-substrate devices and / or off-substrate devices 122 (e.g., at least one transmitter 406 and / or at least one antenna 404, as shown in FIG. 4).

[0055] Each of the first and second capacitors 118B (e.g., each of the first plate of the first capacitor 118B and the first plate of the second capacitor 118B) can be connected to one 116 of the first output nodes 116 of the first transformer 112-1 and one 116 of the second output nodes 116 of the second transformer 112-2.

[0056] Each of the first and second grounds 120B can be connected to one of the first capacitor 118B (e.g., the second plate of the first capacitor 118B) or the second capacitor 118B (e.g., the second plate of the second capacitor 118B). In some embodiments, each capacitor 118B can be configured to receive a common mode (CM) signal from the first transformer 112-1 and the second transformer 112-2.

[0057] ​The first capacitor 118B can be connected between one 116 of the first output nodes 116 of the first transformer 112-1 and the switch 130. The second capacitor 118B can be connected between one 116 of the second output nodes 116 of the second transformer 112-2 and the switch 130.

[0058] In some embodiments, each of the first capacitor 118B and the second capacitor 118B can have the same configuration and electrical properties. For example, when the circuits 106A and 106B have similar or identical electrical properties, each of the first capacitor 118B and the second capacitor 118B can have half the capacitance of the capacitor 118A of the circuit 106A. Figure 1A

[0059] The switch 130 can be implemented as any suitable switch, such as an enabling switch. The switch 130 can be implemented at a common mode node between the first transformer 112-1 and the second transformer 112-2. When there is no alternating current (AC) input signal, the switch 130 can be used to disable the circuit 106B from operating as a transformer and to avoid associated quiescent current consumption. In some embodiments, the switch 130 can be large enough to minimize the on-resistance of the switch (e.g., much less than 1 ohm) and the associated power loss in the circuit 106B.

[0060] In some embodiments, the circuit 106B can be configured to receive at least one first input signal from at least one first driver 102 (e.g., 102-1, 102-2, …, 102-N). In some embodiments, the circuit 106B can be configured to receive at least one second input signal from at least one second driver (e.g., 104-1, 104-2, …, 104-N). In some embodiments, each of the at least one first input signal can be a first voltage mode (VM) signal, and each of the at least one second input signal can be a second VM signal. In some embodiments, the circuit 106B can be configured to output common mode (CM) and differential signals at the first output terminal 110-1 and the second output terminal 110-2.

[0061] ​In some embodiments, circuit 106B can operate as a transformer and / or can be a transformer, such as a narrowband or wideband transformer. For example, wideband can refer to when the message bandwidth exceeds (e.g., significantly exceeds) the coherence bandwidth of the channel. In some embodiments, the circuit can operate as a transformer, which can be a passive component configured to transfer electromagnetic energy from one circuit to another circuit or circuits. For example, if circuit 106B operates as a transformer, in some embodiments, circuit 106B can have a voltage transformation ratio of 1 :2 and an impedance transformation ratio of 1 :4; for example, circuit 106B can boost at least one driver output voltage by a factor of two and can match impedance to termination resistor 124 by a factor of four. In some embodiments, circuit 106B can function similarly to existing Guanella transformers, which are well known in the art, except, for example (and without limitation): circuit 106B can be implemented on-chip; circuit 106B can include capacitor 118B (e.g., which can be arranged and function as disclosed throughout), such that circuit 106B can provide significant and unexpected advantages over existing Guanella transformer implementations (e.g., as disclosed throughout); and / or circuit 106B can include switch 130 (e.g., which can be arranged and function as disclosed throughout).

[0062] In some embodiments, circuit 106B can operate as a balun. In some embodiments, a balun can be an electrical device that allows for balanced and unbalanced line interfaces without disturbing the impedance arrangement of either line. In some embodiments, a balun can take many forms and can include devices that also transform impedance but are not required to do so. In some embodiments, a transformer balun can use magnetic coupling, but is not required to do so. In some embodiments, circuit 106B can operate as a balun and as a transformer.

[0063] In some embodiments, circuit 106B can be configured to boost the amplitude of a signal. In some embodiments, circuit 106B can be further configured to improve the common mode rejection ratio (CMRR) of a signal. In some embodiments, the circuit can be further configured to improve the single-ended distortion (HD2) of a signal. In some embodiments, circuit 106B can be configured to simultaneously boost the amplitude of a signal, improve the common mode rejection ratio (CMRR) of a signal, and improve the single-ended distortion (HD2) of a signal.

[0064] In some embodiments, circuit 106B can be configured to provide a common mode rejection ratio (CMRR) that enhances single-ended linearity (HD2).

[0065] In some embodiments, using the first implementation of the circuit 106B formed on the substrate 100B can provide improved amplitude and phase balance compared to another implementation having equivalent circuits formed outside (e.g., off-chip) of the substrate 100B.

[0066] In some embodiments, when the substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and the circuit 106B formed on the substrate 100B, such a substrate-on implementation of such components can provide higher amplitude and phase balance compared to an implementation where the circuit 106B is on the substrate 100B and the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and the at least one second driver (e.g., 104-1, 104-2,..., 104-N) are on another substrate.

[0067] In some embodiments, when substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, circuit 106B can achieve large output swing without voltage stress on the output connected transistors. In some embodiments, when substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, circuit 106B can not require thick oxide cascode devices often used in high swing, high voltage drivers (e.g., greater than the technology core supply voltage) that tend to slow down the output stage. In some embodiments, when substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, high CMRR (e.g., > 30 dB) provided by circuit 106B can significantly enhance single ended HD2 linearity. In some embodiments, when substrate 100B can have at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, large transmitter output swing can be achieved while having relaxed requirements on output driver device linearity. In some embodiments, when a system and / or device includes substrate 100B having at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, the system and / or device can provide highly linear (> 10 bits), high swing digital-to-analog converter (DAC) drivers using low supply voltage. In some embodiments, when a system and / or device includes substrate 100B having at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and circuit 106B formed on substrate 100B, the system and / or device can provide large output power radio frequency (RF) DAC transmitters with high linearity (> 10 bits) and low power consumption (e.g., compared to DAC transmitters using cascode devices operating at higher than nominal supply voltage).In some embodiments, when the system and / or device includes the substrate 100B having at least one first driver (e.g., 102-1, 102-2,..., 102-N), at least one second driver (e.g., 104-1, 104-2,..., 104-N), and the circuit 106B formed on the substrate 100B, the system and / or device can reduce cost by not requiring an expensive off-chip balun to meet single-ended HD2 linearity specifications.

[0068] In some embodiments, the circuit 106B can be used in devices that are considered PHYs and devices that include RF and / or wireless transmitters.

[0069] Referring generally to Figures 1A to 1BIn some embodiments, a system can include a circuit 106A or 106B, at least one first driver (e.g., 102-1, 102-2,..., 102-N), and / or at least one second driver (e.g., 104-1, 104-2,..., 104-N). The circuit 106A or 106B can include a first transformer 112-1 having a first input node 114 and a first output node 116. The circuit 106A or 106B can further include a second transformer 112-2 having a second input node 114 and a second output node 116. The first input node 114 of the first transformer 112-1 and the second input node 114 of the second transformer 112-2 can be connected. At least one of the first output node 116 of the first transformer 112-1 and at least one of the second output node 116 of the second transformer 112-2 can be connected. The circuit 106A or 106B can further include a first capacitor 118A or 118B connected to one of the first output node 116 of the first transformer 112-1 and one of the second output node 116 of the second transformer 112-2. The first capacitor 118A or 118B can be connected to a first ground 120A or 120B. The circuit 106A or 106B can include a first input terminal 108-1 connected to a first one of the first input node 114 and a first one of the second input node 114. The circuit 106A or 106B can include a second input terminal 108-2 connected to a second one of the first input node 114 and a second one of the second input node 114. The circuit 106A or 106B can include a first output terminal 110-1 and a second output terminal 110-2. The at least one first driver (e.g., 102-1, 102-2,..., 102-N) can be connected to the first input terminal 108-1. The at least one second driver (e.g., 104-1, 104-2,..., 104-N) can be connected to the second input terminal 108-2. The circuit 106A or 106B can be configured to receive at least one first input signal from the at least one first driver (e.g., 102-1, 102-2,..., 102-N) and receive at least one second input signal from the at least one second driver (e.g., 104-1, 104-2,..., 104-N).

[0070] Figure 2is an exemplary plot of total AC gain (V(dB)) vs. frequency (GHz) for an exemplary embodiment using circuit 106A or 106B, compared to a plot of total AC gain vs. frequency for an existing embodiment without circuit 106A or 106B. The plot of total AC gain (V(dB)) vs. frequency (GHz) for an exemplary embodiment using circuit 106A or 106B can be in accordance with one or more embodiments of the present disclosure.

[0071] Figure 3 is an exemplary plot of single-ended HD2 distortion (in dB) vs. signal frequency (F sig , in GHz) for an exemplary embodiment using circuit 106A or 106B (labeled "SE-HD2 (XFMR, with capacitor, DAC 12.5, RT = 50 Ω)"), compared to (a) a plot of single-ended HD2 distortion vs. signal frequency for an exemplary embodiment using an existing Guanella transformer (labeled "SE-HD2 (XFMR, without capacitor, DAC 12.5, RT = 50 Ω)") and (b) a plot of single-ended HD2 distortion vs. signal frequency for an exemplary embodiment using an existing solution without a transformer (labeled "SE-HD2 (no XFMR, DAC 12.5, RT = 12.5 Ω)"). The exemplary plot of single-ended HD2 distortion vs. signal frequency (F sig , in GHz) for an exemplary embodiment using circuit 106A or 106B (labeled "SE-HD2 (XFMR, with capacitor, DAC 12.5, RT = 50 Ω)") can be in accordance with one or more embodiments of the present disclosure. As can be seen, an embodiment of circuit 106A or 106B using one or more embodiments achieves significantly better single-ended HD2 distortion over a usable frequency range compared to existing solutions. Additionally, as can be seen, an embodiment of circuit 106A or 106B using one or more embodiments increases CMRR, thus significantly improving single-ended HD2 compared to the baseline HD2 of the DAC. In some embodiments, on-chip integration of circuit 106A or 106B with a VM DAC can be configured to boost transmit output power and improve single-ended HD2 linearity via at least one capacitor (e.g., 118A and / or 118B) added to the CM node of circuit 106A or 106B.

[0072] Reference is now made to Figure 4 , Figure 4 is an exemplary circuit 106A or 106B (at Figure 1A or 1B) implemented in a communication device 402 in accordance with one or more embodiments of the present disclosure. Figure 4The circuit 106 is generally shown as a block diagram. It is contemplated herein that the circuit 106A or 106B can be used in any communication device 402, including but not limited to a mobile phone, a laptop computer, a vehicle mounted device, a wearable device (e.g., a smart watch or a head mounted device), a game console, a tablet computer, a wireless router, a base station, an edge computing device, or the like.

[0073] In some embodiments, the communication device 402 includes an antenna 404, one or more transmitters 406 and / or receivers 408 coupled to the circuit 106A or 106B to facilitate transmission and / or reception of RF signals 410. The RF signals 410 can have any frequency or range of frequencies, such as but not limited to MHz to GHz frequencies. Further, the RF signals 410 can be within any designated frequency band, such as but not limited to a 5G frequency band or an LTE frequency band.

[0074] In some embodiments, the communication device 402 includes the circuit 106A or 106B coupled to the transmitter 406, the receiver 408, and / or the antenna 404. For example, the communication device 402 can include one or more circuits 106A or 106B configured to: receive at least one first input signal from at least one first driver 102 (e.g., 102-1, 102-2,..., 102-N); receive at least one second input signal from at least one second driver (e.g., 104-1, 104-2,..., 104-N); and / or output common mode (CM) and differential signals at the first output terminal 110-1 and the second output terminal 110-2 to one or more transmitters 406.

[0075] As an illustration, the communication device 402 can include the transmitter 406 to generate the RF signals 410 for transmission (e.g., as a transmitter output signal).

[0076] In some embodiments, the communication device 402 can include the circuit 106B. The circuit 106B can include a first transformer 112-1 having a first input node 114 and a first output node 116. The circuit 106B can further include a second transformer 112-2 having a second input node 114 and a second output node 116. The first input node 114 of the first transformer 112-1 and the second input node 114 of the second transformer 112-2 can be connected. At least one of the first output nodes 116 of the first transformer 112-1 and at least one of the second output nodes 116 of the second transformer 112-2 can be connected. The circuit 106B can further include a first capacitor 118B connected to one of the first output nodes 116 of the first transformer 112-1 and one of the second output nodes 116 of the second transformer 112-2. The first capacitor 118B can be connected to a first ground 120B. The circuit 106B can include a second capacitor 118B connected to a second ground 120B. The circuit 106B can include a switch 130. The first capacitor 118B can be connected between one of the first output nodes 116 of the first transformer 112-1 and the switch 130. The second capacitor 118B can be connected between one of the second output nodes 116 of the second transformer 112-2 and the switch 130.

[0077] It is further contemplated herein that the circuit 106A or 106B is not limited to mobile communication applications and can be used in any communication system in general. Thus, the reference to a mobile communication system herein is provided for illustrative purposes only and does not limit the disclosure.

[0078] As used throughout, although various components can be described or depicted as being "coupled" or "connected," any two components can be "couplable" or "connectable" to each other to achieve desired functionality, even though not connected in a physical manner. Particular instances of couplable or connectable include, but are not limited to, components that are physically mateable, physically fixed in relation to one another, and / or physically interactive. Other instances include optically coupled, such as optically aligned and configured to direct optical signals between two components. Moreover, although various components can be depicted as being directly connected or coupled, direct connection or direct coupling is not required. For example, components can be indirectly coupled (e.g., couplable), whether physically (e.g., physically mateable), optically, mechanically (e.g., via dynamically moveable and physically interactive components), electrically, or otherwise, through some interface, device, or intervening component. For example, components can be in data communication (e.g., optical signal communication) with intervening components not shown or described. It can be appreciated that "data communication" refers to both direct and indirect data communication (e.g., intervening components can be present). In one example, the coupling is permanent (e.g., two components are epoxyed, fused, and / or the like). In another example, the coupling is reversible (e.g., "removably" coupled / couplable). For example, "removably" coupled / couplable can mean couplable and decouplable repeatedly and / or non-destructively (e.g., coupled in place, such as by temporary holding, clamping, pinning, latching, positioning, and / or the like). For example, in at least some embodiments, optical connectors can be removably coupled (e.g., couplable) to an optical system.

[0079] When an element is referred to as being "connected" or "coupled" to another element, it is understood that the element can be directly connected or coupled to the other element, or intervening elements can be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, it is understood that there are no intervening elements present between the two elements. However, the presence of intervening elements does not preclude the use of the term "directly connected" or "directly coupled."

[0080] Components of circuitry can be connected in various ways. As used throughout, a node can indicate a point of connection between circuit elements or portions thereof. Components connected to a node can be physically connected in any suitable manner. In some embodiments, components connected to a node share a common electrical contact and thus can, but are not required to, be in physical proximity. In some embodiments, components connected to a node are connected by one or more conductive paths such as, but not limited to, traces or wires. As another example, a terminal can indicate a portion of a component adapted for connection to one or more additional components and / or external devices. For example, a component can include an input terminal, an output terminal, or any other suitable connection point. However, it is understood that any description of connections between components of circuitry using nodes and / or terminals is merely for illustrative purposes and does not imply any particular technique for connecting such components. Rather, the terms node and terminal are used herein interchangeably.

[0081] The herein described subject matter sometimes illustrates different components contained within, or connected with, other components. It is to be understood that such depicted architectures are merely illustrative, and that in fact many other architectures can be implemented which achieve the same functionality. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively "associated" such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as "associated with" each other such that the desired functionality is achieved, irrespective of architectures or intermediate components. Likewise, any two components so associated can also be viewed as being "connected" or "coupled" to each other to achieve the desired functionality, and any two components capable of being so associated can also be viewed as being "couplable" to each other to achieve the desired functionality. Specific examples of couplable include but are not limited to physically interactable and / or physically interacting components, and / or wirelessly interactable and / or wirelessly interacting components, and / or logically interactable and / or logically interacting components.

[0082] It is believed that the subject matter, which has been described, will be readily appreciated in the art and others, and that modifications can be made thereto, by those skilled in the art, without departing from the underlying principles of the disclosure and its various aspects, and that such modifications will fall within the scope of the various embodiments. It is intended, therefore, that the disclosure be given full scope within the scope of the patent laws, including equivalents.

Claims

1. An apparatus comprising: a substrate; and circuitry formed on the substrate, the circuitry comprising: a first transformer having first input nodes and first output nodes; a second transformer having second input nodes and second output nodes, wherein the first input nodes of the first transformer and the second input nodes of the second transformer are connected, wherein at least one of the first output nodes of the first transformer and at least one of the second output nodes of the second transformer are connected; a first capacitor connected to one of the first output nodes of the first transformer and one of the second output nodes of the second transformer, wherein the first capacitor is connected to a first ground; a switch; and a second capacitor connected between one of the second output nodes of the second transformer and the switch.

2. The apparatus of claim 1, wherein the circuitry operates as a transformer.

3. The apparatus of claim 2, wherein the circuitry has a voltage conversion ratio of 1:2 and an impedance conversion ratio of 1:

4.

4. The apparatus of claim 2, wherein the transformer is a wideband transformer.

5. The apparatus of claim 2, wherein the circuitry operates as a balun and the transformer.

6. The apparatus of claim 1, wherein the first capacitor is connected between one of the first output nodes of the first transformer and the switch, wherein the second capacitor is connected to a second ground.

7. The apparatus of claim 6, wherein the circuit further comprises: a first input terminal connected to a first of the first input nodes and a first of the second input nodes; a second input terminal connected to a second of the first input nodes and a second of the second input nodes; a first output terminal; and a second output terminal; wherein the apparatus further comprises at least one first driver formed on the substrate and connected to the first input terminal, and at least one second driver formed on the substrate and connected to the second input terminal; wherein the circuitry is configured to receive at least one first input signal from the at least one first driver, and at least one second input signal from the at least one second driver.

8. The apparatus of claim 1, wherein the circuit further comprises: a first input terminal connected to a first of the first input nodes and a first of the second input nodes; a second input terminal connected to a second of the first input nodes and a second of the second input nodes; a first output terminal; and a second output terminal; wherein the apparatus further comprises at least one first driver formed on the substrate and connected to the first input terminal, and at least one second driver formed on the substrate and connected to the second input terminal; wherein the circuitry is configured to receive at least one first input signal from the at least one first driver, and at least one second input signal from the at least one second driver.

9. The apparatus of claim 8, wherein the at least one first driver is at least one first voltage mode (VM) driver, wherein the at least one second driver is at least one second VM driver, wherein each of the at least one first input signal is a first signal from one of the at least one first VM driver, wherein each of the at least one second input signal is a second signal from one of the at least one second VM driver.

10. The apparatus of claim 9, wherein the circuit is configured to output common mode (CM) and differential signals at the first output terminal and the second output terminal.

11. The apparatus of claim 1, wherein each of the first transformer and the second transformer has a voltage conversion ratio of 1 :

1.

12. The apparatus of claim 1, wherein the first capacitor is configured to receive common mode (CM) signals from the first transformer and the second transformer.

13. A system comprising: circuitry comprising: a first transformer having a first input node and a first output node; a second transformer having a second input node and a second output node, wherein the first input node of the first transformer and the second input node of the second transformer are connected, wherein at least one first output node of the first output node of the first transformer and at least one second output node of the second output node of the second transformer are connected; and a first capacitor connected to one of the first output node of the first transformer and one of the second output node of the second transformer, wherein the first capacitor is connected to a first ground; a first input terminal connected to a first one of the first input node and a first one of the second input node; a second input terminal connected to a second one of the first input node and a second one of the second input node; a first output terminal; and a second output terminal; at least one first driver connected to the first input terminal; and at least one second driver connected to the second input terminal; wherein the circuitry is configured to: receive at least one first input signal from the at least one first driver; and receive at least one second input signal from the at least one second driver; wherein the at least one first driver is at least one first voltage mode (VM) driver, wherein the at least one second driver is at least one second VM driver; wherein each of the at least one first input signal is a first signal from one of the at least one first VM driver; and wherein each of the at least one second input signal is a second signal from one of the at least one second VM driver.

14. The system of claim 13, wherein the circuitry is configured to output common mode (CM) and differential signals at the first output terminal and the second output terminal.

15. A communication device comprising: circuitry comprising: a first transformer having first input nodes and first output nodes; a second transformer having second input nodes and second output nodes, wherein the first input nodes of the first transformer and the second input nodes of the second transformer are connected, wherein at least one of the first output nodes of the first transformer and at least one of the second output nodes of the second transformer are connected; a first capacitor connected to one of the first output nodes of the first transformer and one of the second output nodes of the second transformer, wherein the first capacitor is connected to a first ground; a second capacitor connected to a second ground; and a switch; wherein the first capacitor is connected between one of the first output nodes of the first transformer and the switch, wherein the second capacitor is connected between one of the second output nodes of the second transformer and the switch.

16. The communication device of claim 15, wherein the circuit further comprises: a first input terminal connected to a first one of the first input nodes and a first one of the second input nodes; a second input terminal connected to a second one of the first input nodes and a second one of the second input nodes; a first output terminal; and a second output terminal; wherein the communication device further comprises at least one first driver connected to the first input terminal and at least one second driver connected to the second input terminal; wherein the circuit is configured to receive at least one first input signal from the at least one first driver and at least one second input signal from the at least one second driver.

17. The communication device of claim 16, wherein the at least one first driver is at least one first voltage mode (VM) driver, wherein the at least one second driver is at least one second VM driver, wherein each of the at least one first input signal is a first signal from one of the at least one first VM driver, wherein each of the at least one second input signal is a second signal from one of the at least one second VM driver.

18. The communication device of claim 17, wherein the circuit is configured to output common mode (CM) and differential signals at the first output terminal and the second output terminal.

19. The communication device of claim 15, wherein the circuit has a voltage conversion ratio of 1 :2 and an impedance conversion ratio of 1 :4, wherein each of the first transformer and the second transformer has a voltage conversion ratio of 1 : 1.

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