A high-speed and high-resolution optical measurement device

Abstract

The present invention relates to the technical field of optical measuring devices, and in particular to a high-speed and high-resolution optical measuring device. Technical problem: The high-speed and high-resolution optical measuring device aims to solve the technical problem that the prior art cannot take into account both the high frame rate and high resolution, and has a long trigger time, small storage capacity, and slow transmission rate. Technical solution: A high-speed and high-resolution optical measuring device, comprising a linear array CCD camera 1, a linear array CCD camera 2, an area array CCD camera 1, an area array CCD camera 2, an acquisition FPGA, an ultra-high brightness lighting device, a synchronization trigger, and an industrial computer. The present invention is a high-resolution and high-frame-rate measuring device, which takes into account both the high frame rate and high resolution, has a short trigger time, a large storage capacity, and a fast transmission rate, and obtains the corresponding target image information, and then calculates the spatial distribution position and motion trajectory of the target through the object-image relationship in the effective space of the combined subsystem of the linear array CCD camera and the area array CCD camera.

Description

Technical Field

[0001] The present invention relates to the technical field of optical measuring devices, and in particular to a high-speed and high-resolution optical measuring device. Background Art

[0002] The optical measuring device is mainly used for testing the arbitrary coordinate position and flight trajectory of high-speed flying targets in a specific area of ​​space. It can also be used to obtain multi-frame high-definition imaging images of high-speed flying targets in a specific area of ​​space, and obtain the flight status data of the target based on the above-mentioned collected data analysis. The known high-speed cameras on the domestic market have a maximum frame rate of 3600 frames at a resolution of 2048×1952, which cannot take into account both high frame rate and high resolution. They also have a long trigger time, small storage capacity and slow transmission rate. Summary of the invention

[0003] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a high-speed and high-resolution optical measuring device, which aims to solve the technical problems that the prior art cannot take into account both high frame rate and high resolution, and has a long trigger time, small storage capacity and slow transmission rate.

[0004] The technical solution of the present invention is: a high-speed and high-resolution optical measurement device, including a linear array CCD camera 1, a linear array CCD camera 2, an area array CCD camera 1, an area array CCD camera 2, an acquisition FPGA, an ultra-high brightness lighting device, a synchronous trigger and an industrial computer;

[0005] The industrial computer has built-in area array camera acquisition storage and processing subsystem, line array camera acquisition storage and processing subsystem and terminal processing and display system;

[0006] The linear array CCD camera 1 and the linear array CCD camera 2 are arranged in a predetermined test area, the principal optical axes of the linear array CCD camera 1 and the linear array CCD camera 2 intersect at one point in the object space, and the intersection plane is perpendicular to the target motion direction;

[0007] There are four ultra-high brightness lighting devices, which correspond to linear array CCD camera 1, linear array CCD camera 2, area array CCD camera 1 and area array CCD camera 2 respectively;

[0008] Area array CCD camera 1 and area array CCD camera 2 use two AM5X3 detectors for time-sharing acquisition. The acquisition FPGAs on the left and right sides realize time-sharing synchronous acquisition through high-precision synchronization signals. Each detector receives and analyzes the AM5X3 detector data through 4 acquisition FPGA multi-channels for distributed storage. After all data is acquired and stored, it is controlled and managed through the interface FPGA. Image data is obtained after the user triggers it. The interface FPGA extracts the image in real time and superimposes it to 1920*1080@60Hz. It is output and displayed through the 3G-SDI interface to indicate the current image status. The AM5X3 detector is a 7T storage gate shutter pixel, and four control components PRST, TX, TX2_n and AB are required to operate the global shutter. AB is also called PD.

[0009] The synchronization trigger provides high-precision synchronization pulse signal for the acquisition FPGA, supports one channel, the synchronization accuracy is less than 20ns, the output level is TTL-5V, and the stepping, cycle, and frequency settings are realized by configuring the serial port. The synchronizer includes four parts: output drive circuit, high-precision phase-locked system, frequency division phase setting system, and interface circuit processing circuit;

[0010] The measurement steps are as follows:

[0011] S1: intersection measurement of linear array CCD camera 1 and linear array CCD camera 2:

[0012] Assume that the focal lengths of linear array CCD camera 1 and linear array CCD camera 2 are both f, and obtain the coordinates S (x0, y0) on the target measurement surface;

[0013] S2: Calculation of the position of the target contour points in each frame:

[0014] In order to determine the actual point position of the projectile contour space in each frame of imaging, the center point of the intersection vertical plane of the area array CCD camera 1 and the area array CCD camera 1 is calibrated within the effective field of view, defined as point O, and used as the origin of the central coordinates of the system. At the same time, a benchmark is set on the intersection vertical plane. The benchmark has an actual calibration standard length module. The benchmark is used as the calibration of the test. When the layout is completed once, the benchmark is evacuated after the calibration is completed without affecting the test. The area array CCD camera 1 and the area array CCD camera 2 in the side view direction obtain their own projectile contour point position images. According to the imaging principle, the side view direction image represents the two-dimensional coordinates of the plane perpendicular to the optical axis under a certain distance condition. According to the standard length module of the benchmark, the known size parameters of the standard length module of the benchmark are used to determine the plane position of the projectile imaging point in the side view direction.

[0015] Assume that the center points of area array CCD camera 1 and area array CCD camera 2 are O1 and O2, and the center distance is L, that is, O1O2 = L, determine the actual point position of the projectile contour space in each frame imaging, and establish a projectile contour point coordinate calculation model in the front view direction. Assume that the actual length of the benchmark module is l a Point P1 is the position of any point of the projectile contour in the image obtained by the area array CCD camera 1 or the area array CCD camera 2, and its coordinates are P1(x′, y′). The pixel position coordinates of the center point of the benchmark in the image are obtained by processing (M x , M y ), assuming that the number of pixels occupied by the length of the benchmark is n m , the pixel coordinates of any point of the projectile outline are (D x , D y ), then the two-dimensional coordinates (x′, y′) of the image position of any point P1 of the projectile are The two-dimensional coordinates of any point of the projectile under the synchronous acquisition of the same frame of area array CCD camera 1 and area array CCD camera 2 are obtained as (x1, y1) and (x2, y2), which are the image plane coordinates obtained by area array CCD camera 1 and area array CCD camera 2. The coordinates of points O1 and O2 relative to point O are (K1, H) and (K2, H-ΔH), respectively. The equations of the lines O1P' and O2P'' are: where z * =(H+ΔH+y2cosε2)(K1-y1sinε1)+(H+y1cosε1)(K2-y2sinε2), according to the above formula, we can get the two-dimensional point coordinates (z, y) of any contour point of the projectile in the positive view space, and according to the spatial relationship between the side views of the area array CCD camera 1 and the area array CCD camera 2, we can get the three-dimensional point coordinates of any contour point of the projectile, and the calculation function is:

[0016]

[0017] S3: Target trajectory calculation:

[0018] For the same target, according to the effective measurement space size of 0.46m×0.3m×0.3m, the minimum center length is calculated, the target length is 25mm, the speed is 1500m / s, the time it takes for the target to pass is 0.1ms, the camera sampling frequency is 25000fps, and the sampling is 2.5 frames. By increasing the frame rate, based on the same frame projectile three-dimensional contour calculation method, the frame image in the target's motion path is calculated, and the target's motion trajectory is fitted using each frame of target point cloud data.

[0019] As a preferred embodiment, the linear array CCD camera 1 and the linear array CCD camera 2 adopt 8192×2-line CMOS Sensor, integrate the latest ISP image processing technology, support bright / dark field correction, Gamma, LUT, white balance, CCM and SC ISP functions, and provide high-bandwidth transmission of dual-channel 10G optical ports, a variety of flexible exposure and acquisition methods, support 2-TDI, the highest line frequency can reach 200kHz, support bidirectional configurable I / O wiring design, and flexible input / output configuration. The data acquisition card of the linear array CCD camera 1 and the linear array CCD camera 2 adopts MV-GS1002F, adopts self-developed protocol, and its SFP+ interface is through a pluggable SFP+ module. The acquisition card has two X over Fiber interfaces, the highest effective bandwidth can reach 20Gbps, supports 1Link and 2Link working modes, and adopts FPGA solution to reduce CPU load and expand PC computing resources, which is fully matched with the linear array CCD camera 1 and the linear array CCD camera 2.

[0020] As a preferred option, the acquisition FPGA integrates a feature-rich 64-bit quad-core or dual-core It is based on the dual-core Arm Cortex-R5F processing system (PS) and Xilinx programmable logic (PL) UltraScale architecture. It also includes on-chip memory, multi-port external memory interface and a rich set of peripheral connection interfaces. The NVME in the acquisition FPGA is mainly responsible for storing image data. This memory will not be lost after power failure. The maximum capacity is 8TB. ​​Its main controller is directly connected to the acquisition FPGA.

[0021] Preferably, the AM5X3 detector works as follows: 'PD' when high, erases the photocharge in the photodiode, when low, allows exposure, no shutter control: always low; 'TX' enables charge transfer from the photodetector PD to the storage gate SG; 'TX2_n' charges from the storage gate SG, using a simplified time to stay high, requiring an optional low pulse to remove delay; 'PRST' refreshes the deviation of the pixel memory SG connection, the internal sensor engine overrides PRST during pixel readout, if the entire pixel needs to be cleared, PD and TX are kept high and TX2_n is kept low, and the pixel clears the accumulated dark current charge.

[0022] Preferably, the coordinate calculation step of the target measurement target surface in S1 is: when the target passes through a certain point of the intersection surface, an image is formed on the linear array CCD camera 1 and the linear array CCD camera 2 respectively corresponding to it, and the image height of the target imaged on the linear array CCD camera 1 and the linear array CCD camera 2 and the spatial distribution position of the camera are calculated.

[0023] Preferably, 0.46m, 0.3m and 0.3m in S3 represent the length, width and height respectively, and the minimum length of the center is 0.15m.

[0024] Preferably, the output level of the synchronous trigger is LVTTL or TTL, and the SMA interface is used for output. One reference input signal is used for backup, which improves the reliability of the signal backup and ensures the continuity of the signal used by the subsequent stage. The output signal has high phase consistency, small jitter, and small input and output delay. It also has a remote status monitoring function, which can report the distribution signal status in real time and monitor the status of each input and output signal.

[0025] The beneficial effects of the present invention are as follows: it is a high-resolution, high-frame-rate measuring device, with a shooting rate of 25,000 frames per second at a resolution of 1024x960, and a maximum resolution of 2560x1920. At this resolution, the shooting rate can reach 6,000 frames per second, while taking into account both high frame rate and high resolution. The triggering time is short, the storage capacity is large, and the transmission rate is fast, thus filling the gap in the domestic technology market. A high-speed flying target first passes through the plane detection field of view of a synchronous trigger, and the light information changes generated by the projectile passing through the plane detection field of view are used to form a pulse signal after processing. The pulse signal triggers a linear array CCD camera and an area array CCD camera, thereby obtaining corresponding target image information under the action of the synchronous pulse signal, and then the spatial distribution position and motion trajectory of the target are calculated through the object-image relationship of the target in the effective space of the combined subsystem of the linear array CCD camera and the area array CCD camera. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 What is shown is the measurement principle diagram of the high-speed and high-resolution optical measurement device of the present invention;

[0027] Figure 2 What is shown is a system functional module diagram of a high-speed and high-resolution optical measurement device of the present invention;

[0028] Figure 3 Shown is a schematic diagram of a test target surface formed by the intersection arrangement of a linear array CCD camera 1 and a linear array CCD camera 2 in a high-speed and high-resolution optical measurement device of the present invention;

[0029] Figure 4 Shown is a schematic diagram of the spatial relationship between the intersection of the linear array CCD camera 1 and the linear array CCD camera 2 in the high-speed and high-resolution optical measurement device of the present invention;

[0030] Figure 5 The present invention shows the coordinate calculation principle of the intersection direction of the area array CCD camera 1 and the area array CCD camera 2 in the high-speed and high-resolution optical measurement device of the present invention;

[0031] Figure 6What is shown is the functional block diagram of the area array CCD camera in the high-speed and high-resolution optical measurement device of the present invention;

[0032] Figure 7 What is shown is a block diagram of the principle of a synchronous trigger in a high-speed and high-resolution optical measurement device of the present invention;

[0033] Figure 8 What is shown is the functional block diagram of the AM5X3 detector in the high-speed and high-resolution optical measurement device of the present invention;

[0034] Fig. 9 Shown is a simplified diagram of the shutter pixel of the AM5X3 detector in the high-speed and high-resolution optical measurement device of the present invention;

[0035] Fig.10 What is shown is the hardware circuit block diagram of the acquisition FPGA unit in the high-speed and high-resolution optical measurement device of the present invention;

[0036] Fig.11 Shown is the circuit diagram of the NVME system in the high-speed and high-resolution optical measurement device of the present invention. DETAILED DESCRIPTION

[0037] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0038] See also Figure 1-11 , the present invention provides an embodiment: a high-speed and high-resolution optical measurement device, including a linear array CCD camera 1, a linear array CCD camera 2, an area array CCD camera 1, an area array CCD camera 2, an acquisition FPGA, an ultra-high brightness lighting device, a synchronous trigger and an industrial computer;

[0039] The industrial computer has built-in area array camera acquisition storage and processing subsystem, line array camera acquisition storage and processing subsystem and terminal processing and display system;

[0040] The linear array CCD camera 1 and the linear array CCD camera 2 are arranged in a predetermined test area, the principal optical axes of the linear array CCD camera 1 and the linear array CCD camera 2 intersect at one point in the object space, and the intersection plane is perpendicular to the target motion direction;

[0041] There are four ultra-high brightness lighting devices, which correspond to linear array CCD camera 1, linear array CCD camera 2, area array CCD camera 1 and area array CCD camera 2 respectively;

[0042] Area array CCD camera 1 and area array CCD camera 2 use two AM5X3 detectors for time-sharing acquisition. The acquisition FPGAs on the left and right sides realize time-sharing synchronous acquisition through high-precision synchronization signals. Each detector receives and analyzes the AM5X3 detector data through 4 acquisition FPGA multi-channels for distributed storage. After all data is acquired and stored, it is controlled and managed through the interface FPGA. Image data is obtained after the user triggers it. The interface FPGA extracts the image in real time and superimposes it to 1920*1080@60Hz. It is output and displayed through the 3G-SDI interface to indicate the current image status. The AM5X3 detector is a 7T storage gate shutter pixel, and four control components PRST, TX, TX2_n and AB are required to operate the global shutter. AB is also called PD.

[0043] The synchronization trigger provides high-precision synchronization pulse signal for the acquisition FPGA, supports one channel, the synchronization accuracy is less than 20ns, the output level is TTL-5V, and the stepping, cycle, and frequency settings are realized by configuring the serial port. The synchronizer includes four parts: output drive circuit, high-precision phase-locked system, frequency division phase setting system, and interface circuit processing circuit;

[0044] The measurement steps are as follows:

[0045] S1: intersection measurement of linear array CCD camera 1 and linear array CCD camera 2:

[0046] Assume that the focal lengths of the linear array CCD camera 1 and the linear array CCD camera 2 are both f, and obtain the coordinates S (x0, y0) on the target measurement surface;

[0047] S2: Calculation of the position of the target contour points in each frame:

[0048] In order to determine the actual point position of the projectile contour space in each frame of imaging, the center point of the intersection vertical plane of the area array CCD camera 1 and the area array CCD camera 1 is calibrated within the effective field of view, defined as point O, and used as the origin of the central coordinates of the system. At the same time, a benchmark is set on the intersection vertical plane. The benchmark has an actual calibration standard length module. The benchmark is used as the calibration of the test. When the layout is completed once, the benchmark is evacuated after the calibration is completed without affecting the test. The area array CCD camera 1 and the area array CCD camera 2 in the side view direction obtain their own projectile contour point position images. According to the imaging principle, the side view direction image represents the two-dimensional coordinates of the plane perpendicular to the optical axis under a certain distance condition. According to the standard length module of the benchmark, the known size parameters of the standard length module of the benchmark are used to determine the plane position of the projectile imaging point in the side view direction.

[0049] Assume that the center points of area array CCD camera 1 and area array CCD camera 2 are O1 and O2, and the center distance is L, that is, O1O2 = L, determine the actual point position of the projectile contour space in each frame imaging, and establish a projectile contour point coordinate calculation model in the front view direction. Assume that the actual length of the benchmark module is l a Point P1 is the position of any point of the projectile contour in the image obtained by the area array CCD camera 1 or the area array CCD camera 2, and its coordinates are P1(x′, y′). The pixel position coordinates of the center point of the benchmark in the image are obtained by processing (M x , M y ), assuming that the number of pixels occupied by the length of the benchmark is n m , the pixel coordinates of any point of the projectile outline are (D x , D y ), then the two-dimensional coordinates (x′, y′) of the image position of any point P1 of the projectile are The two-dimensional coordinates of any point of the projectile under the synchronous acquisition of the same frame of area array CCD camera 1 and area array CCD camera 2 are obtained as (x1, y1) and (x2, y2), which are the image plane coordinates obtained by area array CCD camera 1 and area array CCD camera 2. The coordinates of points O1 and O2 relative to point 0 are (K1, H) and (K2, H-ΔH), respectively. The equations of the lines O1P' and O2P'' are:

[0050] where z * =(H+ΔH+y2cosε2)(K1-y1sinε1)+(H+y1cosε1)(K2-y2sin ε2), according to the above formula, the two-dimensional point coordinates (z, y) of any contour point of the projectile are obtained, and according to the spatial relationship between the side views of the area array CCD camera 1 and the area array CCD camera 2, the three-dimensional point coordinates of any contour point of the projectile are obtained. The calculation function is

[0051]

[0052] S3: Target trajectory calculation:

[0053] For the same target, according to the effective measurement space size of 0.46m×0.3m×0.3m, the minimum center length is calculated, the target length is 25mm, the speed is 1500m / s, the time it takes for the target to pass is 0.1ms, the camera sampling frequency is 25000fps, and the sampling is 2.5 frames. By increasing the frame rate, based on the same frame projectile three-dimensional contour calculation method, the frame image in the target's motion path is calculated, and the target's motion trajectory is fitted using each frame of target point cloud data.

[0054] As a preferred embodiment, the linear array CCD camera 1 and the linear array CCD camera 2 adopt 8192×2-line CMOSSensor, integrate the latest ISP image processing technology, support bright / dark field correction, Gamma, LUT, white balance, CCM and SC ISP functions, and provide high-bandwidth transmission of dual-channel 10G optical ports, a variety of flexible exposure and acquisition methods, support 2-TDI, the highest line frequency can reach 200kHz, support bidirectional configurable I / O wiring design, and flexible input / output configuration. The linear array CCD camera 1 and the linear array CCD camera 2 data acquisition card adopts MV-GS1002F, adopts self-developed protocol, and its SFP+ interface is through a pluggable SFP+ module. The acquisition card has two X over Fiber interfaces, the highest effective bandwidth can reach 20Gbps, supports 1Link and 2Link working modes, and adopts FPGA solution to reduce CPU load and expand PC computing resources, which is fully matched with the linear array CCD camera 1 and the linear array CCD camera 2.

[0055] As a preferred option, the acquisition FPGA integrates a feature-rich 64-bit quad-core or dual-core It is based on the dual-core Arm Cortex-R5F processing system (PS) and Xilinx programmable logic (PL) UltraScale architecture. It also includes on-chip memory, multi-port external memory interface and a rich set of peripheral connection interfaces. The NVME in the acquisition FPGA is mainly responsible for storing image data. This memory will not be lost after power failure. The maximum capacity is 8TB. ​​Its main controller is directly connected to the acquisition FPGA.

[0056] Preferably, the AM5X3 detector works as follows: 'PD' when high, erases the photocharge in the photodiode, when low, allows exposure, no shutter control: always low; 'TX' enables charge transfer from the photodetector PD to the storage gate SG; 'TX2_n' charges from the storage gate SG, using a simplified time to stay high, requiring an optional low pulse to remove delay; 'PRST' refreshes the deviation of the pixel memory SG connection, the internal sensor engine overrides PRST during pixel readout, if the entire pixel needs to be cleared, PD and TX are kept high and TX2_n is kept low, and the pixel clears the accumulated dark current charge.

[0057] Preferably, the coordinate calculation step of the target measurement target surface in S1 is: when the target passes through a certain point of the intersection surface, an image is formed on the linear array CCD camera 1 and the linear array CCD camera 2 respectively corresponding to it, and the image height of the target imaged on the linear array CCD camera 1 and the linear array CCD camera 2 and the spatial distribution position of the camera are calculated.

[0058] Preferably, 0.46m, 0.3m and 0.3m in S3 represent the length, width and height respectively, and the minimum length of the center is 0.15m.

[0059] Preferably, the output level of the synchronous trigger is LVTTL or TTL, and the SMA interface is used for output. One reference input signal is used for backup, which improves the reliability of the signal backup and ensures the continuity of the signal used by the subsequent stage. The output signal has high phase consistency, small jitter, and small input and output delays. It also has a remote status monitoring function, reports the distribution signal status in real time, and can monitor the status of each input and output signal.

[0060] While working,

[0061] The industrial computer has built-in area array camera acquisition storage and processing subsystem, line array camera acquisition storage and processing subsystem and terminal processing and display system;

[0062] Linear array CCD camera 1 and linear array CCD camera 2 are arranged in a predetermined test area. The main optical axes of linear array CCD camera 1 and linear array CCD camera 2 intersect at one point in the object space, and the intersection plane is perpendicular to the target movement direction. Linear array CCD camera 1 and linear array CCD camera 2 use 8192×2 line CMOS Sensor, integrate the latest ISP image processing technology, support bright / dark field correction, Gamma, LUT, white balance, CCM and SC ISP functions, linear array CCD camera 1 and linear array CCD camera 2 provide high-bandwidth transmission of dual-channel 10G optical ports, a variety of flexible exposure and acquisition methods, support 2-TDI, the highest line frequency can reach 200kHz, support bidirectional configurable I / O wiring design, input / output flexible configuration, linear array CCD camera 1 and linear array CCD camera 2 data acquisition card uses MV-GS1002F, adopts self-developed protocol, and its SFP+ interface is through a pluggable SFP+ module. The acquisition card has two X OverFiber interface, with a maximum effective bandwidth of 20Gbps, supports 1Link and 2Link working modes, adopts FPGA solution to reduce CPU load, expand PC computing resources, and fully matches linear array CCD camera 1 and linear array CCD camera 2;

[0063] Acquisition FPGA integrates feature-rich 64-bit quad-core or dual-core The dual-core Arm Cortex-R5F-based processing system (PS) and Xilinx programmable logic (PL) UltraScale architecture also include on-chip memory, multi-port external memory interface and a rich set of peripheral connection interfaces. The NVME in the acquisition FPGA is mainly used to store image data. This memory is not lost after power failure and has a maximum capacity of 8TB. ​​Its main controller is directly connected to the acquisition FPGA.

[0064] There are four ultra-high brightness lighting devices, which correspond to the linear array CCD camera 1, the linear array CCD camera 2, the area array CCD camera 1 and the area array CCD camera 2 respectively.

[0065] Area array CCD camera 1 and area array CCD camera 2 use two AM5X3 detectors for time-sharing acquisition. The acquisition FPGAs on the left and right sides realize time-sharing synchronous acquisition through high-precision synchronization signals. Each detector receives and analyzes the AM5X3 detector data through 4 acquisition FPGA multi-channels for distributed storage. After all data is acquired and stored, it is controlled and managed through the interface FPGA. Image data is obtained after the user triggers it. The interface FPGA extracts the image in real time and superimposes it to 1920*1080@60Hz. It is output and displayed through the 3G-SDI interface to indicate the current image status. The AM5X3 detector is a 7T storage gate shutter pixel, which requires four control components PRST, TX, TX2_n and AB To operate the global shutter, AB is also called PD. The working principle of the AM5X3 detector is as follows: 'PD' when high, erases the photocharge in the photodiode, when low, allows exposure, no shutter control: always low; 'TX' enables the charge to be transferred from the photodetector PD to the storage gate SG; 'TX2_n' charges from the storage gate SG, using a simplified time to stay high, an optional low pulse is required to remove the delay; 'PRST' refreshes the deviation of the pixel memory SG connection, the internal sensor engine overrides PRST during pixel readout, if the entire pixel needs to be cleared, PD and TX are kept high and TX2_n is kept low, and the pixel clears the accumulated dark current charge;

[0066] The synchronization trigger provides high-precision synchronization pulse signal for the acquisition FPGA, supports one channel, the synchronization accuracy is less than 20ns, the output level is TTL-5V, and the stepping, cycle, and frequency settings are realized by configuring the serial port. The synchronizer includes four parts: output drive circuit, high-precision phase-locked system, frequency division phase setting system, and interface circuit processing circuit. The output level of the synchronization trigger is LVTTL or TTL, and the SMA interface is used for output. One reference input signal is used for backup, which improves the reliability of signal backup and ensures the continuity of the signal used by the subsequent stage. The output signal has high phase consistency, small jitter, small input and output delay, and has remote status monitoring function, real-time reporting of the distribution signal status, and can monitor the status of each input and output signal.

[0067] The steps are as follows:

[0068] S1: intersection measurement of linear array CCD camera 1 and linear array CCD camera 2:

[0069] Assume that the focal lengths of linear array CCD camera 1 and linear array CCD camera 2 are both f. When the target passes through a certain point on the intersection surface, an image corresponding to it is formed on linear array CCD camera 1 and linear array CCD camera 2. By calculating the image height of the target imaged on linear array CCD camera 1 and linear array CCD camera 2 and the spatial distribution position of the camera, the coordinates S (x0, y0) of the target on the measurement target surface are obtained.

[0070] S2: Calculation of the position of the target contour points in each frame:

[0071] In order to determine the actual point position of the projectile contour space in each frame of imaging, the center point of the intersection vertical plane of the area array CCD camera 1 and the area array CCD camera 1 is calibrated within the effective field of view, defined as point O, and used as the origin of the central coordinates of the system. At the same time, a benchmark is set on the intersection vertical plane. The benchmark has an actual calibration standard length module. The benchmark is used as the calibration of the test. When the layout is completed once, the benchmark is evacuated after the calibration is completed without affecting the test. The area array CCD camera 1 and the area array CCD camera 2 in the side view direction obtain their own projectile contour point position images. According to the imaging principle, the side view direction image represents the two-dimensional coordinates of the plane perpendicular to the optical axis under a certain distance condition. According to the standard length module of the benchmark, the known size parameters of the standard length module of the benchmark are used to determine the plane position of the projectile imaging point in the side view direction.

[0072] Assume that the center points of area array CCD camera 1 and area array CCD camera 2 are O1 and O2, and the center distance is L, that is, O1O2=L, and determine the actual point position of the projectile contour space in each frame of imaging. In order to determine the actual point position of the projectile contour space in each frame of imaging, calibrate the center point of the intersection vertical plane of area array CCD camera 1 and area array CCD camera 1 within the effective field of view, define it as point O, and use it as the center coordinate origin of the system. At the same time, set a benchmark on the intersection vertical plane. The benchmark has an actual calibration standard length module, and use the benchmark as the calibration of the test. ,When the deployment is completed once, the benchmark can be evacuated after the calibration is completed without affecting the test. The area array CCD camera 1 and the area array CCD camera 2 in the side view direction obtain their own projectile contour point position images. According to the imaging principle, the side view direction image represents the two-dimensional coordinates of the plane perpendicular to the optical axis under a certain distance condition. According to the standard length module of the benchmark, the known size parameters of the standard length module of the benchmark are used to determine the plane position of the projectile imaging point in the side view direction, and establish a projectile contour point coordinate calculation model in the front view direction. Assuming that the actual length of the benchmark module is l a Point P1 is the position of any point of the projectile contour in the image obtained by the area array CCD camera 1 or the area array CCD camera 2, and its coordinates are P1(x′, y′). The pixel position coordinates of the center point of the benchmark in the image are obtained by processing (M x , M y ), assuming that the number of pixels occupied by the length of the benchmark is n m, the pixel coordinates of any point of the projectile outline are (D x , D y ), then the two-dimensional coordinates (x′, y′) of the image position of any point P1 of the projectile are The two-dimensional coordinates of any point of the projectile under the synchronous acquisition of the same frame of area array CCD camera 1 and area array CCD camera 2 are obtained as (x1, y1) and (x2, y2), which are the image plane coordinates obtained by area array CCD camera 1 and area array CCD camera 2. The coordinates of points O1 and O2 relative to point O are (K1, H) and (K2, H-ΔH), respectively. The equations of the lines O1P' and O2P'' are: where z * =(H+ΔH+y2cosε2)(K1-y1sinε1)+(H+y1cosε1)(K2-y2sinε2), according to the above formula, we can get the two-dimensional point coordinates (z, y) of any contour point of the projectile in the positive view space, and according to the spatial relationship between the side views of the area array CCD camera 1 and the area array CCD camera 2, we can get the three-dimensional point coordinates of any contour point of the projectile, and the calculation function is:

[0073]

[0074] S3: Target trajectory calculation:

[0075] For the same target, according to the effective measurement space size of 0.46m×0.3m×0.3m, the minimum center dimension length is used for calculation. 0.46m, 0.3m and 0.3m represent the length, width and height respectively. The minimum center dimension length is 0.15m, the target length is 25mm, the speed is 1500m / s, the time for the target to pass is 0.1ms, the camera sampling frequency is 25000fps, and the sampling is 2.5 frames. By increasing the frame rate, based on the same frame projectile 3D contour calculation method, the frame image in the target's motion path is calculated, and the target's motion trajectory is fitted using each frame of target point cloud data.

[0076] Table 1 shows the technical indicators related to the synchronous trigger, and Table 2 shows the technical indicators achieved by the present invention.

[0077]

[0078]

[0079] Table 1

[0080]

[0081]

[0082] Table 2

[0083] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of those skilled in the art without departing from the spirit of the present invention.

Claims

1. A high-speed and high-resolution optical measurement device, comprising a linear array CCD camera 1, a linear array CCD camera 2, an area array CCD camera 1, an area array CCD camera 2, an acquisition FPGA, an ultra-high brightness lighting device, a synchronous trigger and an industrial computer; characterized in that: The industrial computer has built-in area array camera acquisition storage and processing subsystem, line array camera acquisition storage and processing subsystem and terminal processing and display system; The linear array CCD camera 1 and the linear array CCD camera 2 are arranged in a predetermined test area, the principal optical axes of the linear array CCD camera 1 and the linear array CCD camera 2 intersect at one point in the object space, and the intersection plane is perpendicular to the target motion direction; There are four ultra-high brightness lighting devices, which correspond to linear array CCD camera 1, linear array CCD camera 2, area array CCD camera 1 and area array CCD camera 2 respectively; Area array CCD camera 1 and area array CCD camera 2 use two AM5X3 detectors for time-sharing acquisition. The acquisition FPGAs on the left and right sides realize time-sharing synchronous acquisition through high-precision synchronization signals. Each detector receives and analyzes the AM5X3 detector data through 4 acquisition FPGA multi-channels for distributed storage. After all data is acquired and stored, it is controlled and managed through the interface FPGA. Image data is obtained after the user triggers it. The interface FPGA extracts the image in real time and superimposes it to 1920*1080@60Hz. It is output and displayed through the 3G-SDI interface to indicate the current image status. The AM5X3 detector is a 7T storage gate shutter pixel, and four control components PRST, TX, TX2_n and AB are required to operate the global shutter. AB is also called PD. The synchronization trigger provides high-precision synchronization pulse signal for the acquisition FPGA, supports one channel, the synchronization accuracy is less than 20ns, the output level is TTL-5V, and the stepping, cycle, and frequency settings are realized by configuring the serial port. The synchronizer includes four parts: output drive circuit, high-precision phase-locked system, frequency division phase setting system, and interface circuit processing circuit; The measurement steps are as follows: S1: intersection measurement of linear array CCD camera 1 and linear array CCD camera 2: Assume that the focal lengths of the linear array CCD camera 1 and the linear array CCD camera 2 are both f, and obtain the coordinates S (x0, y0) on the target measurement surface; S2: Calculation of the position of the target contour points in each frame: In order to determine the actual point position of the projectile contour space of each frame of imaging, the center point of the intersection vertical plane of the area array CCD camera 1 and the area array CCD camera 1 is calibrated within the effective field of view, defined as the 0 point, and used as the origin of the central coordinates of the system. At the same time, a benchmark is set on the intersection vertical plane. The benchmark has an actual calibration standard length module. The benchmark is used as the calibration of the test. When the layout is completed once, the benchmark is evacuated after the calibration is completed without affecting the test. The area array CCD camera 1 and the area array CCD camera 2 in the side view direction obtain their own projectile contour point position images. According to the imaging principle, the side view direction image represents the two-dimensional coordinates of the plane perpendicular to the optical axis under a certain distance condition. According to the standard length module of the benchmark, the known size parameters of the standard length module of the benchmark are used to determine the plane position of the projectile imaging point in the side view direction. Assume that the center points of area array CCD camera 1 and area array CCD camera 2 are O1 and O2, and the center distance is L, that is, O1O2 = L, determine the actual point position of the projectile contour space in each frame imaging, and establish a projectile contour point coordinate calculation model in the front view direction. Assume that the actual length of the benchmark module is l a Point P1 is the position of any point of the projectile contour in the image obtained by the area array CCD camera 1 or the area array CCD camera 2, and its coordinates are P1(x′, y′). The pixel position coordinates of the center point of the benchmark in the image are obtained by processing (M x , M y ), assuming that the number of pixels occupied by the length of the benchmark is n m , the pixel coordinates of any point of the projectile outline are (D x , D y ), then the two-dimensional coordinates (x′, y′) of the image position of any point P1 of the projectile are The two-dimensional coordinates of any point of the projectile under the synchronous acquisition of the same frame of area array CCD camera 1 and area array CCD camera 2 are obtained as (x1, y1) and (x2, y2), which are the image plane coordinates obtained by area array CCD camera 1 and area array CCD camera 2. The coordinates of points O1 and O2 relative to point O are (K1, H) and (K2, H-ΔH), respectively. The equations of the lines O1P' and O2P'' are: Where z*=(H+ΔH+y2cosε2)(K1-y1sinε1)+(H+y1cosε1)(K2-y2sinε2). The two-dimensional point coordinates (z, y) of any contour point of the projectile are obtained according to the above formula. The three-dimensional point coordinates of any contour point of the projectile are obtained according to the spatial relationship between the side views of the area array CCD camera 1 and the area array CCD camera 2. The calculation function is: S3: Target trajectory calculation: For the same target, according to the effective measurement space size of 0.46m×0.3m×0.3m, the minimum center length is calculated, the target length is 25mm, the speed is 1500m / s, the time it takes for the target to pass is 0.1ms, the camera sampling frequency is 25000fps, and the sampling is 2.5 frames. By increasing the frame rate, based on the same frame projectile three-dimensional contour calculation method, the frame image in the target's motion path is calculated, and the target's motion trajectory is fitted using each frame of target point cloud data.

2. A high-speed and high-resolution optical measurement device according to claim 1, characterized in that: Linear array CCD camera 1 and linear array CCD camera 2 use 8192×2 line CMOSSensor, integrate the latest ISP image processing technology, support bright / dark field correction, Gamma, LUT, white balance, CCM and SC ISP functions, linear array CCD camera 1 and linear array CCD camera 2 provide high-bandwidth transmission of dual-channel 10G optical ports, a variety of flexible exposure and acquisition methods, support 2-TDI, the highest line frequency can reach 200kHz, support bidirectional configurable I / O wiring design, input / output flexible configuration, linear array CCD camera 1 and linear array CCD camera 2 data acquisition card uses MV-GS1002F, adopts self-developed protocol, and its SFP+ interface is through a pluggable SFP+ module. The acquisition card has two Xover Fiber interfaces with a maximum effective bandwidth of 20Gbps, supports 1Link and 2Link working modes, and adopts FPGA solution to reduce CPU load and expand PC computing resources, which is fully matched with linear array CCD camera 1 and linear array CCD camera 2.

3. A high-speed and high-resolution optical measurement device according to claim 1, characterized in that: Acquisition FPGA integrates feature-rich 64-bit quad-core or dual-core It is based on the dual-core Arm Cortex-R5F processing system (PS) and Xilinx programmable logic (PL) UltraScale architecture. It also includes on-chip memory, multi-port external memory interface and a rich set of peripheral connection interfaces. The NVME in the acquisition FPGA is mainly responsible for storing image data. This memory will not be lost after power failure. The maximum capacity is 8TB. ​​Its main controller is directly connected to the acquisition FPGA.

4. A high-speed and high-resolution optical measurement device according to claim 1, characterized in that: The working principle of the AM5X3 detector is as follows: 'PD' when high, erases the photocharge in the photodiode, when low, allows exposure, there is no shutter control: always low; 'TX' enables the charge to be transferred from the photodetector PD to the storage gate SG; 'TX2_n' charges from the storage gate SG, using a simplified time to remain high, requiring an optional low pulse to remove delay; 'PRST' refreshes the deviation of the pixel memory SG connection, the internal sensor engine overrides PRST during pixel readout, if the entire pixel needs to be cleared, PD and TX are kept high and TX2_n is kept low, and the pixel clears the accumulated dark current charge.

5. The high-speed and high-resolution optical measurement device according to claim 1, characterized in that: The coordinate calculation steps of the target measurement target surface in S1 are as follows: when the target passes through a certain point of the intersection surface, an image is formed on the linear array CCD camera 1 and the linear array CCD camera 2 respectively corresponding to it, and the image height of the target imaged on the linear array CCD camera 1 and the linear array CCD camera 2 and the spatial distribution position of the camera are calculated.

6. A high-speed and high-resolution optical measurement device according to claim 1, characterized in that: In S3, 0.46m, 0.3m and 0.3m represent the length, width and height respectively, and the minimum length of the center is 0.15m.

7. The high-speed and high-resolution optical measurement device according to claim 1, characterized in that: The output level of the synchronous trigger is LVTTL or TTL, and it uses an SMA interface output. One reference input signal is used for backup, which improves the reliability of signal backup and ensures the continuity of the signal used by the subsequent stage. The output signal has high phase consistency, small jitter, and small input and output delay. It also has a remote status monitoring function, which can report the distribution signal status in real time and monitor the status of each input and output signal.

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