A chip bonding process and a chip module

Abstract

The application provides a chip connecting process and a chip module. The process comprises growing a first metal layer and a second metal layer capable of transient liquid phase sintering on a first area of a chip solder layer of a DBC substrate layer by layer; the first metal layer is a high-melting-point metal, the second metal layer is a low-melting-point metal, and the number of layers of the first metal layer is one more than that of the second metal layer; printing a nano metal solder paste on a second area of the chip solder layer of the DBC substrate, the printing thickness of the nano metal solder paste being the same as the total thickness of the metal layers of the first area; the second area is located at the periphery of the first area; covering a chip on the connecting layer to obtain a sintering component; pre-sintering the sintering component at a pre-sintering temperature lower than the melting point of the second metal, and sintering the pre-sintered sintering component at a sintering temperature higher than the melting point of the second metal layer, so as to realize the connection of the chip and the substrate.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip bonding, and particularly to a chip bonding process and a chip module. BACKGROUND

[0002] In the past two decades, power chips based on wide bandgap semiconductor materials have attracted extensive attention and research. Compared with Si-based chips, wide bandgap power devices can operate at higher temperatures, and have higher power density, switching speed, higher voltage resistance, and other excellent characteristics. This puts forward the requirements of packaging technology and packaging materials that can work at high temperatures, and have the advantages of high conductivity and high thermal conductivity.

[0003] In recent years, nano-metal sintering connection technology has attracted much attention. This technology uses the size effect of nano-metal particles to sinter and connect at low temperatures. The connection layer after sintering has the characteristics of bulk metal and can reliably operate at high temperatures.

[0004] However, the current nano-metal needs to be mixed with a suitable organic solvent to form a paste, i.e., nano-metal solder paste. During the sintering process, the organic solvent begins to evaporate and diffuse after heating, and the nano-metal particles can effectively contact each other. Under the conditions of heating and pressure, metal atoms migrate and diffuse at a faster rate, and the nano-metal particles fuse and shrink with each other to grow into a dense sintered body, thereby connecting the chip and the DBC substrate.

[0005] Previous studies have shown that when using nano-metal sintering technology to connect large-area chips, the organic solvent in the nano-metal solder paste is not easy to evaporate, especially in the middle area of the connection area. The residual organic solvent not only prolongs the sintering process, but also seriously hinders the sintering behavior of nano-metal particles, thereby damaging the final sintering quality.

[0006] In addition, during the connection process of large-area chips, the paste-like nano-metal solder paste is easily subjected to uneven pressure during the sintering process, which leads to uneven sintering and poor sintering quality, which will damage the long-term reliability of the final device. SUMMARY

[0007] In view of the above problems, a chip bonding process and a chip module are provided to overcome the above problems or at least partially solve the above problems, comprising:

[0008] A chip bonding process, the method comprising:

[0009] growing a first metal layer and a second metal layer on a first area of a chip solder layer of a ceramic copper-clad plate DBC substrate bearing the chip layer by layer, the first metal layer and the second metal layer forming a mixed metal layer; the mixed metal layer formed by the first metal layer and the second metal layer is a metal composition capable of transient liquid phase sintering, the first metal layer is a high-melting-point metal with a melting point higher than 800℃, and the second metal layer is a low-melting-point metal with a melting point lower than 250℃, the number of layers of the first metal layer being one more than the number of layers of the second metal layer;

[0010] printing a nano-metal solder paste on a second area of the chip solder layer of the DBC substrate, the printing thickness of the nano-metal solder paste being the same as the total thickness of the mixed metal layer of the first area; the second area is located at the periphery of the first area, and the nano-metal solder paste layer and the mixed metal layer together form a connecting layer;

[0011] covering the chip on the connecting layer to obtain a to-be-sintered assembly, the connecting layer being located between the chip and the DBC substrate;

[0012] in a pre-sintering stage, pre-sintering the to-be-sintered assembly by using a pre-sintering temperature, the pre-sintering temperature being lower than the melting point of the second metal, and the pre-sintering temperature being in the range of 130-180℃;

[0013] in a sintering stage, sintering the to-be-sintered assembly after pre-sintering by using a sintering temperature higher than the melting point of the second metal layer, the sintering temperature being in the range of 200-280℃.

[0014] Optionally, the high-melting-point metal is any one of gold, copper, nickel, and silver metal materials;

[0015] The low-melting-point metal is one of tin and indium metal materials.

[0016] Optionally, the growing of the first metal layer and the second metal layer on the first area of the chip solder layer of the ceramic copper-clad plate DBC substrate bearing the chip layer layer by layer comprises:

[0017] growing the first metal layer of the first layer on the first area of the chip solder layer of the DBC substrate;

[0018] growing the second metal layer of the second layer on the first metal layer of the first layer;

[0019] growing the first metal layer of the third layer on the second metal layer of the second layer;

[0020] growing the second metal layer of the fourth layer on the first metal layer of the third layer;

[0021] growing the first metal layer of the fifth layer on the second metal layer of the fourth layer.

[0022] Optionally, the method for forming the first metal layer or the second metal layer comprises any one of the following:

[0023] Pulse laser deposition method, magnetron sputtering coating method, chemical deposition method.

[0024] Optionally, the step of forming the first metal layer or the second metal layer is carried out in any one of the following deposition atmospheres:

[0025] Inert gas;

[0026] Mixed gas of inert gas and reducing gas.

[0027] Optionally, the thickness of the first metal layer ranges from 1 to 10 microns;

[0028] The thickness of the second metal layer ranges from 1 to 10 microns;

[0029] The thickness of the mixed metal layer ranges from 30 to 100 microns.

[0030] Optionally, the pre-sintering stage and the sintering stage are carried out in a sintering atmosphere, and the sintering atmosphere is a mixed gas of inert gas and reducing gas.

[0031] Optionally, the metal in the first metal layer is in the form of nanoparticles, and the size of the metal in the first metal layer ranges from 1 to 1000 nanometers;

[0032] The metal in the second metal layer is in the form of nanoparticles, and the size of the metal in the second metal layer ranges from 1 to 1000 nanometers.

[0033] Optionally, the pre-sintering stage and the sintering stage are carried out under an auxiliary pressure, and the auxiliary pressure ranges from 0 to 10 MPa.

[0034] The embodiment of the present application also provides a chip module, which comprises a chip and a DBC, and the chip and the DBC are sintered by the process method as described above to obtain the chip module.

[0035] The embodiment of the present application has the following advantages:

[0036] The first metal layer and the second metal layer are grown layer by layer on the first area of the chip welding layer of the DBC substrate of the ceramic copper-clad plate carrying the chip, and the first metal layer and the second metal layer form a mixed metal layer; the mixed metal layer formed by the first metal layer and the second metal layer is a metal composition capable of being sintered by transient liquid phase sintering, the first metal layer is a high-melting-point metal with a melting point higher than 800 DEG C, the second metal layer is a low-melting-point metal with a melting point lower than 250 DEG C, and the number of layers of the first metal layer is one more than that of the second metal layer.

[0037] Print nano-metal solder paste on the second area of the chip soldering layer of the DBC substrate, the printing thickness of the nano-metal solder paste is the same as the total thickness of the mixed metal layer of the first area; the second area is located at the periphery of the first area, and the nano-metal solder paste layer and the mixed metal layer jointly constitute a connecting layer;

[0038] Cover the chip on the connecting layer to obtain a sintering assembly, and the connecting layer is located between the chip and the DBC substrate;

[0039] In the pre-sintering stage, the pre-sintering temperature is used for pre-sintering the sintering assembly, the pre-sintering temperature is lower than the melting point of the second metal, and the pre-sintering temperature ranges from 130 to 180 DEG C.

[0040] In the sintering stage, the sintering temperature higher than the melting point of the second metal layer is used for sintering the sintering assembly after pre-sintering, and the sintering temperature ranges from 200 to 280 DEG C.

[0041] Through the embodiment of the present application, combined with the transient liquid phase sintering technology and the nano-metal sintering technology, the evaporation and diffusion of the organic solvent in the nano-metal solder paste can be accelerated, so that the reducing gas and the metal particles can be fully contacted; after the organic solvent volatilizes, the nano-metal layer in the second area does not have fluidity, so that the pressure is more uniform, thereby improving the nano-metal sintering quality. In addition, the sintering connection of the chip and the DBC substrate at a lower temperature is also realized. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the description of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0043] Figure 1 is a step flow chart of a chip connection process method of an embodiment of the present application;

[0044] Figure 2 is a step flow chart of another chip connection process method of an embodiment of the present application;

[0045] Figure 3 is a schematic diagram of a chip connection of an embodiment of the present application;

[0046] Figure 4 is a control parameter diagram of a process of an embodiment of the present application.

[0047] IDENTIFICATION OF DRAWINGS

[0048] Upper Cu layer of DBC substrate-301, middle insulating ceramic layer of DBC substrate-302, lower Cu metal layer of DBC substrate-303, first region-304, second region-305, first metal layer-306, second metal layer-307, nano metal solder paste-308, chip-309, sintered connection layer-310. DETAILED DESCRIPTION

[0049] In order to make the above objectives, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with reference to the drawings and specific embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0050] When connecting a large-area chip by using the nano metal sintering technology, the organic solvent in the nano metal solder paste is not easy to volatilize, especially the solvent in the middle region of the connection area. The residual organic solvent not only prolongs the sintering process, but also seriously hinders the sintering behavior of the nano metal particles, thereby damaging the final sintering quality.

[0051] In addition, during the connection process of the large-area chip, the paste nano metal solder paste is easily subjected to uneven pressure during the sintering process, thereby causing uneven sintering degree and poor sintering quality, which will damage the long-term reliability of the final device.

[0052] In view of a series of problems in the process of connecting a large-area chip by using the nano metal solder paste, such as high difficulty in volatilizing the organic solvent, long sintering process, oxidation of the nano metal particles due to oxygen molecules in the organic solvent, uneven pressure during the sintering process, and uneven sintering degree, the present application proposes a new process method for chip connection. The method combines the transient liquid phase sintering technology and the nano metal sintering technology to mix and grow a metal layer of high-melting-point metal and low-melting-point metal in the middle region of the DBC (Direct Bonding Copper, ceramic copper clad plate) DBC substrate, and print the nano metal solder paste on the periphery of the middle region of the DBC substrate. The transient liquid phase sintering technology mixes the low-melting-point metal and the high-melting-point metal, and heats them to a sintering temperature higher than the melting point of the low-melting-point metal and lower than the high-melting-point metal. At this time, the low-melting-point metal is liquefied and quickly diffuses to the two high-melting-point metals and fuses with the high-melting-point metals to form intermetallic compounds, thereby completing the sintering connection process. Specifically, reference can be made to Figure 1 , Figure 1 A step flow chart of a chip connection process method according to an embodiment of the present application is shown. The chip connection process method can include the following steps:

[0053] Step 101, growing first metal layer and second metal layer on the first area of the chip welding layer of the ceramic copper-clad plate DBC substrate carrying the chip layer by layer, the first metal layer and the second metal layer constitute a mixed metal layer; the mixed metal layer composed of the first metal layer and the second metal layer is a metal composition capable of transient liquid phase sintering, the first metal layer is a high melting point metal with a melting point higher than 800℃, the second metal layer is a low melting point metal with a melting point lower than 250℃, and the number of layers of the first metal layer is one more than that of the second metal layer.

[0054] As an example, the DBC substrate can be a multi-layer structure; specifically, the DBC substrate can include an upper Cu metal layer, an intermediate insulating ceramic layer and a lower Cu metal layer, the upper layer, the intermediate layer and the lower layer can form a sandwich-like structure, and the intermediate ceramic layer can be Al2O3, AlN, Si3N4, etc., and the embodiments of the present application do not limit this.

[0055] In some possible embodiments, the DBC substrate can be placed in a predetermined position first, which can be a position for chip bonding; then, the first metal layer and the second metal layer can be generated layer by layer on the first area of the chip welding layer of the DBC substrate carrying the chip; wherein the first area of the chip welding layer can be the middle area of the upper surface of the upper Cu metal layer of the DBC substrate, and the upper surface can be the surface on the other side of the second surface of the upper Cu metal layer in contact with the intermediate insulating ceramic layer, that is, the surface on the side of the upper Cu metal layer away from the intermediate insulating ceramic layer.

[0056] In some possible embodiments, the upper surface of the upper Cu metal layer of the DBC substrate can be divided into a first area and a second area in advance, the first area can be the middle area of the surface, and the second area can be the area on the periphery of the first area. The ratio of the first area and the second area can be set according to the actual situation, for example, the ratio of the first area to the sum of the first area and the second area can be in the range of 1:16~1:4, and the specific ratio must be determined according to the area of the chip itself, and the embodiments of the present application do not make specific limitations.

[0057] When bonding the chip and the DBC substrate, the first metal layer and the second metal layer can be generated layer by layer on the first area of the chip welding layer of the DBC substrate carrying the chip first; wherein the metal layer generated on the first area first is the first metal layer; then, the second metal layer can be generated on the first metal layer; then, the first metal layer is generated on the second metal layer, and so on; it should be noted that the metal layer generated last is the first metal layer, that is, the number of layers of the first metal layer is one more than that of the second metal layer.

[0058] In the embodiment of the present application, the first metal layer and the second metal layer are grown staggeredly, and the first layer and the last layer are both the first metal layer; the total thickness of the mixed metal layer finally obtained by the staggered growth of the first metal layer and the second metal layer can be in the range of 30-100 μm.

[0059] In some feasible embodiments, the metal in the first metal layer can be a high-melting-point metal with a melting point higher than 800 ℃, and the metal in the second metal layer can be a low-melting-point metal with a melting point lower than 250 ℃; for example, the high-melting-point metal can be any one of gold, copper, nickel, silver and the like, and the low-melting-point metal can be any one of tin and indium and the like, and the embodiment of the present application does not make specific limitation on the metals of the first metal layer and the second metal layer.

[0060] In some feasible embodiments, the mixed metal layer composed of the first metal layer and the second metal layer can be a metal composition capable of transient liquid phase sintering; the mixed metal layer composed of the first metal layer and the second metal layer can be sintered by transient liquid phase sintering, thereby obtaining an intermetallic compound.

[0061] In step 102, nano metal solder paste is printed on the second region of the chip soldering layer of the DBC substrate, and the printing thickness of the nano metal solder paste is the same as the total thickness of the mixed metal layer of the first region; the second region is located at the periphery of the first region, and the nano metal solder paste layer and the mixed metal layer constitute a connecting layer.

[0062] In the embodiment of the present application, after the first metal layer and the second metal layer are grown layer by layer on the first region of the chip soldering layer of the DBC substrate carrying the chip, nano metal solder paste can be printed on the second region of the chip soldering layer of the DBC substrate carrying the chip, and the second region is located at the periphery of the first region.

[0063] In some feasible embodiments, the printing thickness of the nano metal solder paste printed on the second region can be the same as the total thickness of the mixed metal layer composed of the first metal layer and the second metal layer grown layer by layer on the first region.

[0064] For example, the nano metal solder paste layer and the mixed metal layer on the chip soldering layer of the DBC substrate can constitute a connecting layer.

[0065] In step 103, the chip is covered on the connecting layer to obtain an assembly to be sintered, and the connecting layer is located between the chip and the DBC substrate.

[0066] In some feasible embodiments, after the first metal layer and the second metal layer are grown layer by layer on the first region of the chip soldering layer of the DBC substrate carrying the chip, and the nano metal solder paste is printed on the second region of the chip soldering layer of the DBC substrate carrying the chip, the chip can be covered on the chip soldering layer of the DBC substrate.

[0067] Specifically, the chip can be covered on the connecting layer composed of the nano-metallic solder paste layer and the mixed metal layer; and the connecting layer composed of the nano-metallic solder paste layer and the mixed metal layer can be located between the chip and the chip bonding layer of the DBC substrate.

[0068] Specifically, after the chip is covered on the connecting layer, the sintering assembly composed of the chip, the DBC substrate and the connecting layer can be obtained.

[0069] In step 104, a pre-sintering stage, the sintering assembly is pre-sintered at a pre-sintering temperature, and the pre-sintering temperature is lower than the melting point of the second metal, and the pre-sintering temperature ranges from 130 to 180 °C.

[0070] After step 103 is performed, the sintering assembly can be placed in a sintering unit.

[0071] In some possible embodiments, the sintering unit can sinter the sintering assembly; specifically, the sintering unit can pre-sinter the sintering assembly.

[0072] Specifically, in the pre-sintering stage, the sintering unit can pre-sinter the sintering assembly at a pre-sintering temperature; the pre-sintering temperature is lower than the melting point of the metal in the second metal layer, and the pre-sintering temperature is higher than the boiling point of the organic solvent in the nano-metallic solder paste.

[0073] For example, the pre-sintering temperature ranges from 130 to 180 °C.

[0074] In step 105, a sintering stage, the sintering assembly pre-sintered is sintered at a sintering temperature higher than the melting point of the second metal layer, and the sintering temperature ranges from 200 to 280 °C.

[0075] After the sintering assembly is pre-sintered, the sintering unit can sinter the sintering assembly pre-sintered; specifically, in the sintering stage, the sintering unit can re-sinter the sintering assembly pre-sintered at a sintering temperature; the sintering temperature is higher than the pre-sintering temperature, and the sintering temperature is lower than the melting point of the metal in the first metal layer and higher than the melting point of the metal in the second metal layer, and the specific values of the pre-sintering temperature and the sintering temperature are not limited in the embodiments of the present application.

[0076] In some possible embodiments, in the pre-sintering process, the organic solvent in the nano-metallic solder paste evaporates and initially forms the nano-metallic layer without fluidity, and the reducing gas sufficiently contacts the nano-metallic particles, because the multi-layer metal layer in the first region supports the upper chip.

[0077] When the temperature is increased from the pre-sintering temperature to the sintering temperature, the low melting point metal layer (i.e. the metal in the second metal layer) in the first region reacts with the high melting point metal (i.e. the metal in the first metal layer) to form a dense intermetallic compound. The nano metal in the second region can be sintered at a temperature much lower than the melting point of the bulk metal due to the nano-size effect.

[0078] The sintering process of the nano metal begins with the diffusion and migration of the metal elements to form sintering necks, then the sintering necks grow to form grain boundaries, and finally the grains grow. The diffusion and migration of the nano metal particles depend on the driving energy between two nano metal particles in contact with each other. The driving energy increases as the particle size of the metal particles decreases, and the driving energy also increases when external energy is applied. This allows the nano metal particles to be sintered at a temperature much lower than the melting point of the bulk metal to form a porous connection.

[0079] During the pre-sintering stage, the mixed metal layer grown in the first region can support the pre-sintering process, so that the organic solvent in the nano metal paste in the second region is fully evaporated and the diffusion process is accelerated.

[0080] During the sintering stage, the low melting point metal in the second metal layer begins to melt and fully reacts with the high melting point metal in the first metal layer. During this process, the organic solvent is fully evaporated, and the nano metal layer in the second region has no flowability and is uniformly pressed, thereby ensuring the uniformity of the density of the connection layer. Since the nano metal particles are located in the second region, it is beneficial for the multi-size and multi-type nano metal powder to fully contact with the reducing gas, so that the nano metal particles are more active and sintering connection at a lower temperature is achieved.

[0081] For example, the sintering temperature can be in the range of 200-280°C.

[0082] In the embodiment of the present application, the first metal layer and the second metal layer are grown layer by layer on the first area of the chip soldering layer of the DBC substrate carrying the chip, the first metal layer and the second metal layer constitute a mixed metal layer; the first metal layer and the second metal layer are metals capable of transient liquid phase sintering, the first metal layer is a high-melting-point metal with a melting point higher than 800 DEG C, the second metal layer is a low-melting-point metal with a melting point lower than 250 DEG C, and the number of layers of the first metal layer is one more than that of the second metal layer; the nano metal solder paste is printed on the second area of the chip soldering layer of the DBC substrate, and the printing thickness of the nano metal solder paste is the same as the total thickness of the mixed metal layer of the first area; the second area is located at the periphery of the first area, and the nano metal solder paste layer and the mixed metal layer jointly constitute a connecting layer; the chip is covered on the connecting layer to obtain a component to be sintered, and the connecting layer is located between the chip and the DBC substrate; in the pre-sintering stage, the component to be sintered is pre-sintered by using a pre-sintering temperature, the pre-sintering temperature is lower than the melting point of the second metal, and the pre-sintering temperature ranges from 130 DEG C to 180 DEG C; in the sintering stage, the component to be sintered after pre-sintering is sintered by using a sintering temperature higher than the melting point of the second metal layer, and the sintering temperature ranges from 200 DEG C to 280 DEG C. Through the embodiment of the present application, combined with the transient liquid phase sintering technology and the nano metal sintering technology, the evaporation and diffusion of the organic solvent in the nano metal solder paste can be accelerated, so that the reducing gas and the metal particles can fully contact; after the organic solvent volatilizes, the nano metal layer in the second area does not have fluidity, so that the pressure is more uniform, thereby improving the nano metal sintering quality. In addition, the chip and the DBC substrate are sintered and connected at a lower temperature.

[0083] Referring to Figure 2 , a step flow chart of another process method for chip connection according to the embodiment of the present application is shown, which can include the following steps:

[0084] Step 201, growing a first layer of first metal layer on the first area of the chip soldering layer of the DBC substrate.

[0085] In some feasible embodiments, the DBC substrate can be placed in a predetermined position first, and the predetermined position can be a position for performing chip connection; then, the first metal layer and the second metal layer can be generated layer by layer on the first area of the chip soldering layer of the DBC substrate carrying the chip.

[0086] In some feasible embodiments, the upper surface of the upper Cu metal layer of the DBC substrate can be divided into a first area and a second area in advance; when the chip and the DBC substrate are connected, the first layer of first metal layer can be generated on the first area of the chip soldering layer of the DBC substrate carrying the chip first.

[0087] Step 202, growing a second layer of second metal layer on the first layer of first metal layer.

[0088] In some possible embodiments, after the first layer of the first metal layer is generated on the first region of the die-bonding layer of the DBC substrate, a second layer of the second metal layer can be generated on the first layer of the first metal layer.

[0089] Step 203, growing a third layer of the first metal layer on the second layer of the second metal layer.

[0090] In some possible embodiments, after the second layer of the second metal layer is generated on the first region of the die-bonding layer of the DBC substrate, a third layer of the first metal layer can be generated on the second layer of the second metal layer.

[0091] Step 204, generating a fourth layer of the second metal layer on the third layer of the first metal layer.

[0092] In some possible embodiments, after the third layer of the first metal layer is generated on the first region of the die-bonding layer of the DBC substrate, a fourth layer of the second metal layer can be generated on the third layer of the first metal layer.

[0093] Step 205, generating a fifth layer of the first metal layer on the fourth layer of the second metal layer.

[0094] In some possible embodiments, after the fourth layer of the second metal layer is generated on the first region of the die-bonding layer of the DBC substrate, a fifth layer of the first metal layer can be generated on the fourth layer of the second metal layer.

[0095] In the embodiments of the present application, a sixth layer of the second metal layer can be generated on the fifth layer of the first metal layer, and a seventh layer of the first metal layer can be generated on the sixth layer of the second metal layer, and so on; it should be noted that the metal layer generated in the last layer needs to be the first metal layer.

[0096] In an embodiment of the present application, the steps of generating the first metal layer or the second metal layer in the steps 201-205 can be realized by any one of the following methods: pulse laser deposition method, magnetron sputtering coating method, and chemical deposition method.

[0097] In an embodiment of the present application, the steps of generating the first metal layer or the second metal layer in the steps 201-205 can be performed in any one of the following deposition atmospheres:

[0098] inert gas;

[0099] a mixture of inert gas and reducing gas.

[0100] In some possible embodiments, the inert gas can be argon, and the reducing gas can be hydrogen.

[0101] The deposition pressure of the deposition atmosphere can be in the range of 500-2000 Pa.

[0102] In an embodiment of the present application, the thickness of the first metal layer is in the range of 1-10 μm, the thickness of the second metal layer is in the range of 1-10 μm, and the thickness of the mixed metal layer is in the range of 30-100 μm.

[0103] In some possible embodiments, the thickness of the first metal layer generated on the first region can be in the range of 1-10 μm, the thickness of the second metal layer generated on the first region can be in the range of 1-10 μm, and the thickness of the mixed metal layer composed of the plurality of first metal layers and the plurality of second metal layers can be in the range of 30-100 μm.

[0104] For example, the two metal layers grown in a staggered manner can have 5-11 layers in total, the last layer being the first metal layer, i.e., the metal layer of the high-melting-point metal, and the total thickness of the plurality of metal layers is controlled to be in the range of 30-100 μm.

[0105] In an embodiment of the present application, the metal in the first metal layer is in the form of nanoparticles, and the size of the metal in the first metal layer is in the range of 1-1000 nm; the metal in the second metal layer is in the form of nanoparticles, and the size of the metal in the second metal layer is in the range of 1-1000 nm.

[0106] In some possible embodiments, the metal in the first metal layer can be in the form of nanoparticles, and the size of the metal in the first metal layer in the form of nanoparticles can be in the range of 1-1000 nm.

[0107] In an embodiment of the present application, the metal in the second metal layer can also be in the form of nanoparticles, and the size of the metal in the second metal layer in the form of nanoparticles can also be in the range of 1-1000 nm.

[0108] Step 206: printing a nano-metal solder paste on the second region of the chip soldering layer of the DBC substrate.

[0109] After the first metal layer and the second metal layer are grown layer by layer on the first region of the chip soldering layer of the DBC substrate carrying the chip, a nano-metal solder paste can be printed on the second region of the chip soldering layer of the DBC substrate carrying the chip.

[0110] In some possible embodiments, the thickness of the nano-metal solder paste printed on the second region can be consistent with the thickness of the mixed metal layer.

[0111] Step 207: covering the chip on the connecting layer to obtain an assembly to be sintered.

[0112] In some possible embodiments, the first metal layer and the second metal layer are generated layer by layer in the first region of the chip solder layer of the DBC substrate carrying the chip, and after the nano-metal solder paste is printed on the second region of the chip solder layer of the DBC substrate carrying the chip, the chip can be covered on the chip solder layer of the DBC substrate.

[0113] Specifically, the chip can be covered on the connecting layer composed of the nano-metal solder paste layer and the mixed metal layer; for example, the connecting layer composed of the nano-metal solder paste layer and the mixed metal layer can be located between the chip and the chip solder layer of the DBC substrate.

[0114] For example, after the chip is covered on the connecting layer, the assembly to be sintered composed of the chip, the DBC substrate, and the connecting layer can be obtained.

[0115] Step 208, a pre-sintering stage, in which the assembly to be sintered is pre-sintered by using a pre-sintering temperature.

[0116] In some possible embodiments, the sintering unit can sinter the assembly to be sintered; specifically, the sintering unit can pre-sinter the assembly to be sintered.

[0117] For example, in the pre-sintering stage, the sintering unit can pre-sinter the assembly to be sintered by using a pre-sintering temperature; the pre-sintering temperature is lower than the melting point of the metal in the second metal layer and is higher than the boiling point of the organic solvent in the nano-metal solder paste.

[0118] For example, the pre-sintering temperature can be 160°C, and the pre-sintering time can last for 15 minutes, which is not limited in the embodiments of the present application.

[0119] Step 209, a sintering stage, in which the assembly to be sintered after the pre-sintering is sintered by using a sintering temperature higher than the melting point of the second metal layer.

[0120] After the assembly to be sintered is pre-sintered, the sintering unit can sinter the assembly to be sintered after the pre-sintering; for example, in the sintering stage, the sintering unit can re-sinter the assembly to be sintered after the pre-sintering by using a sintering temperature; the sintering temperature is higher than the pre-sintering temperature, and the sintering temperature is lower than the melting point of the metal in the first metal layer and is higher than the melting point of the metal in the second metal layer.

[0121] In some possible embodiments, in the pre-sintering process, the organic solvent in the nano-metal solder paste evaporates and initially forms a nano-metal layer without fluidity, and the reducing gas sufficiently contacts the nano-metal particles, because the multi-layer metal layer in the first region supports the upper chip.

[0122] When the temperature is increased from the pre-sintering temperature to the sintering temperature, the re-sintering process can be carried out. In the re-sintering process, the low-melting-point metal layer (i.e. the metal in the second metal layer) in the first region reacts with the high-melting-point metal (i.e. the metal in the first metal layer) to form a dense intermetallic compound, and the nano metal in the second region can be sintered and connected at a temperature much lower than the melting point of the bulk metal due to the nano-size effect.

[0123] In the pre-sintering stage, the mixed metal layer grown in the first region can play a supporting role in the pre-sintering process, so that the organic solvent in the nano metal paste in the second region is fully evaporated and the diffusion process is accelerated.

[0124] In the sintering stage, the low-melting-point metal in the second metal layer begins to melt and fully reacts with the high-melting-point metal in the first metal layer. In this process, the organic solvent is fully evaporated, and the nano metal layer in the second region has no flowability and is uniformly pressed, thereby ensuring the uniformity of the density of the connecting layer. Since the nano metal particles are located in the second region, this facilitates the full contact of the nano metal particles with the reducing gas, so that the nano metal particles are more active and sintering and connection at a lower temperature is achieved.

[0125] In an embodiment of the present application, the pre-sintering stage and the sintering stage are carried out in a sintering atmosphere, and the sintering atmosphere is a mixture of inert gas and reducing gas.

[0126] In some feasible embodiments, the pre-sintering stage and the sintering stage can be carried out in a sintering atmosphere. The sintering atmosphere can be a mixture of inert gas and reducing gas. The inert gas can be argon, and the reducing gas can be hydrogen.

[0127] For example, the ratio of argon to hydrogen can be 95:5, 85:15, or 7:3, and the embodiments of the present application do not limit this.

[0128] In an embodiment of the present application, the pre-sintering stage and the sintering stage are carried out under an auxiliary pressure, and the auxiliary pressure ranges from 0 to 10 MPa.

[0129] In some feasible embodiments, the pre-sintering stage and the sintering stage can be carried out in an environment with a pressure ranging from 0 to 10 MPa.

[0130] In the embodiment of the present application, the first metal layer of the first layer is generated on the first area of the chip solder layer of the DBC substrate; the second metal layer of the second layer is grown on the first metal layer of the first layer; the first metal layer of the third layer is grown on the second metal layer of the second layer; the second metal layer of the fourth layer is generated on the first metal layer of the third layer; the first metal layer of the fifth layer is generated on the second metal layer of the fourth layer; the nano metal solder paste is printed on the second area of the chip solder layer of the DBC substrate; the chip is covered on the connecting layer to obtain the assembly to be sintered; the assembly to be sintered after pre-sintering is pre-sintered by using a pre-sintering temperature; and the assembly to be sintered after pre-sintering is sintered by using a sintering temperature higher than the melting point of the second metal layer. Through the embodiment of the present application, the evaporation and diffusion of the organic solvent in the nano metal solder paste can be accelerated, so that the reducing gas and the metal particles are in full contact; after the organic solvent volatilizes, the nano metal layer in the second area does not have fluidity, so that the pressure is more uniform, thereby improving the sintering quality of the nano metal. In addition, the sintering connection of the chip and the DBC substrate at a lower temperature is also realized.

[0131] Hereinafter, the process method of the chip connection is described through a specific example:

[0132] 1. The chip solder layer of the DBC substrate is processed by using sandpaper or a polishing machine, so that the chip solder layer of the DBC substrate has a certain roughness, the sandpaper has a mesh number of 400-3000 meshes, the DBC substrate after the processing is cleaned by using anhydrous ethanol containing about 5% formic acid, and then the DBC substrate is placed in a vacuum drying box for drying.

[0133] 2. The first area and the second area are demarcated on the chip solder layer of the processed DBC substrate, the first area is the middle area of the DBC substrate, the second area is the peripheral area of the connecting area, the area ratio of the first area to the total connecting area is 1:16-1:4, and the total area of the first area and the second area is equal to the area of the large-area chip to be connected.

[0134] 3. The first metal layer is grown on the first area of the chip solder layer of the DBC substrate, and the specific method can be to grow a layer of high-melting-point metal copper in the first area by using a pulse laser deposition method or other methods, the copper in the metal copper layer is in the form of nano particles, the size is controlled to be 1-1000 nm, and the thickness of the first layer of the metal copper layer is 1-10 μm. The specific conditions of the pulse laser deposition method are that the deposition atmosphere is argon, a small amount of hydrogen is introduced, and the deposition gas pressure is 500-2000 Pa.

[0135] 4. Then, continue to grow a second low-melting-point metal tin on the copper layer by using the pulse laser deposition method or other methods. The second metal can also be other low-melting-point metals such as indium; the thickness of the second metal layer is 1-5 μm, and the indium in the metal indium layer is also in the form of nanoparticles with a size controlled to be 1-1000 nm.

[0136] 5. Then, continue to grow a first metal layer on the surface of the second nanometal layer by using the pulse laser deposition method or other methods, with a thickness of 1-10 μm. In this way, 5-11 layers of two metals are staggered and grown, and the last layer is the first metal, i.e., the high-melting-point metal. The total thickness of the nanometal layer is controlled to be 30-100 μm.

[0137] 6. Then, print a nanocopper solder paste on the second area of the chip soldering layer of the DBC substrate mixedly grown with the low-melting-point metal and the high-melting-point metal. The printed thickness of the solder paste is consistent with the total thickness of the high-melting-point metal and the low-melting-point metal in the first area.

[0138] 7. Apply a certain pressure and sinter in an atmosphere containing a reducing gas. The applied pressure is 0-10 MPa, the sintering atmosphere is a mixed gas of a reducing gas and an inert gas, specifically 95% Ar and 5% H2, the pre-sintering temperature is 150°C, the sintering temperature is 260°C, the pre-sintering time is 10 minutes, and the sintering time is 20 minutes.

[0139] In another specific example:

[0140] 1. Use sandpaper or a polishing machine to process the chip soldering layer of the DBC substrate so that the chip soldering layer of the DBC substrate has a certain roughness. The sandpaper grit is 400-3000 grit. Then, clean the processed DBC substrate with anhydrous ethanol containing about 5% formic acid. Then, dry the DBC substrate in a vacuum drying box for use.

[0141] 2. Define a first area and a second area on the chip soldering layer of the processed DBC substrate. The first area is the middle area of the DBC substrate, and the second area is the peripheral area of the connecting area. The area ratio of the first area to the total connecting area is 1:16-1:4, and the total area of the first area and the second area is equal to the area of the large-area chip to be connected.

[0142] 3. Grow a first metal layer on the first area of the chip soldering layer of the DBC substrate. The specific method can be to grow a layer of high-melting-point metal nickel on the first area by using the pulse laser deposition method or other methods. The nickel in the metal nickel layer is in the form of nanoparticles with a size controlled to be 1-1000 nm, and the thickness of the first metal nickel layer is 1-10 μm. The specific conditions of the pulse laser deposition method are as follows: the deposition atmosphere is argon with a small amount of hydrogen, and the deposition gas pressure is 500-2000 Pa.

[0143] 4. Then, continue to grow the second low-melting-point metal indium on the metal nickel layer by the pulse laser deposition method or other methods; the thickness of the second metal layer is 1-5 μm, and the indium in the metal indium layer is also in the form of nanoparticles, and the size is also controlled to be 1-1000 nm.

[0144] 5. Then, continue to grow the first metal layer on the surface of the second nanometal layer by the pulse laser deposition method or other methods, and the thickness is 1-10 μm, and so on, grow 5-11 layers of two kinds of metal layers alternately, and the last layer is the first metal, i.e., the high-melting-point metal, and the total thickness of the nanometal layers is controlled to be 30-100 μm.

[0145] 6. Then, print the nanosilver solder paste on the second area of the chip soldering layer of the DBC substrate mixedly grown with the low-melting-point metal and the high-melting-point metal, and the printing thickness of the solder paste is consistent with the total thickness of the high-melting-point metal layer and the low-melting-point metal layer of the first area.

[0146] 7. Apply a certain pressure and sinter in an atmosphere containing a reducing gas, wherein the applied pressure is 0-10 MPa, the sintering atmosphere is a mixed gas of a reducing gas and an inert gas, specifically 95% Ar and 5% H2, the pre-sintering temperature is 150°C, the sintering temperature is 260°C, the pre-sintering time is 10 minutes, and the sintering time is 20 minutes.

[0147] As shown in Figure 3 ,

[0148] (1) The chip soldering layer of the DBC substrate, i.e., the first surface of the upper Cu layer 301 of the DBC substrate, can be divided into a first area 304 and a second area 305;

[0149] (2) In the first area 304, the first metal layer 306 and the second metal layer 307 can be generated layer by layer, and the last layer is the first metal layer 306;

[0150] (3) After the generation of the multiple metal layers, the nanometal solder paste 308 can be printed in the second area 305;

[0151] (4) Place the chip 309;

[0152] (5) For the assembly to be sintered obtained in (4), pre-sintering can be performed at an auxiliary pressure and a pre-sintering temperature first, and then re-sintering can be performed at an auxiliary pressure and a sintering temperature;

[0153] (6) The chip 309 and the DBC substrate sintered together are obtained; wherein the chip 309 and the chip soldering layer of the DBC substrate are connected through the connection layer 310 after sintering.

[0154] As shown in Figure 4As shown, (5) can be sintered at a pre-sintering temperature and a sintering temperature; wherein, at the pre-sintering temperature for a pre-sintering time, at the sintering temperature for a sintering time; after sintering, natural cooling can be carried out. Figure 4 As shown, (5) can be sintered at a pre-sintering temperature and a sintering temperature; wherein, at the pre-sintering temperature for a pre-sintering time, at the sintering temperature for a sintering time; after sintering, natural cooling can be carried out.

[0155] It should be noted that for the method embodiments, in order to simply describe, they are all described as a series of action combinations, but those skilled in the art should know that the embodiments of the present application are not limited to the order of the actions described, because according to the embodiments of the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present application.

[0156] The embodiments of the present application also provide a chip module, which comprises a chip and a DBC, and the chip and the DBC are sintered by the process method as described above to obtain the chip module.

[0157] For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the related parts are described in the part of the method embodiments.

[0158] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same and similar parts between the embodiments can be referred to each other.

[0159] Those skilled in the art should understand that the embodiments of the present application can be provided as a process method, a structure, a device, or a computer program product. Therefore, the embodiments of the present application can be in the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present application can be in the form of a computer program product implemented on one or more computer usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

[0160] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams according to the method, terminal device (system), and computer program product of the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device produce a machine that implements the functions described in the flowcharts and / or block diagrams. Figure 1 Each flow or multiple flows and / or blocks Figure 1means for performing the function specified by that block or blocks.

[0161] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the flow Figure 1 one or more flowcharts and / or blocks Figure 1 means for performing the function specified by that block or blocks.

[0162] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the flow Figure 1 one or more flowcharts and / or blocks Figure 1 means for performing the function specified by that block or blocks.

[0163] While preferred embodiments of the application have been described, modifications and variations can be apparent to those skilled in the art once aware of the general underlying concepts. Accordingly, the appended claims are intended to encompass within their scope all adaptations or variations of preferred embodiments of the application. It will be apparent, however, that aspects of the application can be practiced without

[0164] Finally, it should be noted that the terms "first", "second", and the like, herein do not denote any order, quantity, combination or arrangement, but are used to identify one entity from another, and do not imply that a prerequisite relationship exists between the identified entities. Also, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0165] The chip connection process and the chip module are described in detail above, and the principles and implementation manners of the present application are described by using specific examples. The above description of the embodiments is only used to help understand the method of the present application and its core idea. Meanwhile, for those skilled in the art, the specific implementation manners and application ranges can be changed according to the idea of the present application. In summary, the content of the description should not be understood as a limitation of the present application.

Claims

1. A process for die bonding, characterized by, The method comprises: layer-by-layer growth of a first metal layer and a second metal layer on a first area of a chip solder layer of a ceramic copper-clad plate DBC substrate carrying the chip, the first metal layer and the second metal layer forming a mixed metal layer; the mixed metal layer formed by the first metal layer and the second metal layer is a metal composition capable of transient liquid phase sintering, the first metal layer is a high-melting-point metal with a melting point higher than 800 ℃, and the second metal layer is a low-melting-point metal with a melting point lower than 250 ℃, the number of layers of the first metal layer being one more than that of the second metal layer; printing of a nano-metal solder paste on a second area of the chip solder layer of the DBC substrate, the printing thickness of the nano-metal solder paste being the same as the total thickness of the mixed metal layer of the first area; the second area is located at the periphery of the first area, and the nano-metal solder paste layer and the mixed metal layer together form a connecting layer; covering the chip on the connecting layer to obtain a to-be-sintered assembly, the connecting layer being located between the chip and the DBC substrate; in a pre-sintering stage, pre-sintering the to-be-sintered assembly by using a pre-sintering temperature, the pre-sintering temperature being lower than the melting point of the second metal, and the pre-sintering temperature being in the range of 130-180 ℃; in a sintering stage, sintering the to-be-sintered assembly after pre-sintering by using a sintering temperature higher than the melting point of the second metal layer, and the sintering temperature being in the range of 200-280 ℃.

2. The process method according to claim 1, wherein the high-melting-point metal is any one of gold, copper, nickel, and silver metal materials; the low-melting-point metal is any one of tin and indium metal materials.

3. The process of claim 1, wherein, The layer-by-layer growth of the first metal layer and the second metal layer on the first area of the chip solder layer of the ceramic copper-clad plate DBC substrate carrying the chip comprises: growth of the first layer of the first metal layer on the first area of the chip solder layer of the DBC substrate; growth of the second layer of the second metal layer on the first layer of the first metal layer; growth of the third layer of the first metal layer on the second layer of the second metal layer; generation of the fourth layer of the second metal layer on the third layer of the first metal layer; generation of the fifth layer of the first metal layer on the fourth layer of the second metal layer.

4. The process of claim 3, wherein, The method for generating the first metal layer or the second metal layer comprises any one of the following: pulsed laser deposition method, magnetron sputtering method, and chemical deposition method.

5. The process of claim 4, wherein, The step of generating the first metal layer or the second metal layer is performed in any one of the following deposition atmospheres: inert gas; mixed gas of inert gas and reducing gas.

6. The process method according to claim 1, wherein the thickness of the first metal layer is in the range of 1-10 μm; the thickness of the second metal layer is in the range of 1-10 μm; the thickness of the mixed metal layer is in the range of 30-100 μm.

7. The process method according to claim 1, wherein the pre-sintering stage and the sintering stage are performed in a sintering atmosphere, and the sintering atmosphere is a mixed gas of inert gas and reducing gas.

8. The process method according to claim 1, wherein The metal in the first metal layer is in nanoparticle form, and the size of the metal in the first metal layer ranges from 1 nm to 1000 nm; The metal in the second metal layer is in nanoparticle form, and the size of the metal in the second metal layer ranges from 1 nm to 1000 nm.

9. The process method according to claim 1, wherein, The pre-sintering stage and the sintering stage are performed under an auxiliary pressure ranging from 0 MPa to 10 MPa.

10. A chip module, characterized by The chip module is obtained after sintering of the chip and the DBC by the process method according to any one of claims 1 to 9.

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