A dual-frequency transconductance enhancement technology, amplifier, electronic equipment and control method

Abstract

The present invention discloses a dual-frequency transconductance enhancement technology, an amplifier, an electronic device and a control method, and belongs to the field of electronic communication technology. The dual-frequency transconductance enhancement technology includes: a dual-frequency input matching network and an input differential amplifier; the dual-frequency input matching network is a multi-coil transformer, the multi-coil transformer includes at least three inductors, and any two inductors in the multi-coil transformer are magnetically coupled; the input differential amplifier includes a first side and a second side with symmetrical circuit structure, the first side includes a low-frequency input circuit and a high-frequency input circuit, and the gates and / or sources of the transistors in the low-frequency input circuit and the transistors in the high-frequency input circuit are respectively connected to different ports of the dual-frequency input matching network; the dual-frequency input matching network and the input differential amplifier are cascaded, so that the transistors in the low-frequency circuit and the transistors in the high-frequency circuit can both achieve gate-source negative feedback, thereby achieving dual-frequency transconductance enhancement. The present invention can simultaneously achieve low-frequency and high-frequency gain improvement and noise improvement.

Description

Technical Field

[0001] The present invention relates to the field of electronic communication technology, and in particular to a dual-frequency transconductance enhancement technology, an amplifier, an electronic device and a control method. Background Art

[0002] The fifth generation of mobile communication technology (5G) has the significant advantages of high data rate and low latency link, and has been a research hotspot in recent years. 3GPP defines the frequency range of 5G New Radio (NR) as FR1 (Sub-6 GHz) and FR2 (millimeter wave). At present, the spectrum resources of Sub-6G are becoming increasingly crowded. In order to meet the requirements of 5G for large bandwidth and high speed, the millimeter wave band has been officially included in the 5G mobile communication band. According to the 3GPP protocol, the 5G millimeter wave band n257 covers 26.5-29.5GHz, and the n260 band covers 37-40GHz. In order to be compatible with the communication requirements of multiple millimeter wave bands, reconfigurable dual-frequency receivers have received widespread attention.

[0003] As the first stage of the receiver, the low noise amplifier (LNA) can amplify the weak signal received by the antenna while introducing as little noise as possible. Its performance will affect the signal-to-noise ratio, sensitivity and other performance of the entire receiving link. The reconfigurable dual-frequency receiver requires the LNA to also have the ability to amplify the reconfigurable dual-frequency. Due to the high degree of freedom in the inductance design of the single-ended circuit, single-ended LNA is the most common in the current design of millimeter-wave dual-frequency LNA, and differential LNA is relatively rare. However, differential LNA has the advantages of suppressing common-mode noise and power supply noise, and being insensitive to the inductance of the bonding wire, and is very suitable for use in millimeter-wave communication systems.

[0004] In millimeter wave circuits, in order to realize reconfigurable dual-frequency LNA, the current mainstream technology is to achieve frequency switching of impedance matching through variable capacitors or variable inductors. First, the existing literature uses variable capacitors to meet the impedance matching requirements of the two frequency band matching networks, thereby realizing dual-frequency gain amplification; second, the existing literature realizes dual-frequency variable inductance by changing the coupling between the inductor and the ground. Compared with variable capacitors, variable inductors have a larger tuning range and a lower Q value, which is conducive to improving the performance of LNA such as gain and noise; third, the existing literature realizes dual-frequency reconfiguration of inductance and coupling coefficient by changing the coupling of the transformer, which further improves the Q value compared to variable inductors. However, the existing reconfigurable dual-frequency LNA still has the following disadvantages: 1) Currently, broadband LNAs usually extend the gain bandwidth, making it difficult to achieve broadband low noise. Most of the existing reconfigurable dual-frequency LNAs use broadband input matching, and the problem is that the dual-frequency noise coefficient is achieved by the broadband noise coefficient through gain notching, which is not much different from the broadband noise coefficient or even worse, and has no performance advantage compared to broadband LNA. 2) Due to the serious parasitic effects of millimeter-wave MOS tubes and large switch insertion losses, the Q values ​​of variable capacitors and variable inductors are very low, which greatly deteriorates the gain and noise factor. Summary of the invention

[0005] In order to solve at least one of the technical problems existing in the prior art to a certain extent, the object of the present invention is to provide a dual-frequency transconductance enhancement technology, an amplifier, an electronic device and a control method.

[0006] The first technical solution adopted by the present invention is:

[0007] A dual-band transconductance enhancement technology includes a dual-band input matching network and an input differential amplifier;

[0008] The dual-frequency input matching network is a multi-coil transformer, the multi-coil transformer includes at least three inductors, and any two inductors in the multi-coil transformer are magnetically coupled;

[0009] The input differential amplifier comprises a first side and a second side with symmetrical circuit structures, the first side comprises a low-frequency input circuit and a high-frequency input circuit, the gates and / or sources of transistors in the low-frequency input circuit and transistors in the high-frequency input circuit are respectively connected to different ports of the dual-frequency input matching network;

[0010] The dual-frequency input matching network and the input differential amplifier are cascaded, so that both the transistors in the low-frequency circuit and the transistors in the high-frequency circuit can achieve gate-source negative feedback, thereby achieving dual-frequency transconductance improvement.

[0011] Furthermore, the multi-coil transformer includes an inductor L g1 、Inductance Lg2 and inductor L i ;

[0012] The inductance L g1 The center tap is connected to the bias voltage V Lg1 , the inductance L g2 The center tap is connected to the bias voltage V Hg1 The inductor L i One end is used to input AC signal and the other end is grounded.

[0013] Furthermore, the transistors in the low-frequency input circuit include a low-frequency transistor M L11 , used to amplify low-frequency signals; the transistor in the high-frequency input circuit includes a high-frequency transistor M H11 , used to amplify high-frequency signals;

[0014] The low frequency transistor M L11 The gate and the high frequency transistor M H11 The source is connected to the inductor L g1 One end of the high frequency transistor M H11 Gate series compensation inductor L 11 , and then with the low frequency transistor M L11 The source is connected to the inductor L g2 One end of the low frequency transistor M L11 The drain and / or the high frequency transistor M H11 The drain serves as the output terminal of the input differential amplifier.

[0015] Furthermore, the multi-coil transformer includes an inductor L g1 、Inductance L g2 、Inductance L s1 and inductor L i ;

[0016] The inductance L g1 The center tap is connected to the bias voltage V Lg1 , the inductance L g2 The center tap is connected to the bias voltage V Hg1 , the inductance L s1 The center tap is grounded; the inductor L i One end is used to input AC signal and the other end is grounded.

[0017] Furthermore, the low-frequency transistor M L11 The gate is connected to the inductor L g1 One end of the high frequency transistor M H11 The gate and the low frequency transistor M L11 The source is connected to the inductor L g2 One end of the high frequency transistor MH11 The source is connected to the inductor L s1 One end of the low frequency transistor M L11 The drain and / or the high frequency transistor M H11 The drain serves as the output terminal of the input differential amplifier.

[0018] The second technical solution adopted by the present invention is:

[0019] A reconfigurable dual-band low noise amplifier, comprising:

[0020] The dual-frequency input matching network, the input differential amplifier, the inter-stage decoupling matching network and the output differential amplifier;

[0021] The dual-frequency input matching network and the input differential amplifier apply the dual-frequency transconductance enhancement technology as described above;

[0022] The inter-stage decoupling matching network includes a low-frequency transformer and / or a high-frequency transformer, which is connected between the input differential amplifier and the output differential amplifier to achieve matching between the two amplifiers; the low-frequency transformer and the high-frequency transformer are demagnetized.

[0023] Furthermore, the inter-stage decoupling matching network includes an inductor L d1 、Inductance L g3 、Inductance L d2 、Inductance L g4 Four inductors;

[0024] The inductance L d1 、Inductance L g3 Mutually coupled to form a low-frequency transformer T 2 The inductor L d2 、Inductance L g4 Mutually coupled to form a high-frequency transformer T 3 ;

[0025] The inductance L d1 One end of the low frequency transistor M is connected to the first side L11 Drain, center tap connected to bias voltage V ddL The inductor L d2 One end of the first side is connected to the high frequency transistor M H11 Drain, center tap connected to bias voltage V ddH ;

[0026] The inductance L g3 One end is connected to the input end of the low-frequency output circuit in the third side, and the center tap is connected to the bias voltage V Lg2 The inductor L g4One end is connected to the input end of the high frequency output circuit in the third side, and the center tap is connected to the bias voltage V Hg2 .

[0027] Furthermore, the low-frequency output circuit and the high-frequency output circuit are both of common-source and common-gate structures, and the low-frequency output circuit and the high-frequency output circuit share an output part;

[0028] The low-frequency output circuit includes a low-frequency transistor M L21 The high frequency output circuit includes a high frequency transistor M H21 , the output section includes a transistor M C11 and compensation inductor L 21 ;

[0029] The low frequency transistor M L21 The gate is connected to the inductor L g3 One end of the high frequency transistor M H21 The gate is connected to the inductor L g4 One end of the source is grounded;

[0030] The low frequency transistor M L21 and high frequency transistor M H21 The drain is connected in series with the compensation inductor L 21 Then connected to transistor M C11 Source stage; the transistor M C11 The drain serves as the output terminal of the output differential amplifier.

[0031] Furthermore, the low-frequency output circuit and the high-frequency output circuit are both common-source structures;

[0032] The low-frequency output circuit includes a low-frequency transistor M L21 The high frequency output circuit includes a high frequency transistor M H21 ;

[0033] The low frequency transistor M L21 The gate is connected to the inductor L g3 One end of the high frequency transistor M H21 The gate is connected to the inductor L g4 One end of the source is grounded;

[0034] The low frequency transistor M L21 and high frequency transistor M H21 The drain is connected as the output terminal of the output differential amplifier.

[0035] Furthermore, the low-frequency output circuit and the high-frequency output circuit are both common-source structures;

[0036] The low-frequency output circuit includes a low-frequency transistor ML21 The high frequency output circuit includes a high frequency transistor M H21 ;

[0037] The low frequency transistor M L21 The gate is connected to the inductor L g3 One end of the output differential amplifier is connected to the ground at the source, and the drain serves as the first output end of the output differential amplifier;

[0038] The high frequency transistor M H21 The gate is connected to the inductor L g4 One end of the differential amplifier has a source connected to the ground and a drain serving as the second output end of the differential amplifier.

[0039] Furthermore, the low frequency transformer T 2 In the layout, the high-frequency transformer T is realized as an ordinary single-turn transformer. 3 In the layout, the low-frequency transformer T is implemented as an 8-shaped transformer. 2 and the high frequency transformer T 3 The magnetic coupling coefficient between them is close to zero.

[0040] Furthermore, the inter-stage decoupling matching network includes an inductor L d1 、Inductance L g3 Two inductors;

[0041] The inductance L d1 、Inductance L g3 Mutually coupled to form a low-frequency transformer T 2 ;

[0042] The low frequency transistor M L11 Drain and high frequency transistor M H11 The drain is connected to the inductor L d1 One end of the inductor L d1 The center tap is connected to the bias voltage V ddL ;

[0043] The inductance L g3 One end of is connected to the input end of the low-frequency output circuit in the third side.

[0044] Furthermore, the low-frequency output circuit is a common-source common-gate structure, and the low-frequency output circuit includes a low-frequency transistor M L21 , transistor M C11 and compensation inductor L 21 ;

[0045] The low frequency transistor M L21 The gate is connected to the inductor L g3 One end of the low frequency transistor M L21 The drain is connected in series with the compensation inductor L 21Then connected to transistor M C11 Source stage; the transistor M C11 The drain serves as the output terminal of the output differential amplifier.

[0046] Furthermore, the third side further includes a feedback circuit, the feedback circuit includes a resistor R b11 and capacitor C b11 , the resistor R b11 and the capacitor C b11 series, and then connected to the low frequency transistor M L21 Gate and transistor M C11 Between drains.

[0047] Furthermore, the reconfigurable dual-band low noise amplifier also includes an output matching network, and the output matching network is connected to the output end of the output differential amplifier to achieve output matching.

[0048] Furthermore, the output matching network includes a variable capacitor C v , transistor M N11 , transistor M N12 , transistor M N and by the inductor L d3 、Inductance L d4 、Inductance L o The three-coil transformer T 4 The three-coil transformer T 4 Any two inductors in are magnetically coupled;

[0049] The transistor M N11 and transistor M N12 The drain and gate are cross-connected, the source is connected together and connected to the transistor M N The drain;

[0050] The transistor M N Gate connection bias voltage V g , source grounded;

[0051] The variable capacitor C v In parallel with the transistor M N11 and transistor M N12 The capacitance is changed by controlling the bias voltage between the drain electrodes.

[0052] The inductance L d3 The two ends of the output are connected to the two output ends of the output differential amplifier, and the center tap is connected to the bias voltage V dd The inductor L d4 With the variable capacitor C v In parallel; the inductor L oOne end of the inductor L is used as the output end of the reconfigurable dual-band low noise amplifier. o The other end is grounded.

[0053] Furthermore, the output matching network includes an inductor L d3 、Inductance L o , the inductance L d3 、Inductance L o Mutual coupling;

[0054] The inductance L d3 The two ends of the output are connected to the two output ends of the output differential amplifier, and the center tap is connected to the bias voltage V dd The inductor L o One end of the inductor L is used as the output end of the reconfigurable dual-band low noise amplifier. o The other end is grounded.

[0055] Furthermore, the output matching network includes an inductor L d3 、Inductance L d4 、Inductance L o Any two of the three inductors are magnetically coupled to form a three-coil transformer T 4 ;

[0056] The inductance L d3 The two ends of the inductor L are respectively connected to the two first output ends of the output differential amplifier. d4 The two ends of the inductor L are respectively connected to the two second output ends of the output differential amplifier; o One end of the inductor L is used as the output end of the reconfigurable dual-band low noise amplifier. o The other end is grounded.

[0057] The third technical solution adopted by the present invention is:

[0058] A control method for the reconfigurable dual-band low noise amplifier as described above comprises the following steps:

[0059] Controlling the bias voltage V Lg1 、V Lg2 、V ddL biased at a preset non-zero voltage, and controlling the bias voltage V Hg1 、V Hg2 、V ddH The bias is zero so that the reconfigurable dual-band low noise amplifier operates in a low frequency mode;

[0060] Controlling the bias voltage V Hg1 、V Hg2 、V ddH biased at a preset non-zero voltage, and controlling the bias voltage VLg1 、V Lg2 、V ddL The bias is zero so that the reconfigurable dual-band low noise amplifier works in a high frequency mode.

[0061] Furthermore, in the low frequency mode, the low frequency transistor M L11 , low frequency transistor M L12 , low frequency transistor M L21 and low frequency transistor M L22 The high frequency transistor M is turned on. H11 , high frequency transistor M H12 , high frequency transistor M H21 and high frequency transistor M H22 In high frequency mode, the high frequency transistor M H11 , high frequency transistor M H12 , high frequency transistor M H21 and high frequency transistor M H22 The low frequency transistor M is turned on. L11 , low frequency transistor M L12 , low frequency transistor M L21 and low frequency transistor M L22 In both modes, the transistor M C11 , transistor M C12 , transistor M N11 , transistor M N12 and transistor M N All are conducting.

[0062] The fourth technical solution adopted by the present invention is:

[0063] An electronic device comprises a dual-frequency transconductance enhancement technology as described above or a reconfigurable dual-frequency low-noise amplifier as described above, or is used to execute the control method as described above.

[0064] The beneficial effects of the present invention are as follows: the present invention proposes a dual-frequency transconductance enhancement technology, which multiplexes the dual-frequency input matching network of the multi-coil transformer by connecting the transistors in the low-frequency input circuit and the high-frequency input circuit to different ports of the dual-frequency input matching network respectively, and combines the transformer coplanar decoupling technology to simultaneously achieve low-frequency (such as 28G) and high-frequency (such as 39G) gain enhancement and noise improvement without occupying additional chip area. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the embodiments of the present invention or the drawings of related technical solutions in the prior art are introduced below. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0066] Figure 1 It is a principle framework diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 1 of the present invention;

[0067] Figure 2 is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 1 of the present invention;

[0068] Figure 3 is a schematic diagram of the transformer coplanar decoupling structure in Embodiment 1 of the present invention;

[0069] Figure 4 is a diagram showing the simulation results of the coupling coefficient between the inductor coils of the transformer coplanar decoupling structure in Example 1 of the present invention;

[0070] Figure 5 is a diagram of S parameter simulation results of the low frequency mode in Example 1 of the present invention;

[0071] Figure 6 is a diagram of S parameter simulation results of the high frequency mode in Example 1 of the present invention;

[0072] Figure 7 is a diagram of noise coefficient simulation results in Example 1 of the present invention;

[0073] Figure 8 This is a linearity performance: IP1dB simulation result diagram in Example 1 of the present invention;

[0074] Fig. 9 is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 2 of the present invention;

[0075] Fig.10 is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 3 of the present invention;

[0076] Fig.11 is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 4 of the present invention;

[0077] Fig.12 is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to Embodiment 5 of the present invention;

[0078] Fig.13 It is a circuit diagram of a reconfigurable dual-frequency low noise amplifier according to embodiment 6 of the present invention. DETAILED DESCRIPTION

[0079] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limitations of the present invention. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0080] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0081] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0082] In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0083] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0084] In order to solve the existing technical problems, a technical solution adopted by the present invention is: a reconfigurable dual-frequency low-noise amplifier, control method and electronic device based on dual-frequency transconductance enhancement technology, covering two millimeter-wave communication frequency bands of n257 and n260. In the input stage, two sets of independent transistors are used, and the gate-source electrodes of the two are cross-connected, and the dual-frequency input matching networks of the two are reused, so that impedance matching and transconductance enhancement can be achieved in both 28GHz and 39GHz frequency bands. In the inter-stage decoupling matching network, an 8-shaped inductor transformer and a single-turn transformer are coplanar to realize two sets of inter-stage matching networks, instead of switching the load through a switch, thereby avoiding the noise deterioration caused by the switch insertion loss, further improving the noise coefficient and frequency selectivity, and without increasing the additional chip area. In addition, in the output stage, the frequency selectivity is further improved by a variable frequency LC negative resistance trap. Combining the above technologies, the performance of the LNA in the two frequency bands, such as the noise coefficient and gain, is finally improved.

[0085] Example 1

[0086] like Figure 1 As shown, this embodiment provides a reconfigurable dual-band low noise amplifier based on dual-band transconductance enhancement technology, including:

[0087] An input stage connected to the RF input terminal, including a dual-band input matching network and an input differential amplifier;

[0088] An inter-stage decoupling matching network connected between the input stage and the output stage;

[0089] The output stage connected to the radio frequency output terminal includes an output differential amplifier and a reconfigurable output matching network.

[0090] The circuit structure and working mode of the reconfigurable dual-band low noise amplifier are explained in detail below with reference to the accompanying drawings. Explanation of reference numerals: Since the circuit structure of the amplifier mainly adopts a differential symmetrical structure, that is, it includes two circuits with the same circuit structure, and therefore includes symmetrically identical components (the connection relationship of the components is also the same), the last number in the subscript is used to distinguish such components, such as the low-frequency transistor M L11 and low frequency transistor M L12 , these two transistors are symmetrical transistors and are located on both sides of the circuit.

[0091] (1) Circuit structure description

[0092] like Figure 2 As shown, Figure 2 This is a circuit diagram of a reconfigurable dual-band low noise amplifier, and the specific circuit structure includes:

[0093] The first section is the input stage, which includes a dual-band input matching network (IMN) and an input differential amplifier.

[0094] The input signal is from the RF input terminal RF in Through the parallel parasitic capacitance C pad And the series-connected DC-isolating matching capacitor C i Then, enter IMN. In IMN, the inductor L i One end is connected to the DC-isolating matching capacitor C i Connect, the other end is grounded; inductor L g1 One end is connected to the low frequency transistor M L11 The gate is connected to the low frequency transistor M L12 The gate is connected, and the middle tap is connected to the bias voltage V Lg1 ; Inductance L g2 One end is connected to the low frequency transistor M L11 The source is connected, and the other end is connected to the low frequency transistor M L12 Source connection, center tap connected to bias voltage V Hg1 . Set the inductor L i and inductor L g1 Forming reverse coupling, the coupling coefficient is k 1 ; Inductance L i and inductor L g2 Forming reverse coupling, the coupling coefficient is k 2 ; Inductance L g1 and inductor L g2 Forming reverse coupling, the coupling coefficient is k 3 . Inductance L i 、Inductance L g1 and inductor L g2 A three-coil transformer T with transconductance enhancement is formed 1 .

[0095] After passing through IMN, the signal enters the input differential amplifier. In the input differential amplifier, the low-frequency transistor M L11 Gate and high frequency transistor M H11 The source is connected to the inductor L g1 One end of the low frequency transistor M L12 Gate and high frequency transistor M H12 The source is connected to the inductor L g1 The other end of the high frequency transistor M H11 Gate series compensation inductor L 11 After that, the low frequency transistor M L11 The source is then connected to the inductor L g2 One end of the high frequency transistor M H12 Gate series compensation inductor L 12 After that, the low frequency transistor M L12 The source is connected to the inductor L g2 The other end of transistor M L11 、ML12 、M H11 and M H12 The substrate is respectively connected in series with the resistor R b1 , R b2 , R b3 and R b4 Then ground. At low frequency transistor M L11 and M L12 The low-frequency capacitor C is connected in parallel between the drain electrodes Ld , high frequency transistor M H11 and M H12 The high-frequency capacitor C connected in parallel between the drain electrodes Hd .

[0096] The second part is the inter-stage decoupling matching network (DMN).

[0097] The signal is input to the DMN after passing through the input differential amplifier. In the DMN, the inductor L d1 One end is connected to the low frequency transistor M L11 The drain is connected to the low frequency transistor M L12 Drain connection, the middle tap is connected to the power supply V ddL ; Inductance L d2 One end is connected to the high frequency transistor M H11 The drain is connected to the high frequency transistor M H12 Drain connection, the middle tap is connected to the power supply V ddH ; Inductance L g3 One end is connected to the low frequency transistor M L21 The gate is connected to the low frequency transistor M L22 The gate is connected, and the middle tap is connected to the bias voltage V Lg2 ; Inductance L g4 One end is connected to the high frequency transistor M H21 The gate is connected, and the other end is connected to the high-frequency transistor M H22 The gate is connected, and the middle tap is connected to the bias voltage V Hg2 . Set the inductor L d1 and inductor L g3 Forming reverse coupling, the coupling coefficient is k 4 ; Inductance L d2 and inductor L g4 Forming reverse coupling, the coupling coefficient is k 5 . Inductance L d1 and inductor L g3 Transformer T 2 , inductance L d2 and inductor L g4 Forming 8-shaped transformer T 3 , transformer T 2 and transformer T 3 The coupling coefficient is close to zero.

[0098] The layout of DMN is implemented as a transformer coplanar decoupling structure, such as Figure 3 As shown, the order of interfaces is ①②③④⑤⑥⑦⑧, and the corresponding connection methods are: ①②Inductor L d1 ; ③④Inductor L d2 ; ⑤⑥Inductor L g3 ;⑦⑧Inductor L g4 . Transformer T 2 It is an ordinary single-turn transformer, transformer T 3 Two 8-shaped inductors form an 8-shaped transformer. Transformer T 2 and T 3 The input and output of the transformer are in the same direction. 2 and transformer T 3 The coplanar stacking design is carried out in the same position space, occupying the same area, that is, coplanar design. The whole constitutes a transformer coplanar decoupling structure.

[0099] The third part is the output stage, which includes an output differential amplifier and a reconfigurable output matching network (OMN).

[0100] After passing through DMN, the signal enters the output differential amplifier, which turns the low-frequency transistor M L21 and low frequency transistor M L22 The gate is connected to the inductor L g3 The two ends of the high-frequency transistor M H21 and high frequency transistor M H22 The gate is connected to the inductor L g4 The two ends of the low-frequency transistor M L21 and high frequency transistor M H21 Drain connection, then series compensation inductor L 21 Then connected to transistor M C11 Source stage; low frequency transistor M L22 and high frequency transistor M H22 Drain connection, then series compensation inductor L 22 Then connected to transistor M C12 Source stage. Transistor M C11 and transistor M C12 The drain is connected to the inductor L d3 The neutralizing capacitor C c11 In parallel with the low frequency transistor M L21 Gate and low frequency transistor M L22 Between the drain and neutralizing capacitor C c12 In parallel with the low frequency transistor M L22 Gate and low frequency transistor M L21 Between drains; neutralizing capacitor C c21 In parallel with the high frequency transistor M H21Gate and high frequency transistor M H22 Between the drain and neutralizing capacitor C c22 In parallel with the high frequency transistor M H22 Gate and high frequency transistor M H21 The cross-coupling capacitor C c31 Connected in parallel to transistor M C11 Source and transistor M C12 Between the gates, the cross-coupling capacitor C c32 Connected in parallel to transistor M C12 Source and transistor M C11 Between the gates. Resistor R b11 and capacitor C b11 In series, then in parallel with the low frequency transistor M L21 Gate and transistor M C11 Between drains; resistance R b12 and capacitor C b12 In series, then in parallel with the low frequency transistor M L22 Gate and transistor M C12 Between the drain and capacitor C d Connected in parallel to transistor M C11 and transistor M C12 The drain of transistor M C11 and transistor M C12 The gate is connected in series with a resistor R b5 and resistor R b5 Then, connect to the power supply V dd .

[0101] The signal is input to the OMN after passing through the output differential amplifier. In the OMN, the inductor L d3 One end is connected to transistor M C11 The drain is connected to the other end of the transistor M C12 Drain connection, the middle tap is connected to the power supply V dd ; Inductance L d4 One end is connected to transistor M N11 The drain is connected to the other end of the transistor M N12 Drain connection, the middle tap is connected to the power supply V dd ; Inductance L o One end passes through the output series capacitor C o Output to RF out , and the other end is grounded. d3 and inductor L o Forming reverse coupling, the coupling coefficient is k 6 ; Inductance L d3 and inductor L d4 Forming reverse coupling, the coupling coefficient is k 7 ; Inductance L d4 and inductor L oForming forward coupling, the coupling coefficient is k 8 . Inductance L o 、Inductance L d3 and inductor L d4 Construct a three-winding transformer T 4 . Transistor M N11 Gate and transistor M N12 Drain connection, transistor M N12 Gate and transistor M N11 The drain connection of transistor M N11 The drain and transistor M N12 Drain parallel variable capacitor C v . Transistor M N11 The source and transistor M N12 The sources are connected together and connected to transistor M N Drain, transistor M N The gate is connected to the bias voltage V g , the source is grounded.

[0102] (2) Circuit working principle description

[0103] A reconfigurable dual-frequency low noise amplifier based on dual-frequency transconductance enhancement technology of this embodiment is as follows:

[0104] The dual-band transconductance enhancement technology consists of a dual-band input matching network and an input differential amplifier cascade. The dual-band input matching network (IMN) consists of an inductor L i 、Inductance L g1 and inductor L g2 A three-coil transformer T with transconductance enhancement is formed 1 Through the negative feedback coupling between the gate and the source, the transconductance of the input stage differential amplifier is improved, thereby increasing the circuit gain and improving the noise figure. In order to achieve the dual-frequency transconductance improvement, the low-frequency transistor M is first L11 and M L12 The gate is connected to the high frequency transistor M H11 and M H12 Source connection, similarly, the high frequency transistor M H11 and M H12 The gate is connected through the compensation inductor L 11 and L 12 After that, the low frequency transistor M L11 and M L12 The source connection is used to reuse the IMN, thereby achieving transconductance improvement in both low-frequency (28G) and high-frequency (39G) bands while maintaining a low noise figure.

[0105] As an optional implementation, in order to reduce the noise coefficient of the dual-frequency, the present invention proposes a transformer coplanar decoupling technology. In the inter-stage decoupling matching network (DMN), the low-frequency and high-frequency inter-stage matching networks are designed separately to avoid the use of low-Q variable capacitors or variable inductors. The overall layout is as follows Figure 3 As shown, T 2 The single-turn transformer design is adopted. According to the current flow direction, the current direction of the primary coil (①②) is clockwise, and the current direction of the secondary coil (⑤⑥) is counterclockwise, forming reverse coupling. 3 The figure-8 transformer design is adopted. According to the current flow direction, the primary coil (③④) and the secondary coil (⑦⑧) have opposite and equal magnetic flux in areas a and b, and the two are reversely coupled. 2 and T 3 The transformer is designed to be coplanar, due to the 8-shaped T 3 Transformer area a and area b have opposite and equal magnetic flux, T 3 The current generated by the transformer T 2 The currents of the two transformers can cancel each other out, eliminating the mutual influence between the two transformers. The decoupling simulation results between the inductor coils ①②, ③④, ⑤⑥, and ⑦⑧ are shown in Figure 1. Figure 4 As shown in the figure, the coupling coefficients between the decoupling inductor coils are all less than 0.1, which is in a weak coupling or even no coupling state. The transformer coplanar decoupling technology realizes the separation design of the high- and low-frequency inter-stage matching network, greatly reducing the chip area and improving the low-frequency (28G) and high-frequency (39G) noise coefficients.

[0106] In addition, at the output stage, a neutralizing capacitor C c11 and C c12 , effectively canceling out the low frequency differential transistor M L21 and M L22 The parasitic capacitance C gd Similarly, the neutralizing capacitor C c21 and C c22 , offsets the high frequency differential transistor M H21 and M H22 The parasitic capacitance C gd , thereby improving the gain and stability of the differential amplifier. By connecting an inductor compensation in the output stage, the inductor L 21 and L 22 , further offsetting the transistor M L21 、M L22 、M H21 、M H22 、M C11 and M C12 The parasitic capacitance of the common-gate tube is combined with the gate-source cross-coupling capacitance C c31 and C c32, overall improve the dual-frequency gain of the output stage. Resistor R b11 , resistor R b12 , capacitor C b11 and capacitor C b12 As low-frequency RC feedback, it is used to improve the gain bandwidth at low frequencies. Finally, in order to improve the frequency selectivity, a variable frequency LC negative resistance notch filter is introduced at the reconfigurable output matching network (OMN) to cross-couple the transistor M. N11 and M N12 The negative resistance is formed, which increases the d4 and variable capacitor C v The Q value of the LC resonant cavity formed by the variable capacitor C v The capacitance value can change the frequency of the notch. For example, when working at low frequency 28G, by adjusting the variable capacitor C v The capacitance value makes the high-frequency 39G gain form a notch, reducing the interference of the 39G signal; conversely, when the high-frequency 39G is working, the low-frequency 28G gain forms a notch, reducing the interference of the 28G signal.

[0107] Based on the above reconfigurable dual-frequency low noise amplifier, this embodiment further provides a control method, which is as follows:

[0108] Inductance L g1 , L g2 , L g3 and L g4 The middle taps are connected to the bias voltage V Lg1 、V Hg1 、V Lg2 and V Hg2 ; Inductance L d1 , L d2 , L d3 and L d4 The middle taps are connected to the bias voltage V ddL 、V ddH 、V dd and V dd .

[0109] Control bias voltage V Lg1 、V Lg2 、V ddL biased at a preset non-zero voltage, and controlling the bias voltage V Hg1 、V Hg2 、V ddH The bias is zero so that the reconfigurable dual-band low noise amplifier operates in a low frequency mode;

[0110] Control bias voltage V Hg1 、V Hg2 、V ddHbiased at a preset non-zero voltage, and controlling the bias voltage V Lg1 、V Lg2 、V ddL The bias is zero so that the reconfigurable dual-band low noise amplifier works in a high frequency mode.

[0111] In low frequency mode, the low frequency transistor M L11 , low frequency transistor M L12 , low frequency transistor M L21 and low frequency transistor M L22 Turn on, high frequency transistor M H11 , high frequency transistor M H12 , high frequency transistor M H21 and high frequency transistor M H22 Shut down;

[0112] In high frequency mode, the high frequency transistor M H11 , high frequency transistor M H12 , high frequency transistor M H21 and high frequency transistor M H22 Turn on, low frequency transistor M L11 , low frequency transistor M L12 , low frequency transistor M L21 and low frequency transistor M L22 It should be noted that the bias voltage of the gate of some transistors is provided by the middle tap of the inductor, but it is not limited to this biasing method. For example, the gates of these transistors can also be biased by connecting resistors in series.

[0113] In both modes, the transistor M C11 , transistor M C12 , transistor M N11 , transistor M N12 and transistor M N All are conducting.

[0114] (3) Experimental results

[0115] The reconfigurable dual-band low noise amplifier of Example 1 of the present invention is used for wireless communication in the two frequency bands of 5G millimeter wave n257 and n260. In the low-frequency mode, the S parameter simulation results are as follows: Figure 5 As shown, 3dB gain (S 21 ) bandwidth is 26.6-31.6GHz, achieving a relative bandwidth of 17.2%, and input matching S 11 <-10dB, output matching S 22 <-5dB. Figure 7 As shown, the noise figure NF in the low frequency band is 3.16-3.9dB. Figure 8As shown in the figure, the IP1dB of the input 1dB compression point at low frequency 28GHz is -19.5dBm. The total power consumption in low frequency mode is 19mW. In high frequency mode, the S parameter simulation results are as follows Figure 6 As shown, 3dB gain (S 21 ) bandwidth is 36.2-41GHz, achieving a relative bandwidth of 12.4%, and input matching S 11 <-10dB, output matching S 22 <-7.5dB. Figure 7 As shown, the noise figure NF in the high frequency band is 3.51-3.9dB. Figure 8 As shown in the figure, the input 1dB compression point IP1dB at the high frequency of 39GHz is -19.1dBm. The total power consumption in the high frequency mode is 19mW.

[0116] Example 2

[0117] like Fig. 9 As shown, based on Example 1, the three-coil transformer T in the dual-frequency input matching network is 1 Changed to a four-coil transformer, additional inductor Ls 1 The two ends of the high-frequency transistor M H11 and M H12 The source is connected, and the high-frequency transistor M H11 The source is no longer connected to the low frequency transistor M L11 Gate connection, high frequency transistor M H12 The source is no longer connected to the low frequency transistor M L12 The four-coil transformer has a higher degree of design freedom than the three-coil transformer, but the design complexity will also increase. 1 , the dual-frequency transconductance enhancement effect similar to that of embodiment 1 can also be achieved, and the noise coefficients of the two frequency bands can be optimized more independently.

[0118] Example 3

[0119] like Fig.10 As shown, based on Example 1, the interstage decoupling matching network is changed to a two-coil transformer T 2 , that is, the low-frequency transistor M L11 The drain and high frequency transistor M H11 Drain connection, low frequency transistor M L12 The drain and high frequency transistor M H12 Drain connection, low frequency transistor M L11 and M L12 Drain parallel variable capacitor C vd . Two-coil transformer T with interstage matching 2 Inductor L d1 and inductor L g3 Coupling, the coupling coefficient is k4 In the output differential amplifier, since the two-winding transformer has only two output ports, only one pair of differential transistors M can be retained. L21 and M L22 After the above modifications, this embodiment can also have a reconfigurable dual-frequency function similar to that of the first embodiment, but due to the introduction of a variable capacitor with a low Q value, the gain and noise performance may not be as good as that of the first embodiment.

[0120] Example 4

[0121] like Fig.11 As shown, based on Example 1, the variable frequency LC negative resistance trap of the reconfigurable output matching network is replaced by a two-coil transformer T 4 Since the LNA post-stage has little influence on the noise coefficient, this embodiment can simplify the design while causing little deterioration in the performance of the circuit.

[0122] Example 5

[0123] like Fig.12 As shown, based on Example 1, the common source and common gate structure of the output differential amplifier is changed to a common source structure, and the low frequency transistor M L21 The drain and high frequency transistor M H21 Drain connection, low frequency transistor M L22 The drain and high frequency transistor M H22 The drain connection, at low frequency transistor M L21 and M L22 Parallel capacitor C d , and then connected to a reconfigurable output matching network. The effects of this embodiment and embodiment 1 are not much different.

[0124] Example 6

[0125] like Fig.13 As shown, based on Example 1, the common source and common gate structure of the output differential amplifier is changed to a common source structure, and the inductor L d3 One end is connected to the low frequency transistor M L21 The drain is connected to the low frequency transistor M L22 Drain connection, the middle tap is connected to the bias voltage V Ldd ; Inductance L d4 One end is connected to the high frequency transistor M H21 The drain is connected to the high frequency transistor M H22 Drain connection, the middle tap is connected to the bias voltage V Hdd . Set the inductor L d3 and inductor L o Forming reverse coupling, the coupling coefficient is k 6 ; Inductance L d4 and inductor L oForming reverse coupling, the coupling coefficient is k 7 ; Inductance L d3 and inductor L d4 The coupling coefficient is k 8 The whole constitutes a three-coil transformer T 4 , as a reconfigurable output matching network.

[0126] Example 7

[0127] Compared with Example 1, the reconfigurable dual-band low noise amplifier of Example 7 only includes an input stage, namely, a dual-band input matching network and an input differential amplifier of the reconfigurable dual-band low noise amplifier, wherein the output of the input differential amplifier is used as the output of the reconfigurable dual-band low noise amplifier. Alternatively, an existing matching network is added to the output end of the input differential amplifier to output the amplified signal; or another existing circuit structure is added to the output end of the input differential amplifier.

[0128] In summary, compared with the prior art, the present invention has at least the following advantages and beneficial effects:

[0129] (1) Existing reconfigurable dual-band LNAs usually use broadband input matching and then achieve dual-band through gain notching, which is actually a broadband noise coefficient and has no performance advantage over broadband LNAs. The present invention proposes a dual-band transconductance enhancement technology, which can achieve both low-frequency (28G) and high-frequency (39G) gain enhancement and noise improvement by cross-connecting the gate-source of transistors in low-frequency circuits and high-frequency circuits to reuse the dual-band input matching network of a multi-coil transformer.

[0130] (2) Existing reconfigurable dual-band LNAs usually use low-Q variable capacitors or variable inductors to achieve dual-band switching and impedance matching, resulting in deterioration of gain and noise. The present invention proposes a novel reconfigurable dual-band technology that separates the inter-stage matching networks of the low frequency (28G) and high frequency (39G) through transformer coplanar decoupling, avoiding the use of low-Q variable capacitors or variable inductors, improving the gain and noise performance of the dual frequency, while not occupying additional chip area and reducing costs.

[0131] (3) Existing reconfigurable dual-band LNAs usually do not perform notch suppression on signals in non-working frequency bands, resulting in low frequency band selectivity and serious interference between frequency bands. The present invention proposes a variable frequency LC negative resistance notch filter, which combines a variable frequency LC resonant cavity with a negative resistance cross-coupling pair to form a variable frequency notch filter, thereby improving the frequency selectivity of the dual-band amplifier and increasing the functionality of the circuit module.

[0132] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0133] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0134] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A dual-frequency transconductance boosting circuit, characterized in that: Includes a dual-band input matching network and an input differential amplifier; The dual-frequency input matching network is a multi-coil transformer, the multi-coil transformer includes at least three inductors, and any two inductors in the multi-coil transformer are magnetically coupled; The input differential amplifier comprises a first side and a second side with symmetrical circuit structures, wherein the first side comprises a low-frequency input circuit and a high-frequency input circuit; the gate and source of the transistor in the low-frequency input circuit are cross-connected with the gate and source of the transistor in the high-frequency input circuit, and then connected to the ports of at least two inductors in the multi-winding transformer, so that the gate and source of the transistor in the low-frequency input circuit and the gate and source of the transistor in the high-frequency input circuit are negatively magnetically coupled by the at least two inductors to realize gate-source negative feedback, thereby realizing dual-frequency transconductance enhancement; The drain of the transistor in the low-frequency input circuit serves as the output end of the low-frequency input circuit, and the drain of the transistor in the high-frequency input circuit serves as the output end of the high-frequency input circuit.

2. A dual-frequency transconductance boosting circuit according to claim 1, characterized in that: The multi-coil transformer includes an inductor L g1 、Inductance L g2 and inductor L i ; The inductance L g1 The center tap is connected to the bias voltage V Lg1 , the inductance L g2 The center tap is connected to the bias voltage V Hg1 The inductor L i One end is used to input AC signal and the other end is grounded.

3. A dual-frequency transconductance boosting circuit according to claim 2, characterized in that: The transistors in the low-frequency input circuit include a low-frequency transistor M L11 , used to amplify low-frequency signals; the transistor in the high-frequency input circuit includes a high-frequency transistor M H11 , used to amplify high-frequency signals; The low frequency transistor M L11 The gate and the high frequency transistor M H11 The source is connected to the inductor L g1 One end of the high frequency transistor M H11 Gate series compensation inductor L 11 , and then with the low frequency transistor M L11 The source is connected to the inductor L g2 One end of the low frequency transistor M L11 The drain and / or the high frequency transistor M H11 The drain serves as the output terminal of the input differential amplifier.

4. A reconfigurable dual-band low noise amplifier, characterized in that: include: The dual-frequency input matching network, the input differential amplifier, the inter-stage decoupling matching network and the output differential amplifier; The dual-frequency input matching network and the input differential amplifier apply the dual-frequency transconductance enhancement circuit as claimed in any one of claims 1 to 3; The inter-stage decoupling matching network includes a low-frequency transformer and / or a high-frequency transformer, which is connected between the input differential amplifier and the output differential amplifier to achieve matching between the two amplifiers; the low-frequency transformer and the high-frequency transformer are demagnetized.

5. The reconfigurable dual-band low noise amplifier according to claim 4, characterized in that: The output differential amplifier comprises a third side and a fourth side with symmetrical circuit structures, and the third side comprises a low-frequency output circuit and a high-frequency output circuit; The low-frequency output circuit and the high-frequency output circuit share an output part; The low-frequency output circuit includes a low-frequency transistor M L21 The high frequency output circuit includes a high frequency transistor M H21 , the output section includes a transistor M C11 and compensation inductor L 21 ; The low frequency transistor M L21 The gate is connected to the inductor L g3 One end of the high frequency transistor M H21 The gate is connected to the inductor L g4 One end of the source is grounded; The low frequency transistor M L21 and high frequency transistor M H21 The drain is connected in series with the compensation inductor L 21 Then connected to transistor M C11 source; the transistor M C11 The drain serves as the output terminal of the output differential amplifier.

6. The reconfigurable dual-band low noise amplifier according to claim 5, characterized in that: The inter-stage decoupling matching network includes an inductor L d1 、Inductance L g3 、Inductance L d2 、Inductance L g4 Four inductors; The inductance L d1 、Inductance L g3 coupled to each other to form a low-frequency transformer T2; the inductor L d2 、Inductance L g4 Mutual coupling, Constitute a high-frequency transformer T3; The inductance L d1 One end of the first side is connected to the low frequency transistor M L11 Drain, center tap connected to bias voltage V ddL ; The inductance L d2 One end of the first side is connected to the medium and high frequency transistor M H11 Drain, center tap connected to bias voltage V ddH The inductor L g3 One end is connected to the input end of the low-frequency output circuit in the third side, and the center tap is connected to the bias voltage V Lg2 The inductor L g4 One end is connected to the input end of the high frequency output circuit in the third side, and the center tap is connected to the bias voltage V Hg2 .

7. The reconfigurable dual-band low noise amplifier according to claim 6, characterized in that: The low-frequency transformer T2 is implemented as a common single-turn transformer in the layout, and the high-frequency transformer T3 is implemented as an 8-shaped transformer in the layout. The magnetic coupling coefficient between the low-frequency transformer T2 and the high-frequency transformer T3 is close to zero.

8. The reconfigurable dual-band low noise amplifier according to claim 4, characterized in that: The reconfigurable dual-band low noise amplifier further includes an output matching network, which is connected to the output end of the output differential amplifier to achieve output matching.

9. The reconfigurable dual-band low noise amplifier according to claim 8, characterized in that: The output matching network includes a variable capacitor C v , transistor M N11 , transistor M N12 , transistor M N and by the inductor L d3 、Inductance L d4 、Inductance L o A three-coil transformer T4 is formed; any two inductors in the three-coil transformer T4 are magnetically coupled; The transistor M N11 and transistor M N12 The drain and gate are cross-connected, the source is connected together and connected to the transistor M N The drain; The transistor M N Gate connection bias voltage V g , source grounded; The variable capacitor C v In parallel with the transistor M N11 and transistor M N12 The capacitance is changed by controlling the bias voltage between the drain electrodes. The inductance L d3 The two ends of the output are connected to the two output ends of the output differential amplifier, and the center tap is connected to the bias voltage V dd The inductor L d4 With the variable capacitor C v In parallel; the inductor L o One end of the inductor L is used as the output end of the reconfigurable dual-band low noise amplifier. o The other end is grounded.

10. A control method for the reconfigurable dual-band low noise amplifier according to claim 6, characterized in that: The following steps are involved: Controlling the bias voltage V Lg1 、V Lg2 、V ddL biased at a preset non-zero voltage, and controlling the bias voltage V Hg1 、V Hg2 、V ddH The bias is zero so that the reconfigurable dual-band low noise amplifier operates in a low frequency mode; Controlling the bias voltage V Hg1 、V Hg2 、V ddH biased at a preset non-zero voltage, and controlling the bias voltage V Lg1 、V Lg2 、V ddL The bias is zero so that the reconfigurable dual-band low noise amplifier works in a high frequency mode.

11. An electronic device, characterized in that: It comprises a dual-frequency transconductance boosting circuit as described in any one of claims 1 to 3 or a reconfigurable dual-frequency low-noise amplifier as described in any one of claims 4 to 9, or is used to execute the control method as shown in claim 10.

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