Semiconductor process chamber

Abstract

The present application discloses a semiconductor process chamber, relating to the field of semiconductor technology. The semiconductor process chamber includes a chamber body and a pedestal assembly. A deposition disk can be placed in the accommodation space of the chamber body, and the deposition disk can be switched between a first position and a second position. When the deposition disk is in the first position, the deposition disk is located above the pedestal assembly, and the pedestal assembly can support the deposition disk to perform a deposition process, generating plasma in the accommodation space that can bombard the deposition disk, so as to form a protective layer on both the inner surface of the chamber body and the surface of the pedestal assembly; when the deposition disk is in the second position, the deposition disk is offset from the pedestal assembly, and the pedestal assembly can support a wafer to perform a wafer processing process. This solution can solve the problems that during the pre-reduction process, it is easy for the number of contamination particles in the process chamber to exceed the standard, the contamination risk of the wafer is high, and the actual use time of the process chamber and the maintenance cost of the process chamber brought by opening the chamber for maintenance are relatively high.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and particularly relates to a semiconductor process chamber. Background Art

[0002] During the process of processing wafers, such as before thin film deposition, the wafers are usually pre-cleaned by the plasma of gases such as argon, ammonia, hydrogen, etc. to remove impurities such as oxides on the wafer surface. Specifically, gases such as argon, helium, or hydrogen introduced into the semiconductor process chamber are excited by radio frequency energy to form plasma, so as to perform chemical reaction treatment and physical bombardment on the wafers, thereby removing the impurities on the wafer surface.

[0003] However, in practical applications, after a long-term continuous pre-cleaning process, the problem of excessive pollution particles is likely to occur in the semiconductor process chamber. At this time, it can only be solved by opening the chamber and replacing kits, etc. This not only affects the actual use time of the process chamber, but also greatly increases the risk of contaminating wafers; moreover, the period of regular chamber opening and maintenance is short, which will greatly increase the maintenance cost of the process chamber. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide a semiconductor process chamber, which can solve the problems that excessive pollution particles are likely to occur in the process chamber during the pre-cleaning process, the pollution risk of wafers is high, and the actual use time of the process chamber and the maintenance cost of the process chamber brought by chamber opening and maintenance are relatively high.

[0005] To solve the above technical problems, this application is implemented as follows:

[0006] The embodiments of this application provide a semiconductor process chamber, including a chamber body and a base assembly. The base assembly is disposed in the accommodation space of the chamber body in a liftable manner. A deposition tray can be placed in the accommodation space, and the deposition tray can be switched between a first position and a second position in the accommodation space.

[0007] When the deposition tray is in the first position, the deposition tray is located above the base assembly, and the base assembly can support the deposition tray to perform a deposition process, so as to generate plasma in the accommodation space that can bombard the deposition tray, so as to form a protective layer on both the inner surface of the chamber body and the surface of the base assembly.

[0008] When the deposition tray is in the second position, the deposition tray is staggered from the base assembly, and the base assembly can support the wafer to perform a wafer processing process.

[0009] In the embodiment of the present application, a deposition disk is placed in the accommodation space of the chamber body. The deposition disk can be switched between a first position and a second position in the accommodation space. When the deposition disk is in the first position, the deposition disk is located above the base assembly. The base assembly can support the deposition disk to perform a deposition process, generating plasma in the accommodation space that can bombard the deposition disk, so as to form a protective layer on both the inner surface of the chamber body and the surface of the base assembly; when the deposition disk is in the second position, the deposition disk is offset from the base assembly, and the base assembly can support the wafer to perform a wafer processing process. During the wafer processing process, the protective layer can effectively prevent contamination particles on the inner surface of the chamber body and the base surface from falling, so as to reduce the contamination particles in the accommodation space of the chamber body, thereby reducing the risk of contaminating the wafer; and, it is possible to avoid frequently opening the chamber to replace the kit, thereby extending the actual service life of the process chamber and reducing the maintenance cost of the process chamber. Description of the Drawings

[0010] Figures 1 to 3 Structural schematic diagrams of the semiconductor process chamber disclosed in the embodiments of the present application in different states;

[0011] Figure 4 Structural schematic diagram of the cover ring disclosed in the embodiments of the present application;

[0012] Figure 5 Structural schematic diagram of the cover ring and the ion filter disclosed in the embodiments of the present application;

[0013] Figures 6 to 7 Structural schematic diagrams of the target in different perspectives disclosed in the embodiments of the present application;

[0014] Figures 8 to 9 Structural schematic diagrams of the ion filter in different perspectives disclosed in the embodiments of the present application.

[0015] Description of the Reference Numerals:

[0016] 100 - Chamber body, 110 - Main body part, 120 - Protruding part, 121 - Supporting part, 121a - First supporting part, 121b - Second supporting part, 130 - Dome;

[0017] 200 - Base assembly, 210 - Base, 211 - Carrying surface, 220 - Cover ring, 221 - Fitting surface, 221a - Top surface, 221b - Peripheral surface, 222 - Positioning groove, 222a - First supporting surface, 223 - Mounting groove, 223a - Second supporting surface, 223a1 - Limiting groove;

[0018] 300 - Deposition disk, 310 - Inclined surface;

[0019] 400 - Radio frequency component, 410 - Radio frequency coil, 420 - First radio frequency source, 430 - Second radio frequency source;

[0020] 500 - ion filter, 510 - limit projection, 520 - through hole;

[0021] 600 - rotating part, 610 - rotating shaft, 620 - support arm;

[0022] 700 - shielding part, 710 - upper shielding part, 720 - lower shielding part;

[0023] 800 - wafer;

[0024] 910 - first adapter, 920 - second adapter. Detailed implementation mode

[0025] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0026] The terms "first", "second", etc. in the description and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / " generally represents an "or" relationship between the associated objects before and after.

[0027] Next, in conjunction with the accompanying drawings, the semiconductor process chamber provided by the embodiments of the present application will be described in detail through specific embodiments and their application scenarios.

[0028] As Figures 1 to 9As shown in the figure, an embodiment of the present application discloses a semiconductor process chamber, which includes a chamber body 100 and a susceptor assembly 200. The susceptor assembly 200 is disposed in the accommodation space of the chamber body 100 in a liftable manner, that is, the susceptor assembly 200 can be lifted and lowered relative to the inner wall of the chamber body 100. A deposition tray 300 can be placed in the accommodation space of the chamber body 100, and the deposition tray 300 can be switched between a first position and a second position in the accommodation space. When the deposition tray 300 is in the first position, the deposition tray 300 is located above the susceptor assembly 200, and the susceptor assembly 200 can support the deposition tray 300 to perform a deposition process, generating plasma in the accommodation space that can bombard the deposition tray 300 to form a protective layer on both the inner surface of the chamber body 100 and the surface of the susceptor assembly 200; when the deposition tray 300 is in the second position, the deposition tray 300 is staggered from the susceptor assembly 200, and the susceptor assembly 200 can support a wafer 800 to perform a wafer processing process.

[0029] It should be noted that the susceptor assembly 200 further includes a thimble assembly (not shown in the drawings). When performing the deposition process, after the deposition tray 300 is switched from the second position to the first position, the thimble assembly receives the deposition tray 300, and the susceptor assembly 200 rises to carry the deposition tray 300 to the process position to perform the process; when it is necessary to perform the wafer processing process and switch the position of the deposition tray 300, the susceptor assembly 200 descends, and the deposition tray 300 is received by the thimble assembly to facilitate the deposition tray 300 to switch positions in the horizontal plane.

[0030] In the embodiment of the present application, during the wafer processing process, the protective layer can effectively prevent the contamination particles on the inner surface of the chamber body 100 and the surface of the susceptor assembly 200 from falling, so as to reduce the contamination particles in the accommodation space of the chamber body 100, thereby reducing the risk of contaminating the wafer 800; and, it is possible to avoid frequently opening the chamber to replace the kit, thereby extending the actual service life of the process chamber, and further reducing the maintenance cost of the process chamber. Therefore, the embodiment of the present application can solve the problems that the contamination particles in the process chamber are prone to exceed the standard and the maintenance cost of the process chamber is relatively high during the pre-reduction process at present.

[0031] It should be noted that when the plasma bombards the deposition tray 300, the atoms sputtered from the surface of the deposition tray 300 are deposited on the inner surface of the chamber body 100 and the surface of the susceptor assembly 200 to form a protective layer, and the material of the protective layer is the same as that of the deposition tray 300.

[0032] Optionally, when performing the wafer processing process, process gases such as Ar and N2 can be introduced into the accommodation space of the chamber body 100. Of course, other reducing process gases (such as hydrogen-containing reducing gases) can also be introduced. The embodiment of the present application does not make specific limitations on this.

[0033] Optionally, the base of the deposition disk 300 is made of metals such as stainless steel and aluminum alloy, or can be made of non-metallic materials such as ceramics, quartz, and semiconductors. The source material on the surface of the deposition disk 300 can be other source materials such as Ni, Y2O3, Al, SiO2, etc. that can firmly adhere to the inner surface of the chamber body 100 and the surface of the base assembly 200. The embodiments of the present application do not make specific limitations in this regard.

[0034] Further optionally, the source material on the surface of the deposition disk 300 can be a material with good particle performance, such as Ni, Y2O3, etc., which will not generate electromagnetic shielding and thus affect the radio frequency feeding, and is beneficial to achieving the purpose of improving the cleanliness inside the chamber body 100.

[0035] In an optional embodiment, the semiconductor process chamber further includes an ion filter 500. The ion filter 500 is provided with a plurality of through holes 520. Hydrogen radicals can reach the surface of the wafer 800 through the through holes 520 and undergo a reduction reaction with the oxide on the wafer 800, thereby achieving the purpose of pre-reducing the surface of the wafer 800. Optionally, the ion filter 500 can be made of a metal material and grounded through a potential to achieve neutralization after ion contact, thereby filtering out the ions and allowing the hydrogen radicals to pass through the through holes 520 to reach the surface of the wafer 800, thereby reducing the damage to the wafer 800. Optionally, the chamber body 100 can be grounded, and the ion filter 500 can achieve potential grounding through the chamber body 100.

[0036] Optionally, the ion filter 500 can be switched between a first position and a second position in the accommodation space of the chamber body 100. When the deposition disk 300 is in the second position and the ion filter 500 is in the first position, that is, when the deposition disk 300 is offset from the base assembly 200 and the ion filter 500 is located above the base assembly 200, the base assembly 200 can support the ion filter 500 to perform a first pre-cleaning process on the wafer 800. When the deposition disk 300 is in the second position and the ion filter 500 is in the second position, that is, when both the deposition disk 300 and the ion filter 500 are offset from the base assembly 200, the base assembly 200 can support the wafer 800 to perform a second pre-cleaning process. In this solution, the deposition process and the first pre-cleaning process can be alternated, or the deposition process and the second pre-cleaning process can be alternated. First, a protective layer is deposited on the inner surface of the chamber body 100 and the surface of the base assembly 200 by sputtering. Then, the deposition disk 300 is removed from the base assembly 200, and the wafer 800 is directly pre-cleaned, or the ion filter 500 is supported on the base assembly 200, and the ions directed at the wafer 800 are filtered out by the ion filter 500, so that hydrogen radicals are directed at the wafer 800, thereby pre-cleaning the wafer. When the deposition process is performed, the ion filter 500 is offset from the base assembly 200 to avoid affecting the RF energy applied by the base assembly 200 to the deposition disk 300. At this time, the RF energy applied by the base assembly 200 to the deposition disk 300 is relatively strong, which is beneficial to improving the bombardment efficiency of the plasma.

[0037] Of course, when the deposition process is performed, the above-mentioned ion filter 500 and deposition disk 300 can also be both supported on the base assembly 200. At this time, the deposition disk 300 can be located above the ion filter 500. When the semiconductor process chamber switches between the deposition process and the first pre-cleaning process, the ion filter 500 can always be supported on the base assembly 200, thereby reducing the operation steps. Only when the second pre-cleaning process is performed, the ion filter 500 is removed from the base assembly 200.

[0038] It should be noted that the wafer processing process described above includes the first pre-cleaning process and the second pre-cleaning process in the above embodiments.

[0039] Optionally, both the deposition disk 300 and the ion filter 500 can be located in the same accommodation cavity as the base assembly 200; alternatively, in other embodiments, the accommodation space includes a first accommodation cavity and a second accommodation cavity that are in communication with each other. The chamber body 100 includes a connected main body portion 110 and a protruding portion 120. The protruding portion 120 is connected to the side wall of the main body portion 110. The main body portion 110 has a first accommodation cavity, and the protruding portion 120 has a second accommodation cavity. The base assembly 200 is disposed in the first accommodation cavity in a liftable manner, that is, the first position is located in the first accommodation cavity, and at least one of the deposition disk 300 and the ion filter 500 is located in the second accommodation cavity, that is, the second position is located in the second accommodation cavity. Specifically, when performing a deposition process, the deposition disk 300 is supported on the base assembly 200, and the ion filter 500 can be located in the second accommodation cavity. At this time, it is possible to prevent the atoms sputtered on the surface of the deposition disk 300 from depositing on the surface of the ion filter 500, thereby reducing the aperture of the through hole 520 of the ion filter 500, which is beneficial to ensuring that the ion filter 500 has better filtering efficiency; when performing the first pre-cleaning process, the ion filter 500 is supported on the base assembly 200, and the deposition disk 300 can be located in the second accommodation cavity to prevent the plasma in the first accommodation cavity from bombarding the deposition disk 300, thereby causing contamination; when performing the second pre-cleaning process, both the deposition disk 300 and the ion filter 500 can be located in the second accommodation cavity, thereby preventing the plasma in the first accommodation cavity from bombarding the deposition disk 300, thereby causing contamination, and preventing the plasma in the first accommodation cavity from depositing on the surface of the ion filter 500.

[0040] Optionally, the deposition disk 300 and the ion filter 500 can be placed side by side on the bottom wall of the second receiving cavity. In this case, the second receiving cavity needs to be set larger. Based on this, in another alternative embodiment, at least one support portion 121 is provided on the side wall of the second receiving cavity. The support portion 121 is spaced apart from the bottom wall of the second receiving cavity. The support portion 121 is used to support the deposition disk 300 or the ion filter 500. When performing the second pre-cleaning process, the deposition disk 300 and the ion filter 500 are supported on different support portions 121. Alternatively, one of the deposition disk 300 and the ion filter 500 can be supported on the support portion 121, and the other is placed on the bottom wall of the second receiving cavity, so as to make full use of the space of the second receiving cavity in the height direction to place the deposition disk 300 and the ion filter 500, thereby greatly reducing the size of the second receiving cavity, and thus reducing the occupied space of the entire chamber body 100. When performing the deposition process, the ion filter 500 can be supported on the support portion 121 or placed on the bottom wall of the second receiving cavity. When performing the first pre-cleaning process, the deposition disk 300 can be supported on the support portion 121 or placed on the bottom wall of the second receiving cavity. It can be seen that the support portion 121 can support at least one of the deposition disk 300 and the ion filter 500, so that there is a gap between the supported deposition disk 300 and / or ion filter 500 and the bottom wall of the second receiving cavity, and this gap facilitates the picking and placing of the deposition disk 300 and the ion filter 500.

[0041] Optionally, the support portion 121 can be a semi-circular structure, so that the edge of the deposition disk 300 or the ion filter 500 is supported on the support portion 121, which is convenient for transfer members such as a manipulator to pick and place the deposition disk 300 or the ion filter 500.

[0042] In an alternative embodiment, the number of the support portions 121 is at least two. The at least two support portions 121 include a first support portion 121a and a second support portion 121b. One of the first support portion 121a and the second support portion 121b is used to support the deposition disk 300, and the other is used to support the ion filter 500. The first support portion 121a and the second support portion 121b are located in the same second receiving cavity. The first support portion 121a and the second support portion 121b are arranged at intervals along the height direction of the second receiving cavity, that is, both the first support portion 121a and the second support portion 121b are in a suspended state, so as to facilitate transfer members such as a manipulator to extend below the first support portion 121a or below the second support portion 121b to support the deposition disk 300 or the ion filter 500 and transfer it to the first receiving cavity.

[0043] In other embodiments, the number of the supporting parts 121 is at least two. The at least two supporting parts 121 include a first supporting part 121a and a second supporting part 121b. One of the first supporting part 121a and the second supporting part 121b is used to support the deposition disk 300, and the other is used to support the ion filter 500. The number of the protruding parts 120 is at least two, including a first protruding part and a second protruding part. Optionally, the first protruding part and the second protruding part are arranged at intervals along the circumferential direction of the main body part 110 to form two separate second accommodating cavities. The first supporting part 121a is arranged in the second accommodating cavity of the first protruding part, and the second supporting part 121b is arranged in the second accommodating cavity of the second protruding part, so as to place the deposition disk 300 and the ion filter 500 separately to avoid mutual interference, which is convenient for the two to move between the first accommodating cavity and the second accommodating cavity.

[0044] In another alternative embodiment, the semiconductor process chamber further includes a rotating part 600. At least a part of the rotating part 600 is rotatably arranged in the chamber body 100, and the rotating part 600 can move up and down relative to the first accommodating cavity. The deposition disk 300 or the ion filter 500 can be supported on the rotating part 600. One end of the rotating part 600 can extend below the supporting part 121 to convey the deposition disk 300 or the ion filter 500 to the first position. Optionally, the rotating part 600 can convey the deposition disk 300 or the ion filter 500 to the ejector pin assembly of the base assembly 200 to support the deposition disk 300 or the ion filter 500 on the ejector pin assembly. Then, the end of the rotating part 600 used to support the deposition disk 300 or the ion filter 500 is staggered from the base assembly 200, and then the base 210 of the base assembly 200 rises so that the deposition disk 300 or the ion filter 500 is supported on the base 210. In this solution, when the rotating part 600 conveys the deposition disk 300 or the ion filter 500, the rotating part 600 contacts the bottom surface of the deposition disk 300 or the ion filter 500, which can avoid scratching it and is beneficial to protecting the deposition disk 300 or the ion filter 500. Of course, the rotating part 600 can also convey the deposition disk 300 and the ion filter 500 by means of grasping, adsorption, etc.

[0045] Optionally, the rotating part 600 includes a rotating shaft 610 and a supporting arm 620. One end of the rotating shaft 610 is rotatably connected to the bottom wall of the chamber body 100, and the other end of the rotating shaft 610 is connected to the supporting arm 620. The supporting arm 620 is bent relative to the rotating shaft 610. The supporting arm 620 is used to support the deposition disk 300 or the ion filter 500. One end of the supporting arm 620 can extend below the supporting part 121, and the rotating shaft 610 can drive the supporting arm 620 to rotate so that the deposition disk 300 or the ion filter 500 moves between the second accommodating cavity and the first accommodating cavity.

[0046] Optionally, the protruding portion 120 and the main body portion 110 may be of a split structure. In this case, it is difficult to seal the assembly gap between the two. Therefore, in other embodiments, the protruding portion 120 and the main body portion 110 are of an integral structure. In this case, the sealing performance of the accommodation space of the entire chamber body 100 is better, which is beneficial to reducing the risk of process gas leakage and the assembly is simpler.

[0047] In another alternative embodiment, the semiconductor process chamber further includes a radio frequency component 400. The radio frequency component 400 includes a radio frequency coil 410. The radio frequency coil 410 is embedded in the chamber body 100. When the semiconductor process chamber performs the first pre-cleaning process, hydrogen (possibly doped with He) is introduced into the accommodation space, and the radio frequency coil 410 loads radio frequency energy into the accommodation space. When the semiconductor process chamber performs the second pre-cleaning process, process gases such as argon are introduced into the accommodation space, and both the radio frequency coil 410 and the base component 200 load radio frequency energy into the accommodation space to generate more plasma, thereby attracting the plasma to bombard the surface of the wafer 800, and further improving the process efficiency of the second pre-cleaning process. It can be seen that the present application can control the working states of the radio frequency coil 410 and the base component 200 according to different process requirements, thereby improving the process efficiency. At the same time, the semiconductor process chamber disclosed in the embodiments of the present application can integrate multiple wafer processing processes, so that it is not necessary to set up multiple semiconductor process chambers to perform different processing processes, which is beneficial to reducing the cost of the semiconductor process chamber.

[0048] Optionally, the radio frequency component 400 further includes a first radio frequency source 420 and a second radio frequency source 430. Both the first radio frequency source 420 and the second radio frequency source 430 are disposed outside the chamber body 100. The first radio frequency source 420 is electrically connected to the radio frequency coil 410 to ionize the process gas in the chamber body 100, thereby generating plasma. The second radio frequency source 430 is electrically connected to the base component 200 to form radio frequency energy on the bearing surface 211 of the base component 200 for bearing the wafer 800. This radio frequency energy can provide a downward acting force to make the plasma in the accommodation space shoot towards the wafer 800.

[0049] In an alternative embodiment, the base assembly 200 includes a base 210 and a cover ring 220. The base 210 has a bearing surface 211 for carrying the wafer 800. The cover ring 220 is disposed at the edge of the bearing surface 211. Optionally, when the wafer 800 is placed on the bearing surface 211, the wafer 800 is located within the accommodating space of the cover ring 220. Optionally, the deposition disk 300 can be directly supported on the side of the cover ring 220 facing away from the bearing surface 211; or, a positioning groove 222 is provided on the side of the cover ring 220 facing away from the bearing surface 211, and the bottom surface of the positioning groove 222 is a first support surface 222a. At least a part of the deposition disk 300 can be located within the positioning groove 222, so that the deposition disk 300 is supported on the first support surface 222a. The positioning groove 222 can position the deposition disk 300, preventing the deposition disk 300 from shifting relative to the cover ring 220 during the plasma bombardment of the deposition disk 300 during the deposition process, thereby improving the stability of the deposition disk 300; in addition, when at least a part of the deposition disk 300 is located within the positioning groove 222, the deposition disk 300 is closer to the base 210 and the RF energy is stronger, which is beneficial to improving the bombardment efficiency of the plasma.

[0050] Optionally, the semiconductor process chamber further includes an ion filter 500. The ion filter 500 can be switched between a first position and a second position. When the ion filter 500 is located at the first position, the ion filter 500 can be directly supported on the first support surface 222a, and at this time, the ion filter 500 is closer to the wafer 800 during the first pre-cleaning process; or, in other embodiments, an installation groove 223 is further provided on the side of the cover ring 220 facing away from the bearing surface 211, and the bottom surface of the installation groove 223 is a second support surface 223a. The second support surface 223a is higher than the first support surface 222a, that is, the distance between the second support surface 223a and the bearing surface 211 is greater than the distance between the first support surface 222a and the bearing surface 211. At least a part of the ion filter 500 can be located within the installation groove 223, so that the ion filter 500 is supported on the second support surface 223a. During the first pre-cleaning process, the distance between the ion filter 500 and the wafer 800 is relatively far. At this time, the ion filter 500 can collimate the hydrogen radicals passing through its through-hole 520, thereby improving the pre-cleaning efficiency.

[0051] The second support surface 223a may be a flat surface; alternatively, one of the second support surface 223a and the ion filter 500 is provided with a limiting groove 223a1, and the other is provided with a limiting protrusion 510. The limiting protrusion 510 is in limiting cooperation with the limiting groove 223a1, so as to limit the ion filter 500 and prevent the ion filter 500 from shifting during the first pre-cleaning process, thereby improving the stability of the ion filter 500. Optionally, both the limiting protrusion 510 and the limiting groove 223a1 are annular structures to increase the contact area between the two, thereby improving the limiting stability. In addition, the cross-sectional shape of the limiting protrusion 510 and the cross-sectional shape of the limiting groove 223a1 can both be arc-shaped, rectangular, V-shaped, etc.

[0052] Optionally, the second support surface 223a may be provided with a limiting groove 223a1, and the bottom surface of the ion filter 500 is provided with a limiting protrusion 510. At this time, it is convenient to open the through hole 520 of the ion filter 500. Of course, the size of the ion filter 500 can also be appropriately increased to open a limiting groove 223a1 at the edge of the ion filter 500.

[0053] In an alternative embodiment, the semiconductor process chamber further includes a shielding member 700. The shielding member 700 is disposed in the accommodation space of the chamber body 100. The base assembly 200 includes a base 210 and a cover ring 220. The base 210 has a bearing surface 211 for carrying the wafer 800. The cover ring 220 is disposed at the edge of the bearing surface 211. The cover ring 220 has a mating surface 221. When a deposition process or a wafer processing process is performed in the semiconductor process chamber, the mating surface 221 is in clearance fit with the shielding member 700. At this time, the dome 130 of the accommodation space of the chamber body 100, the shielding member 700, the cover ring 220, and the deposition disk 300 or the ion filter 500 enclose a process space. Process gas can be introduced into the process space through the gap between the mating surface 221 and the shielding member 700, and plasma is formed in the process space to prevent the plasma from leaking out from the side gap of the cover ring 220. When a deposition process is performed, the atoms sputtered on the surface of the deposition disk 300 can be deposited on the upper part of the inner wall of the chamber body 100, and a protective layer is only deposited on the upper part of the inner wall of the chamber body 100, avoiding the atoms sputtered on the surface of the deposition disk 300 from being deposited on the lower part of the accommodation space. Since the pollution particles in the lower part of the accommodation space are not likely to contaminate the wafer 800, this solution can greatly shorten the pre-cleaning process time; when a wafer processing process is performed, the process gas and plasma can be concentrated in the process space, thereby improving the efficiency of the wafer processing process.

[0054] Optionally, the dome 130 of the accommodation space of the chamber body 100 can be a flat surface or an arc surface. When the dome 130 of the accommodation space is an arc surface, its curvature change is small, which is beneficial to the deposition of the protective layer and has the effect of gathering the plasma, thereby improving the process efficiency.

[0055] Optionally, the shielding member 700 includes an upper shielding member 710 and a lower shielding member 720. The upper shielding member 710 is disposed on the inner wall of the chamber body 100, and the lower shielding member 720 is disposed on the base assembly 200. The base assembly 200 can drive the lower shielding member 720 to lift and lower, so as to cooperate with the upper shielding member 710.

[0056] Optionally, the semiconductor process chamber further includes a first adapter 910 and a second adapter 920. The chamber body 100 includes an upper part and a lower part. The first adapter 910 and the second adapter 920 are used to connect the upper part and the lower part of the chamber body 100, and one end of the second adapter 920 can extend towards the central region of the accommodation space of the chamber body 100 to support the upper shielding member 710.

[0057] Optionally, the mating surface 221 includes a connected top surface 221a and a peripheral surface 221b. At this time, the contact area between the shielding member 700 and the cover ring 220 is large, and the mating stability between the two is better. When the cover ring 220 is provided with the installation groove 223 described above, the top surface 221a can be higher than the second support surface 223a of the installation groove 223.

[0058] In an optional embodiment, an inclined surface 310 is provided at the edge of the deposition disk 300, and the inclined surface 310 slopes downward from the top surface of the deposition disk 300. The top surface of the deposition disk 300 here specifically refers to the surface of the deposition disk 300 facing away from the bearing surface 211 when the deposition disk 300 is supported on the base assembly 200. In this solution, when the plasma bombards the deposition disk 300, the atoms sputtered on the surface of the deposition disk 300 can be scattered in all directions. The inclined surface 310 can expand the angle of atomic diffuse scattering, so that the deposition range of the protective layer is larger.

[0059] Optionally, the width of the inclined surface 310 can be 5-10 mm. Of course, this width can be flexibly selected according to actual needs, and the embodiments of the present application do not make specific limitations in this regard. The inclined surface 310 can be provided in a partial area in the circumferential direction of the deposition disk, or can be an annular surface, and the annular surface surrounds the axis of the deposition disk 300, thereby improving the diffuse scattering effect of atoms.

[0060] Optionally, in the extending direction of the central axis of the cover ring 220, the maximum height of the inclined surface 310 can be 3 mm. Of course, this maximum height can be flexibly selected according to actual needs, and the embodiments of the present application do not make specific limitations in this regard.

[0061] Optionally, based on the semiconductor process chamber disclosed in the present application, when a deposition process is required to form a protective layer, the deposition disk 300 is supported on the base assembly 200, and the base assembly 200 rises to the process position to form a process space. Then, process gases such as Ar gas or N2 are introduced into the process space. At the same time, the base 210 and the RF coil 410 simultaneously apply RF energy to the process space, causing the process gas to ionize. Under the effect of the RF of the base 210, the deposition disk 300 is continuously bombarded, and the source material thereon is sputtered onto the dome 130 of the accommodation space of the chamber body 100, the upper shield 710, the top surface 221a of the cover ring 220, and the inner wall of the mounting groove 223 to form a protective layer. This protective layer can cover the possible sources of contamination particles in the accommodation space to reduce the generation of contamination particles.

[0062] Optionally, based on the semiconductor process chamber disclosed in the present application, when a first pre-cleaning process is performed, the ion filter 500 is placed on the cover ring 220, and the base 210 rises to the process position to form a process space. Then, process gases such as hydrogen gas (possibly doped with He) are introduced into the process space. It is possible to have only the RF coil 410 apply RF energy, or both the RF coil 410 and the base 210 simultaneously apply RF energy to the process space, causing the hydrogen gas to ionize, generating hydrogen ions and free radicals. These ions will move downward, and among them, the hydrogen ions will be electrically neutralized when they come into contact with the ion filter 500 and stay on the ion filter 500. While the hydrogen free radicals and a small amount of hydrogen ions (or only hydrogen free radicals) will pass through the through holes 520 of the ion filter 500 and reach the surface of the wafer 800, react with the oxide layer thereon, and play a reduction effect to clean the surface of the wafer 800.

[0063] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them fall within the protection scope of the present application.

Claims

1. A semiconductor process chamber, characterized in that: The invention comprises a chamber body (100), an ion filter (500) and a base assembly (200); the base assembly (200) is arranged in a lifting manner in a receiving space of the chamber body (100); a deposition plate (300) and the ion filter (500) can be placed in the receiving space, and both the deposition plate (300) and the ion filter (500) can be switched between a first position and a second position in the receiving space. When the deposition tray (300) is located at the first position, the deposition tray (300) is located above the base assembly (200), and the base assembly (200) can support the deposition tray (300) to perform a deposition process, so that plasma that can bombard the deposition tray (300) is generated in the accommodation space, so as to form a protective layer on the inner surface of the chamber body (100) and the surface of the base assembly (200); When the deposition tray (300) is located at the second position, the deposition tray (300) is staggered with the base assembly (200), and the base assembly (200) can support a wafer (800) to perform a wafer processing process, wherein the wafer processing process includes a first pre-cleaning process and a second pre-cleaning process; When the deposition plate (300) is located at the second position and the ion filter (500) is located at the first position, the base assembly (200) can support the ion filter (500) to perform the first pre-cleaning process on the wafer (800); When the deposition plate (300) is located at the second position and the ion filter (500) is located at the second position, the base assembly (200) can support the wafer (800) to perform the second pre-cleaning process.

2. The semiconductor process chamber according to claim 1, characterized in that: The accommodating space comprises a first accommodating chamber and a second accommodating chamber which are connected to each other. The chamber body (100) comprises a main body (110) and a protruding portion (120) which are connected to each other. The protruding portion (120) is connected to the side wall of the main body (110). The main body (110) has the first accommodating chamber, and the protruding portion (120) has the second accommodating chamber. The base assembly (200) can be raised and lowered in the first accommodating chamber, and at least one of the deposition plate (300) and the ion filter (500) can be located in the second accommodating chamber.

3. The semiconductor process chamber according to claim 2, characterized in that: The side wall of the second accommodating chamber is provided with at least one supporting portion (121), the supporting portion (121) being spaced apart from the bottom wall of the second accommodating chamber, and the supporting portion (121) being used to support the deposition plate (300) or the ion filter (500).

4. The semiconductor process chamber according to claim 3, characterized in that: The number of the support parts (121) is at least two, and the at least two support parts (121) include a first support part (121a) and a second support part (121b), one of the first support part (121a) and the second support part (121b) is used to support the deposition plate (300), and the other is used to support the ion filter (500), the first support part (121a) and the second support part (121b) are located in the same second accommodating cavity, and the first support part (121a) and the second support part (121b) are arranged at intervals along the height direction of the second accommodating cavity.

5. The semiconductor process chamber according to claim 3, characterized in that: The number of the supporting parts (121) is at least two, and the at least two supporting parts (121) include a first supporting part (121a) and a second supporting part (121b), one of the first supporting part (121a) and the second supporting part (121b) is used to support the deposition plate (300), and the other is used to support the ion filter (500). The number of the protrusions (120) is at least two, including a first protrusion and a second protrusion, the first supporting part (121a) is arranged in the second accommodating cavity of the first protrusion, and the second supporting part (121b) is arranged in the second accommodating cavity of the second protrusion.

6. The semiconductor process chamber according to claim 3, characterized in that: The semiconductor process chamber also includes a rotating member (600), at least a portion of which is rotatably disposed in the chamber body (100), and the rotating member (600) can be raised and lowered relative to the first accommodating cavity, the deposition plate (300) or the ion filter (500) can be supported on the rotating member (600), and one end of the rotating member (600) can extend to the bottom of the support portion (121) to transport the deposition plate (300) or the ion filter (500) to the base assembly (200).

7. The semiconductor process chamber according to claim 2, characterized in that: The protruding portion (120) and the main body (110) are an integrated structure.

8. The semiconductor process chamber according to claim 1, wherein: The semiconductor process chamber further comprises a radio frequency component (400), wherein the radio frequency component (400) comprises a radio frequency coil (410), and the radio frequency coil (410) is embedded in the chamber body (100). When the semiconductor process chamber is performing the first pre-cleaning process, the radio frequency coil (410) loads radio frequency energy into the accommodation space; When the semiconductor process chamber performs the second pre-cleaning process, both the radio frequency coil (410) and the base assembly (200) load radio frequency energy into the accommodation space.

9. The semiconductor process chamber according to claim 1, wherein: The base assembly (200) comprises a base (210) and a cover ring (220), wherein the base (210) has a carrying surface (211) for carrying the wafer (800), and the cover ring (220) is arranged at the edge of the carrying surface (211), and a positioning groove (222) is provided on a side of the cover ring (220) facing away from the carrying surface (211), and the bottom surface of the positioning groove (222) is a first supporting surface (222a), and at least a part of the deposition plate (300) can be located in the positioning groove (222) so that the deposition plate (300) is supported on the first supporting surface (222a).

10. The semiconductor process chamber according to claim 9, characterized in that: The semiconductor process chamber further comprises an ion filter (500), wherein the ion filter (500) can be switched between the first position and the second position; a mounting groove (223) is further provided on a side of the cover ring (220) facing away from the bearing surface (211); the bottom surface of the mounting groove (223) is a second supporting surface (223a); the second supporting surface (223a) is higher than the first supporting surface (222a); and at least a portion of the ion filter (500) can be located in the mounting groove (223) so that the ion filter (500) is supported on the second supporting surface (223a).

11. The semiconductor process chamber according to claim 10, characterized in that: One of the second supporting surface (223a) and the ion filter (500) is provided with a limiting groove (223a1), and the other is provided with a limiting protrusion (510), and the limiting protrusion (510) is in limiting cooperation with the limiting groove (223a1).

12. The semiconductor process chamber according to claim 1, wherein: The semiconductor process chamber further comprises a shielding member (700), wherein the shielding member (700) is arranged in the accommodating space; the base assembly (200) comprises a base (210) and a cover ring (220), wherein the base (210) has a carrying surface (211) for carrying the wafer (800); the cover ring (220) is arranged at an edge of the carrying surface (211), and the cover ring (220) has a mating surface (221). When the deposition process or the wafer processing process is performed in the semiconductor process chamber, the matching surface (221) and the shielding component (700) are clearance matched.

13. The semiconductor process chamber according to claim 1, wherein: An inclined surface (310) is provided at the edge of the deposition tray (300), and the inclined surface (310) is inclined downward from the top surface of the deposition tray (300).

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