Microfluidic active matrix drive circuit and microfluidic device

Abstract

This application provides a microfluidic active matrix drive circuit and a microfluidic device. The application connects the control terminal of the reset module and the control terminal of the charging module to the same scan signal terminal, and connects the input terminal of the reset module and the input terminal of the charging module to the same data signal terminal. This allows the reset module to further pull up the potential of the second node when a high potential needs to be written to the signal output terminal, thereby achieving rapid charging of the signal output terminal and enabling the microfluidic active matrix drive circuit to have a high response speed. Secondly, a first storage module is placed between the power signal terminal and the second node to maintain the potential of the second node, giving the microfluidic active matrix drive circuit high accuracy and stability.

Description

Technical Field

[0001] This application relates to the field of microfluidics, and in particular to a microfluidic active matrix drive circuit and a microfluidic device. Background Technology

[0002] Microfluidic devices are devices that move droplets by relying on changes in the wetting effect of liquids. They can perform state transitions such as droplet movement, fusion, and splitting to analyze the optical, chemical, and physical properties of different components or fused components.

[0003] In the construction of a microfluidic platform, the droplet control stage is the core component. Conventional microfluidic devices manipulate fluids by designing different types of channels and micropump valve structures. This method is complex and cumbersome to manufacture, and cannot achieve precise and stable control of droplets. The failure rate of droplet control is high and the control efficiency is low. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide a microfluidic active matrix driving circuit and a microfluidic device, which solves the problems of high failure rate and low control efficiency in droplet manipulation in the prior art.

[0005] To address the aforementioned technical problems, the first technical solution provided in this application is: a microfluidic active matrix driving circuit for driving pixel electrodes in an active matrix, comprising:

[0006] A charging module, wherein the control terminal of the charging module is electrically connected to the scanning signal terminal, the input terminal of the charging module is electrically connected to the data signal terminal, and the output terminal of the charging module is electrically connected to the first node;

[0007] The driving module has a control terminal electrically connected to the first node, an input terminal electrically connected to a power signal terminal, and an output terminal electrically connected to the signal output terminal of the microfluidic active matrix driving circuit via a second node.

[0008] A reset module, wherein the control terminal of the reset module is connected to the same scan signal terminal as the control terminal of the charging module, the input terminal of the reset module is connected to the same data signal terminal as the input terminal of the charging module, and the output terminal of the reset module is electrically connected to the second node;

[0009] A first storage module, one end of which is electrically connected to the power signal terminal, and the other end of which is electrically connected to the second node;

[0010] The second storage module has one end electrically connected to the power signal terminal and the other end electrically connected to the first node.

[0011] The charging module includes a first transistor, the gate of which is electrically connected to the scan signal terminal, the source of which is electrically connected to the first node, and the drain of which is electrically connected to the data signal terminal.

[0012] The driving module includes a driving transistor, the gate of which is electrically connected to the first node, the source of which is electrically connected to the second node, and the drain of which is electrically connected to the power signal terminal.

[0013] The first storage module includes a first capacitor, one end of which is electrically connected to the power signal terminal, and the other end of which is electrically connected to the second node.

[0014] The second storage module includes a second capacitor, one end of which is electrically connected to the power signal terminal, and the other end of which is electrically connected to the first node.

[0015] The reset module includes a second transistor, the gate of which is electrically connected to the scan signal terminal, the source of which is electrically connected to the second node, and the drain of which is electrically connected to the data signal terminal.

[0016] The reset module includes a second transistor and a third transistor. The gate of the second transistor is electrically connected to the scan signal terminal, the source of the second transistor is electrically connected to the drain of the third transistor, and the drain of the second transistor is electrically connected to the data signal terminal. The gate of the third transistor is electrically connected to the scan signal terminal, and the source of the third transistor is electrically connected to the second node.

[0017] The second capacitor is a preset value.

[0018] The microfluidic active matrix driving circuit further includes a third storage module. One end of the third storage module is connected to the control terminal of the charging module and the same scanning signal terminal, while the other end of the third storage module is electrically connected to the first node.

[0019] The third storage module includes a third capacitor, one end of which is electrically connected to the scan signal terminal, and the other end of which is electrically connected to the first node.

[0020] The sum of the capacitance values ​​of the second capacitor and the third capacitor is a preset value, and the capacitance value of the third capacitor is less than the capacitance value of the second capacitor.

[0021] The power signal output from the power signal terminal is at a high potential; the microfluidic active matrix driving circuit includes a working stage and a reset stage, and the driving timing of the working stage includes a first stage and a second stage in sequence.

[0022] In the first stage, the scan signal output by the scan signal terminal is at a high potential, the data signal output by the data signal terminal is at a high potential, and the charging module, the driving module and the reset module are turned on so that the signal output terminal is written with a high potential;

[0023] In the second stage, the scan signal output by the scan signal terminal is at a low potential, the charging module and the reset module are turned off, and the driving module remains on, so that the signal output terminal is continuously written with a high potential;

[0024] During the reset phase, the scan signal output from the scan signal terminal is at a high potential, the data signal output from the data signal terminal is at a low potential, the charging module and the reset module are turned on, and the driving module is turned off, so that the signal output terminal is written with a low potential.

[0025] To solve the above-mentioned technical problems, the second technical solution provided in this application is: to provide a microfluidic device, which includes the above-mentioned microfluidic active matrix driving circuit.

[0026] The microfluidic device includes: a first substrate and a second substrate disposed opposite to each other, and a channel for accommodating one or more droplets is formed between the first substrate and the second substrate;

[0027] The first substrate includes a first substrate, a common electrode, and a first hydrophobic layer sequentially stacked toward the second substrate;

[0028] The second substrate includes a second substrate, a driving circuit layer, a pixel electrode, an insulating layer, and a second hydrophobic layer, which are sequentially stacked facing the first substrate; the driving circuit layer includes a plurality of microfluidic active matrix driving circuits arranged in an array.

[0029] The channel is located between the first hydrophobic layer and the second hydrophobic layer.

[0030] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a microfluidic active matrix driving circuit and a microfluidic device. The microfluidic active matrix driving circuit is used to drive pixel electrodes in an active matrix. The microfluidic active matrix driving circuit includes a charging module, a driving module, a reset module, a first storage module, and a second storage module. The control terminal of the charging module is electrically connected to the scanning signal terminal, the input terminal of the charging module is electrically connected to the data signal terminal, and the output terminal of the charging module is electrically connected to a first node. The control terminal of the driving module is electrically connected to the first node, the input terminal of the driving module is electrically connected to the power signal terminal, and the output terminal of the driving module is electrically connected to the signal output terminal of the microfluidic active matrix driving circuit via a second node. The control terminal of the reset module is connected to the same scanning signal terminal as the control terminal of the charging module, the input terminal of the reset module is connected to the same data signal terminal as the input terminal of the charging module, and the output terminal of the reset module is electrically connected to the second node. One end of the first storage module is electrically connected to the power signal terminal, and the other end of the first storage module is electrically connected to the second node. One end of the second storage module is electrically connected to the power signal terminal, and the other end of the second storage module is electrically connected to the first node. This application connects the control terminal of the reset module and the control terminal of the charging module to the same scan signal terminal, and connects the input terminal of the reset module and the input terminal of the charging module to the same data signal terminal. This allows the reset module to further pull up the potential of the second node when a high potential needs to be written to the signal output terminal, thereby achieving rapid charging of the signal output terminal and enabling the microfluidic active matrix driving circuit to have a high response speed. Secondly, the first storage module is placed between the power signal terminal and the second node to maintain the potential of the second node, enabling the microfluidic active matrix driving circuit to have high accuracy and stability. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0032] Figure 1 This is a schematic diagram of the structure of the first embodiment of the microfluidic active matrix driving circuit provided in this application;

[0033] Figure 2 This is the driving timing diagram of the microfluidic active matrix driving circuit provided in this application;

[0034] Figure 3 This is a potential diagram of the first node and the second node in the microfluidic active matrix drive circuit provided in this application;

[0035] Figure 4This is a schematic diagram of the structure of the second embodiment of the microfluidic active matrix driving circuit provided in this application;

[0036] Figure 5 This is a schematic diagram of the structure of the third embodiment of the microfluidic active matrix driving circuit provided in this application;

[0037] Figure 6 This is a schematic diagram of the structure of the fourth embodiment of the microfluidic active matrix driving circuit provided in this application;

[0038] Figure 7 This is a schematic diagram of an embodiment of the microfluidic device provided in this application.

[0039] Explanation of icon numbers:

[0040] 100. Microfluidic active matrix drive circuit; 10. Charging module; T1. First transistor; 20. Drive module; T0. Drive transistor; 30. Reset module; T2. Second transistor; T3. Third transistor; 40. First storage module; C1. First capacitor; 50. Second storage module;

[0041] C2, Second capacitor; 60, Third storage module; C3, Third capacitor; A, First node; B, Second node; Gate, Scan signal terminal / scan signal; Data, Data signal terminal / data signal; VDD, Power signal terminal / power signal; 200, Microfluidic device; 210, First substrate; 211, First substrate; 212, Common electrode; 213, First hydrophobic layer; 220, Second substrate; 221, Second substrate; 222, Driving circuit layer; 223, Pixel electrode; 224, Insulating layer; 225, Second hydrophobic layer; 230, Channel. Detailed Implementation

[0042] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0043] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0045] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0046] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0047] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the structure of the first embodiment of the microfluidic active matrix drive circuit provided in this application. Figure 2 This is the driving timing diagram of the microfluidic active matrix driving circuit provided in this application.

[0048] This application provides a microfluidic active matrix driving circuit 100 for driving pixel electrodes (see...) in an active matrix. Figure 7The microfluidic active matrix drive circuit 100 includes a charging module 10, a driving module 20, a reset module 30, a first storage module 40, and a second storage module 50. The control terminal of the charging module 10 is electrically connected to the scan signal terminal Gate, the input terminal of the charging module 10 is electrically connected to the data signal terminal Data, and the output terminal of the charging module 10 is electrically connected to the first node A. The control terminal of the driving module 20 is electrically connected to the first node A, the input terminal of the driving module 20 is electrically connected to the power signal terminal VDD, and the output terminal of the driving module 20 is electrically connected to the signal output terminal of the microfluidic active matrix drive circuit 100 via the second node B. The control terminal of the reset module 30 is connected to the same scan signal terminal Gate as the control terminal of the charging module 10, the input terminal of the reset module 30 is connected to the same data signal terminal Data as the input terminal of the charging module 10, and the output terminal of the reset module 30 is electrically connected to the second node B. One end of the first storage module 40 is electrically connected to the power signal terminal VDD, and the other end of the first storage module 40 is electrically connected to the second node B. One end of the second storage module 50 is electrically connected to the power signal terminal VDD, and the other end of the second storage module 50 is electrically connected to the first node A.

[0049] This application connects the control terminal of the reset module 30 and the control terminal of the charging module 10 to the same scan signal terminal Gate, and connects the input terminal of the reset module 30 and the input terminal of the charging module 10 to the same data signal terminal Data. This allows the reset module 30 to further pull up the potential of the second node B when a high potential needs to be written to the signal output terminal, thereby achieving rapid charging of the signal output terminal and enabling the microfluidic active matrix drive circuit 100 to have a high response speed. Secondly, the first storage module 40 is set between the power signal terminal VDD and the second node B to maintain the potential of the second node B, enabling the microfluidic active matrix drive circuit 100 to have high accuracy and stability.

[0050] Furthermore, the charging module 10 includes a first transistor T1, the gate of the first transistor T1 is electrically connected to the scan signal terminal Gate, the source of the first transistor T1 is electrically connected to the first node A, and the drain of the first transistor T1 is electrically connected to the data signal terminal Data.

[0051] The driving module 20 includes a driving transistor T0, the gate of which is electrically connected to the first node A, the source of which is electrically connected to the second node B, and the drain of which is electrically connected to the power supply signal terminal VDD.

[0052] The first storage module 40 includes a first capacitor C1, one end of which is electrically connected to the power signal terminal VDD, and the other end of which is electrically connected to the second node B.

[0053] The second storage module 50 includes a second capacitor C2, one end of which is electrically connected to the power signal terminal VDD, and the other end of which is electrically connected to the first node A.

[0054] In this embodiment, the capacitance value of the second capacitor C2 is a preset value. The magnitude of the preset value is not limited and can be selected according to actual needs. The reset module 30 includes a second transistor T2. The gate of the second transistor T2 is electrically connected to the scan signal terminal Gate, the source of the second transistor T2 is electrically connected to the second node B, and the drain of the second transistor T2 is electrically connected to the data signal terminal Data.

[0055] There are no restrictions on the types of the first transistor T1, the second transistor T2, and the driving transistor T0; they can be selected according to actual needs.

[0056] It should be noted that the signal output terminal in this application is electrically connected to the pixel electrode.

[0057] Furthermore, the power signal VDD output from the power signal terminal VDD is at a high potential.

[0058] In this embodiment, the power signal terminal VDD is electrically connected to the high-potential signal line.

[0059] The microfluidic active matrix drive circuit 100 includes an operating phase and a reset phase. The driving timing of the operating phase includes a first phase and a second phase in sequence.

[0060] In the first stage, the scan signal Gate output from the scan signal terminal Gate is at a high potential, the data signal Data output from the data signal terminal Data is at a high potential, and the charging module 10, the driving module 20 and the reset module 30 are turned on so that the signal output terminal is written with a high potential.

[0061] In the second stage, the scan signal Gate output by the scan signal terminal Gate is at a low potential, the charging module 10 and the reset module 30 are turned off, and the driving module 20 remains on, so that the signal output terminal is continuously written with a high potential.

[0062] During the reset phase, the scan signal Gate output from the scan signal terminal Gate is at a high potential, and the data signal Data output from the data signal terminal Data is at a low potential. The charging module 10 and the reset module 30 are turned on, and the driving module 20 is turned off, so that the signal output terminal is written to a low potential.

[0063] Specifically, in this embodiment, in the first stage, the scan signal Gate output from the scan signal terminal Gate is at a high potential, and the data signal Data output from the data signal terminal Data is at a high potential. The first transistor T1 and the second transistor T2 are used to write the data signal Data to the second node B, thereby raising the potential of the second node B. Simultaneously, the data signal Data is written to the first node A via the charging module 10, raising the potential of the first node A to a high potential, thus turning on the driving transistor T0 and charging the second capacitor C2. The power signal VDD is written to the second node B via the driving transistor T0, further raising the potential of the second node B to accelerate the charging of the signal output terminal, thereby enabling the microfluidic active matrix driving circuit 100 to have a high response speed.

[0064] In the second stage, the scan signal Gate output by the scan signal terminal Gate is at a low potential, the first transistor T1 and the second transistor T2 are turned off, and due to the storage effect of the second capacitor C2, the potential of the first node A remains at a high potential, so that the driving transistor T0 can remain on, and the power supply signal VDD can still be written to the second node B through the driving transistor T0, so that the signal output terminal can continue to maintain a high potential.

[0065] During the reset phase, the scan signal Gate output from the scan signal terminal is at a high potential, and the data signal Data output from the data signal terminal is at a low potential. The first transistor T1 and the second transistor T2 are turned on. The data signal Data is written to the second node B via the second transistor T2, causing the signal output terminal to be written to a low potential. The data signal Data is written to the first node A via the first transistor T1, pulling the potential of the first node A down to a low potential, thus turning off the drive transistor T0.

[0066] Please see Figure 3 , Figure 3 This is a potential diagram of the first and second nodes in the microfluidic active matrix drive circuit provided in this application.

[0067] In one specific embodiment, when the potential of the power signal VDD output from the power signal terminal VDD is 30V, the potential of the data signal Data output from the data signal terminal Data is 35V, and the potential of the scan signal Gate output from the scan signal terminal Gate is 40V, and a simulation is performed with a frequency set to 60Hz, it can be seen that in the first stage, since both the first transistor T1 and the second transistor T2 are turned on, both the data signal Data and the power signal VDD can be written to the second node B. This allows the second node B to reach the target voltage (i.e., the voltage at the signal output terminal reaches the target voltage) within the first stage of one frame during the 60Hz charging time, resulting in a high response speed for the microfluidic active matrix drive circuit 100. The data signal Data is written to the first node A via the first transistor T1 to pull the potential of the first node A to a high potential, and the potential of the first node A is higher than the potential of the second node B. In the second stage, due to the storage function of the second capacitor C2, the second capacitor C2 charges the first node A. During this stage, the potential of the first node A gradually decreases, but it is still higher than the threshold voltage of the driving transistor T0, so that the driving transistor T0 remains on. The power supply signal VDD can be written to the second node B through the driving transistor T0, so that the second node B can still maintain the target voltage (that is, the voltage at the signal output terminal is still maintained at the target voltage), so that the microfluidic active matrix driving circuit 100 has high accuracy and stability.

[0068] It should be understood that when a higher frequency is required, the capacitance value of the second capacitor C2 can be designed according to the frequency (for example, by reducing the capacitance value of the second capacitor C2) to improve the charging and discharging speed of the second node B.

[0069] In this embodiment, the control terminal of the reset module 30 and the control terminal of the charging module 10 are connected to the same scanning signal terminal Gate, and the input terminal of the reset module 30 and the input terminal of the charging module 10 are connected to the same data signal terminal Data. This allows the reset module 30 to pull up the potential of the second node B in the first stage, thereby achieving rapid charging of the signal output terminal and enabling the microfluidic active matrix driving circuit 100 to have a high response speed. Secondly, the first storage module 40 is placed between the power signal terminal VDD and the second node B to maintain the potential of the second node B, thereby enabling the microfluidic active matrix driving circuit 100 to have high accuracy and stability.

[0070] Please see Figure 2 and Figure 4 , Figure 4 This is a schematic diagram of the structure of the second embodiment of the microfluidic active matrix driving circuit provided in this application.

[0071] The second embodiment of the microfluidic active matrix drive circuit 100 provided in this application has a structure that is basically the same as the first embodiment of the microfluidic active matrix drive circuit 100 provided in this application, except that the reset module 30 includes a second transistor T2 and a third transistor T3.

[0072] In this embodiment, the reset module 30 includes a second transistor T2 and a third transistor T3. The gate of the second transistor T2 is electrically connected to the scan signal terminal Gate, the source of the second transistor T2 is electrically connected to the drain of the third transistor T3, and the drain of the second transistor T2 is electrically connected to the data signal terminal Data. The gate of the third transistor T3 is electrically connected to the scan signal terminal Gate, and the source of the third transistor T3 is electrically connected to the second node B.

[0073] In this embodiment, the second transistor T2 and the third transistor T3 are of the same type.

[0074] This embodiment can also enable the microfluidic active matrix drive circuit 100 to have a high response speed. Compared with the first embodiment of the microfluidic active matrix drive circuit 100 provided in this application, the reset module 30 in this embodiment is equipped with an additional third transistor T3, which reduces the leakage current of the potential of the second node B, thereby better maintaining the potential of the signal output terminal and further improving the accuracy and stability of the microfluidic active matrix drive circuit 100.

[0075] Please see Figure 2 and Figure 5 , Figure 5 This is a schematic diagram of the structure of the third embodiment of the microfluidic active matrix driving circuit provided in this application.

[0076] The third embodiment of the microfluidic active matrix driving circuit 100 provided in this application has a structure that is basically the same as the first embodiment of the microfluidic active matrix driving circuit 100 provided in this application, except that the microfluidic active matrix driving circuit 100 further includes a third storage module 60.

[0077] In this embodiment, the microfluidic active matrix driving circuit 100 further includes a third storage module 60. One end of the third storage module 60 is connected to the same scanning signal terminal Gate as the control terminal of the charging module 10, and the other end of the third storage module 60 is electrically connected to the first node A.

[0078] Specifically, the third storage module 60 includes a third capacitor C3, one end of which is electrically connected to the scan signal terminal Gate, and the other end of which is electrically connected to the first node A. In this embodiment, by providing the third storage module 60, the charging speed of the first node A can be accelerated, and the leakage current of the driving transistor T0 can be effectively reduced.

[0079] Furthermore, the sum of the capacitance values ​​of the second capacitor C2 and the third capacitor C3 is a preset value, and the capacitance value of the third capacitor C3 is less than the capacitance value of the second capacitor C2. This can be understood as follows: in this embodiment, the sum of the capacitance values ​​of the second capacitor C2 and the third capacitor C3 is equal to the capacitance value of the second capacitor C2 in the first embodiment, and both are preset values, to ensure a consistent charging rate at the first node A. Specifically, Figure 5 and Figure 6 In the above, the sum of the capacitance values ​​of the second capacitor C2 and the third capacitor C3 is equal to... Figure 4 The capacitance value of the second capacitor C2 is adjusted to keep the storage capacitance of the first node A constant, ensuring a consistent charging rate for the first node A. Simultaneously, this avoids a decrease in the charging rate of the first node A due to the addition of the third capacitor C3 in this embodiment.

[0080] The purpose of introducing the third capacitor C3 in this embodiment is to enable the coupling effect between the first node A and the scan signal terminal Gate, so that the potential of the first node A can be quickly coupled up in the first stage, the turn-on speed of the driving transistor T0 is faster, and thus the charging rate of the second node B is improved; and after the second capacitor C2 has finished discharging, the potential of the first node A can be coupled down further due to the coupling effect of the third capacitor C3, so that the turn-off effect of the driving transistor T0 is better, the leakage current of the driving transistor T0 is reduced, and thus the potential drift of the second node B during the reset stage is reduced.

[0081] It should be understood that the capacitance value of the third capacitor C3 in this application is much smaller than that of the second capacitor C2, so that the first node A and the scanning signal terminal Gate can be coupled to produce a certain amount of coupling.

[0082] The effectiveness of turning off the driving transistor T0 also depends on the ratio of the capacitance value of the third capacitor C3 to a preset value. A larger ratio results in a stronger coupling effect between the first node A and the scan signal terminal Gate, leading to a better turn-off effect for the driving transistor T0 in the second stage. It should be understood that the capacitance value of the third capacitor C3 does not need to be excessively large; only the required coupling amount is needed to avoid a sharp drop in the potential of the first node A during the first stage, which could affect the turn-on of the driving transistor T0. The specific values ​​of the first capacitor C1, the second capacitor C2, and the third capacitor C3 are not limited here and can be selected according to actual needs.

[0083] Specifically, in this embodiment, in the first stage, the scan signal Gate output from the scan signal terminal Gate is at a high potential, and the data signal Data output from the data signal terminal Data is at a high potential. The first transistor T1 and the second transistor T2 are turned on. The data signal Data is written to the second node B via the second transistor T2 to raise the potential of the second node B. Simultaneously, the data signal Data is written to the first node A via the charging module 10 to raise the potential of the first node A to a high potential, thereby turning on the driving transistor T0 and charging the second capacitor C2. Due to the presence of the third capacitor C3, the potential of the first node A can be quickly raised using the rising edge of the scan signal Gate, thus accelerating the turning on of the driving transistor T0. The power signal VDD is written to the second node B via the driving transistor T0 to further raise the potential of the second node B, accelerating the charging of the signal output terminal, thereby enabling the microfluidic active matrix driving circuit 100 to have a high response speed.

[0084] In the second stage, the scan signal Gate output by the scan signal terminal Gate is at a low potential, the first transistor T1 and the second transistor T2 are turned off. Due to the coupling effect of the third capacitor C3 and the storage effect of the second capacitor C2, the potential of the first node A is pulled down but still remains at a high potential, so that the driving transistor T0 can remain on. The power supply signal VDD can still be written to the second node B through the driving transistor T0, so that the signal output terminal can continue to maintain a high potential.

[0085] During the reset phase, the scan signal Gate output from the scan signal terminal is at a high potential, while the data signal Data output from the data signal terminal is at a low potential. The first transistor T1 and the second transistor T2 are turned on. The data signal Data is written to the second node B via the second transistor T2, causing the signal output terminal to be written to a low potential. The data signal Data is also written to the first node A via the first transistor T1, pulling the potential of the first node A down to a low potential, thus turning off the driving transistor T0. Due to the coupling effect of the third capacitor C3, the scan signal Gate in the second phase couples the potential of the first node A even lower, resulting in better shutdown of the driving transistor T0, effectively reducing leakage current in the driving transistor T0, and consequently reducing the low-potential drift of the second node B, thus improving the maintenance effect of the low potential at the signal output terminal during the reset phase.

[0086] This embodiment also enables the microfluidic active matrix drive circuit 100 to have a higher response speed. Compared with the first embodiment of the microfluidic active matrix drive circuit 100 provided in this application, this embodiment, due to the setting of the third capacitor C3, can accelerate the pull-up of the potential of the first node A to a high potential in the first stage, thereby accelerating the charging of the signal output terminal and thus enabling the microfluidic active matrix drive circuit 100 to have a higher response speed. Secondly, after the second capacitor C2 has discharged, due to the coupling effect of the third capacitor C3, the potential of the first node A can be coupled to a lower level by the scanning signal Gate in the second stage, resulting in a better turn-off effect of the driving transistor T0, reducing the leakage current of the driving transistor T0, and thus reducing the potential drift of the second node B in the reset stage, resulting in a better maintenance effect of the low potential of the signal output terminal. That is, the microfluidic active matrix drive circuit 100 has better accuracy and stability.

[0087] Please see Figure 2 and Figure 6 , Figure 6 This is a schematic diagram of the fourth embodiment of the microfluidic active matrix driving circuit provided in this application.

[0088] The fourth embodiment of the microfluidic active matrix driving circuit 100 provided in this application has a structure that is basically the same as the second embodiment of the microfluidic active matrix driving circuit 100 provided in this application, except that the microfluidic active matrix driving circuit 100 further includes a third storage module 60.

[0089] In this embodiment, the microfluidic active matrix driving circuit 100 further includes a third storage module 60. One end of the third storage module 60 is connected to the same scanning signal terminal Gate as the control terminal of the charging module 10, and the other end of the third storage module 60 is electrically connected to the first node A.

[0090] Specifically, the third storage module 60 includes a third capacitor C3. One end of the third capacitor C3 is electrically connected to the scan signal terminal Gate, and the other end of the third capacitor C3 is electrically connected to the first node A. In this embodiment, by setting the third storage module 60, the charging speed of the first node A can be accelerated and the leakage current of the driving transistor T0 can be effectively reduced. The sum of the capacitance values ​​of the second capacitor C2 and the third capacitor C3 is a preset value, and the capacitance value of the third capacitor C3 is less than the capacitance value of the second capacitor C2. The effect of introducing the third capacitor C3 is the same as in the above embodiment, and will not be repeated here; please refer to the above description.

[0091] This embodiment is basically the same as the working stage and reset stage of the second embodiment of the microfluidic active matrix drive circuit 100 provided in this application, and will not be repeated here. Please refer to the above description.

[0092] This embodiment also enables the microfluidic active matrix drive circuit 100 to have a high response speed. Compared with the second embodiment of the microfluidic active matrix drive circuit 100 provided in this application, the accuracy and stability of the microfluidic active matrix drive circuit 100 can be further improved.

[0093] Please see Figure 7 , Figure 7 This is a schematic diagram of an embodiment of the microfluidic device provided in this application.

[0094] This application provides a microfluidic device 200. The microfluidic device 200 includes the microfluidic active matrix drive circuit described above.

[0095] Specifically, the microfluidic device 200 includes a first substrate 210 and a second substrate 220 disposed opposite to each other, and a channel 230 for accommodating one or more droplets is formed between the first substrate 210 and the second substrate 220.

[0096] The first substrate 210 includes a first substrate 211, a common electrode 212, and a first hydrophobic layer 213, which are sequentially stacked facing the second substrate 220.

[0097] The second substrate 220 includes a second substrate 221, a driving circuit layer 222, a pixel electrode 223, an insulating layer 224, and a second hydrophobic layer 225, which are sequentially stacked facing the first substrate 210. The insulating layer 224 covers the pixel electrode 223. The driving circuit layer 222 includes multiple microfluidic active matrix driving circuits arranged in an array. The pixel electrode 223 is arranged in a one-to-one correspondence with the microfluidic active matrix driving circuit.

[0098] Channel 230 is located between the first hydrophobic layer 213 and the second hydrophobic layer 225.

[0099] The microfluidic device 200 controls the droplets to enter the channel 230 and drives the pixel electrode 223 to realize the generation, transfer, mixing and splitting of droplets, and to perform precise and stable control of droplets. The droplet control has a low failure rate and higher control efficiency.

[0100] It can be understood that the microfluidic active matrix driving circuit of this application can significantly improve the driving capability of the pixel electrode 223, and accurately and stably control the droplet through the pixel electrode 223. The operation is simple, the failure rate of droplet control is reduced, and the control accuracy is improved.

[0101] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0102] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A microfluidic active matrix driving circuit for driving pixel electrodes in an active matrix, characterized in that, include: A charging module, wherein the control terminal of the charging module is electrically connected to the scanning signal terminal, the input terminal of the charging module is electrically connected to the data signal terminal, and the output terminal of the charging module is electrically connected to the first node; The driving module has a control terminal electrically connected to the first node, an input terminal electrically connected to a power signal terminal, and an output terminal electrically connected to the signal output terminal of the microfluidic active matrix driving circuit via a second node. A reset module, wherein the control terminal of the reset module is connected to the same scan signal terminal as the control terminal of the charging module, the input terminal of the reset module is connected to the same data signal terminal as the input terminal of the charging module, and the output terminal of the reset module is electrically connected to the second node; A first storage module, one end of which is electrically connected to the power signal terminal, and the other end of which is electrically connected to the second node; the first storage module includes a first capacitor. The second storage module has one end electrically connected to the power signal terminal and the other end electrically connected to the first node. The second storage module includes a second capacitor, one end of which is electrically connected to the power signal terminal, and the other end of which is electrically connected to the first node. The microfluidic active matrix driving circuit further includes a third storage module. One end of the third storage module is connected to the control terminal of the charging module and the same scanning signal terminal. The other end of the third storage module is electrically connected to the first node. The third storage module includes a third capacitor, one end of which is electrically connected to the scan signal terminal, and the other end of which is electrically connected to the first node. The power signal output from the power signal terminal is at a high potential; the microfluidic active matrix driving circuit includes a working stage and a reset stage, and the driving timing of the working stage includes a first stage and a second stage in sequence. In the first stage, the scan signal output by the scan signal terminal is at a high potential, the data signal output by the data signal terminal is at a high potential, and the charging module, the driving module and the reset module are turned on so that the signal output terminal is written with a high potential; In the second stage, the scan signal output by the scan signal terminal is at a low potential, the charging module and the reset module are turned off, and the driving module remains on, so that the signal output terminal is continuously written with a high potential; During the reset phase, the scan signal output by the scan signal terminal is at a high potential, the data signal output by the data signal terminal is at a low potential, the charging module and the reset module are turned on, and the driving module is turned off, so that the signal output terminal is written with a low potential. The sum of the capacitance values ​​of the second capacitor and the third capacitor is a preset value, and the capacitance value of the third capacitor is less than the capacitance value of the second capacitor.

2. The microfluidic active matrix driving circuit according to claim 1, characterized in that, The charging module includes a first transistor, the gate of the first transistor is electrically connected to the scan signal terminal, the source of the first transistor is electrically connected to the first node, and the drain of the first transistor is electrically connected to the data signal terminal. The driving module includes a driving transistor, the gate of which is electrically connected to the first node, the source of which is electrically connected to the second node, and the drain of which is electrically connected to the power signal terminal. One end of the first capacitor is electrically connected to the power signal terminal, and the other end of the first capacitor is electrically connected to the second node.

3. The microfluidic active matrix driving circuit according to claim 2, characterized in that, The reset module includes a second transistor, the gate of which is electrically connected to the scan signal terminal, the source of which is electrically connected to the second node, and the drain of which is electrically connected to the data signal terminal.

4. The microfluidic active matrix driving circuit according to claim 2, characterized in that, The reset module includes a second transistor and a third transistor. The gate of the second transistor is electrically connected to the scan signal terminal, the source of the second transistor is electrically connected to the drain of the third transistor, and the drain of the second transistor is electrically connected to the data signal terminal. The gate of the third transistor is electrically connected to the scan signal terminal, and the source of the third transistor is electrically connected to the second node.

5. A microfluidic device, characterized in that, The microfluidic active matrix drive circuit includes any one of claims 1 to 4.

6. The microfluidic device according to claim 5, characterized in that, The microfluidic device includes: a first substrate and a second substrate disposed opposite to each other, and a channel for accommodating one or more droplets is formed between the first substrate and the second substrate; The first substrate includes a first substrate, a common electrode, and a first hydrophobic layer sequentially stacked facing the second substrate; The second substrate includes a second substrate, a driving circuit layer, a pixel electrode, an insulating layer, and a second hydrophobic layer, which are sequentially stacked facing the first substrate; the driving circuit layer includes a plurality of microfluidic active matrix driving circuits arranged in an array. The channel is located between the first hydrophobic layer and the second hydrophobic layer.

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