A semiconductor sample for failure analysis grinding and preparation and its preparation method and use

Abstract

The present invention provides a semiconductor sample for failure analysis grinding and preparation, and a preparation method and use thereof, wherein the semiconductor sample comprises: a chip body having a first surface and a second surface facing each other; a protective film layer comprising a first adhesive film arranged on the first surface of the chip body, a second adhesive film arranged on the second surface of the chip body, and a limiting structure; at least three limiting structures are arranged in each of the first adhesive film and the second adhesive film, and the limiting structure has an arc portion, and the arc portion is in contact with the first surface and the second surface of the chip body; a cover sheet comprising a first cover sheet arranged on the first adhesive film and a second cover sheet arranged on the second adhesive film, the first cover sheet and the first surface are filled with the first adhesive film covering the limiting structure, and the second cover sheet and the second surface are filled with the second adhesive film covering the limiting structure. The protective film layer obtained by the present invention is uniform and has low porosity, which can effectively improve the accuracy of failure analysis.

Description

Technical Field

[0001] The present invention relates to the technical field of failure analysis, and in particular to a semiconductor sample for failure analysis grinding and sample preparation, and a preparation method and application thereof. Background Art

[0002] Failure analysis plays a very important role in the design and manufacture of semiconductor integrated circuit chips. The microstructure and composition of semiconductor wafers, chips and devices can be obtained through different sample preparation methods and analysis methods. For example, after physical grinding and sample preparation, high-definition optical microscope and scanning electron microscope photos can be obtained, and elemental composition can be obtained by applying X-ray energy spectrum, providing design and manufacturing engineers with information about the structure and composition of the product, so as to improve and accelerate the R&D process and monitor product quality.

[0003] Before grinding and preparing samples for failure analysis, some samples must be covered with a protective layer. In actual work, the gelatinization method is used to form a protective layer of gelatin on the surface of some samples to improve the success rate of grinding and preparing samples.

[0004] In actual operation, a special glue is applied to the surface of the sample to be ground, and then a thin glass sheet is gently pressed on it. The glue is evenly spread on the surface of the sample by its own weight, naturally forming a protective layer.

[0005] However, in the above operation, sometimes the glue layer is unevenly spread, sometimes thin and sometimes thick, and sometimes there are bubbles or gaps in the glue. These uneven thickness of the glue film, bubbles and gaps directly affect the quality and effect of the protective layer.

[0006] Therefore, it is necessary to develop new samples and sample preparation methods for semiconductor failure analysis. Summary of the invention

[0007] In view of the problems existing in the prior art, the present invention provides a semiconductor sample for failure analysis grinding and preparation, and a preparation method and use thereof, which solves the problems of uneven sealing film thickness and high porosity in the prior failure analysis process.

[0008] To achieve this object, the present invention adopts the following technical solutions:

[0009] In a first aspect, the present invention provides a semiconductor sample for grinding and preparing a sample for failure analysis, the semiconductor sample comprising:

[0010] The chip body has a first surface and a second surface facing each other;

[0011] The protective film layer comprises a first adhesive film disposed on the first surface of the chip body, a second adhesive film disposed on the second surface of the chip body, and a limiting structure;

[0012] Wherein, at least three limiting structures are arranged in each of the first adhesive film and the second adhesive film, and the limiting structures have arc portions, and the arc portions are in contact with the first surface and the second surface of the chip body;

[0013] The cover sheet includes a first cover sheet arranged on a first adhesive film and a second cover sheet arranged on a second adhesive film, wherein the first cover sheet and the first surface are filled with the first adhesive film covering the limiting structure, and the second cover sheet and the second surface are filled with the second adhesive film covering the limiting structure.

[0014] The present invention provides at least three limiting structures in the first adhesive film and the second adhesive film, which can play the following three roles: 1. Since the limiting structure itself is a solid phase, it is first wrapped in a gel-state adhesive film during the manufacturing process. It has a certain height and thus plays a limiting role during the pressing process, and can more accurately control the thickness of the first adhesive film and the second adhesive film; 2. By providing at least three limiting structures, three points determine a plane, so that the first adhesive film and the second adhesive film can be obtained with smooth surfaces, so that the planes of the first cover sheet and the second cover sheet close to the chip body are parallel to the first surface and the second surface of the chip body, thereby effectively avoiding the occurrence of uneven surfaces during the later grinding process. The occurrence of tilt leads to deviations in failure analysis; 3. The limiting structure is set on the first surface and the second surface of the chip body, rather than on the outside of the chip body. On the one hand, the wrapping effect of the adhesive film can be used to further fix the limiting structure during the manufacturing process. On the other hand, if it is set on the outside, the limiting structure needs to be ground off before the chip body is ground during the later grinding process, which brings additional burden to the later grinding. After the limiting structure is ground, the entire sample structure is prone to instability; 4. The present invention sets the end of the limiting structure that contacts the chip body as an arc portion, which can avoid scratches on the chip body and protect the chip body.

[0015] In summary, the present invention significantly improves the film forming quality of the first adhesive film and the second adhesive film and improves the success rate and accuracy of subsequent failure analysis by setting limiting structures between the first cover sheet and the first surface and between the second cover sheet and the second surface.

[0016] Preferably, the size of the chip body is in the range of 1 cm to 10 cm in length, 1 cm to 10 cm in width, and 0.5 mm to 5 mm in height, wherein the length is 1 cm, 2 cm, 3 cm, 4 cm, 5 cm, 6 cm, 7 cm, 8 cm, 9 cm, or 10 cm, etc., the width can be, for example, 1 cm, 2 cm, 3 cm, 4 cm, 5 cm, 6 cm, 7 cm, 8 cm, 9 cm, or 10 cm, etc., and the height can be, for example, 0.5 mm, 1.0 mm, 1.5 mm, 2.0 mm, 2.5 mm, 3.0 mm, 3.5 mm, 4.0 mm, 4.5 mm, or 5 mm, etc.

[0017] It is worth noting that the object of the present invention is not a general industrial part, and the chip body it is targeted at is relatively small in size and difficult to operate.

[0018] Preferably, the materials of the first adhesive film and the second adhesive film are independently epoxy resin AB glue. The present invention preferably uses an adhesive film made of epoxy resin AB glue, which is more secure when clamping the chip body.

[0019] Preferably, the thickness of the first adhesive film and the second adhesive film is independently 300 microns to 500 microns, for example, 300 microns, 350 microns, 400 microns, 450 microns or 500 microns, etc. Preferably, the limiting structure is spherical or hemispherical, preferably spherical.

[0020] It is worth mentioning that, as mentioned above, the chip body targeted by the present invention is small in size and difficult to operate, so how to form a cover plate with a limiting structure is somewhat difficult to operate. The present invention preferably adopts a spherical structure, because it has certain rolling properties, and the limiting structure can be set at the target position without damaging the chip body or the cover plate.

[0021] Preferably, the height of the limiting structure in the direction from the cover plate end to the chip body is 300 to 500 microns, for example, it can be 300 microns, 320 microns, 350 microns, 380 microns, 400 microns, 420 microns, 450 microns, 480 microns or 500 microns.

[0022] Preferably, the material of the limiting structure includes steel.

[0023] Preferably, at least three limiting structures form vertices of a polygon on the first surface or the second surface.

[0024] It is worth noting that the present invention has found through various attempts that at least three limiting structures can better form a film with a smoother surface. If two or one limiting structures are used, it is easy to cause deflection, etc. Preferably, three limiting structures can form a stable triangular structure.

[0025] Preferably, the limiting structure is fixedly connected to the cover sheet via an adhesive film.

[0026] Preferably, a surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and / or a surface of the second cover sheet close to the chip body is parallel to the second surface sheet.

[0027] Preferably, the first cover sheet and the second cover sheet are each independently a cover glass and / or a slide glass.

[0028] Preferably, the thickness of the first cover sheet and the second cover sheet are independently 0.13 mm to 0.2 mm, for example, 0.13 mm, 0.14 mm, 0.15 mm, 0.16 mm, 0.17 mm, 0.18 mm, 0.19 mm or 0.2 mm.

[0029] Preferably, the lengthwise dimensions of the first cover sheet and the second cover sheet are 0.5 cm to 1 cm larger than the corresponding dimensions of the chip, for example, 0.5 cm, 0.6 cm, 0.7 cm, 0.8 cm, 0.9 cm or 1.0 cm.

[0030] Preferably, the width dimensions of the first cover sheet and the second cover sheet are 0.5 cm to 1 cm larger than the corresponding dimensions of the chip, for example, 0.5 cm, 0.6 cm, 0.7 cm, 0.8 cm, 0.9 cm or 1.0 cm.

[0031] In a second aspect, the present invention provides a method for preparing a semiconductor sample for grinding and preparing a sample for failure analysis according to the first aspect, the preparation method comprising:

[0032] (1) at least three limiting structures are respectively provided on the first cover sheet and the second cover sheet to obtain a first cover sheet with a limiting structure and a second cover sheet with a limiting structure;

[0033] (2) coating a first adhesive film on the first cover sheet, wherein the first adhesive film covers the limiting structures, and placing a chip body on the first adhesive film with a first surface of the chip body in contact with at least three limiting structures;

[0034] (3) coating a second adhesive film on the chip body, and covering the second cover sheet with a limiting structure obtained in step (1) on the second adhesive film so that the second adhesive film covers the limiting structure, applying pressure to the first cover sheet and the second cover sheet and heating to cure the first and second adhesive films, thereby obtaining a semiconductor sample for failure analysis grinding and sampling.

[0035] The preparation method provided in the second aspect of the present invention significantly improves the surface quality and porosity of the first adhesive film and the second adhesive film without increasing excessive costs, thereby increasing the success rate of failure analysis.

[0036] Preferably, the step (1) of providing at least three limiting structures comprises: fixing the limiting structures on the first cover sheet and the second cover sheet by adhesive films.

[0037] Preferably, the adhesive film is made of the same material as the first adhesive film and the second adhesive film.

[0038] Preferably, step (1) is performed on an operating table.

[0039] Preferably, the temperature of the operating table in step (1) is 90-110°C, for example, it can be 90°C, 92°C, 93°C, 95°C, 99°C, 100°C, 101°C, 102°C, 105°C, 108°C or 110°C, etc.

[0040] Preferably, in step (2), the chip body is arranged directly above at least three limiting structures.

[0041] Preferably, step (2) is performed on an operating table.

[0042] Preferably, the temperature of the operating table in step (2) is 90-110°C, for example, it can be 90°C, 92°C, 93°C, 95°C, 99°C, 100°C, 101°C, 102°C, 105°C, 108°C or 110°C, etc.

[0043] Preferably, in step (3), the limiting structure attached to the second cover sheet is located directly above the chip body.

[0044] Preferably, the weight of the pressure applied in step (3) is in the range of 10 g to 50 g, for example, it can be 10 g, 15 g, 20 g, 25 g, 30 g, 35 g, 40 g, 45 g or 50 g.

[0045] Preferably, the temperature of the heating and curing is 80-120°C, for example, it can be 80°C, 82°C, 85°C, 90°C, 92°C, 93°C, 95°C, 99°C, 100°C, 101°C, 102°C, 105°C, 108°C, 110°C, 112°C, 115°C, 118°C or 120°C, etc.

[0046] In a third aspect, the present invention provides a use of the semiconductor sample prepared by grinding for failure analysis as described in the first aspect in failure analysis.

[0047] The semiconductor sample provided by the first aspect of the present invention can well protect the chip body during the subsequent grinding process and will not cause deflection of the micron-level structure, thereby improving the accuracy and success rate of subsequent failure analysis.

[0048] Compared with the prior art, the present invention has at least the following beneficial effects:

[0049] (1) The semiconductor sample for failure analysis grinding provided by the present invention has the advantages of smooth film surface, uniform thickness and low porosity;

[0050] (2) The method for preparing semiconductor samples for failure analysis grinding provided by the present invention significantly improves the accuracy of subsequent failure analysis and the success rate of sample preparation, and the success rate of subsequent grinding sample preparation is as high as 100%. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 It is a cross-sectional view of a semiconductor sample prepared by grinding for failure analysis provided in Example 1 of the present invention.

[0052] Figure 2 It is a top view of a first cover plate with a limiting structure in a semiconductor sample for grinding and preparing samples for failure analysis provided in Example 1 of the present invention.

[0053] Figure 3 This is a detection diagram of the first adhesive film in the semiconductor sample for failure analysis grinding and sampling provided in Example 1 of the present invention.

[0054] Figure 4 This is a detection diagram of the first adhesive film in the semiconductor sample used for failure analysis grinding and sampling provided in Comparative Example 3 of the present invention.

[0055] Figure 5 This is a detection diagram of the first adhesive film in the semiconductor sample used for failure analysis grinding and sampling provided in Comparative Example 4 of the present invention.

[0056] Figure 6 The present invention is a schematic diagram of the grinding of semiconductor samples for failure analysis grinding and sample preparation.

[0057] In the figure: 1-chip body; 2-adhesive film; 21-first adhesive film; 22-second adhesive film; 3-cover plate; 31-first cover plate; 32-second cover plate; 4-limiting structure. DETAILED DESCRIPTION

[0058] The technical solution of the present invention is further described below with reference to the accompanying drawings and through specific implementation methods.

[0059] The present invention is further described in detail below. However, the following examples are only simplified examples of the present invention and do not represent or limit the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the claims.

[0060] It should be understood that, in the description of the present invention, the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0061] It should be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "disposed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0062] Example 1

[0063] This embodiment provides a semiconductor sample for failure analysis grinding and sampling, such as Figure 1 As shown, the semiconductor sample comprises:

[0064] The chip body has a first surface and a second surface facing each other;

[0065] The protective film layer comprises a first adhesive film disposed on the first surface of the chip body, a second adhesive film disposed on the second surface of the chip body, and a limiting structure;

[0066] Wherein, three limiting structures are arranged in the first adhesive film and the second adhesive film, and the limiting structures have arc portions, and the arc portions are in contact with the first surface and the second surface of the chip body;

[0067] The cover sheet includes a first cover sheet arranged on a first adhesive film and a second cover sheet arranged on a second adhesive film, wherein the first cover sheet and the first surface are filled with the first adhesive film covering the limiting structure, and the second cover sheet and the second surface are filled with the second adhesive film covering the limiting structure.

[0068] The size of the chip body is 1 cm in length×1 cm in width×0.5 mm in height.

[0069] The first adhesive film and the second adhesive film are both made of epoxy resin AB glue; the thickness of the first adhesive film and the second adhesive film are both 400 microns.

[0070] The limiting structure is spherical; the height of the limiting structure from the cover plate end to the chip body is 400 microns; the material of the limiting structure is steel; three limiting structures form the vertices of a triangle on the first surface or the second surface; the limiting structure is fixedly connected to the cover plate through an adhesive film.

[0071] The surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet; the first cover sheet and the second cover sheet are each independently a cover glass and / or a slide glass; the thickness of the first cover sheet and the second cover sheet are both 0.15 mm; the length dimensions of the first cover sheet and the second cover sheet are both 0.5 cm larger than the corresponding dimensions of the chip; the width dimensions of the first cover sheet and the second cover sheet are both 0.5 cm larger than the corresponding dimensions of the chip.

[0072] This embodiment also provides a method for preparing the semiconductor sample for failure analysis grinding and sampling, and the preparation method comprises the following steps:

[0073] (1) The temperature of the operating table is controlled to be 100° C. On the operating table, three limiting structures are fixed to the first cover sheet and the second cover sheet respectively by adhesive films to obtain a first cover sheet with limiting structures (see Figure 2 ) and a second cover plate with a limiting structure;

[0074] (2) controlling the temperature of the operating table to 100° C., coating a first adhesive film on the first cover sheet on the operating table, wherein the first adhesive film covers the limiting structures, and placing a chip body on the first adhesive film, wherein the chip body is arranged directly above the three limiting structures, and wherein the first surface of the chip body is in contact with the three limiting structures;

[0075] (3) coating the chip body with a second adhesive film, and covering the second adhesive film with the second cover sheet with the limiting structure obtained in step (1), wherein the limiting structure attached to the second cover sheet is located directly above the chip body so that the second adhesive film covers the limiting structure, and pressing the first cover sheet and the second cover sheet around with tweezers so that the surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet;

[0076] A weight of 50 g was applied to the first cover sheet and the second cover sheet, and the first adhesive film and the second adhesive film were cured by heating at 110° C. for 30 min to obtain a semiconductor sample for grinding and sample preparation for failure analysis.

[0077] The test image of the adhesive film of the semiconductor sample obtained in this embodiment for failure analysis grinding and sampling is as follows: Figure 3 As shown, from Figure 3 It can be seen that the film surface has high uniformity and reduced bubbles and voids.

[0078] Example 2

[0079] This embodiment provides a semiconductor sample for grinding and preparing a sample for failure analysis, wherein the semiconductor sample comprises:

[0080] The chip body has a first surface and a second surface facing each other;

[0081] The protective film layer comprises a first adhesive film disposed on the first surface of the chip body, a second adhesive film disposed on the second surface of the chip body, and a limiting structure;

[0082] Wherein, three limiting structures are arranged in the first adhesive film and the second adhesive film, and the limiting structures have arc portions, and the arc portions are in contact with the first surface and the second surface of the chip body;

[0083] The cover sheet includes a first cover sheet arranged on a first adhesive film and a second cover sheet arranged on a second adhesive film, wherein the first cover sheet and the first surface are filled with the first adhesive film covering the limiting structure, and the second cover sheet and the second surface are filled with the second adhesive film covering the limiting structure.

[0084] The size of the chip body is 10 cm long×10 cm wide×5 mm high.

[0085] The first adhesive film and the second adhesive film are both made of epoxy resin AB glue; the thickness of the first adhesive film and the second adhesive film are both 500 microns.

[0086] The limiting structure is spherical; the height of the limiting structure in the direction from the cover plate end to the chip body is 500 microns; the material of the limiting structure is steel; three limiting structures form the vertices of a triangle on the first surface or the second surface; the limiting structure is fixedly connected to the cover plate through an adhesive film.

[0087] The surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet; the first cover sheet and the second cover sheet are each independently a cover glass and / or a slide glass; the thickness of the first cover sheet and the second cover sheet is 0.2 mm; the length dimensions of the first cover sheet and the second cover sheet are both 1 cm larger than the corresponding dimensions of the chip; the width dimensions of the first cover sheet and the second cover sheet are both 1 cm larger than the corresponding dimensions of the chip.

[0088] This embodiment also provides a method for preparing the semiconductor sample for failure analysis grinding and sampling, and the preparation method comprises the following steps:

[0089] (1) Controlling the temperature of the operating table to 90° C., and fixing three limiting structures on the first cover sheet and the second cover sheet respectively by adhesive films on the operating table to obtain a first cover sheet with limiting structures and a second cover sheet with limiting structures;

[0090] (2) controlling the temperature of the operating table to 90° C., coating a first adhesive film on the first cover sheet on the operating table, wherein the first adhesive film covers the limiting structures, and placing a chip body on the first adhesive film, wherein the chip body is arranged directly above the three limiting structures, and wherein the first surface of the chip body is in contact with the three limiting structures;

[0091] (3) coating the chip body with a second adhesive film, and covering the second adhesive film with the second cover sheet with the limiting structure obtained in step (1), wherein the limiting structure attached to the second cover sheet is located directly above the chip body so that the second adhesive film covers the limiting structure, and pressing the first cover sheet and the second cover sheet around with tweezers so that the surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet;

[0092] A weight pressure of 10 g was applied to the first cover sheet and the second cover sheet, and the first adhesive film and the second adhesive film were cured by heating at 80° C. for 25 min to obtain a semiconductor sample for grinding and sample preparation for failure analysis.

[0093] Example 3

[0094] This embodiment provides a semiconductor sample for grinding and preparing a sample for failure analysis, wherein the semiconductor sample comprises:

[0095] The chip body has a first surface and a second surface facing each other;

[0096] The protective film layer comprises a first adhesive film disposed on the first surface of the chip body, a second adhesive film disposed on the second surface of the chip body, and a limiting structure;

[0097] Wherein, three limiting structures are arranged in the first adhesive film and the second adhesive film, and the limiting structures have arc portions, and the arc portions are in contact with the first surface and the second surface of the chip body;

[0098] The cover sheet includes a first cover sheet arranged on a first adhesive film and a second cover sheet arranged on a second adhesive film, wherein the first cover sheet and the first surface are filled with the first adhesive film covering the limiting structure, and the second cover sheet and the second surface are filled with the second adhesive film covering the limiting structure.

[0099] The size of the chip body is 5 cm in length×5 cm in width×2.5 mm in height.

[0100] The first adhesive film and the second adhesive film are both made of epoxy resin AB glue; the thickness of the first adhesive film and the second adhesive film are both 350 microns.

[0101] The limiting structure is spherical; the height of the limiting structure from the cover plate end to the chip body is 350 microns; the material of the limiting structure is steel; three limiting structures form the vertices of a triangle on the first surface or the second surface; the limiting structure is fixedly connected to the cover plate through an adhesive film.

[0102] The surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet; the first cover sheet and the second cover sheet are each independently a cover glass and / or a slide glass; the thickness of the first cover sheet and the second cover sheet are both 0.15 mm; the length dimensions of the first cover sheet and the second cover sheet are both 0.8 cm larger than the corresponding dimensions of the chip; the width dimensions of the first cover sheet and the second cover sheet are both 0.8 cm larger than the corresponding dimensions of the chip.

[0103] This embodiment also provides a method for preparing the semiconductor sample for failure analysis grinding and sampling, and the preparation method comprises the following steps:

[0104] (1) Controlling the temperature of the operating table to be 110° C., and fixing three limiting structures on the first cover sheet and the second cover sheet respectively by adhesive films on the operating table to obtain a first cover sheet with limiting structures and a second cover sheet with limiting structures;

[0105] (2) controlling the temperature of the operating table to 110° C., coating a first adhesive film on the first cover sheet on the operating table, wherein the first adhesive film covers the limiting structures, and placing a chip body on the first adhesive film, wherein the chip body is arranged directly above the three limiting structures, and wherein the first surface of the chip body is in contact with the three limiting structures;

[0106] (3) coating the chip body with a second adhesive film, and covering the second adhesive film with the second cover sheet with the limiting structure obtained in step (1), wherein the limiting structure attached to the second cover sheet is located directly above the chip body so that the second adhesive film covers the limiting structure, and pressing the first cover sheet and the second cover sheet around with tweezers so that the surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet;

[0107] A weight of 30 g was applied to the first cover sheet and the second cover sheet, and the first adhesive film and the second adhesive film were cured by heating at 120° C. for 35 min to obtain a semiconductor sample for grinding and sample preparation for failure analysis.

[0108] It can be seen from Examples 1 to 3 that the semiconductor sample prepared by grinding for failure analysis provided by the present invention has the advantages of a flat film surface, uniform thickness and low porosity; and the subsequent grinding sample preparation success rate is as high as 100%.

[0109] Example 4

[0110] This embodiment provides a semiconductor sample for failure analysis grinding. The semiconductor sample is the same as Embodiment 1 except that the spherical limiting structure is replaced by a hemispherical structure and the spherical surface is in contact with the first surface and the second surface, and will not be described again.

[0111] From Example 1 and Example 4, it can be seen that the spherical limiting structure adopted in Example 1 is not much different from the hemispherical limiting structure adopted in Example 4 in terms of the flatness and porosity of the first film and the second film. However, the hemispherical limiting structure adopted in Example 4 increases the difficulty of operation. Since the size of the limiting structure itself is very small, the spherical structure is more conducive to the setting of the limiting structure and is more likely to form a stable triangular structure, which leads to a decrease in the overall success rate of sample preparation in Example 4.

[0112] Comparative Example 1

[0113] This comparative example provides a semiconductor sample for failure analysis grinding and sampling. The semiconductor sample is the same as Example 1 except that the spherical limiting structure is replaced by a rectangular limiting structure, and the height of the rectangular limiting structure is kept the same as the diameter of the spherical limiting structure, and the rest is not repeated here.

[0114] In this comparative example, a rectangular limiting structure is used. Since the contact surface with the chip body has edges and corners, the chip body is easily scratched, resulting in sample preparation failure.

[0115] Comparative Example 2

[0116] This comparative example provides a semiconductor sample for failure analysis grinding and sampling. The semiconductor sample is the same as Example 1 except that the limiting structure does not contact the first surface and the second surface, but is arranged around the chip body, and the limiting structure is only arranged on the first cover plate and the diameter of the limiting structure is set to 0.58 mm. It will not be repeated here.

[0117] In this comparative example, since the limiting structure is arranged at the periphery of the chip body, the limiting structure needs to be ground off during the subsequent grinding process, which not only easily leads to structural instability but also increases the grinding cost.

[0118] Comparative Example 3

[0119] This comparative example provides a semiconductor sample for grinding and preparing samples for failure analysis. The semiconductor sample is the same as Example 1 except that a limiting structure is not provided, and the details will not be repeated here.

[0120] The test image of the adhesive film of the semiconductor sample obtained in this comparative example for failure analysis grinding and sampling is as follows: Figure 4 As shown, from Figure 4 It can be seen that the thickness of the film is uneven, and there are bubbles or gaps in the middle of the film. The semiconductor sample prepared in this comparative example is prone to tilt during the grinding process (see Figure 6 ), where A represents the grinding direction, B is the virtual cutting plane, and C is the sample cutting plane. It can be found that the sample cutting plane is tilted, causing the micron-level structure to tilt, resulting in inaccurate failure analysis.

[0121] Comparative Example 4

[0122] This comparative example provides a semiconductor sample for failure analysis grinding and sampling. The semiconductor sample is the same as Example 1 except that only two limiting structures are provided on the first cover plate and the second cover plate respectively, and the rest is not repeated here.

[0123] The test image of the adhesive film of the semiconductor sample obtained in this comparative example for failure analysis grinding and sampling is as follows: Figure 5 As shown, since only two limiting structures are provided in this comparative example, the surface of the film is still uneven and there are more bubbles than in Example 1.

[0124] It can be seen from Example 1 and Comparative Examples 1 to 4 that the semiconductor sample for failure analysis grinding provided by the present invention is provided with a limiting structure, and the limiting structure is controlled to have an arc portion, the number of which is at least three and is provided on the surface of the chip body. The combination of these technical features can protect the chip body, improve the flatness of the film and reduce the porosity, and subsequently significantly improve the success rate of failure analysis.

[0125] The present invention illustrates the detailed structural features of the present invention through the above embodiments, but the present invention is not limited to the above detailed structural features, that is, it does not mean that the present invention must rely on the above detailed structural features to be implemented. Those skilled in the art should understand that any improvement of the present invention, equivalent replacement of the components selected by the present invention, addition of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

Claims

1. A method for preparing semiconductor samples for failure analysis grinding and sampling, characterized in that: The preparation method comprises: (1) at least three limiting structures are respectively provided on the first cover sheet and the second cover sheet to obtain a first cover sheet with a limiting structure and a second cover sheet with a limiting structure; (2) coating a first adhesive film on the first cover sheet, wherein the first adhesive film covers the limiting structures, and placing a chip body on the first adhesive film with the first surface of the chip body in contact with at least three limiting structures; (3) coating the chip body with a second adhesive film, and covering the second cover sheet with a limiting structure obtained in step (1) on the second adhesive film so that the second adhesive film covers the limiting structure, applying pressure to the first cover sheet and the second cover sheet and heating and curing the first adhesive film and the second adhesive film, thereby obtaining a semiconductor sample for failure analysis grinding and sampling; Wherein, at least three limiting structures are arranged in the first adhesive film and the second adhesive film, and the limiting structures have arc portions, and the arc portions are in contact with the first surface and the second surface of the chip body.

2. The preparation method according to claim 1, characterized in that: The semiconductor sample comprises: The chip body has a first surface and a second surface facing each other; The protective film layer comprises a first adhesive film disposed on the first surface of the chip body, a second adhesive film disposed on the second surface of the chip body, and a limiting structure; The cover sheet comprises a first cover sheet arranged on a first adhesive film and a second cover sheet arranged on a second adhesive film, wherein the space between the first cover sheet and the first surface is filled with the first adhesive film covering the limiting structure, and the space between the second cover sheet and the second surface is filled with the second adhesive film covering the limiting structure; the surface of the first cover sheet close to the chip body is parallel to the first surface sheet, and the surface of the second cover sheet close to the chip body is parallel to the second surface sheet.

3. The preparation method according to claim 1, characterized in that: The size of the chip body ranges from 1 cm to 10 cm in length×1 cm to 10 cm in width×0.5 mm to 5 mm in height.

4. The preparation method according to claim 1, characterized in that: The materials of the first adhesive film and the second adhesive film are independently epoxy resin AB glue.

5. The preparation method according to claim 1, characterized in that: The thickness of the first adhesive film and the second adhesive film are independently 300 micrometers to 500 micrometers.

6. The preparation method according to claim 1, characterized in that: The limiting structure is spherical or hemispherical.

7. The preparation method according to claim 1, characterized in that: The limiting structure is spherical.

8. The preparation method according to claim 1, characterized in that: The height of the limiting structure in the direction from the cover plate end to the chip body is 300 microns to 500 microns.

9. The preparation method according to claim 1, characterized in that: At least three limiting structures form vertices of a polygon on the first surface or the second surface.

10. The preparation method according to claim 1, characterized in that: The limiting structure is fixedly connected to the cover sheet via an adhesive film.

11. The preparation method according to claim 1, characterized in that: The first cover sheet and the second cover sheet are each independently a cover glass and / or a slide glass.

12. The preparation method according to claim 1, characterized in that: The thickness of the first cover sheet and the second cover sheet are independently 0.13 mm to 0.2 mm.

13. The preparation method according to claim 1, characterized in that: The lengthwise dimensions of the first cover sheet and the second cover sheet are both 0.5 cm to 1 cm larger than the corresponding dimensions of the chip.

14. The preparation method according to claim 1, characterized in that: The width dimensions of the first cover sheet and the second cover sheet are both 0.5 cm to 1 cm larger than the corresponding dimensions of the chip.

15. The preparation method according to claim 1, characterized in that: The step (1) of providing at least three limiting structures includes: fixing the limiting structures on the first cover sheet and the second cover sheet by adhesive films.

16. The preparation method according to claim 1, characterized in that: The adhesive film is made of the same material as the first adhesive film and the second adhesive film.

17. The preparation method according to claim 1, characterized in that: Step (1) is performed on the operating table.

18. The preparation method according to claim 17, characterized in that: The temperature of the operating table in step (1) is 90-110°C.

19. The preparation method according to claim 1, characterized in that: In step (2), the chip body is arranged directly above at least three limiting structures.

20. The preparation method according to claim 1, characterized in that: Step (2) is performed on the operating table.

21. The preparation method according to claim 20, characterized in that: The temperature of the operating table in step (2) is 90-110°C.

22. The preparation method according to claim 1, characterized in that: In step (3), the limiting structure attached to the second cover sheet is located directly above the chip body.

23. The preparation method according to claim 1, characterized in that: The weight range of the pressure applied in step (3) is 10g~50g.

24. The preparation method according to claim 1, characterized in that: The temperature of the heating curing is 80-120°C.

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