A method, system, device and medium for generating massive communication signals
Communication signals are classified and grouped through DSP, generated and merged into multiple signals, and transmitted to FPGA for synthesis, solving the problem of excessive FPGA resource consumption and achieving low-cost production of massive communication signals.
Patent Information
- Application Number
- CN202410614021.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-17
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2044-05-17
AI Technical Summary
In complex electromagnetic environment simulation equipment, when massive communication signals are generated, the resource consumption of field programmable gate array (FPGA) is too large and cannot meet the low-cost needs.
The communication signals to be generated are classified and grouped through a digital signal processor (DSP), and digital baseband signals are generated, and combined into pre-stage multiple signals, which are transmitted to FPGA for synthesis. FPGA only needs to synthesize 1 digital signal, and The analog intermediate frequency signal is output through a digital analog converter (DAC), and the resource is transferred to the DSP.
It reduces the resource consumption of FPGA, reduces hardware cost and complexity, meets the requirements of low cost, and only increases the computing time of DSP rather than hardware cost.
Smart Images
Figure CN118573299B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electromagnetic environment simulation, and provides a method, system, device and medium for generating massive communication signals. Background Art
[0002] In a typical complex electromagnetic environment simulation device, the device is required to simulate hundreds or even thousands of communication signals at the same time, which can be achieved by using a digital signal processor (DSP) and a field-programmable gate array (FPGA). If 500 signals need to be generated, the DSP needs to generate 500 modulated zero intermediate frequency baseband signals, and the FPGA needs to design 500 channels, which requires 500 independent up-conversion modules. Each up-conversion module needs to implement variable sampling rate, filtering, and frequency conversion functions to up-convert each zero intermediate frequency signal to the specified output frequency band.
[0003] Assuming that each channel consumes 30 FPGA multiplier resources, 500 channels will require a total of 15,000 multipliers. However, a conventional high-performance domestic FPGA usually only has about 3,600 multipliers. Therefore, at least 6 high-performance domestic FPGAs are required, which consumes a lot of FPGA resources and cannot meet the low-cost requirements. Summary of the invention
[0004] The present application provides a method, system, device and medium for generating massive communication signals, which are used to solve the problem of large FPGA resource consumption when generating massive communication signals.
[0005] In a first aspect, a method for generating massive communication signals is provided, which is applied to an electromagnetic environment simulation system; the electromagnetic environment simulation system comprises a digital signal processor DSP, a field programmable gate array FPGA and a digital analog converter DAC connected in sequence; the method comprises:
[0006] The DSP classifies the communication signal to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0;
[0007] The DSP sequentially sorts and groups the multiple signals of each type of signal in the M types of signals according to the center frequency to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; and N is a positive integer greater than 0;
[0008] The DSP sequentially modulates and performs mixing shift on each signal in the N groups of signals to obtain N groups of digital baseband signals;
[0009] The DSP sequentially combines and converts the sampling rates of the N groups of digital baseband signals to obtain a pre-stage combined and converted sampling signal of each type of signal;
[0010] The FPGA sequentially performs sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal;
[0011] The FPGA combines the post-stage sampling and mixing signals of the M-type signals to obtain a combined digital signal;
[0012] The DAC performs digital-to-analog conversion on the combined digital signal and outputs an analog intermediate frequency signal.
[0013] Optionally, the DSP classifies signals with the same modulation mode and the same symbol rate in the communication signals to be generated into one category to obtain M-category signals.
[0014] Optionally, the DSP uses a maximum value that is an integer multiple of the symbol rate and is less than or equal to a preset frequency as the baseband sampling rate, and adopts a corresponding modulation method for each signal in the N groups of signals to obtain N groups of digital baseband zero intermediate frequency signals;
[0015] The DSP uses the difference between the center frequency of each signal in each group of signals and the center frequency of each group of signals as a mixing value, performs mixing offset on each group of digital baseband zero intermediate frequency signals, and obtains N groups of digital baseband signals.
[0016] Optionally, the center frequency of each group of signals is calculated as:
[0017] FM=(FH-FL) / 2+FL
[0018] Among them, FM is the center frequency of each group of signals, FH is the highest frequency in each group of signals, and FL is the lowest frequency in each group of signals.
[0019] Optionally, the DSP combines signals of the same group among the N groups of digital baseband signals to obtain a pre-stage combined signal of each type of signal;
[0020] The DSP performs sampling rate conversion on the front-stage combined signal of each type of signal to obtain the front-stage combined converted sampling signal of each type of signal; the sampling rate of the front-stage combined signal is the baseband sampling rate, and the sampling rate of the front-stage combined converted sampling signal is the preset frequency.
[0021] Optionally, the FPGA performs sampling rate conversion on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling signal of each type of signal; the sampling rate of the rear-stage variable sampling signal is the output bandwidth of the DAC;
[0022] The FPGA uses the difference between the center frequency of each group of signals and the center frequency of each type of signal as a mixing value, performs mixing offset on the post-stage variable sampling signal of each type of signal, and obtains the post-stage variable sampling mixing signal of each type of signal.
[0023] Optionally, the center frequency of each type of signal is calculated as follows:
[0024] FAM=(FAH-FAL) / 2+FAL
[0025] Among them, FAM is the center frequency of each type of signal, FAH is the highest frequency in each type of signal, and FAL is the lowest frequency in each type of signal.
[0026] In a second aspect, an electromagnetic environment simulation system based on any one of the methods described in the first aspect is provided, wherein the electromagnetic environment simulation system comprises a digital signal processor DSP, a field programmable gate array FPGA and a digital-to-analog converter DAC connected in sequence;
[0027] The DSP is used to classify the communication signal to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0;
[0028] The DSP is also used to sort and group the multi-channel signals of each type of signal in the M types of signals in sequence according to the center frequency, so as to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; and N is a positive integer greater than 0;
[0029] The DSP is also used to perform modulation and mixing shift on each signal in the N groups of signals to obtain N groups of digital baseband signals;
[0030] The DSP is also used to sequentially combine and convert the sampling rates of the N groups of digital baseband signals to obtain a pre-stage combined and converted sampling signal of each type of signal;
[0031] The FPGA is used to sequentially perform sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal;
[0032] The FPGA is also used to combine the post-stage sampling and mixing signals of the M-type signals to obtain a combined digital signal;
[0033] The DAC is used to perform digital-to-analog conversion on the combined digital signal and output an analog intermediate frequency signal.
[0034] In a third aspect, the present application provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method for generating massive communication signals described in the first aspect.
[0035] In a fourth aspect, the present application provides a computer-readable storage medium storing a computer program, which, when loaded and executed by a processor, implements the method for generating massive communication signals described in the first aspect.
[0036] Compared with the prior art, the beneficial effects of the embodiments of the present application are as follows:
[0037] The present application provides a method for generating massive communication signals, which is applied to an electromagnetic environment simulation system; the electromagnetic environment simulation system comprises a digital signal processor (DSP), a field programmable gate array (FPGA) and a digital-to-analog converter (DAC) connected in sequence; the method comprises: the DSP classifies the communication signals to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0; the DSP sequentially sorts and groups the multi-channel signals of each type of signal in the M types of signals according to the size of the center frequency to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; N is a positive integer greater than 0; the DSP sequentially modulates and performs mixing offset on each group of signals in the N groups of signals to obtain N groups of digital baseband signals; the DSP sequentially combines and performs sampling rate conversion on the N groups of digital baseband signals to obtain a front-stage combined and variable sampling signal of each type of signal; the FPGA sequentially performs sampling rate conversion and mixing offset on the front-stage combined and variable sampling signal of each type of signal to obtain a rear-stage variable sampling and mixed signal of each type of signal; the FPGA combines the rear-stage variable sampling and mixed signals of the M types of signals to obtain a combined digital signal.
[0038] This application realizes the generation of massive signals through two-level signal synthesis of DSP and FPGA. DSP classifies and groups communication signals, generates N×M digital baseband signals, and then synthesizes N×M digital baseband signals into M front-end multi-channel signals, which are then transmitted to FPGA. FPGA only needs to synthesize M front-end multi-channel synthesized signals into 1 digital signal, and converts them into analog intermediate frequency signals through DAC for output. When generating massive communication signals, the resource consumption of FPGA is transferred to DSP, and DSP undertakes part of the classification and synthesis work, which will only increase the operation time of DSP, and will not increase the hardware cost and complexity, thereby reducing the resource consumption of FPGA. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0040] Attached Figure 1 A schematic diagram of the structure of an electromagnetic environment simulation system involved in an embodiment of the present application;
[0041] Attached Figure 2 A schematic diagram of a flow chart of a method for generating a massive communication signal provided in an embodiment of the present application;
[0042] Attached Figure 3 A schematic diagram of signal grouping provided in an embodiment of the present application;
[0043] Attached Figure 4 A schematic diagram of signal conversion provided in an embodiment of the present application. DETAILED DESCRIPTION
[0044] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily. In addition, although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that here.
[0045] In conventional designs, communication systems with a small number of channels are usually implemented using FPGAs. However, when the number of channels increases N times, the resource consumption of the FPGA increases N times, and the cost increases N times, which cannot meet the low-cost requirements. Another method is to use DSP and FPGA together. After the DSP generates multiple modulated zero-IF baseband signals, it transmits them to the FPGA. The FPGA designs an independent channel for each signal, converts it to a specified frequency band, and finally synthesizes the multiple modulated zero-IF baseband signals into a single signal with the same sampling rate, which also consumes a lot of FPGA resources.
[0046] In order to solve the problem of large FPGA resource consumption when generating massive communication signals, the embodiment of the present application provides a method for generating massive communication signals, which is applied to an electromagnetic environment simulation system. The following is a brief introduction to the application scenarios to which the technical solution of the embodiment of the present application can be applied. It should be noted that the application scenarios introduced below are only used to illustrate the embodiment of the present application and are not limited. In the specific implementation process, the technical solution provided by the embodiment of the present application can be flexibly applied according to actual needs.
[0047] Please refer to the attached Figure 1 , is a schematic diagram of the structure of the electromagnetic environment simulation system provided in the embodiment of the present application. The electromagnetic environment simulation system comprises a digital signal processor DSP, a field programmable gate array FPGA and a digital analog converter DAC connected in sequence.
[0048] Among them, DSP is a microprocessor or application-specific integrated circuit specially designed for efficient processing of digital signals. FPGA is a programmable logic device with the characteristics of high flexibility, superior performance, and low power consumption. It consists of a large number of programmable logic resources (such as logic gates, storage cells, etc.) and a programmable interconnection network. DAC is an electronic device used to convert digital signals into analog signals. DAC can use complex DAC, which is used to convert complex digital signals (including real and imaginary parts) into corresponding complex analog signals.
[0049] The structure of the electromagnetic environment simulation system is introduced above. Please refer to the attached Figure 2 , is a flow chart of a method for generating a massive communication signal provided in an embodiment of the present application. Figure 1 The electromagnetic environment simulation system is used for the Figure 2 The method for generating the massive communication signal shown is introduced.
[0050] S201. DSP classifies the communication signal to be generated according to the modulation mode to obtain M-type signals.
[0051] In the specific implementation process, the communication signal to be generated includes multiple signals, and the modulation method of each signal may be different, such as amplitude shift key modulation (Amplitude Shift Keying, ASK), frequency shift key modulation (Frequency Shift Keying, FSK), binary phase shift key modulation (Binary Phase Shift Keying, BPSK), quadrature phase shift key modulation (Quadrature Phase Shift Keying, QPSK), quadrature amplitude modulation (Quadrature Amplitude Modulation, QAM), and minimum shift key modulation (Minimum Shift Keying, MSK).
[0052] In a possible embodiment, the DSP may classify the same modulation modes in the communication signals to be generated into one category to obtain M-category signals.
[0053] In the embodiment of the present application, M is a positive integer greater than 0. If the communication signals to be generated all adopt a modulation method, M = 1. The method of directly classifying according to the modulation method is relatively simple, and the corresponding modulation algorithm can be directly used for each type of signal in the subsequent process, making the modulation process more efficient.
[0054] Considering that the symbol rate of conventionally used communication signals is not random but adopts some specific values, in another possible embodiment, the DSP can classify the signals with the same modulation mode and the same symbol rate in the communication signals to be generated into one category to obtain M-category signals.
[0055] In the embodiments of the present application, the symbol rate refers to the number of symbols transmitted per unit time in a digital communication system, usually expressed in symbols per second (symbol / s). The classification method based on modulation mode and symbol rate is more accurate to better describe the signal characteristics under different modulation modes.
[0056] S202, DSP sorts and groups the multi-channel signals of each type of signal in the M types of signals in sequence according to the size of the center frequency to obtain N groups of signals of each type of signal.
[0057] In the specific implementation process, for the multiple signals of each type of signal, the DSP can sort them in order from large to small or from small to large according to the center frequency, and group the signals whose frequency range is less than or equal to the baseband sampling rate into one group, so as to obtain N groups of signals of each type of signal. Among them, N is a positive integer greater than 0, and the difference between the highest frequency FH and the lowest frequency FL of each group of signals is less than or equal to the baseband sampling rate.
[0058] Please refer to the attached Figure 3, is a schematic diagram of a signal grouping provided in an embodiment of the present application, in which signals with BPSK modulation mode and the same symbol rate are classified into one category, and all signals of this category are sorted from low to high by frequency, wherein FAH is the highest frequency in this category of signals, and FAL is the lowest frequency in each category of signals, and this category of signals is divided into two groups, each group of signals has the same modulation mode, the same symbol rate, and the total signal bandwidth is less than the preset frequency Fin, and is also less than the baseband sampling rate.
[0059] The preset frequency Fin is determined according to the output bandwidth Fs of the DAC, and the preset frequency = the output bandwidth of the DAC / the preset multiple. For example, if the preset multiple is 8, then Fin = Fs / 8.
[0060] S203 , DSP performs modulation and mixing shift on each signal in the N groups of signals in turn to obtain N groups of digital baseband signals.
[0061] In a possible embodiment, the DSP uses a maximum value that is an integer multiple of the symbol rate and less than or equal to a preset frequency as the baseband sampling rate, and adopts a corresponding modulation method for each signal in N groups of signals to obtain N groups of digital baseband zero intermediate frequency signals; the DSP uses the difference between the center frequency of each signal in each group of signals and the center frequency of each group of signals as the mixing value, performs mixing offset on each group of digital baseband zero intermediate frequency signals to obtain N groups of digital baseband signals.
[0062] During the specific implementation process, DSP can generate a digital baseband zero intermediate frequency signal for each group of signals based on the parameters of each group of signals, such as carrier frequency, symbol rate, etc., by calling the corresponding modulation algorithm, with the maximum value of the symbol rate being an integer multiple and less than or equal to the preset frequency Fin as the baseband sampling rate F, and a total of N groups of digital baseband zero intermediate frequency signals are obtained. The digital baseband zero intermediate frequency signal refers to a digital baseband complex signal with a center frequency of 0 and a certain bandwidth.
[0063] Furthermore, DSP uses the difference (FX-FM) between the center frequency FX of each signal and the center frequency FM of each group of signals as the mixing value, and shifts the digital baseband zero intermediate frequency signal of each signal to be generated through mixing, that is, the digital baseband signal. For example, FX is the center frequency of each signal of the nth group of signals, and FM is the center frequency of all signals of the nth group of signals.
[0064] The calculation formula for the center frequency of each group of signals is:
[0065] FM=(FH-FL) / 2+FL
[0066] Among them, FM is the center frequency of each group of signals, FH is the highest frequency in each group of signals, and FL is the lowest frequency in each group of signals.
[0067] Conventional digital signal processing implements mixing offset through complex multiplication. For example, f1 is the baseband signal, f2 is the mixing signal, and f1 is mixed with the frequency of f2 as the mixing value, that is, f1×f2=f1+f2, where × represents mixing, and the output frequency value is the sum of f1 and f2, that is, the frequency of f1 is offset by f2.
[0068] When there are not many conventional communication signal generation channels, the synthesis of multiple signals can be achieved by DSP software instead of FPGA. In order to achieve a higher error vector magnitude (EVM), DSP software is required to generate a modulated zero intermediate frequency baseband signal of a certain length with the required parameters without phase jump, that is, the beginning and end of the digital waveform samples of each modulated zero intermediate frequency baseband signal are continuous. By repeatedly playing the digital waveform samples from the beginning to the end, uninterrupted high EVM communication signal output can be achieved. However, when it is necessary to generate multiple zero intermediate frequency baseband signals modulated with different bandwidths, due to the different symbol rates of each signal, the sampling rate of the modulated zero intermediate frequency baseband signal is an integer multiple of the symbol rate. Therefore, the sampling rate is different, and the length of the generated digital waveform samples is different. When multi-channel synthesis is required, it is necessary to unify the multi-channel digital waveforms to the same length according to the least common multiple of the length of the multi-channel digital waveform samples, and then realize multi-channel synthesis by addition. In this way, the calculation amount and memory consumption of calculating the digital waveform samples in the least common multiple manner are very large.
[0069] In the embodiment of the present application, DSP uses the maximum value of an integer multiple of the symbol rate and less than or equal to the preset frequency Fin as the baseband sampling rate F. Since the symbol rates of all signals in each group of signals are the same, the sampling rates of all signals in each group of signals are the same, and the modulation methods are also the same. Therefore, the lengths of the generated digital baseband zero intermediate frequency signals are the same, which facilitates the synthesis of multiple signals in the subsequent stage without unifying the signal lengths, thereby reducing the amount of calculation and memory consumption.
[0070] S204, DSP combines and converts the sampling rates of the N groups of digital baseband signals in sequence to obtain the pre-stage combined and converted sampling signals of each type of signal.
[0071] In a possible embodiment, the DSP merges signals of the same group among N groups of digital baseband signals to obtain a pre-stage combined signal for each type of signal; the DSP performs sampling rate conversion on the pre-stage combined signal for each type of signal to obtain a pre-stage combined variable sampling signal for each type of signal; the sampling rate of the pre-stage combined signal is the baseband sampling rate, and the sampling rate of the pre-stage combined variable sampling signal is a preset frequency.
[0072] In the specific implementation process, the DSP combines N groups of digital baseband signals of each type of signal into one digital signal, namely, the front-stage combined signal, through addition, and converts the sampling rate of the front-stage combined signal from the baseband sampling rate F to the preset frequency Fin through any sampling rate conversion algorithm, such as Lagrange interpolation, Newton interpolation, Hermite interpolation, etc., to obtain the front-stage combined signal. The sampled signal is then transmitted to the FPGA.
[0073] S205 , FPGA sequentially performs sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal.
[0074] In a possible embodiment, the FPGA performs sampling rate conversion on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling signal of each type of signal; the sampling rate of the rear-stage variable sampling signal is the output bandwidth of the DAC; the FPGA uses the difference between the center frequency of each group of signals and the center frequency of each type of signal as the mixing value, performs mixing offset on the rear-stage variable sampling signal of each type of signal, and obtains the rear-stage variable sampling mixed signal of each type of signal.
[0075] In the specific implementation process, FPGA converts the pre-stage combined sampling signal of each type of signal to the output bandwidth Fs of DAC through the sampling rate conversion module inside FPGA, that is, the post-stage sampling signal. The sampling rate conversion module refers to the conventional digital signal processing through interpolation, half-band filtering, and CIC filter to achieve the sampling rate of digital signals from low to high.
[0076] In the embodiment of the present application, only preset multiples of sampling rate conversion are implemented through interpolation, and the sampling rate of the input signal is converted to a preset integer multiple at one time, and fractional multiples of sampling rate conversion is not implemented to reduce FPGA resource consumption. For example, Fin = Fs / 8, and only 8 times sampling rate conversion is implemented through interpolation.
[0077] Furthermore, the FPGA uses the difference (FM-FAM) between the center frequency FM of each group of signals and the center frequency FAM of each type of signal as the mixing value, and shifts the post-stage variable sampling signal of each type of signal through mixing to obtain the post-stage variable sampling mixed signal of each type of signal. For example, FAM is the center frequency of all signals of the mth type of signal, and FM is the center frequency of all signals of the nth group of signals in the mth type of signal.
[0078] The calculation formula for the center frequency of each type of signal is as follows:
[0079] FAM=(FAH-FAL) / 2+FAL
[0080] Among them, FAM is the center frequency of each type of signal, FAH is the highest frequency in each type of signal, and FAL is the lowest frequency in each type of signal.
[0081] In the embodiment of the present application, the FPGA increases the sampling rate of the front-stage combined sampling signal to the output bandwidth of the DAC. By matching the sampling rate of the front-stage signal processing with the bandwidth of the DAC output, the mismatch problem between the signal processing and transmission links can be effectively avoided, which helps to achieve a higher signal transmission rate and lower signal distortion.
[0082] S206 , FPGA combines the post-stage sampling and mixing signals of the M-type signal to obtain a combined digital signal.
[0083] In a specific implementation process, for M types of signals, M post-stage variable sampling and mixing signals can be obtained, and these M post-stage variable sampling and mixing signals are combined into one signal through addition, that is, a combined digital signal.
[0084] S207, DAC performs digital-to-analog conversion on the combined digital signal and outputs an analog intermediate frequency signal.
[0085] In the specific implementation process, the combined digital signal is converted into an analog intermediate frequency signal through a DAC, and the analog intermediate frequency signal is output to the antenna through a power amplifier to achieve the output of complex communication signals.
[0086] Please refer to the attached Figure 4 , which is a schematic diagram of signal conversion provided in an embodiment of the present application, is shown below in conjunction with the attached Figure 4 , the overall process of the method for generating massive communication signals provided in an embodiment of the present application is introduced.
[0087] DSP divides the communication signals to be generated into M categories, including category 1 signals, ..., and category M signals, divides each category of signals into N groups, modulates each group of signals, and obtains N digital baseband zero intermediate frequency signals, including digital baseband zero intermediate frequency signal 1, digital baseband zero intermediate frequency signal 2, ..., and digital baseband zero intermediate frequency signal N. Mix and shift each digital baseband zero intermediate frequency signal to obtain N digital baseband signals, including digital baseband signal 1, digital baseband signal 2, ..., and digital baseband signal N. Multi-channel signal synthesis is performed on the N digital baseband signals to obtain a front-stage combined signal. By analogy, each category of signals in the M categories is processed to obtain M front-stage combined signals, including front-stage combined signal 1, ..., and front-stage combined signal M. Each front-stage combined signal is sampled separately to obtain M front-stage combined variable sampling signals, and transmitted to the FPGA.
[0088] FPGA performs variable sampling on each channel of front-stage combined signal to obtain M channels of rear-stage variable sampling signals, performs mixing and offset on each channel of rear-stage variable sampling signal to obtain M channels of rear-stage variable sampling mixed signals, including rear-stage variable sampling mixed signals 1, ..., and rear-stage variable sampling mixed signals M, performs multi-channel signal synthesis on the M channels of rear-stage variable sampling mixed signals to obtain a combined digital signal, performs digital-to-analog conversion on the combined digital signal through a DAC, and outputs an analog intermediate frequency signal.
[0089] In summary, the embodiment of the present application provides a method for generating massive communication signals, which is applied to the electromagnetic environment simulation system. The DSP is responsible for baseband signal classification and generation and front-stage multi-channel signal synthesis, and the FPGA is responsible for synthesizing the front-stage multi-channel synthesized signal into one rear-stage synthesized signal, and converting it into an analog intermediate frequency signal output through the DAC. If 500 channels of 10 types of signals with the same modulation mode and the same symbol rate are generated, the FPGA in the prior art needs to design 500 channels, and the embodiment of the present application can realize the synthesis of 1 front-stage signal for every 50 channels of the front-stage signal through the DSP, and then realize the synthesis of 10 types of signals through the rear-stage FPGA. The FPGA only needs to design 10 channels, and compared with the prior art, the FPGA resource consumption is reduced by 50 times. The resource consumption of the FPGA is transferred to the DSP, and the operation time will only be increased when the DSP is operated, without increasing the hardware cost and complexity. The system can adopt the method of advance operation to calculate the cache data in advance, reduce the impact of the operation time, thereby reducing the resource consumption of the FPGA and meeting the low-cost requirements.
[0090] Based on the same inventive concept, an embodiment of the present application also provides an electromagnetic environment simulation system based on a method for generating massive communication signals; the electromagnetic environment simulation system includes a digital signal processor DSP, a field programmable gate array FPGA and a digital-to-analog converter DAC connected in sequence.
[0091] The DSP classifies the communication signal to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0;
[0092] The DSP sequentially sorts and groups the multiple signals of each type of signal in the M types of signals according to the size of the center frequency to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; and N is a positive integer greater than 0;
[0093] DSP modulates and mixes each signal in the N groups of signals in turn to obtain N groups of digital baseband signals;
[0094] DSP combines and converts the sampling rate of N groups of digital baseband signals in sequence to obtain the pre-stage combined and converted sampling signal of each type of signal;
[0095] FPGA performs sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal in turn to obtain the rear-stage variable sampling mixed signal of each type of signal;
[0096] FPGA combines the post-stage sampling and mixing signals of the M-type signal to obtain a combined digital signal;
[0097] The DAC performs digital-to-analog conversion on the combined digital signal and outputs an analog intermediate frequency signal.
[0098] Optionally, the DSP classifies signals with the same modulation mode and the same symbol rate in the communication signals to be generated into one category to obtain M-category signals.
[0099] Optionally, the DSP uses a maximum value that is an integer multiple of the symbol rate and is less than or equal to a preset frequency as the baseband sampling rate, and adopts a corresponding modulation method for each signal in the N groups of signals to obtain N groups of digital baseband zero intermediate frequency signals;
[0100] The DSP uses the difference between the center frequency of each signal in each group of signals and the center frequency of each group of signals as the mixing value, performs mixing offset on each group of digital baseband zero intermediate frequency signals, and obtains N groups of digital baseband signals.
[0101] Optionally, the center frequency of each group of signals is calculated as:
[0102] FM=(FH-FL) / 2+FL
[0103] Among them, FM is the center frequency of each group of signals, FH is the highest frequency in each group of signals, and FL is the lowest frequency in each group of signals.
[0104] Optionally, the DSP combines signals of the same group among the N groups of digital baseband signals to obtain a pre-stage combined signal of each type of signal;
[0105] The DSP performs sampling rate conversion on the pre-stage combined signal of each type of signal to obtain the pre-stage combined converted sampling signal of each type of signal; the sampling rate of the pre-stage combined signal is the baseband sampling rate, and the sampling rate of the pre-stage combined converted sampling signal is the preset frequency.
[0106] Optionally, the FPGA performs sampling rate conversion on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling signal of each type of signal; the sampling rate of the rear-stage variable sampling signal is the output bandwidth of the DAC;
[0107] The FPGA uses the difference between the center frequency of each group of signals and the center frequency of each type of signal as a mixing value, performs mixing offset on the post-stage variable sampling signal of each type of signal, and obtains the post-stage variable sampling mixing signal of each type of signal.
[0108] Optionally, the center frequency of each type of signal is calculated as follows:
[0109] FAM=(FAH-FAL) / 2+FAL
[0110] Among them, FAM is the center frequency of each type of signal, FAH is the highest frequency in each type of signal, and FAL is the lowest frequency in each type of signal.
[0111] It should be noted that each module in the electromagnetic environment simulation system in this embodiment corresponds one-to-one to each step in the method for generating massive communication signals in the aforementioned embodiment. Therefore, the specific implementation of this embodiment can refer to the implementation of the aforementioned method for generating massive communication signals, which will not be repeated here.
[0112] In addition, in one embodiment, the present application also provides an electronic device, which includes a processor, a memory, and a computer program stored in the memory, and the computer program implements the aforementioned method for generating massive communication signals when executed by the processor.
[0113] In addition, in one embodiment, the present application further provides a computer storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the aforementioned method for generating massive communication signals is implemented.
[0114] In some embodiments, the computer readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; or various devices including one or any combination of the above memories. The computer may be various computing devices including intelligent terminals and servers.
[0115] In some embodiments, executable instructions may be in the form of a program, software, software module, script or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine or other unit suitable for use in a computing environment.
[0116] As an example, executable instructions may, but need not, correspond to a file in a file system, may be stored as part of a file that stores other programs or data, such as in one or more scripts in a HyperText Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or code portions).
[0117] By way of example, executable instructions may be deployed to be executed on one computing device, or on multiple computing devices located at one site, or on multiple computing devices distributed across multiple sites and interconnected by a communication network.
[0118] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.
[0119] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.
[0120] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as a read-only memory / random access memory, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a multimedia terminal device (which can be a mobile phone, a computer, a television receiver, or a network device, etc.) to execute the methods described in each embodiment of the present application.
[0121] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A method for generating massive communication signals, characterized in that: Applied to an electromagnetic environment simulation system; the electromagnetic environment simulation system comprises a digital signal processor DSP, a field programmable gate array FPGA and a digital analog converter DAC connected in sequence; the method comprises: The DSP classifies the communication signal to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0; The DSP sequentially sorts and groups the multi-channel signals of each type of signal in the M types of signals according to the size of the center frequency to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; and N is a positive integer greater than 0; The DSP sequentially modulates and performs mixing shift on each signal in the N groups of signals to obtain N groups of digital baseband signals; The DSP sequentially combines and converts the sampling rates of the N groups of digital baseband signals to obtain a pre-stage combined and converted sampling signal of each type of signal; The FPGA sequentially performs sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal; The FPGA combines the post-stage sampling and mixing signals of the M-type signals to obtain a combined digital signal; The DAC performs digital-to-analog conversion on the combined digital signal and outputs an analog intermediate frequency signal; The DSP sequentially modulates and performs mixing shift on each signal in the N groups of signals to obtain N groups of digital baseband signals, including: The DSP uses the maximum value of an integer multiple of the symbol rate and less than or equal to the preset frequency as the baseband sampling rate, adopts a corresponding modulation method for each signal in the N groups of signals, and obtains N groups of digital baseband zero intermediate frequency signals; the DSP uses the difference between the center frequency of each signal in each group of signals and the center frequency of each group of signals as the mixing value, performs mixing offset on each group of digital baseband zero intermediate frequency signals, and obtains N groups of digital baseband signals.
2. The method for generating a massive communication signal according to claim 1, wherein: The DSP classifies the communication signal to be generated according to the modulation mode to obtain M-type signals, including: The DSP classifies signals with the same modulation mode and the same symbol rate in the communication signals to be generated into one category to obtain M-category signals.
3. The method for generating a massive communication signal according to claim 1, wherein: The calculation formula for the center frequency of each group of signals is: FM=(FH-FL) / 2+FL Among them, FM is the center frequency of each group of signals, FH is the highest frequency in each group of signals, and FL is the lowest frequency in each group of signals.
4. The method for generating a massive communication signal according to claim 1, wherein: The DSP sequentially combines and converts the sampling rates of the N groups of digital baseband signals to obtain a pre-stage combined and converted sampling signal of each type of signal, including: The DSP combines signals of the same group among the N groups of digital baseband signals to obtain a pre-stage combined signal of each type of signal; The DSP performs sampling rate conversion on the front-stage combined signal of each type of signal to obtain the front-stage combined converted sampling signal of each type of signal; the sampling rate of the front-stage combined signal is the baseband sampling rate, and the sampling rate of the front-stage combined converted sampling signal is the preset frequency.
5. The method for generating a massive communication signal according to claim 4, characterized in that: The FPGA sequentially performs sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal, including: The FPGA performs sampling rate conversion on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling signal of each type of signal; the sampling rate of the rear-stage variable sampling signal is the output bandwidth of the DAC; The FPGA uses the difference between the center frequency of each group of signals and the center frequency of each type of signal as a mixing value, performs mixing offset on the post-stage variable sampling signal of each type of signal, and obtains the post-stage variable sampling mixing signal of each type of signal.
6. The method for generating a massive communication signal according to claim 5, characterized in that: The calculation formula for the center frequency of each type of signal is as follows: FAM=(FAH-FAL) / 2+FAL Among them, FAM is the center frequency of each type of signal, FAH is the highest frequency in each type of signal, and FAL is the lowest frequency in each type of signal.
7. An electromagnetic environment simulation system based on the method for generating massive communication signals according to any one of claims 1 to 6, characterized in that: The electromagnetic environment simulation system comprises a digital signal processor DSP, a field programmable gate array FPGA and a digital analog converter DAC connected in sequence; The DSP is used to classify the communication signal to be generated according to the modulation mode to obtain M types of signals; wherein M is a positive integer greater than 0; The DSP is also used to sort and group the multi-channel signals of each type of signal in the M types of signals in sequence according to the center frequency, so as to obtain N groups of signals of each type of signal; wherein the difference between the highest frequency and the lowest frequency of each group of signals is less than or equal to the baseband sampling rate; and N is a positive integer greater than 0; The DSP is also used to perform modulation and mixing shift on each signal in the N groups of signals to obtain N groups of digital baseband signals; The DSP is also used to sequentially combine and convert the sampling rates of the N groups of digital baseband signals to obtain a pre-stage combined and converted sampling signal of each type of signal; The FPGA is used to sequentially perform sampling rate conversion and mixing offset on the front-stage combined variable sampling signal of each type of signal to obtain the rear-stage variable sampling mixed signal of each type of signal; The FPGA is also used to combine the post-stage sampling and mixing signals of the M-type signals to obtain a combined digital signal; The DAC is used to perform digital-to-analog conversion on the combined digital signal and output an analog intermediate frequency signal; The method of sequentially modulating and mixing-shifting each signal in the N groups of signals to obtain N groups of digital baseband signals includes: taking a maximum value that is an integer multiple of a symbol rate and is less than or equal to a preset frequency as a baseband sampling rate, adopting a corresponding modulation method for each signal in the N groups of signals to obtain N groups of digital baseband zero intermediate frequency signals; taking a difference between a center frequency of each signal in each group of signals and a center frequency of each group of signals as a mixing value, performing mixing-shifting on each group of digital baseband zero intermediate frequency signals to obtain N groups of digital baseband signals.
8. An electronic device, characterized in that: The electronic device includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method for generating a massive communication signal according to any one of claims 1 to 6.
9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is loaded and executed by the processor, the method for generating massive communication signals according to any one of claims 1 to 6 is implemented.