Analog switch circuit and control method thereof, sampling and holding system and converter

Abstract

The present invention provides an analog switch circuit and a control method thereof, a sampling and holding system and a converter, comprising: an analog switch module and a voltage sampling module, and also comprising a first feedback module and / or a second feedback module; when the analog switch module is turned on, the analog switch module samples the input signal received at the input end and outputs it through the output end; the analog switch module comprises a first MOS tube; the voltage sampling module is connected to the output end of the first MOS tube to sample the output end voltage of the first MOS tube; the first feedback module receives the output end voltage and compensates the input end voltage of the first MOS tube, and the second feedback module receives the output end voltage and compensates the body end voltage of the first MOS tube; at least one of the first feedback module and the second feedback module is used to reduce the leakage current when the analog switch module is turned off. The present invention is used to solve the problem that when the analog switch is turned off in the sampling phase, the device has leakage current, resulting in inaccurate sampling.

Description

Technical Field

[0001] The present invention relates to the field of signal control processing, and in particular to an analog switch circuit and a control method thereof, a sampling and holding system and a converter. Background Art

[0002] The Sample-and-Hold Circuit (S / H) plays a vital role in the Analog-to-Digital Converter (ADC). Its function is to quickly capture the instantaneous value of the analog signal during the ADC conversion process and keep this value unchanged during the conversion so that the ADC can accurately convert the signal.

[0003] In the S / H circuit, the analog switch is one of the core components, which is responsible for quickly connecting the input signal in the sampling phase and disconnecting it in the holding phase to keep the signal stable. The performance of the analog switch, such as switching speed, on-resistance, leakage current, etc., directly affects the performance of the S / H circuit.

[0004] With the continuous advancement of integrated circuit technology, deep submicron CMOS technology has made device size smaller and smaller. Although this has brought advantages in speed and power consumption, it has also brought some challenges, one of which is the increase in leakage current. Leakage current refers to the phenomenon that a small current still flows through the device due to the characteristics of semiconductor materials when there is no current drive (i.e. in the off state). In S / H circuits, the presence of leakage current will cause signal degradation and affect the accuracy and stability of ADC.

[0005] Based on this, how to solve the problem of inaccurate sampling caused by leakage current of the device when the analog switch is in the off state during the sampling phase has become an urgent problem that needs to be solved.

[0006] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0007] In view of the shortcomings of the prior art described above, an object of the present invention is to provide an analog switch circuit and a control method thereof, a sample-and-hold system and a converter, so as to solve the problem that when the analog switch is in the off state during the sampling phase, the device has leakage current resulting in inaccurate sampling.

[0008] To achieve the above-mentioned object and other related objects, the present invention provides an analog switch module, comprising: an analog switch module and a voltage sampling module, and also comprising a first feedback module and / or a second feedback module;

[0009] The analog switch module receives a first control signal, and turns the analog switch module on or off based on the first control signal. When the analog switch module is turned on, the analog switch module samples an input signal received at the input end and outputs it through the output end. The analog switch module includes a first MOS tube;

[0010] The voltage sampling module is connected to the output end of the first MOS tube to sample the output end voltage of the first MOS tube;

[0011] The first feedback module receives the output terminal voltage and compensates the input terminal voltage of the first MOS tube, and the second feedback module receives the output terminal voltage and compensates the body terminal voltage of the first MOS tube; at least one of the first feedback module and the second feedback module is used to reduce the leakage current when the analog switch module is turned off;

[0012] The first feedback module receives a second control signal, and turns on or off the first feedback module based on the second control signal; wherein, when the analog switch module is turned on, the compensation of the input terminal voltage is turned off.

[0013] Optionally, when the first MOS tube is set as an NMOS tube, the source of the NMOS tube serves as an input terminal, the drain serves as an output terminal, and the gate receives the first control signal;

[0014] The first MOS tube is configured as a PMOS tube, a drain of the PMOS tube serves as an input terminal, a source serves as an output terminal, and a gate receives the first control signal.

[0015] Optionally, the analog switch module further includes a second MOS tube; the first MOS tube and the second MOS tube are configured as complementary switch tubes connected to the body ends;

[0016] Among them, the source of the NMOS tube in the complementary switch tube is connected to the drain of the PMOS tube and serves as an input end, the drain of the NMOS tube in the complementary switch tube is connected to the source of the PMOS tube and serves as an output end, the gate of the NMOS tube in the complementary switch tube receives the first control signal, and the gate of the PMOS tube in the complementary switch tube receives the reverse signal of the first control signal.

[0017] Optionally, a holding capacitor is further provided between the analog switch module and the voltage sampling module; a first plate of the holding capacitor is connected to an output end of the analog switch module, and a second plate is grounded.

[0018] Optionally, the analog switch circuit further includes an inverter; an input end of the inverter receives the first control signal, and an output end of the inverter outputs the second control signal.

[0019] Optionally, the analog switch circuit further includes an isolation module; the isolation module is disposed between an input end of the analog switch circuit and the input signal to isolate the analog switch module from the input signal when the first feedback module is turned on.

[0020] Optionally, the isolation module is configured as n analog switches; n is an integer greater than or equal to 1;

[0021] When n=1, the input end of the analog switch is connected to the input signal, the output end is connected to the input end of the analog switch module, the body end is connected to the body potential, and a third control signal is received, and the isolation module is turned on or off based on the third control signal; wherein the second control signal is opposite to the third control signal.

[0022] When n>1, a plurality of analog switches are arranged in series; the output end of the preceding analog switch is connected to the input end of the succeeding analog switch; wherein, the input end of the first-stage analog switch is connected to the input signal, and the output end of the nth-stage analog switch is connected to the input end of the analog switch module; the body end of each analog switch is connected to the body potential, and each receives a fourth control signal, and the isolation module is turned on or off based on the fourth control signal; wherein, the fourth control signal is opposite to the third control signal.

[0023] To achieve the above objectives and other related objectives, the present invention provides an analog switch circuit control method, comprising:

[0024] When the analog switch module is turned on, the input signal received by the input end is output through the output end;

[0025] The analog switch module includes a first MOS tube; sampling the output terminal voltage of the first MOS tube, and based on the output terminal voltage, compensating at least one of the input terminal voltage and the body terminal voltage of the first MOS tube when the analog switch module is turned off, thereby reducing the leakage current when the analog switch module is turned off;

[0026] Wherein, when the analog switch module is turned on, the input terminal voltage is compensated.

[0027] Optionally, when the first MOS tube is set as an NMOS tube, the source of the NMOS tube serves as an input terminal, the drain serves as an output terminal, and the gate receives the first control signal;

[0028] The first MOS tube is configured as a PMOS tube, a drain of the PMOS tube serves as an input terminal, a source serves as an output terminal, and a gate receives the first control signal.

[0029] Optionally, the analog switch module further includes a second MOS tube; the first MOS tube and the second MOS tube are configured as complementary switch tubes connected to the body ends;

[0030] Among them, the source of the NMOS tube in the complementary switch tube is connected to the drain of the PMOS tube and serves as an input end, the drain of the NMOS tube in the complementary switch tube is connected to the source of the PMOS tube and serves as an output end, the gate of the NMOS tube in the complementary switch tube receives the first control signal, and the gate of the PMOS tube in the complementary switch tube receives the reverse signal of the first control signal.

[0031] Optionally, based on the output terminal voltage, the input terminal voltage of the first MOS transistor is compensated so that the input terminal voltage is equal to the output terminal voltage.

[0032] Optionally, based on the output terminal voltage, a body terminal voltage of the first MOS tube is compensated so that the body terminal voltage is equal to the output terminal voltage.

[0033] Optionally, the first control signal is inverse to the second control signal.

[0034] To achieve the above object and other related objects, the present invention provides a sample-and-hold system, including a sampling source and the above analog switch circuit; the sampling source is arranged at the input end of the analog switch circuit to provide the input signal.

[0035] To achieve the above-mentioned object and other related objects, the present invention provides a converter, including the above-mentioned analog switch circuit or the above-mentioned sampling and holding system, to perform analog-to-digital conversion or digital-to-analog conversion.

[0036] As described above, the analog switch circuit and control method thereof, the sampling and holding system and the converter of the present invention have the following beneficial effects:

[0037] 1. The analog switch circuit and its control method, sampling and holding system and converter of the present invention collect the output voltage and feed it back to the input end to compensate for the corresponding input voltage, and / or collect the output voltage and feed it back to the body end to compensate for the body end voltage, thereby reducing the leakage current and improving the sampling accuracy of the analog switch circuit.

[0038] 2. The analog switch circuit and its control method, sampling and holding system and converter of the present invention ensure that the analog switch circuit will not be affected by inaccurate sampling caused by the compensation input voltage during the sampling process by setting the first control signal and the second control signal in different states.

[0039] 3. The analog switch circuit and control method thereof, the sampling and holding system and the converter of the present invention avoid the inaccurate problem of secondary or even multiple sampling that may be caused by compensating the input terminal voltage by providing an isolation module.

[0040] 4. The analog switch circuit and its control method, sampling and holding system and converter of the present invention adopt feedback loop control, and the optimal selection can ensure that the clamped input voltage and the body voltage drop are always zero, so it has a very high input dynamic range and is not affected by temperature changes and process deviations. At the same time, the present invention can be implemented using traditional CMOS technology, saving manufacturing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Shown is a schematic diagram of a framework of an analog switch circuit of the present invention.

[0042] Figure 2 Shown is a schematic structural diagram of the analog switch circuit of the present invention.

[0043] Figure 3 Shown is a structural schematic diagram of an analog switch module of the present invention.

[0044] Figure 4 Shown is a structural schematic diagram of another analog switch module of the present invention.

[0045] Figure 5 Shown is a structural schematic diagram of yet another analog switch module of the present invention.

[0046] Figure 6 Shown is a structural schematic diagram of a sample-and-hold system of the present invention.

[0047] Figure 7 It is a schematic diagram showing the steps of the analog switch circuit control method of the present invention.

[0048] Figure 8 It is a schematic structural diagram of another sample-and-hold system of the present invention.

[0049] Fig. 9 Shown is a structural schematic diagram of yet another sample-and-hold system of the present invention.

[0050] Component number description

[0051] 1 Sample and hold system

[0052] 11 Analog switch circuit

[0053] 111 Analog switch module

[0054] 112 Voltage sampling module

[0055] 113 First Feedback Module

[0056] 114 Second feedback module

[0057] 115 Control signal generation module

[0058] 116 Inverter

[0059] 116' First Inverter

[0060] 117 Isolation Module

[0061] 1171 Analog Switch

[0062] 12 Sampling Source

[0063] 2 Sample and hold system DETAILED DESCRIPTION

[0064] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0065] See also Figures 1 to 9 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0066] The sample-and-hold circuit is an important analog-to-digital conversion front-end component used to capture and hold samples of the input signal at fixed time intervals. The design and implementation of this circuit is critical to improving the overall performance of the analog-to-digital converter (ADC). The analog switch is a key component in the sample-and-hold circuit or the switched capacitor circuit, and its performance directly affects the accuracy of the entire circuit. For low-speed, high-precision applications, it is particularly important to reduce the leakage current of the switch circuit to ensure long-term and accurate storage of charge.

[0067] As integrated circuit process technology continues to shrink, deep submicron CMOS circuits have a larger leakage current due to the reduction in threshold voltage, channel length and gate oxide thickness, which makes the design of low leakage current switching circuits more common.

[0068] In order to avoid the influence of leakage current, some solutions are as follows: First, stacking transistors to increase the off resistance, thereby reducing the leakage current. This method has a limited degree of reduction in leakage current and will affect the conduction performance of the analog switch. The second is to use low substrate leakage processes such as SOI to reduce the reverse conduction leakage current of the parasitic PN junction, or to use super turn-off transistor (SCCMOS) processes to achieve low leakage, but this limits the production process selection and increases manufacturing costs.

[0069] Based on this, it is necessary to provide a new analog switch circuit to solve the problem of inaccurate sampling caused by leakage current after shutdown.

[0070] Embodiment 1

[0071] like Figure 1 As shown, this embodiment provides an analog switch circuit 11, including: an analog switch module 111 and a voltage sampling module 112, including a first feedback module 113 and / or a second feedback module 114, that is: the analog switch circuit 11 includes the analog switch module 111 and the voltage sampling module 112, and at least one module of the first feedback module 113 and the second feedback module 114.

[0072] like Figure 1-2 As shown, the analog switch module 111 receives a first control signal, and turns the analog switch module 111 on or off based on the first control signal. When the analog switch module 111 is turned on, the analog switch module 111 samples the input signal received at the input end and outputs it through the output end. The analog switch module 111 includes a first MOS tube.

[0073] Specifically, when the analog switch module 111 is configured as a MOS transistor, as a first example, the analog switch module 111 is configured as an NMOS transistor (eg, Figure 3 As shown), the source of the NMOS tube serves as the input terminal, the drain serves as the output terminal, and the gate receives the first control signal.

[0074] In this embodiment, when the first control signal is set to a high level, the gate of the NMOS tube is connected to a high level to turn on the NMOS tube, thereby turning on the analog switch module 111, so that the input signal received at the input end of the analog switch module 111 is output through the output end; conversely, when the first control signal is set to a low level, the analog switch module 111 is turned off.

[0075] As a second example, when the analog switch module 111 is configured as a PMOS transistor (such as Figure 4 As shown), the drain of the PMOS tube serves as the input end, the source serves as the output end, and the gate receives the first control signal.

[0076] In this embodiment, when the first control signal is set to a low level, the gate of the PMOS tube is connected to a low level to make the PMOS tube turned on, and the analog switch module 111 is turned on, so that the input signal received by the input end of the analog switch module 111 is output through the output end; conversely, when the first control signal is set to a high level, the analog switch module 111 is turned off.

[0077] As a third example, the analog switch module 111 further includes a second MOS tube; the first MOS tube and the second MOS tube are configured as complementary switch tubes with body terminals connected (compared with the conventional configuration in which body terminals 1 and 2 are respectively connected to different body potentials, in this embodiment, body terminals 1 and 2 are configured to be connected and connected to the same body potential; in this embodiment, in addition to the body potential, the body terminal also needs to be connected to the output terminal of the second feedback module 114). In order to optimize the conduction characteristics or reduce the interference of the switching signal noise on the sampling, the analog switch module 111 is configured as a complementary switch tube.

[0078] Furthermore, the source of the NMOS tube in the complementary switch tube is connected to the drain of the PMOS tube and serves as an input end, the drain of the NMOS tube in the complementary switch tube is connected to the source of the PMOS tube and serves as an output end, the gate of the NMOS tube in the complementary switch tube receives the first control signal, and the gate of the PMOS tube in the complementary switch tube receives a reverse signal of the first control signal.

[0079] In this embodiment, if Figure 5 As shown, when the analog switch module 111 is configured as two MOS tubes; the complementary switch tube is configured as a first NMOS tube NMOS1 and a first PMOS tube PMOS1 connected at the body ends; the source of the first NMOS tube NMOS1 is connected to the drain of the first PMOS tube PMOS1 and serves as an input end, the drain of the first NMOS tube NMOS1 is connected to the source of the first PMOS tube PMOS1 and serves as an output end, the gate of the first NMOS tube NMOS1 receives the first control signal, and the gate of the first PMOS tube PMOS1 receives the reverse signal of the first control signal.

[0080] In this embodiment, when the first control signal is set to a high level, the NMOS tube and the PMOS tube are turned on at the same time, so that the analog switch module 111 is turned on; and when the first control signal is set to a low level, the analog switch module 111 is turned off.

[0081] It should be noted that the actual structure of the analog switch module 111 may be more complicated than the example provided in this embodiment. For example, other components such as logic gates, resistors, and capacitors may be added. The structure of the analog switch module 111 is not limited in this embodiment. As long as at least one MOS tube is provided in the analog switch module 111, compensation can be performed based on the first feedback module 113 and / or the second feedback module 114 provided in this embodiment to avoid the impact caused by current leakage.

[0082] It should be further explained that, in actual use, when there are multiple MOS tubes in the analog switch module 111, in addition to the complementary switch pair form provided in this embodiment, it may also be set to a form of multiple MOS tubes connected in series or multiple MOS tubes connected in parallel. At this time, the compensation of one MOS tube or multiple MOS tubes can still be completed based on the voltage sampling module 112, the first feedback module 113 and the second feedback module 114 provided in this embodiment, and is not limited to the structure of the analog switch module 111 of this embodiment.

[0083] like Figure 1-2 As shown, the voltage sampling module 112 is connected to the output end of the first MOS tube to sample the output end voltage of the first MOS tube and output it to the first feedback module 113 and / or the second feedback module 114 respectively.

[0084] Specifically, a holding capacitor C is further provided between the analog switch module 111 and the voltage sampling module 112 ; a first plate of the holding capacitor C is connected to the output end of the analog switch module 111 , and a second plate is grounded.

[0085] In this embodiment, when the analog switch module 111 is turned on under the action of the first control signal, the input end and the output end of the analog switch module 111 are turned on, and the output end is neutralized by the charge stored on the holding capacitor C and the input end charge of the analog switch module 111, so that the upper plate potential of the holding capacitor C is consistent with the input end potential. When the analog switch module 111 is turned off, the sampled charge when turned on is stored on the holding capacitor, and the voltage of the output end should remain unchanged under ideal conditions. But in fact, the off impedance of the analog switch module 111 is not infinite, so when there is a potential difference between the input end and the output end (if it is a single MOS tube in this embodiment, it is between the drain end and the source end) or the output end and the body end (if it is a single MOS tube in this embodiment, it is between the drain end or the drain end and the body end) of the analog switch module 111, it will cause the charge to be transferred from the holding capacitor C to the output end or the body end, thereby changing the sampled voltage value of the output node of the output end, affecting the sampling accuracy, and causing the system performance to decrease. Therefore, the subsequent voltage sampling module 112, the first feedback module 113 and the second feedback module 114 are required to avoid the charge reflux of the upper plate of the capacitor, thereby causing an error in sampling accuracy.

[0086] It should be noted that, based on the holding capacitor C, the sampling voltage can be directly output, that is, the input signal is sampled and output. At this time, the analog switch circuit 11 can be directly used as a sampling and holding circuit (SH circuit). In actual use, the analog switch circuit 11 provided in this embodiment can be used in combination with other components as a sampling and holding circuit.

[0087] like Figure 1 As shown, the first feedback module 113 receives the output terminal voltage and compensates the input terminal voltage of the first MOS tube, and the second feedback module 114 receives the output terminal voltage and compensates the body terminal voltage of the first MOS tube; at least one of the first feedback module 113 and the second feedback module 114 is used to reduce the leakage current when the analog switch module 111 is turned off.

[0088] As an example, in this embodiment, based on the output terminal voltage, the input terminal voltage of the first MOS transistor is compensated so that the input terminal voltage is equal to the output terminal voltage, so as to avoid and ensure that the voltage difference between the source and drain of the MOS transistor in the analog switch module 111 is reduced or even eliminated, and the generation of subthreshold leakage current in the leakage current is suppressed to the greatest extent. This embodiment effectively reduces the current leaking through the channel by compensating the input terminal voltage, but does not solve the dark current leakage caused by reverse conduction of the parasitic PN junction.

[0089] Specifically, in the present embodiment, the body terminal voltage of the first MOS tube is compensated so that the body terminal voltage is equal to the output terminal voltage, so as to avoid and ensure that the voltage difference between the body terminal and the output terminal (the body-drain in the case of an NMOS tube) of the MOS tube in the analog switch module 111 is reduced or even eliminated, thereby suppressing the dark current leakage of the PN junction reverse conduction in the leakage current to the greatest extent.

[0090] Preferably, when the first feedback module 113 and the second feedback module 114 are set simultaneously in this embodiment, the input terminal voltage, the body terminal voltage, and the output terminal voltage are set to be equal to minimize the backflow problem after the analog switch module 111 is turned off (subthreshold leakage current and dark current leakage are suppressed at the same time).

[0091] It should be noted that, in order to ensure the conduction of the analog switch module 111, the body end of the MOS tube will be connected to the corresponding body potential. If the analog switch module 111 is set as an NMOS tube, the body end is connected to the lowest potential (reference ground) in the application, and the PMOS body end is connected to the highest potential in the application. At this time, the voltage compensated by the second feedback module 114 is independent of the potential connected to the body end.

[0092] It should be further explained that when compensating the input terminal voltage and the body terminal voltage, as long as some voltage compensation is performed relative to the case of incomplete compensation, the generation of leakage current can be reduced, that is, there is no need to require complete conversion; therefore, there is no need to require that the input terminal voltage is equal to the output terminal voltage, and the body terminal voltage is equal to the output terminal voltage. In addition, the leakage current in this embodiment includes two parts, the first part is the leakage current, which is mainly based on the subthreshold leakage current caused by the source-drain voltage; the other part is the dark current, which is mainly due to the dark current of the reverse conduction of the PN junction, and the dark current leakage is mainly caused by the physical and chemical characteristics of the PN junction itself. Based on the analog switch circuit 11 provided in this embodiment, it can monitor the sampled output terminal voltage based on the active feedback loop, and control the body terminal potential and / or at least one of the source / drain potential of the MOSFET switch device to be equal to the potential of the sampling voltage terminal (output terminal), thereby suppressing the current leaking through the channel and the parasitic PN junction, and achieving the purpose of voltage stability at the output terminal (keeping the capacitor able to store charge stably for a long time). Preferably, the body terminal potential and the source / drain potential are equal to the potential of the sampling voltage terminal (output terminal) to keep the charge as accurate as possible.

[0093] like Figure 1 As shown, the first feedback module 113 receives a second control signal, and turns on or off the first feedback module 113 based on the second control signal; wherein, when the analog switch module 111 is turned on, the compensation of the input terminal voltage is turned off.

[0094] Specifically, Figure 6As shown, the analog switch circuit 11 further includes an inverter 116; the input end of the inverter 116 receives the first control signal, and the output end outputs the second control signal.

[0095] It should be noted that when the analog switch module 111 is turned on, the input signal is transmitted to the output end of the analog switch module 111. If the first feedback module 113 is turned on at this time, the input signal deviation caused by the compensation input voltage may affect the sampling accuracy. Based on this, preferably, when the analog switch module 111 is turned on, the first feedback module 112 is turned off. In this embodiment, the first feedback module 112 is immediately turned off when the analog switch module 111 is turned on directly through the inverter 116; similarly, when the analog switch module 111 is turned off, the first feedback module 112 is immediately turned on, thereby avoiding the output voltage of the analog switch module 111 from being reduced due to charge reflux to the greatest extent possible. In another embodiment, the first feedback module 112 can also be turned on after the analog switch module 111 is turned off based on the need. Although the capacitor C may have some reflux at this time, it can still reduce some sampling errors compared to the setting of not doing any processing on the reflux.

[0096] It should be further explained that, in actual use, the analog switch module 111 is first turned on to sample and output the input signal, and no compensation is required at this time. Thereafter, after the analog switch module 111 is turned off, the first feedback module 113 is turned on to compensate the input voltage in order to avoid maintaining the capacitor C. Subsequently, when the analog switch module 111 is turned on again for the next sampling, the compensation effect introduced by the first feedback module 113 needs to be considered. Therefore, in this embodiment, it is sufficient to ensure that when the analog switch module 111 is turned on, the first feedback module 112 does not introduce changes in the input voltage.

[0097] Specifically, Figure 2 As shown, the analog switch circuit 11 also includes a first inverter 116'; the input end of the first inverter 116' receives the first control signal, and the output end is connected to the second feedback module 114 to control the opening or closing of the second feedback module 114. The actual working process is basically the same as the first feedback module 113, and will not be repeated here.

[0098] It should be noted that since the second feedback module 114 supplements the body terminal voltage, it does not affect the sampling accuracy too much, and the second feedback module 114 can be kept in a compensation state without using the first inverter 116 ′ to control the module to open or close.

[0099] like Figure 7As shown, this embodiment provides an analog switch circuit control method, including:

[0100] S1. When the analog switch module 111 is turned on, the input signal received by the input end is output through the output end.

[0101] Specifically, in this embodiment, the analog switch module 111 is turned on to sample and output the input voltage. In order to maintain the accuracy of the sampling, the input signal during sampling is required to be undisturbed. Therefore, it is required that the signal for compensating the input voltage be turned off during each sampling.

[0102] S2. The analog switch module 111 includes a first MOS tube; the output voltage of the first MOS tube is sampled, and based on the output voltage, at least at least one of the input voltage and the body voltage of the first MOS tube is compensated when the analog switch module 111 is turned off, thereby reducing the leakage current when the analog switch module 111 is turned off.

[0103] Specifically, the analog switch module 111 includes an NMOS transistor, a PMOS transistor or a complementary switch transistor.

[0104] As a first example, the first MOS transistor is set to be an NMOS transistor (such as Figure 3 As shown), the source of the NMOS tube serves as the input terminal, the drain serves as the output terminal, and the gate receives the first control signal.

[0105] As a second example, the first MOS transistor is set to a PMOS transistor (such as Figure 4 As shown), the drain of the PMOS tube serves as an input terminal, the source serves as an output terminal, and the gate receives the first control signal.

[0106] As a third example, the analog switch module 111 further includes a second MOS transistor; the first MOS transistor and the second MOS transistor are configured as complementary switch transistors connected to the body terminals (eg Figure 5 As shown); wherein, the source of the NMOS tube in the complementary switch tube is connected to the drain of the PMOS tube and serves as an input end, the drain of the NMOS tube in the complementary switch tube is connected to the source of the PMOS tube and serves as an output end, the gate of the NMOS tube in the complementary switch tube receives the first control signal, and the gate of the PMOS tube in the complementary switch tube receives the reverse signal of the first control signal.

[0107] Specifically, in this embodiment, based on the output terminal voltage, the input terminal voltage of the first MOS tube is compensated so that the input terminal voltage is equal to the output terminal voltage, thereby avoiding and ensuring that the voltage difference between the source and drain of the MOS tube in the analog switch module 111 is reduced or even eliminated, thereby suppressing the generation of leakage current.

[0108] Specifically, based on the output terminal voltage, the body terminal voltage of the first MOS tube is compensated so that the body terminal voltage is equal to the output terminal voltage, so that the voltage difference between the body terminal and the output terminal (the body-drain in the case of an NMOS tube) of the MOS tube is reduced or even eliminated, thereby suppressing the generation of leakage current.

[0109] Preferably, when the input terminal voltage, the output terminal voltage and the body terminal voltage are all equal, the backflow problem after the analog switch module 111 is turned off can be most effectively avoided.

[0110] Specifically, the first control signal is opposite to the second control signal. In this embodiment, the first control signal is set to be opposite to the second control signal, so that when the first control signal is switched, the second control signal is switched at the same time, so as to avoid the first control signal controlling the analog switch module 111 to be turned on and the second control signal controlling the first feedback module 113 to be turned off, so as to avoid affecting the sampling accuracy. In fact, it is also possible to set the first control signal to be turned off and the second control signal to be reversed after a delay of a period of time based on actual needs. The specific principle can be referred to the corresponding part of the previous text, and will not be repeated here one by one.

[0111] like Figure 3 As shown, this embodiment provides a sample-and-hold system 1 , including a sampling source 12 and the above-mentioned analog switch circuit 11 .

[0112] Specifically, the sampling source 12 is disposed at the input end of the analog switch circuit 11 to provide the input signal.

[0113] As an example, in the field of electronics and signal processing, the sampling source can be set as a sensor, such as a temperature sensor, a pressure sensor, a photosensor, etc., to convert physical quantities into electrical signals; it can also be set as a microphone, an audio line, etc., to convert audio signals into electrical signals; it can also be set as an analog signal generator, such as a signal generator that generates an analog signal of a specific waveform, such as a sine wave, a square wave, a triangle wave, etc. As long as the setting of the input signal can be provided, it is not limited to this embodiment.

[0114] It should be noted that the sample-hold system 1 of this embodiment may also include a capacitor array, and based on the analog switch circuit 11, a switch capacitor circuit is formed to perform sample-holding. Therefore, the sample-hold system 1 of this embodiment is not limited to this embodiment, and any system that implements sampling or holding based on the analog switch circuit 11 provided in this embodiment is within the protection scope of this embodiment.

[0115] This embodiment further provides a converter, including the above-mentioned analog switch circuit 11 or the above-mentioned sample-and-hold system 1, to perform analog-to-digital conversion or digital-to-analog conversion.

[0116] In this embodiment, when the converter is used for analog-to-digital conversion, the collected analog signal is converted into a digital signal. Before the analog-to-digital conversion, the analog switch circuit 11 or the above-mentioned sampling and holding system 1 can ensure that the analog signal remains stable at the sampling moment, and can ensure that the analog-to-digital converter obtains an accurate conversion result.

[0117] It should be noted that the analog switch circuit of this embodiment, through the technology of dynamically adjusting the MOSFET body terminal voltage and the input terminal voltage, suppresses the reverse bias leakage current by clamping the parasitic PN junction voltage drop to zero, and can significantly reduce the leakage current of the analog switch in the off state to a negligible level.

[0118] The analog switch circuit 11 of this embodiment monitors the sampling voltage through an active feedback loop, controls at least one of the body potential and / or source / drain potential of the MOSFET switch device to be equal to the sampling voltage terminal potential, thereby suppressing the current leaking through the channel and the parasitic PN junction, and achieving the purpose of long-term stable charge storage; at the same time, it has a very high input dynamic range, is not affected by temperature changes and process deviations, and can be implemented using traditional CMOS technology.

[0119] Embodiment 2

[0120] like Figure 8-Figure 9 As shown, this embodiment provides an analog switch circuit 11, which is basically the same as the first embodiment, except that the analog switch circuit 11 also includes an isolation module 117 to avoid that when the first feedback module 113 is turned on, the compensation input voltage may affect the input signal, which is not conducive to subsequent secondary sampling or multiple sampling.

[0121] like Figure 1 As shown, the analog switch circuit 11 also includes an isolation module 117; the isolation module 117 is arranged between the input end of the analog switch circuit 111 and the input signal to isolate the analog switch module 113 from the input signal when the first feedback module 113 is turned on, so as to avoid the charge that may be caused by the first feedback module 113 compensating the analog switch module 113 to flow back to the input signal and mix with the input signal, resulting in inaccurate subsequent sampling.

[0122] Specifically, the isolation module 117 is configured as n analog switches; n is an integer greater than or equal to 1.

[0123] As an example, Figure 8As shown, when n=1, the input end of the analog switch 1171 is connected to the input signal, the output end is connected to the input end of the analog switch module 111, the body end is connected to the body potential (in this embodiment, the analog switch 1171 is connected to the body potential so that the analog switch 1171 can be quickly turned off, and the impedance value of the analog switch 1171 can be used for isolation), and a third control signal is received, and the isolation module 117 is turned on or off based on the third control signal; wherein, the second control signal is opposite to the third control signal, ensuring that when the second control signal controls the first feedback module 111 to turn on, each analog switch 1171 can be disconnected, and the impedance value when closed is used to perform isolation.

[0124] As an example, Fig. 9 As shown, when n>1, a plurality of analog switches 1171 can be arranged in series; the output end of the front-stage analog switch 1171 can be connected to the input end of the rear-stage analog switch; wherein, the input end of the first-stage analog switch 1171 is connected to the input signal, and the output end of the n-th-stage analog switch 1171 is connected to the input end of the analog switch module 117; the body end of each analog switch 1171 is connected to the body potential (in this embodiment, the analog switch is connected to the body potential so that the analog switch 1171 can be quickly turned off), and each receives a fourth control signal, and turns the isolation module 117 on or off based on the fourth control signal; wherein, the fourth control signal is opposite to the third control signal, ensuring that when the second control signal controls the first feedback module 111 to turn on, each analog switch is disconnected, and the impedance value when closed is used to perform isolation.

[0125] It should be noted that in actual use, when n>1, as long as the last analog switch among the multiple analog switches connected to the input end of the analog switch module can be disconnected when the first feedback module 111 is turned on, the problem of backflow interference with the input signal caused by the first feedback module 113 can be avoided.

[0126] It should be further explained that, in this embodiment, the analog switch is set to a MOS tube. In actual use, the first control signal, the third control signal, and the fourth control signal can be derived from the same control signal generating module 115 to ensure synchronization of the opening and closing processes when controlling the gate of the MOS tube. At the same time, it is preferably set that the first control signal, the third control signal, and the fourth control signal are opposite to the second control signal.

[0127] In addition, it should be noted that in actual use, the isolation module 117 is not limited to this embodiment. Any setting that can ensure that the input signal is not disturbed when the first feedback module 113 is turned on, including but not limited to increasing impedance (such as adding a resistor) and setting a circuit breaker, is within the protection scope of this embodiment.

[0128] This embodiment also provides a sampling and holding system 2, which is basically the same as that in the first embodiment, except that the isolation module 117 of this embodiment can effectively avoid the problem that the sampling source 12 may be contaminated due to the compensation input voltage when the first feedback module 113 is turned on, resulting in inaccurate information from the sampling source 12.

[0129] In addition, it should be noted that, compared with the first embodiment, this embodiment can ensure the accuracy of secondary collection and multiple collection of the same sampling source, but in actual use, the isolation module 117 may not be set through the first embodiment, and only one sampling source is required.

[0130] In summary, the present invention provides an analog switch circuit and its control method, a sampling and holding system and a converter, including: an analog switch module and a voltage sampling module, and also including a first feedback module and / or a second feedback module; when the analog switch module is turned on, the analog switch module samples the input signal received at the input end and outputs it through the output end; the analog switch module includes a first MOS tube; the voltage sampling module is connected to the output end of the first MOS tube to sample the output end voltage of the first MOS tube; the first feedback module receives the output end voltage and compensates the input end voltage of the first MOS tube, and the second feedback module receives the output end voltage and compensates the body end voltage of the first MOS tube; at least one of the first feedback module and the second feedback module is used to reduce the leakage current when the analog switch module is turned off. The present invention is used to solve the problem that when the analog switch is in the off state during the sampling phase, the device has leakage current, resulting in inaccurate sampling. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0131] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An analog switch circuit, characterized in that: The analog switch circuit comprises: an analog switch module and a voltage sampling module, and also comprises a first feedback module and / or a second feedback module; The analog switch module receives a first control signal, and turns the analog switch module on or off based on the first control signal. When the analog switch module is turned on, the analog switch module samples an input signal received at the input end and outputs it through the output end. The analog switch module includes a first MOS tube; The voltage sampling module is connected to the output end of the first MOS tube to sample the output end voltage of the first MOS tube; The first feedback module receives the output terminal voltage and compensates the input terminal voltage of the first MOS tube, and the second feedback module receives the output terminal voltage and compensates the body terminal voltage of the first MOS tube; at least one of the first feedback module and the second feedback module is used to reduce the leakage current when the analog switch module is turned off; The first feedback module receives a second control signal, and turns on or off the first feedback module based on the second control signal; wherein when the analog switch module is turned on, the compensation of the input terminal voltage is turned off; When the first MOS tube is set as an NMOS tube, the source of the NMOS tube serves as an input terminal, the drain serves as an output terminal, and the gate receives the first control signal; the body of the NMOS tube is connected to the lowest potential in the analog switch circuit; The first MOS tube is set as a PMOS tube, the drain of the PMOS tube is used as an input terminal, the source is used as an output terminal, and the gate receives the first control signal; the body of the PMOS tube is connected to the highest potential in the analog switch circuit; The analog switch module further includes a second MOS tube; the first MOS tube and the second MOS tube are configured as complementary switch tubes connected to each other at the body end and connected to the same body potential; wherein the source of the NMOS tube in the complementary switch tube is connected to the drain of the PMOS tube and serves as an input end, the drain of the NMOS tube in the complementary switch tube is connected to the source of the PMOS tube and serves as an output end, the gate of the NMOS tube in the complementary switch tube receives the first control signal, and the gate of the PMOS tube in the complementary switch tube receives the reverse signal of the first control signal; The voltage compensated by the second feedback module is independent of the potential connected to the body terminal; The analog switch circuit further includes an isolation module; the isolation module is disposed between the input end of the analog switch circuit and the input signal to isolate the analog switch module from the input signal when the first feedback module is turned on; The isolation module is configured as n analog switches; n is an integer greater than or equal to 1; When n>1, a plurality of analog switches are arranged in series; the output end of the preceding analog switch is connected to the input end of the succeeding analog switch; wherein, the input end of the first-stage analog switch is connected to the input signal, and the output end of the nth-stage analog switch is connected to the input end of the analog switch module; the body end of each analog switch is connected to the body potential, and receives a fourth control signal, and the isolation module is turned on or off based on the fourth control signal; wherein, the fourth control signal is opposite to the second control signal.

2. The analog switch circuit according to claim 1, wherein: A holding capacitor is also provided between the analog switch module and the voltage sampling module; a first plate of the holding capacitor is connected to the output end of the analog switch module, and a second plate is grounded.

3. The analog switch circuit according to claim 1, wherein: The analog switch circuit further includes an inverter; an input terminal of the inverter receives the first control signal, and an output terminal of the inverter outputs the second control signal.

4. A method for controlling an analog switch circuit, implemented based on the analog switch circuit according to any one of claims 1 to 3, characterized in that: When the analog switch module is turned on, the input signal received by the input end is output through the output end; The analog switch module includes a first MOS tube; sampling the output terminal voltage of the first MOS tube, and based on the output terminal voltage, compensating at least one of the input terminal voltage and the body terminal voltage of the first MOS tube when the analog switch module is turned off, thereby reducing the leakage current when the analog switch module is turned off; Wherein, when the analog switch module is turned on, the input terminal voltage is compensated; The compensated voltage is independent of the potential of the body connection.

5. The analog switch circuit control method according to claim 4, characterized in that: Based on the output terminal voltage, the input terminal voltage of the first MOS transistor is compensated so that the input terminal voltage is equal to the output terminal voltage.

6. The analog switch circuit control method according to claim 4, characterized in that: Based on the output terminal voltage, the body terminal voltage of the first MOS transistor is compensated so that the body terminal voltage is equal to the output terminal voltage.

7. The analog switch circuit control method according to claim 4, characterized in that: The first control signal is inverse to the second control signal.

8. A sample-and-hold system, comprising: A sampling source and an analog switch circuit as claimed in any one of claims 1 to 3; The sampling source is arranged at the input end of the analog switch circuit to provide the input signal.

9. A converter comprising: The analog switch circuit according to any one of claims 1 to 3 or the sample-and-hold system according to claim 8, for performing analog-to-digital conversion or digital-to-analog conversion.

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