A data processing method and device, electronic equipment and storage medium

Abstract

The application provides a data processing method and device, electronic equipment and storage medium. The method is applied to an NPU, and comprises: obtaining target code instructions corresponding to target data codes currently required to be executed; if the target code instructions comprise a group of bit positions composed of a plurality of condition judgment marks, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment marks, and address information corresponding to all the branch jump codes, determining the branch indexes corresponding to the group of bit positions according to the group of bit positions and the priority mask; and executing the corresponding branch jump code based on the address information corresponding to the first non-zero bit position in the determined branch indexes indicated by the target code instructions. The application can improve the processing performance of the NPU.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, and in particular to a data processing method and device, electronic equipment and storage medium. BACKGROUND

[0002] In data code for implementing packet forwarding function running on a network processing unit (NPU), a large amount of conditional judgment code and branch jump code are usually included, which requires the NPU to execute a large amount of conditional judgment instructions corresponding to the conditional judgment code and jump instructions corresponding to the branch jump code, resulting in low instruction execution efficiency of the NPU and affecting the processing performance of the NPU. SUMMARY

[0003] To overcome the problems in the related art, the present application provides a data processing method and device, electronic equipment and storage medium.

[0004] According to a first aspect of an embodiment of the present application, a data processing method is provided, which is applied to an NPU, and the method comprises:

[0005] obtaining a target code instruction corresponding to target data code currently to be executed;

[0006] if the target code instruction includes a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment markers, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment markers, and address information corresponding to all branch jump codes, determining the branch indexes corresponding to the group of bit positions according to the group of bit positions and the priority mask;

[0007] based on address information corresponding to a first non-zero bit position in the determined branch indexes indicated by the target code instruction, executing the corresponding branch jump code.

[0008] According to a second aspect of an embodiment of the present application, a data processing method is provided, which is applied to an NPU, and the method comprises:

[0009] obtaining a target code instruction corresponding to target data code currently to be executed;

[0010] if the target code instruction includes a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment markers, and address information corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment markers, executing the corresponding branch jump code based on the address information corresponding to the group of bit positions indicated by the target code instruction.

[0011] According to a third aspect of the embodiments of the present application, a data processing method is provided, the method is applied to an NPU, and the method comprises the following steps:

[0012] obtaining a target code instruction corresponding to target data code currently to be executed;

[0013] if the target code instruction comprises a group of bits corresponding to a plurality of condition judgment marks, a bit map corresponding to a plurality of branch jump code corresponding to the plurality of condition judgment marks, and address information corresponding to all branch jump code, then based on the address information corresponding to the bit map corresponding to the group of bits indicated by the target code instruction, the corresponding branch jump code is executed.

[0014] According to a fourth aspect of the embodiments of the present application, a data processing apparatus is provided, the apparatus is applied to an NPU, and the apparatus comprises:

[0015] an obtaining module, configured to obtain a target code instruction corresponding to target data code currently to be executed;

[0016] a determining module, configured to if the target code instruction comprises bits corresponding to a plurality of condition judgment marks, a priority mask, branch indexes corresponding to a plurality of branch jump code corresponding to the plurality of condition judgment marks, and address information corresponding to all branch jump code, then determine the branch indexes corresponding to the group of bits according to the group of bits and the priority mask;

[0017] an executing module, configured to based on the address information corresponding to the first non-zero bit in the determined branch indexes indicated by the target code instruction, execute the corresponding branch jump code.

[0018] According to a fifth aspect of the embodiments of the present application, a data processing apparatus is provided, the apparatus is applied to an NPU, and the apparatus comprises:

[0019] an obtaining module, configured to obtain a target code instruction corresponding to target data code currently to be executed;

[0020] an executing module, configured to if the target code instruction comprises a group of bits corresponding to a plurality of condition judgment marks, and address information corresponding to a plurality of branch jump code corresponding to the plurality of condition judgment marks, then based on the address information corresponding to the group of bits indicated by the target code instruction, execute the corresponding branch jump code.

[0021] According to a sixth aspect of the embodiments of the present application, a data processing apparatus is provided, the apparatus is applied to an NPU, and the apparatus comprises:

[0022] The acquisition module is configured to acquire a target code instruction corresponding to target data code that needs to be executed at present.

[0023] The execution module is configured to, if the target code instruction includes a group of bit positions corresponding to a plurality of condition judgment marks, a bit position map corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment marks, and address information corresponding to all branch jump codes, execute the corresponding branch jump code based on address information corresponding to a bit position map corresponding to the group of bit positions indicated by the target code instruction.

[0024] According to a seventh aspect of the embodiments of the present application, an electronic device is provided, including a processor and a machine readable storage medium, the machine readable storage medium stores machine executable instructions which can be executed by the processor, and the processor is prompted by the machine executable instructions to implement the method steps of any of the above data processing methods.

[0025] According to an eighth aspect of the embodiments of the present application, a computer readable storage medium is provided, the computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the method steps of any of the above data processing methods.

[0026] The technical solutions provided by the embodiments of the present application can include the following beneficial effects:

[0027] In the embodiments of the present application, the NPU can execute a plurality of branch jump codes corresponding to a plurality of condition judgment marks through acquisition of a code instruction, so that the condition judgment code can be reduced, the execution efficiency of the code instruction is improved, and the processing performance of the NPU is improved.

[0028] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0029] The accompanying drawings, which are incorporated into the specification and constitute a part of the present application, illustrate embodiments consistent with the present application and, together with the specification, serve to explain the principles of the present application.

[0030] Figure 1 One of the flowcharts of the data processing method provided by the embodiments of the present application;

[0031] Figure 2 The format schematic diagram of the code instruction 1 provided by the embodiments of the present application;

[0032] Figure 3 The second flowchart of the data processing method provided by the embodiments of the present application;

[0033] Figure 4A format schematic diagram of code instruction 2 provided for an embodiment of the present application;

[0034] Figure 5 A flow schematic diagram of a data processing method provided for an embodiment of the present application;

[0035] Figure 6 A format schematic diagram of code instruction 3 provided for an embodiment of the present application;

[0036] Figure 7 A structure schematic diagram of a data processing apparatus provided for an embodiment of the present application;

[0037] Figure 8 A structure schematic diagram of a data processing apparatus provided for an embodiment of the present application;

[0038] Figure 9 A structure schematic diagram of a data processing apparatus provided for an embodiment of the present application;

[0039] Figure 10 A structure schematic diagram of an electronic device provided for an embodiment of the present application. DETAILED DESCRIPTION

[0040] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The description of the exemplary embodiments is intended to apply to various alternative embodiments as well. It is to be understood that the description of any exemplary embodiment is intended only to be used to assist in understanding the exemplary embodiments. Therefore, the exemplary embodiments are not to be used to limit or define the inventive scope of various embodiments.

[0041] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0042] It is to be understood that the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. It is to be further understood that the terms "comprise", "comprising", "comprises", "including", "comprising", "comprises", "include" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0043] The embodiments of the present application will be described in detail hereinafter.

[0044] The embodiment of the present application provides a data processing method, which is applied to an NPU, and the method can comprise the following steps. Figure 1 As shown in the figure, the method can comprise the following steps:

[0045] S11, acquiring target code instructions corresponding to target data codes which need to be executed currently.

[0046] S12, if the target code instructions comprise a group of bit positions composed of a plurality of condition judgment marks, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment marks and address information corresponding to all the branch jump codes, determining the branch indexes corresponding to the group of bit positions according to the group of bit positions and the priority mask.

[0047] S13, executing corresponding branch jump codes based on address information corresponding to a first non-zero bit position in the determined branch indexes indicated by the target code instructions.

[0048] Specifically, in the step S12, the NPU can determine the branch indexes corresponding to the group of bit positions in the following manner:

[0049] performing AND operation on the group of bit positions and the priority mask to obtain an operation result;

[0050] determining a position of a first non-zero bit position in the operation result as the branch indexes corresponding to the group of bit positions.

[0051] In an example, the bit positions corresponding to the plurality of condition judgment marks can be in the form of a bit map.

[0052] For example, as shown in the figure, it is assumed that the NPU acquires code instructions 1 corresponding to data code 1 which needs to be executed currently. Here, the code instructions 1 can also be in other forms, and the present application does not limit the format of the code instructions 1. Figure 2

[0053] ​And it is found that the code instruction 1 includes a group of bit positions (for example, 0011) composed of bit positions corresponding to four condition judgment marks (for example, Condition 11, Condition 12, Condition 13 and Condition 14), a priority mask (for example, 1111), branch indexes (for example, 0011, 0110, 1111 and 0001) corresponding to a plurality of branch jump codes corresponding to the four condition judgment marks (that is, branch jump codes corresponding to combinations of the four condition judgment marks), and address information corresponding to all the branch jump codes. Wherein, the first non-zero bit position in 0011 corresponds to Branch 111, the first non-zero bit position in 0110 corresponds to Branch 112, the first non-zero bit position in 1111 corresponds to Branch 113, and the first non-zero bit position in 0001 corresponds to Branch 114.

[0054] In this case, the NPU performs an AND operation on the group of bit positions (that is, 0011) and the priority mask to obtain an operation result (that is, 0011), and determines the operation result as the branch index corresponding to the group of bit positions.

[0055] Subsequently, the NPU executes the corresponding branch jump code based on the address information corresponding to the first non-zero bit position in the determined branch index indicated by the code instruction 1. That is, the NPU executes the branch jump code corresponding to Branch 111 based on the address information corresponding to the first non-zero bit position in 0011 (that is, Branch 111) indicated by the code instruction 1.

[0056] Subsequently, the NPU executes the corresponding branch jump code based on the address information corresponding to the first non-zero bit position in the determined branch index indicated by the code instruction 1. That is, the NPU executes the branch jump code corresponding to Branch 111 based on the address information corresponding to the first non-zero bit position in 0011 (that is, Branch 111) indicated by the code instruction 1.

[0057] It should be noted that the data processing method is applicable to a scenario in which a plurality of branch jump codes corresponding to a plurality of condition judgment marks executed by the NPU have priorities.

[0058] The embodiments of the present application also provide a data processing method, which is applied to an NPU, as shown in Figure 3 The method can include the following steps:

[0059] S31, obtaining a target code instruction corresponding to a target data code currently to be executed.

[0060] S32, if the target code instruction includes a group of bit positions corresponding to a plurality of condition judgment marks and address information corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment marks, executing the corresponding branch jump code based on the address information corresponding to the group of bit positions indicated by the target code instruction.

[0061] For example, as shown in FIG. 2, it is assumed that the NPU obtains a code instruction 2 corresponding to a data code 1 currently to be executed. Here, the code instruction 2 can also be in other forms, and the present application does not limit the format of the code instruction 2. Figure 4

[0062] Further, the NPU finds that the code instruction 2 includes a group of bit positions (for example, 01) corresponding to two condition judgment marks (for example, Condition21 and Condition22) and address information (for example, Branch211, Branch212, Branch213 and Branch214) corresponding to a plurality of branch jump codes (i.e., branch jump codes corresponding to the combination of the two condition judgment marks).

[0063] In this case, the NPU executes the corresponding branch jump code based on the address information corresponding to the group of bit positions indicated by the code instruction 2. That is, the NPU executes the branch jump code corresponding to Branch22 based on Branch22 corresponding to 01 indicated by the code instruction 2.

[0064] Subsequently, if the NPU obtains other groups of bit positions (for example, 10, etc.) corresponding to the two condition judgment marks from the data code 1, the processing flow is similar to that of the group of bit positions, which will not be described in detail here.

[0065] It should be noted that the data processing method is applicable to the scenario in which the NPU executes a plurality of branch jump codes corresponding to a combination of a small number of condition judgment marks.

[0066] The embodiment of the present application also provides a data processing method, which is applied to an NPU. As shown in FIG. 3, the method can include the following steps. Figure 5

[0067] S51, obtaining a target code instruction corresponding to a target data code currently to be executed.

[0068] ​​S52, if the target code instruction includes a group of bit positions corresponding to a plurality of condition judgment markers, a bit position map corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment markers, and address information corresponding to all branch jump codes, then based on the address information corresponding to the bit position map corresponding to the group of bit positions indicated by the target code instruction, the corresponding branch jump code is executed.

[0069] For example, as shown in FIG. 3, it is assumed that the NPU obtains a code instruction 3 corresponding to a data code 1 currently to be executed. Here, the code instruction 3 can also be in other forms, and the present application does not limit the format of the code instruction 3. Figure 6

[0070] Further, the NPU finds that the code instruction 3 includes a group of bit positions corresponding to four condition judgment markers (for example, Condition 31, Condition 32, Condition 33, and Condition 34), a bit position map (for example, 16 bit position maps) corresponding to a plurality of branch jump codes (i.e., branch jump codes corresponding to combinations of the four condition judgment markers), address information (for example, Branch 311, Branch 312, Branch 313, and Branch 314) corresponding to all branch jump codes, and mapping relationships of each group of bit positions, each bit position map, and each address information corresponding to the four condition judgment markers.

[0071] In this case, the NPU executes the corresponding branch jump code based on the address information corresponding to the bit position map corresponding to the group of bit positions indicated by the code instruction 3. For example, the code instruction 3 indicates that the address information corresponding to the bit position map corresponding to the group of bit positions is Branch 313, and then the NPU executes the branch jump code corresponding to Branch 313.

[0072] Subsequently, if the NPU obtains other groups of bit positions corresponding to the four condition judgment markers from the data code 1, the processing flow is similar to that of the group of bit positions, which will not be described in detail here.

[0073] It should be noted that the data processing method is applicable to a scenario in which the NPU executes a small number of branch jump codes corresponding to a plurality of condition judgment markers.

[0074] It should be further noted that, in the embodiments of the present application, all code instructions corresponding to a target data code to be executed by the NPU can include code instructions applicable to at least one of the above three scenarios.

[0075] ​From the above technical solutions can be seen, in the embodiment of the application, the NPU can execute branch jump code corresponding to a plurality of condition judgment markers by acquiring a code instruction once, so that the condition judgment code can be reduced, thereby improving the execution efficiency of the code instruction, and further improving the processing performance of the NPU.

[0076] Based on the same inventive concept, the application also provides a data processing device, which is applied to an NPU, and a structure diagram thereof is as shown in Figure 7 The specific embodiments include the following:

[0077] The acquisition module 71 is configured to acquire target code instructions corresponding to target data codes currently to be executed.

[0078] The determination module 72 is configured to, if the target code instructions include bit positions corresponding to a plurality of condition judgment markers, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment markers, and address information corresponding to all branch jump codes, determine the branch indexes corresponding to the bit positions according to the bit positions and the priority mask.

[0079] The execution module 73 is configured to execute corresponding branch jump codes based on address information corresponding to a first non-zero bit position in the determined branch indexes indicated by the target code instructions.

[0080] Preferably, the determination module 72 is specifically configured to:

[0081] perform an AND operation on the bit positions and the priority mask to obtain an operation result;

[0082] determine the operation result as the branch indexes corresponding to the bit positions.

[0083] The application also provides a data processing device, which is applied to an NPU, and a structure diagram thereof is as shown in Figure 8 The specific embodiments include the following:

[0084] The acquisition module 81 is configured to acquire target code instructions corresponding to target data codes currently to be executed.

[0085] The execution module 82 is configured to, if the target code instructions include a group of bit positions composed of bit positions corresponding to a plurality of condition judgment markers, and address information corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment markers, execute corresponding branch jump codes based on address information corresponding to the group of bit positions indicated by the target code instructions.

[0086] The application also provides a data processing device, which is applied to an NPU, and a structure diagram thereof is as shown in Figure 9 The specific embodiments include the following:

[0087] The acquisition module 91 is configured to acquire a target code instruction corresponding to target data code that needs to be executed at present.

[0088] The execution module 92 is configured to, if the target code instruction includes a group of bit positions composed of a plurality of condition judgment marks, a bit position map corresponding to a plurality of branch jump codes corresponding to the plurality of condition judgment marks, and address information corresponding to all branch jump codes, execute the corresponding branch jump code based on the address information corresponding to the bit position map corresponding to the group of bit positions indicated by the target code instruction.

[0089] It can be seen from the above technical solutions that, in the embodiments of the present application, the NPU can execute a plurality of branch jump codes corresponding to a plurality of condition judgment marks through acquisition of a code instruction, so that the condition judgment code can be reduced, the execution efficiency of the code instruction is improved, and the processing performance of the NPU is improved.

[0090] The embodiments of the present application also provide an electronic device, as shown in the accompanying drawings, which comprises a processor 1001 and a machine readable storage medium 1002, the machine readable storage medium 1002 stores machine executable instructions capable of being executed by the processor 1001, and the processor 1001 is prompted by the machine executable instructions to implement the steps of any data processing method described above. Figure 10

[0091] The machine readable storage medium described above can include a random access memory (RAM) and can also include a non-volatile memory (NVM), for example, at least one disk memory. Optionally, the machine readable storage medium can also be at least one storage device located away from the aforementioned processor.

[0092] The processor described above can be a general processor, including a central processing unit (CPU), a network processor (NP), etc.; can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component.

[0093] ​In a further embodiment, the application provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of any of the data processing methods.

[0094] The above only shows the preferred embodiments of the present application and is not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the scope of protection of the present application.

Claims

1. A data processing method, characterized by, The method is applied to a network processing unit (NPU), and the method comprises: obtaining target code instructions corresponding to target data codes currently required to be executed; if the target code instructions comprise a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment marks, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment marks, and address information corresponding to all branch jump codes, determining branch indexes corresponding to the group of bit positions according to the group of bit positions and the priority mask; based on address information corresponding to a first non-zero bit position in the determined branch indexes indicated by the target code instructions, executing corresponding branch jump codes.

2. The method of claim 1, wherein, The method is applied to a network processing unit (NPU), and the method comprises: obtaining target code instructions corresponding to target data codes currently required to be executed; if the target code instructions comprise a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment marks, and address information corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment marks, based on the address information corresponding to the group of bit positions indicated by the target code instructions, executing corresponding branch jump codes.

3. A data processing method, characterized by, The method is applied to a network processing unit (NPU), and the method comprises: obtaining target code instructions corresponding to target data codes currently required to be executed; if the target code instructions comprise a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment marks, a bit map corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment marks, and address information corresponding to all branch jump codes, based on the address information corresponding to the bit map corresponding to the group of bit positions indicated by the target code instructions, executing corresponding branch jump codes.

4. A data processing method, characterized by, The device is applied to a network processing unit (NPU), and the device comprises: an obtaining module, configured to obtain target code instructions corresponding to target data codes currently required to be executed; a determining module, configured to, if the target code instructions comprise a group of bit positions composed of bit positions corresponding to a plurality of conditional judgment marks, a priority mask, branch indexes corresponding to a plurality of branch jump codes corresponding to the plurality of conditional judgment marks, and address information corresponding to all branch jump codes, determine branch indexes corresponding to the group of bit positions according to the group of bit positions and the priority mask; 5. A data processing apparatus, characterized by, an executing module, configured to, based on address information corresponding to a first non-zero bit position in the determined branch indexes indicated by the target code instructions, execute corresponding branch jump codes. The determining module is specifically configured to: perform an AND operation on the group of bit positions and the priority mask to obtain an operation result; determine the operation result as the branch indexes corresponding to the group of bit positions.

6. The apparatus of claim 5, wherein, The device is applied to a network processing unit (NPU), and the device comprises: an obtaining module, configured to obtain target code instructions corresponding to target data codes currently required to be executed; an obtaining module, configured to obtain target code instructions corresponding to target data codes currently required to be executed; 7. A data processing apparatus, characterized by, ​ ​ The execution module is configured to execute the branch jump code corresponding to the address information indicated by the group of bits corresponding to the multiple conditional judgment marks if the target code instruction includes the group of bits composed of bits corresponding to the multiple conditional judgment marks and address information corresponding to the multiple branch jump codes corresponding to the multiple conditional judgment marks.

8. A data processing apparatus, characterized by, The device is applied to a network processing unit (NPU), and the device comprises: An acquisition module is configured to acquire target code instructions corresponding to target data code currently required to be executed. The execution module is configured to execute the branch jump code corresponding to the address information indicated by the bit map corresponding to the group of bits corresponding to the multiple conditional judgment marks if the target code instruction includes the group of bits composed of bits corresponding to the multiple conditional judgment marks, a bit map corresponding to the multiple branch jump codes corresponding to the multiple conditional judgment marks, and address information corresponding to all branch jump codes.

9. An electronic device, comprising: The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the method steps in any one of claims 1-2, claim 3 or claim 4.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program is executed by the processor to implement the method steps in any one of claims 1-2, claim 3 or claim 4.

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