Semiconductor memory device and method for forming the same

Abstract

The present application provides a semiconductor memory device and a method for forming the same, which relates to the field of semiconductor technology and is used to improve the conversion efficiency of the semiconductor memory device and reduce short circuits. The formation method includes: forming a plurality of magnetic tunnel junctions on a bottom electrode layer, the sidewalls of the magnetic tunnel junctions have residues, and the residues contact the bottom electrode layer; forming a residue covering layer, including a first residue covering layer and a second residue covering layer, the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer; etching to remove the residues and the first residue covering layer, exposing the bottom electrode layer in contact with the sidewalls of the magnetic tunnel junction. The residues and the first residue covering layer can be removed synchronously, thereby ensuring that the residues are completely removed, improving the coercivity of the device, reducing the shunt to the bottom electrode layer, and improving the conversion efficiency.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor memory device and a method for forming the same. Background Art

[0002] With the continuous development of semiconductor technology and the advent of the post-Moore era, more and more new semiconductor memory devices have emerged. Among them, non-volatile magnetic random access memory (MRAM) has the characteristics of low power consumption and high read and write speed. Spin orbit torque magnetic memory (SOT-MRAM) has been widely used due to its higher durability.

[0003] SOT-MRAM includes a magnetic tunnel junction (MTJ) for storing data and a heavy metal layer for providing spin orbit torque (SOT) to write data. Among them, the core structure of MTJ includes a free layer, a tunneling layer and a fixed layer. The direction of the magnetic moment of the free layer can be changed, and the magnetic moment of the reference layer will not change. When the directions of the magnetic moments of the free layer and the reference layer are parallel, the MTJ presents a low resistance state; when the directions of the magnetic moments of the free layer and the reference layer are antiparallel, the MTJ presents a high resistance state. In this way, the high and low resistance states of the MTJ can be used to store data "1" and "0" accordingly. When the write current is passed through the heavy metal layer, a spin-orbit coupling effect will be generated, thereby generating a spin torque to drive the free layer to produce a directional flip. The write current does not flow through the tunneling layer, which is one of the reasons for the high durability of SOT-MRAM.

[0004] However, when semiconductor memory devices are formed, there are often residues in the process of etching to form magnetic tunnel junctions. In order to ensure that the etching damage of the heavy metal layer is minimized, over-etching cannot be performed, making the residues difficult to remove. The residues will affect the overall device coercivity (Hc) and will shunt the heavy metal layer, reduce the conversion efficiency, and affect the efficiency of the semiconductor memory device. Summary of the invention

[0005] In view of the above problems, embodiments of the present application provide a semiconductor memory device and a method for forming the same, which are used to improve conversion efficiency, thereby improving the efficiency of the semiconductor memory device.

[0006] According to some embodiments, the present application provides a method for forming a semiconductor memory device, comprising:

[0007] forming a plurality of magnetic tunnel junctions on the bottom electrode layer, wherein the sidewalls of the magnetic tunnel junctions have residues, and the residues contact the bottom electrode layer;

[0008] forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; an upper surface of the first residue covering layer is not higher than an upper surface of the second residue covering layer;

[0009] The residue and the first residue capping layer are removed by etching to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction.

[0010] In some possible embodiments, the residue capping layer is formed by non-vertical deposition.

[0011] In some possible embodiments, after removing the residue and the first residue covering layer by etching, the method further includes:

[0012] Repeatingly forming a third residue covering layer, wherein the third residue covering layer at least covers the remaining residue, the remaining first residue covering layer, and the remaining second residue covering layer;

[0013] The remaining residue and the remaining first residue covering layer are etched away at least once to completely remove the residue.

[0014] In some possible embodiments, when the residue and the first residue covering layer are removed by etching, an etching angle of the etching is greater than or equal to 60° and less than or equal to 120°.

[0015] In some possible embodiments, the sidewall of the magnetic tunnel junction has redeposition;

[0016] After removing the residue and the first residue covering layer to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction, the method further includes:

[0017] Forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited material, and the second redeposited covering layer covers the remaining residue covering layer and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer;

[0018] The first redeposition capping layer and the redeposition are removed by etching to expose the sidewall of the magnetic tunnel junction.

[0019] In some possible embodiments, the redeposited covering layer is formed by deposition, and a deposition angle of the deposition is greater than 70° and less than 110°.

[0020] In some possible embodiments, the first redeposition covering layer and the redeposition are removed by etching, and the etching is non-vertical etching.

[0021] In some possible embodiments, the magnetic tunnel junction includes a free layer, a tunnel layer, and a reference layer stacked in sequence;

[0022] The second redeposition capping layer has a thickness greater than that of the free layer and less than a total thickness of the free layer and the tunneling layer.

[0023] The method for forming a semiconductor memory device provided by the embodiment of the present application has at least the following advantages:

[0024] In the method for forming a semiconductor memory device provided by an embodiment of the present application, a plurality of magnetic tunnel junctions are formed on a bottom electrode layer, the sidewalls of the magnetic tunnel junctions have residues, and a residue covering layer is formed. The residue covering layer includes a first residue covering layer covering the residues, and a second residue covering layer covering the bottom electrode layer between adjacent residues, the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer between the magnetic tunnel junctions forms a flat or middle-convex morphology. The residues and the first residue covering layer are removed by etching, exposing the bottom electrode layer in contact with the sidewalls of the magnetic tunnel junctions, so that the residues and the first residue covering layer can be removed simultaneously, thereby ensuring that the residues are completely removed, improving the coercive force of the device, reducing the shunt to the bottom electrode layer, and improving the conversion efficiency.

[0025] According to some embodiments, the present application also provides a method for forming a semiconductor memory device, comprising:

[0026] forming a plurality of magnetic tunnel junctions on the bottom electrode layer, wherein the sidewalls of the magnetic tunnel junctions have residues and redepositions, and the residues contact the bottom electrode layer;

[0027] Forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited material, and the second redeposited covering layer covers the residue and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer;

[0028] Etching and removing the first redeposition covering layer and the redeposition to expose the sidewall of the magnetic tunnel junction;

[0029] forming a residue covering layer, comprising a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the second redeposited covering layer on the residue, and the second residue covering layer covers the second redeposited covering layer between adjacent residues; an upper surface of the first residue covering layer is not higher than an upper surface of the second residue covering layer;

[0030] The residue, the first residue capping layer and a portion of the second redeposited capping layer are removed by etching to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction.

[0031] The method for forming a semiconductor memory device provided by the embodiment of the present application has at least the following advantages:

[0032] In the method for forming a semiconductor memory device provided by an embodiment of the present application, a plurality of magnetic tunnel junctions are formed on the bottom electrode layer, the sidewalls of the magnetic tunnel junctions have residues and redepositions, and a redeposition covering layer is formed. The redeposition covering layer includes a first redeposition covering layer covering the redepositions, and a second redeposition covering layer covering the residues and the bottom electrode layer. The thickness of the first redeposition covering layer is less than the thickness of the second redeposition covering layer, so that the second redeposition covering layer of the sidewalls of the magnetic tunnel junctions is thinner. The first redeposition covering layer and the redepositions are removed by etching, and the sidewalls of the magnetic tunnel junctions are opened, thereby ensuring the complete removal of the redepositions, avoiding device short circuits, and improving device efficiency. The residue covering layer is then formed, and the residue covering layer includes a first residue covering layer covering the second redeposition covering layer on the residues, and a second redeposition covering layer covering between adjacent residues. The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer between the magnetic tunnel junctions forms a flat or middle convex morphology. The residue and the first residue covering layer are removed by etching, and the residue and the first residue covering layer are removed synchronously, thereby ensuring that the residue is completely removed, improving the coercivity of the device, reducing the shunt to the bottom electrode layer, and improving the conversion efficiency.

[0033] According to some embodiments, the present application also provides a semiconductor memory device, comprising a bottom electrode layer and a plurality of magnetic tunnel junctions located on the bottom electrode layer;

[0034] A sidewall of the magnetic tunnel junction has a residue, and the residue contacts the bottom electrode layer;

[0035] The residue is removed by etching, including:

[0036] forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; an upper surface of the first residue covering layer is not higher than an upper surface of the second residue covering layer;

[0037] The residue and the first residue covering layer are removed by etching.

[0038] The semiconductor memory device provided by the embodiments of the present application has at least the following advantages:

[0039] In the semiconductor memory device provided in the embodiment of the present application, the residues are removed by etching, so that the residues are completely removed, the coercive force of the device is improved, the shunting to the bottom electrode is reduced, and the conversion efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic diagram of a method for forming a semiconductor memory device in an embodiment of the present application;

[0041] Figure 2 This is a schematic diagram of a magnetic tunnel junction formed in an embodiment of the present application;

[0042] Figure 3 A schematic diagram of a residue covering layer formed in an embodiment of the present application;

[0043] Figure 4 Another schematic diagram after a residue covering layer is formed in an embodiment of the present application;

[0044] Figure 5 A schematic diagram of etching the residual cover layer in an embodiment of the present application;

[0045] Figure 6 Another schematic diagram after etching the residue cover layer in the embodiment of the present application;

[0046] Figure 7 This is a schematic diagram of a redeposition covering layer formed in an embodiment of the present application;

[0047] Figure 8 A schematic diagram of etching the re-deposited cover layer in an embodiment of the present application;

[0048] Fig. 9 Another schematic diagram of a method for forming a semiconductor memory device in an embodiment of the present application.

[0049] Description of reference numerals:

[0050] 10-bottom electrode layer; 20-magnetic tunnel junction;

[0051] 21-free layer; 22-tunneling layer;

[0052] 23-reference layer; 24-fixed layer;

[0053] 30-residue; 40-redeposition;

[0054] 50-residue covering layer; 51-protrusion;

[0055] 60-Redeposition cover. DETAILED DESCRIPTION

[0056] In semiconductor memory devices (such as magnetic memory) in related technologies, the material of the free layer is usually CoFeB, and the proportions of each molecule may vary, such as 2:6:2. The material of the tunnel layer is usually MgO, and the proportions of each molecule are generally 1:1. The material of the reference layer is usually CoFeB, and the proportions of each molecule may vary, such as 2:6:2. The material of the magnetic tunnel junction is relatively complex and the thickness of each film layer is relatively thin, usually 0.1-10nm, making it difficult to etch the magnetic tunnel junction using more process-friendly methods such as chemical etching. It is also difficult to grab the end point of the etching due to the thickness of its film layer.

[0057] At present, ion beam etching (IBE) is usually used to etch the magnetic tunnel junction in a physical removal method to avoid the problem of incompatibility of multiple materials in chemical etching. However, the above removal method also has certain problems: in order to ensure the uniformity and efficiency of etching, IBE usually takes a certain angle for etching, which will result in the residue of the free layer when etching to the heavy metal layer, forming residues. In order to ensure that the etching damage of the heavy metal layer is minimized, it is difficult to over-etch, making the residue difficult to remove. The residue is made of the same material as the free layer, which will affect the overall device coercivity (Hc), and then the magnetic reversal effect, and will also cause shunting of the heavy metal layer, which will reduce the conversion efficiency and affect the efficiency of the device.

[0058] In addition, due to the limitations of IBE etching, the particles generated by etching MTJ cannot be as volatile as chemical etching, which means that these particles will not be removed in time and will be redeposited near the MTJ junction to form redepositions. The redepositions will enlarge the size of the MTJ and cause the intermediate state to be serious, which may cause a short circuit in the entire device.

[0059] For the above problems, currently, alternating large-angle and small-angle IBE etching is generally adopted, with large-angle etching to remove redeposition and small-angle etching to reduce residues, and trench etching is performed between MTJs to cut off the residues. However, these methods can only alleviate but not completely solve the problems of residues and redeposition caused by IBE etching, and will instead cause etching damage to the bottom electrode layer at the bottom of the MTJ junction, thereby damaging the electrical performance of the semiconductor memory device.

[0060] To this end, an embodiment of the present application provides a method for forming a semiconductor memory device, forming a residue covering layer, the residue covering layer including a first residue covering layer covering the residues, and a second residue covering layer covering the bottom electrode layer between adjacent residues, the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer between the magnetic tunnel junctions forms a flat or middle-convex morphology.

[0061] Etching to remove the residue and the first residue covering layer allows the residue and the first residue covering layer to be removed simultaneously, thereby ensuring that the residue is completely removed, improving the coercivity of the device, reducing the shunting to the bottom electrode, and improving the conversion efficiency. The second residue covering layer will remain, and at least the remaining second residue covering layer can also protect the bottom electrode layer in the subsequent etching process, reduce damage to the bottom electrode layer, and improve the flipping efficiency.

[0062] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present application more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work belong to the scope of protection of this application.

[0063] See also Figure 1 The present invention provides a method for forming a semiconductor memory device, and the method comprises the following steps:

[0064] Step S100: forming a plurality of magnetic tunnel junctions on the bottom electrode layer, wherein the sidewalls of the magnetic tunnel junctions have residues, and the residues contact the bottom electrode layer.

[0065] The bottom electrode layer 10 can be formed on a substrate (not shown in the figure), and the bottom electrode layer 10 can be a heavy metal layer. A plurality of magnetic tunnel junctions 20 are formed by etching, and specifically, a bottom electrode layer, an initial free layer, an initial tunneling layer and an initial reference layer are sequentially deposited on the substrate, that is, the substrate, the bottom electrode layer, the initial free layer, the initial tunneling layer and the initial reference layer are sequentially stacked.

[0066] A conventional etching method, such as ion beam etching, is used to remove part of the initial free layer, part of the initial tunneling layer and part of the initial reference layer, and the remaining initial free layer forms a plurality of free layers 21 disposed at intervals, the remaining initial tunneling layer forms a plurality of tunneling layers 22 disposed at intervals, and the remaining initial reference layer forms a plurality of reference layers 23 disposed at intervals. Figure 2 Each free layer 21 and the tunneling layer 22 and reference layer 23 thereon form a magnetic tunnel junction 20 , and trenches are formed between adjacent magnetic tunnel junctions 20 .

[0067] After forming a plurality of magnetic tunnel junctions 20 on the bottom electrode layer 10, due to the limitation of the etching method, the sidewalls of the magnetic tunnel junctions 20 have residues 30, wherein both sides of the magnetic tunnel junctions 20 generally have residues 30, and the residues 30 contact the bottom electrode layer 10. The residues 30 are free layer residues, which are an integral structure with the free layer 21. Along the direction away from the sidewalls of the magnetic tunnel junctions 20, the thickness of the residues 30 gradually decreases.

[0068] In some possible exemplary embodiments, an initial fixed layer may be deposited on the initial reference layer, and a portion of the initial fixed layer may be subsequently etched away. The remaining initial fixed layer forms a plurality of fixed layers 24 disposed at intervals, and the magnetic tunnel junction 20 further includes a corresponding fixed layer 24. The fixed layer 24 is used to fix or limit the magnetic moment direction of the reference layer 23, and its material generally includes an anti-ferromagnetic (AFM) material, such as FeMn, PtMn, IrMn, NiO, etc.

[0069] Step S200: forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer.

[0070] See also Figure 2 and Figure 3 , forming a residue covering layer 50, the residue covering layer 50 at least covers the residues 30 between adjacent magnetic tunnel junctions 20 and the bottom electrode layer 10. It can be understood that a groove is formed between adjacent magnetic tunnel junctions 20, and the sides of adjacent magnetic tunnel junctions 20 close to each other have residues 30, and these residues 30 are adjacent residues 30, that is, the residues 30 located in the same groove are adjacent residues 30.

[0071] The residue covering layer 50 includes a first residue covering layer and a second residue covering layer, both of which are located between adjacent magnetic tunnel junctions 20. The first residue covering layer covers the residues 30, and the second residue covering layer covers the bottom electrode layer 10 between adjacent residues 30.

[0072] The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, and the upper surface refers to the surface away from the bottom electrode layer 10. The first residue covering layer can complement the residue, so that the residue and the residue covering layer can be removed simultaneously in the subsequent removal process. Figure 4 As shown, the second residue cover layer protrudes from the first residue cover layer, so that the residue cover layer 50 between the magnetic tunnel junctions 20 forms a protrusion 51; or Figure 3 As shown, the second residue capping layer is flush with the first residue capping layer, so that the residue capping layer 50 between the magnetic tunnel junctions 20 is relatively flat.

[0073] In some possible examples, the material of the residue cover layer 50 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, metal oxide and metal nitride. The residue cover layer 50 is formed by non-vertical deposition. Specifically, the residue cover layer 50 can be formed directly by non-vertical deposition or indirectly by non-vertical deposition, that is, the residue cover layer 50 is formed by non-vertical deposition and then oxidized / nitrided.

[0074] Exemplarily, chemical deposition is used to form the residue cover layer 50. Another exemplary method is to physically deposit the material of the residue cover layer 50 to directly form the residue cover layer 50. Another exemplary method is to physically deposit a metal layer, such as aluminum, magnesium, etc., and then perform oxidation or nitridation on the metal layer to form the residue cover layer 50. In this case, the material of the residue cover layer 50 is a metal oxide or a metal nitride.

[0075] Non-vertical deposition means that the deposition direction of the material particles used to form the residue covering layer 50 is not perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, that is, the deposition does not have good directionality. The material particles include reactant ions of the residue covering layer 50, target ions of the residue covering layer 50, or target ions of the metal layer corresponding to the residue covering layer 50. The deposition angle of non-vertical deposition is greater than 120°, or less than 60°, that is, the deposition angle cannot be 90°. The deposition angle refers to the angle between the deposition direction of the material particles and the plane of the substrate.

[0076] The deposition direction of the material particles does not coincide with the stacking direction of the magnetic tunnel junction 20, forming a certain angle. In this way, the material particles are shielded by the high-density magnetic tunnel junction 20 (shadow effect), and the thickness of the residue cover layer 50 at each position is different, the first residue cover layer is thinner, and the second residue cover layer is thicker. The residue cover layer 50 between the magnetic tunnel junctions 20 can complement the residue 30, so that the residue cover layer 50 between the magnetic tunnel junctions 20 is flat or forms a protrusion 51 in the middle.

[0077] It is understood that during the deposition process, the material particles also synchronously cover the top of the magnetic tunnel junction 20, and the thickness of the residue cover layer 50 on the top of the magnetic tunnel junction 20 is greater than the thickness of the first residue cover layer, for example, the thickness of the residue cover layer 50 on the top of the magnetic tunnel junction 20 is the same as the thickness of the second residue cover layer. The material particles can also synchronously cover the sidewalls of the magnetic tunnel junction 20, and the thickness of the residue cover layer 50 on the sidewalls of the magnetic tunnel junction 20 is less than the thickness of the second residue cover layer. In other examples, there is no residue cover layer 50 on the sidewalls of the magnetic tunnel junction 20.

[0078] Step S300: etching to remove the residue and the first residue covering layer, exposing the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction.

[0079] See also Figure 5 and Figure 6 When the residue 30 and the first residue cover layer are removed by etching, the etching angle is greater than or equal to 60° and less than or equal to 120°, preferably 90°. The etching angle refers to the etching direction (such as Figure 5 and Figure 6 The angle between the plane of the substrate and the plane of the substrate. Figure 5 and Figure 6 The etching includes IBE etching with a high bias voltage, and the etching gas includes at least one of helium, argon and krypton, preferably helium, which has a small molecular weight.

[0080] In this way, the alignment of removing the residue 30 and the first residue cover layer can be improved, and the etching morphology will be gradually transferred. When the residue 30 is completely removed, the etching is terminated and the bottom electrode layer 10 in contact with the magnetic tunnel junction 20 is exposed.

[0081] It can be understood that when the residue covering layer 50 also exists on the top and side walls of the magnetic tunnel junction 20, the etching rates of the residue covering layer 50 on the top of the magnetic tunnel junction 20, the first residue covering layer and the second residue covering layer are basically equal, and are greater than the etching rate of the residue covering layer 50 in other areas (for example, the residue covering layer 50 on the side walls of the magnetic tunnel junction 20).

[0082] When the residue 30 and the first residue cover layer are removed by etching, the second residue cover layer is also etched synchronously. Figure 5 As shown, when the upper surface of the first residue cover layer is flush with the upper surface of the second residue cover layer, the second residue cover layer is also removed by etching simultaneously, and the bottom electrode layer 10 between the magnetic tunnel junctions 20 is exposed. Figure 6As shown, when the upper surface of the first residue covering layer is lower than the upper surface of the second residue covering layer, part of the second residue covering layer is still remaining, and the remaining second residue covering layer covers part of the bottom electrode layer 10 between the magnetic tunnel junctions 20 to protect the bottom electrode layer 10 from being damaged.

[0083] When the residue 30 and the first residue cover layer are etched away, the residue cover layer 50 is also etched away simultaneously to the top and sidewalls of the magnetic tunnel junction 20. After the residue 30 and the first residue cover layer are etched away, the residue cover layer 50 on the top and sidewalls of the magnetic tunnel junction 20 can be completely removed or partially left. For example, the residue cover layer 50 on the top and sidewalls of the magnetic tunnel junction 20 both have a portion of the residue cover layer 50 left.

[0084] In summary, in the method for forming a semiconductor memory device of the embodiment of the present application, a plurality of magnetic tunnel junctions 20 are formed on the bottom electrode layer 10, the sidewalls of the magnetic tunnel junctions 20 have residues 30, and a residue covering layer 50 is formed, the residue covering layer 50 includes a first residue covering layer covering the residues 30, and a second residue covering layer covering the bottom electrode layer 10 between adjacent residues 30. The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer 50 between the magnetic tunnel junctions 20 forms a flat or middle convex morphology. The residues 30 and the first residue covering layer are removed by etching, and the bottom electrode layer 10 in contact with the sidewalls of the magnetic tunnel junctions 20 is exposed, so that the residues 30 and the first residue covering layer can be removed simultaneously, thereby ensuring that the residues 30 are completely removed, improving the device coercivity, reducing the shunting of the bottom electrode layer 10, and improving the conversion efficiency. At least the second residue covering layer can also protect the bottom electrode layer 10 in the subsequent corresponding etching process, reduce the damage to the bottom electrode layer 10, and improve the flipping efficiency.

[0085] In some possible embodiments, after etching away the residue 30 and the first residue covering layer, the process further includes: repeatedly forming a third residue covering layer, wherein the third residue covering layer at least covers the remaining residue 30, the remaining first residue covering layer, and the remaining second residue covering layer; and etching away the third residue covering layer, the remaining residue 30, and the remaining first residue covering layer at least once to completely remove the residue 30.

[0086] After the residue covering layer 50 is formed, the residue 30, the first residue covering layer and the second residue covering layer complement each other, and the second residue covering layer and the first residue covering layer form a flat or convex morphology 51. Considering the problem that the etching rates of the residue 30 and the residue covering layer 50 are inconsistent, a small portion of the residue 30 is still not completely removed after the residue 30 and the first residue covering layer are removed by etching.

[0087] To ensure that the residue 30 is completely removed and to avoid damage to the bottom electrode layer 10, the steps of forming the third residue covering layer and etching and removing the third residue covering layer, the residue 30 and the first residue covering layer 50 may be repeated at least once until the residue 30 is completely etched away.

[0088] It can be understood that after the residue and the first residue covering layer are removed by etching to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction (step S300), the method further includes:

[0089] Step a: forming a third residue covering layer, wherein the third residue covering layer at least covers the remaining residues, the remaining first residue covering layer, and the remaining second residue covering layer.

[0090] Step b: etching and removing the third residue covering layer, the remaining residues and the remaining first residue covering layer.

[0091] Repeat step a and step b at least once in sequence until the residue 30 is completely removed.

[0092] In some possible embodiments, the sidewalls of the magnetic tunnel junction 20 are further attached with redeposition 40, and the redeposition 40 is mainly attached to the sides of the reference layer 23 and the tunneling layer 22. After the residue cover layer 50 is formed, the redeposition 40 may be covered by the residue cover layer 50 or may be exposed. After the residue 30 and the first residue cover layer are removed by etching, the redeposition 40 may be covered by the remaining residue cover layer 50 or may be exposed.

[0093] After removing the residue and the first residue covering layer by etching to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction (step S300), the method further includes:

[0094] Step A: forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposit, and the second redeposited covering layer covers the remaining second residue covering layer and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer.

[0095] See also Figure 7 , the redeposited covering layer 60 includes a first redeposited covering layer and a second redeposited covering layer, the first redeposited covering layer covers the redeposited material 40 and also simultaneously covers the sidewalls of the magnetic tunnel junction 20. The second redeposited covering layer covers the residue 30 and the bottom electrode layer 10 between adjacent magnetic tunnel junctions 20. In other examples, the redeposited covering layer 60 also covers the top of the magnetic tunnel junction 20, and the second redeposited covering layer and the first redeposited covering layer are an integrated structure.

[0096] The material of the redeposited cover layer 60 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, metal oxide and metal nitride. The redeposited cover layer 60 is formed by vertical deposition. Specifically, the redeposited cover layer 60 can be formed directly by vertical deposition or indirectly by vertical deposition, that is, the redeposited cover layer 60 is formed by vertical deposition and then oxidized / nitrided.

[0097] Exemplarily, chemical deposition forms the redeposited cover layer 60. In another exemplary embodiment, the material of the redeposited cover layer 60 is physically deposited to directly form the redeposited cover layer 60. In another exemplary embodiment, a metal layer is physically deposited and the metal layer is oxidized or nitrided to form the redeposited cover layer 60, in which case the material of the redeposited cover layer 60 is a metal oxide or a metal nitride.

[0098] The redeposited covering layer 60 is formed by deposition, and the deposition angle of the deposition is greater than 70° and less than 110°, preferably 90°. The deposition angle refers to the deposition direction of the material particles forming the redeposited covering layer 60, which is perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, that is, the deposition has a high directionality. The above-mentioned material particles include reactant ions of the redeposited covering layer 60, target ions of the redeposited covering layer 60, or target ions of the metal layer corresponding to the redeposited covering layer 60, etc.

[0099] The deposition can be regarded as vertical deposition. Through vertical deposition, the collimation of the material particles is high. The thickness of the redeposited covering layer 60 (i.e., the second redeposited covering layer) between the magnetic tunnel junctions 20 is substantially the same and greater than the thickness of the redeposited covering layer 60 (i.e., the first redeposited covering layer) on the side wall of the magnetic tunnel junction 20. That is, the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer. The overall profile of the redeposited covering layer 60 is as shown in FIG. Figure 7 shown.

[0100] In other examples, a portion of the residual covering layer 50 remains on the top and sidewalls of the magnetic tunnel junction 20, and the first redeposited covering layer also covers this portion of the residual covering layer 50. The second redeposited covering layer covers the remaining second residual covering layer and the bottom electrode layer 10, and the second redeposited covering layer and the first redeposited covering layer are an integrated structure.

[0101] In the example where the magnetic tunnel junction 20 includes a free layer 21, a tunneling layer 22, and a reference layer 23 stacked in sequence, the thickness of the second redeposited cover layer is greater than the thickness of the free layer 21, which can prevent the second redeposited cover layer from being too thin and exposing the free layer 21 during subsequent etching, thereby ensuring that the free layer 21 is not etched. The redeposited material 40 is mainly attached to the sides of the tunneling layer 22 and the reference layer 23, and the thickness of the second redeposited cover layer is less than the total thickness of the free layer 21 and the tunneling layer 22, so as to facilitate the removal of the redeposited material 40 outside the tunneling layer 22, thereby cutting off the electrical connection between the free layer 21 and the reference layer 23 and eliminating the short circuit of the device.

[0102] Step B: etching and removing the first redeposition capping layer and the redeposition to expose the sidewall of the magnetic tunnel junction.

[0103] See also Figure 8 , the first redeposited covering layer and the redeposited 40 are etched away, and the etching is non-vertical etching. The first redeposited covering layer is thin, and there is no need to limit the etching angle during etching. As long as the etching angle is non-vertical, the side wall of the magnetic tunnel junction 20 can be preferentially opened to expose the redeposited 40, thereby removing the redeposited 40.

[0104] At this time, the sidewalls of the magnetic tunnel junction 20 are completely exposed, the residues 30 and redepositions 40 on the sidewalls of the magnetic tunnel junction 20 are completely removed, and at least a redeposition covering layer 60 remains between the top of the magnetic tunnel junction 20 and the magnetic tunnel junction 20, and no damage is caused to the bottom electrode layer 10. Figure 8 As shown, a redeposited capping layer 60 and a residue capping layer 50 remain on the top of the magnetic tunnel junction 20 and between the magnetic tunnel junctions 20 .

[0105] The present application also provides a method for forming a semiconductor memory device. Fig. 9 , the forming method specifically comprises the following steps:

[0106] Step S100': forming a plurality of magnetic tunnel junctions on the bottom electrode layer, the sidewalls of the magnetic tunnel junctions having residues and redepositions, and the residues contacting the bottom electrode layer.

[0107] like Figure 2 As shown, each magnetic tunnel junction 20 may include a free layer 21, a tunnel layer 22 and a reference layer 23 stacked in sequence, and the free layer 21 is disposed on the bottom electrode layer 10. Each magnetic tunnel junction 20 may also include a fixed layer 24 disposed on a side of the reference layer 23 away from the tunnel layer 22. The sidewalls of the magnetic tunnel junction 20 have residues 30 and redepositions 40.

[0108] The residue 30 contacts the bottom electrode layer 10, and the residue 30 is a remnant of the free layer 21, and is an integral structure with the free layer 21. The thickness of the residue 30 gradually decreases in the direction away from the side wall of the magnetic tunnel junction 20. The redeposition 40 is attached to the side wall of the magnetic tunnel junction 20, and is mainly attached to the side of the reference layer 23 and the tunnel layer 22.

[0109] Step S200': forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited material, and the second redeposited covering layer covers the residues between adjacent magnetic tunnel junctions and the bottom electrode layer; the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer.

[0110] The redeposited covering layer 60 includes a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited material 40 and also simultaneously covers the sidewalls of the magnetic tunnel junction 20. The second redeposited covering layer covers the residue 30 and the bottom electrode layer 10 between adjacent magnetic tunnel junctions 20. In other examples, the redeposited covering layer 60 also covers the top of the magnetic tunnel junction 20, and the second redeposited covering layer and the first redeposited covering layer are an integrated structure.

[0111] The redeposited covering layer 60 is formed by deposition, and the deposition angle of the deposition is greater than 70° and less than 110°, preferably 90°, that is, the redeposited covering layer is formed by vertical deposition. Specifically, the redeposited covering layer can be formed directly by vertical deposition, and can also be formed indirectly by vertical deposition, that is, the redeposited covering layer is formed by vertical deposition and then oxidized / nitrided.

[0112] The deposition angle refers to the deposition direction of the material particles forming the redeposited cover layer 60, which is perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, that is, the deposition has a high directionality. The material particles include reactant ions of the redeposited cover layer 60, target ions of the redeposited cover layer 60, or target ions of the metal layer corresponding to the redeposited cover layer 60.

[0113] In this way, the deposited material particles have high collimation, and the thickness of the redeposited covering layer 60 (i.e., the second redeposited covering layer) between the magnetic tunnel junctions 20 is basically consistent and greater than the thickness of the redeposited covering layer 60 (i.e., the first redeposited covering layer) on the side wall of the magnetic tunnel junction 20, that is, the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer.

[0114] Step S300 ′: etching and removing the first redeposition capping layer and the redeposition, exposing the sidewall of the magnetic tunnel junction and the residue in contact with the magnetic tunnel junction.

[0115] The first redeposited covering layer and the redeposited material 40 are removed by etching. The etching is non-vertical etching. The first redeposited covering layer is thin. There is no need to limit the etching angle during etching. As long as the etching angle is non-vertical, the side wall of the magnetic tunnel junction 20 can be opened preferentially to expose the redeposited material 40, thereby removing the redeposited material 40.

[0116] The redeposited material 40 and the first redeposited covering layer on the sidewall of the magnetic tunnel junction 20 are completely removed, and the second redeposited covering layer is simultaneously etched and removed at least partially. For example, part of the second redeposited covering layer on the residue 30 is etched and removed, and part of the residue 30 in contact with the magnetic tunnel junction 20 is exposed, or even the residue 30 is completely exposed. There is also a second redeposited covering layer remaining between adjacent residues 30 to protect the bottom electrode layer 10. In other examples, there will also be a remaining redeposited covering layer 60 on the top of the magnetic tunnel junction 20.

[0117] Step S400': forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the exposed residues, and the second residue covering layer covers the second redeposition covering layer between adjacent residues; the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer.

[0118] The residual covering layer is formed by deposition, and the deposition angle is greater than 120°, or less than 60°, and the deposition angle cannot be 90°, that is, the residual covering layer is formed by non-vertical deposition. The deposition angle refers to the angle between the deposition direction of the material particles forming the residual covering layer and the plane of the substrate. The deposition direction of the material particles is not perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, that is, the deposition does not have good directionality.

[0119] In this way, the material particles are shielded by the high-density magnetic tunnel junction 20 (shadow effect), and the thickness of the residue cover layer at each position is different. The first residue cover layer is thinner, and the second residue cover layer is thicker. The residue cover layer between the magnetic tunnel junctions 20 can complement the residue 30, so that the residue cover layer between the magnetic tunnel junctions 20 is flat or forms a bulge in the middle.

[0120] In other examples, the residue covering layer also covers the top and sidewalls of the magnetic tunnel junction 20. The thickness of the residue covering layer on the top of the magnetic tunnel junction 20 is greater than the thickness of the first residue covering layer, and the thickness of the residue covering layer on the sidewalls of the magnetic tunnel junction 20 is less than the thickness of the first residue covering layer.

[0121] Step S500': etching to remove the residue and the first residue covering layer, exposing the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction.

[0122] When etching to remove the residue 30 and the first residue cover layer, the etching angle is greater than or equal to 60° and less than or equal to 120°, preferably 90°. The etching angle refers to the angle between the etching direction and the plane of the substrate. The etching includes high bias IBE etching, and the etching gas includes at least one of helium, argon and krypton, preferably helium, which has a small molecular weight.

[0123] In this way, the etching is vertical etching, that is, the etching direction is perpendicular to the plane of the substrate. Vertical etching can improve the alignment of removing the residue 30 and the first residue covering layer, so that the residue 30 and the first residue covering layer can be completely removed, and the morphology will be gradually transferred. When the etching is completed when the residue 30 is completely removed, the bottom electrode layer 10 in contact with the magnetic tunnel junction 20 is exposed.

[0124] It is understandable that after the residue 30 and the first residue cover layer are removed by etching, at least a redeposited cover layer remains between the top of the magnetic tunnel junction 20 and the adjacent magnetic tunnel junction 20. For example, both the redeposited cover layer and the residue cover layer remain between the top of the magnetic tunnel junction 20 and the adjacent magnetic tunnel junction 20. In addition, the residue 30 can also be removed by etching multiple times to ensure that the residue 30 can be completely removed. For details, please refer to the above embodiment, which will not be repeated here.

[0125] In summary, in the method for forming a semiconductor memory device in the embodiment of the present application, a plurality of magnetic tunnel junctions 20 are formed on the bottom electrode layer 10, and the sidewalls of the magnetic tunnel junctions 20 have residues 30 and redepositions 40. A redeposition covering layer is formed, and the redeposition covering layer includes a first redeposition covering layer covering the redeposition 40, and a second redeposition covering layer covering the residues 30 and the bottom electrode layer 10. The thickness of the first redeposition covering layer is less than the thickness of the second redeposition covering layer, so that the second redeposition covering layer of the sidewalls of the magnetic tunnel junctions 20 is thinner. The first redeposition covering layer and the redeposition 40 are removed by etching, and the sidewalls of the magnetic tunnel junctions 20 are opened, thereby ensuring the complete removal of the redeposition 40, avoiding device short circuit, and improving device efficiency. A residue covering layer is formed again, and the residue covering layer includes a first residue covering layer covering a second redeposited covering layer on the residue 30, and a second redeposited covering layer covering between adjacent residues 30, and the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer between the magnetic tunnel junctions 20 forms a flat or middle convex morphology. The residue 30 and the first residue covering layer are removed by etching, and the residue 30 and the first residue covering layer are removed synchronously, thereby ensuring that the residue 30 is completely removed, improving the device coercivity, reducing the shunting to the bottom electrode layer 10, and improving the conversion efficiency.

[0126] An embodiment of the present application also provides a semiconductor memory device, which includes a bottom electrode layer and a plurality of magnetic tunnel junctions located on the bottom electrode layer; the sidewalls of the magnetic tunnel junctions have residues, and the residues contact the bottom electrode layer.

[0127] Among them, the residue is removed by etching, including:

[0128] forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; an upper surface of the first residue covering layer is not higher than an upper surface of the second residue covering layer;

[0129] The residue and the first residue capping layer are removed by etching.

[0130] In this way, the residues are removed by etching, so that the residues are completely removed, the coercivity of the device is improved, the shunting to the bottom electrode is reduced, and the conversion efficiency is improved.

[0131] In this specification, each embodiment or implementation is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other. The description of reference terms such as "one implementation", "some implementations", "illustrative implementations", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the implementation or example are included in at least one implementation or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more implementations or examples in a suitable manner.

[0132] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for forming a semiconductor memory device, characterized in that: include: forming a plurality of magnetic tunnel junctions on the bottom electrode layer, wherein the sidewalls of the magnetic tunnel junctions have residues, and the residues contact the bottom electrode layer; forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer; The residue and the first residue covering layer are removed synchronously by vertical etching, and the etching is terminated when the residue is completely removed to expose the bottom electrode layer in contact with the side wall of the magnetic tunnel junction.

2. The forming method according to claim 1, characterized in that: The residue capping layer is formed by non-vertical deposition.

3. The forming method according to claim 1, characterized in that: After removing the residue and the first residue covering layer by etching, the method further comprises: Repeatingly forming a third residue covering layer, wherein the third residue covering layer at least covers the remaining residue, the remaining first residue covering layer, and the remaining second residue covering layer; The third residue covering layer, the remaining residues, and the remaining first residue covering layer are removed by etching at least once to completely remove the residues.

4. The forming method according to claim 1, characterized in that: When the residue and the first residue covering layer are removed synchronously by vertical etching, the etching angle of the vertical etching is greater than or equal to 60° and less than or equal to 120°.

5. The forming method according to any one of claims 1 to 4, characterized in that: The sidewall of the magnetic tunnel junction has redeposition; After removing the residue and the first residue covering layer to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction, the method further includes: Forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited material, and the second redeposited covering layer covers the remaining second residue covering layer and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer; The first redeposition capping layer and the redeposition are removed by etching to expose the sidewall of the magnetic tunnel junction.

6. The forming method according to claim 5, characterized in that: The redeposit covering layer is formed by deposition, and a deposition angle of the deposition is greater than 70° and less than 110°.

7. The forming method according to claim 5, characterized in that: The first redeposition capping layer and the redeposition are removed by non-vertical etching.

8. The forming method according to claim 5, characterized in that: The magnetic tunnel junction comprises a free layer, a tunnel layer and a reference layer stacked in sequence; The second redeposition capping layer has a thickness greater than that of the free layer and less than a total thickness of the free layer and the tunneling layer.

9. A method for forming a semiconductor memory device, characterized in that: include: forming a plurality of magnetic tunnel junctions on the bottom electrode layer, wherein the sidewalls of the magnetic tunnel junctions have residues and redepositions, and the residues contact the bottom electrode layer; Forming a redeposited covering layer, including a first redeposited covering layer and a second redeposited covering layer, wherein the first redeposited covering layer covers the redeposited, and the second redeposited covering layer covers the residue between adjacent magnetic tunnel junctions and the bottom electrode layer; The thickness of the first redeposited covering layer is less than the thickness of the second redeposited covering layer; Etching and removing the first redeposition covering layer and the redeposition to expose the sidewall of the magnetic tunnel junction and the residue in contact with the magnetic tunnel junction; forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the exposed residues, and the second residue covering layer covers the second redeposited covering layer between adjacent residues; The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer; The residue and the first residue capping layer are removed by etching to expose the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction.

10. A semiconductor memory device, characterized in that: include: A bottom electrode layer and a plurality of magnetic tunnel junctions located on the bottom electrode layer; A sidewall of the magnetic tunnel junction has a residue, and the residue contacts the bottom electrode layer; The residue is removed by etching, including: forming a residue covering layer, including a first residue covering layer and a second residue covering layer, wherein the first residue covering layer covers the residues, and the second residue covering layer covers the bottom electrode layer between adjacent residues; The upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer; The residue and the first residue covering layer are removed synchronously by vertical etching, and the etching is terminated when the residue is completely removed to expose the bottom electrode layer in contact with the side wall of the magnetic tunnel junction.

Images