311 results about "Magnetic tunnelling" patented technology

The invention relates to a semiconductor structure, a preparation method thereof and a magnetic tunnel junction sensor. The semiconductor structure comprises a substrate, and a buffer layer, a solid magnetic layer, a tunnel barrier layer, a free layer and a protective layer which are located on the substrate. The solid magnetic layer comprises an antiferromagnetic pinning layer and a reference layer which are stacked, the antiferromagnetic pinning layer is located on the top surface of the buffer layer, and the magnetization direction of the reference layer is pinned by the antiferromagnetic pinning layer; the tunnel barrier layer is located on the top surface of the reference layer; the free layer is located on the top surface of the tunnel barrier layer, the thickness of the free layer in the direction perpendicular to the substrate continuously and smoothly changes in the preset direction, the thickness value distribution of the free layer conforms to a preset gradient function, and a preset included angle is formed between the preset direction and the pinned magnetization direction of the reference layer; the protective layer is on the top surface of the free layer. Multi-range or continuous wide-range detection can be realized in a single-chip semiconductor device, and high sensitivity is realized.

The invention discloses a three-dimensional transient electromagnetic detection method for tunnel advanced geological forecast. The transient electromagnetic exploration method has the advantages of low construction cost, high safety coefficient, reliable detection result and the like. The method comprises the following steps: installing a plurality of loop sources in an area nearby a tunnel face in a set mode, and obtaining stratum information data of the area nearby the tunnel face; and analyzing the data by adopting a three-dimensional transient electromagnetic forward and reverse modeling method to obtain related information of the unfavorable geologic body in front of the tunnel face. According to the method, the efficiency and the accuracy of transient electromagnetic tunnel advanced prediction are improved.

The invention relates to the technical field of medicine cold chain logistics information, in particular to a medical intravenous distribution code scanning logistics tracking method which comprises the following steps: attaching a self-energized label on the outer side of a preparation, reading magnetic tunnel junction physical fingerprints and nanocrystalline point-deoxyribonucleic acid information to generate a reference hash value, and collecting humiture recursion environment hash chains at fixed intervals; generating a challenge by using a satellite high-entropy random number during handover, obtaining a second fingerprint, constructing a zero-knowledge event proof in combination with a reference hash value and an environment chain, and writing a plurality of proof into a distributed account book after dynamic planning aggregation; and synchronously capturing wireless channel state information to construct a dynamic graph, and outputting a next node instruction and a risk score by a graph neural network and near-end strategy optimization. According to the method, battery-free anti-cloning and anti-tampering cold chain monitoring and network disconnection path decision are realized, the chain cost is low, and the robustness is high.

The embodiment of the invention provides a physical unclonable function generator and a true random number generator. The physical unclonable function generator comprises a storage array and a control unit, a storage unit in the storage array comprises a magnetic storage device, and the magnetic storage device comprises a magnetic tunnel junction; the control unit is used for controlling the application of a magnetic field along a target direction to the storage array, and reading the resistance state of the storage unit to generate a physical unclonable function after the application of the magnetic field is stopped; wherein the target direction is perpendicular to or approximately perpendicular to the magnetic moment direction of the free layer in the magnetic tunnel junction in the in-plane direction, and the randomness and uniformity of the physical unclonable function are improved.

Embodiments of present invention provide a magnetoresistive random-access-memory (MRAM) device. The MRAM device includes a reference layer; a tunnel barrier layer next to the reference layer; and a free layer next to the tunnel barrier layer, where the free layer includes a crystalline AIMnGe layer in a C38 structure formed on a magnetic seed layer, and the magnetic seed layer is a crystallized MnCo2Si layer or a crystallized MnCo2Ge layer having a cubic Heusler structure with a (001) texture. A method of forming the MRAM device is also provided.

The invention provides a magnetic storage unit and device based on signal time delay. The unit comprises a first spin orbit moment layer and a first magnetic tunnel junction arranged on the first spin orbit moment layer. The distances between the first magnetic tunnel junction and the two ends of the first spin orbit moment layer are respectively a first distance and a second distance, and the first distance and the second distance are not equal; respectively inputting a first pulse signal and a second pulse signal from two ends of the first spin orbit moment layer along the first distance and the second distance; and the first pulse signal and the second pulse signal form a first write-in spin transfer torque current at the first magnetic tunnel junction due to signal time delay, so that the magnetic moment of a free layer of the first magnetic tunnel junction is subjected to deterministic overturning under the action of the first write-in spin transfer torque current. Deterministic writing of the magnetic tunnel junction can be realized without an additional auxiliary magnetic field, the device structure is simplified, and the area and power consumption overhead are reduced.

The invention provides a magnetoresistive random access memory structure and a preparation method thereof. The method comprises the following steps: providing a substrate; forming a magnetic tunnel junction film layer on the substrate; forming a first dielectric layer on the magnetic tunnel junction film layer; etching the two ends of the first dielectric layer in the first direction so as to enable the two opposite ends of the magnetic tunnel junction film layer in the first direction to extend out of the etched first dielectric layer; forming a metal layer on the magnetic tunnel junction film layer, wherein the metal layer wraps the etched first dielectric layer; and etching the metal layer to form top electrodes on two opposite sides of the first dielectric layer along the first direction. According to the invention, the yield of the MRAM can be improved.

The invention provides a semiconductor structure, which comprises a plurality of magnetic tunnel junction (MTJ) elements. Seen from a top view, the MTJ elements are arranged in an array, at least one second contact structure is located in the array arranged by the MTJ elements, and at least one first mask layer covers a top surface and two sidewalls of each MTJ element, when seen from a cross-sectional view, a sidewall of the first mask layer is aligned with a sidewall of a second metal layer which is disposed below the second contact structure.

A semiconductor device includes a first substrate, a transistor, an interconnection structure, a first bonding pad, a magnetic tunnel junction (MTJ) structure, a conductive line and a second substrate. The transistor is formed on the first substrate. The interconnection structure is formed on the first substrate and electrically connected to the transistor. The first bonding pad is formed on and electrically connected to the interconnection structure. The MTJ structure is disposed on and electrically connected to the first bonding pad, wherein the MTJ structure comprises a free layer, a tunnel barrier layer, a synthetic antiferromagnet layer sequentially stacked up over the first bonding pad. The conductive line is disposed on the MTJ structure. The second substrate is disposed on the conductive line.

The present invention provides a magnetic storage device that can suppress the degradation of the characteristics of a magnetoresistive element, and a method for manufacturing a magnetic storage device. [Solution] A magnetic memory device 1 of one embodiment includes a first wiring 21 extending in a first direction X, a second wiring 28 extending in a second direction Y intersecting the first direction and provided above the first wiring, a first memory cell provided between the first wiring and the second wiring, a third wiring 21 extending in the first direction and provided above the second wiring, and a second memory cell provided between the second wiring and the third wiring. The first memory cell includes a first selector body 24, a first conductor 26, and an MTJ body 27 provided on the upper surface of the first conductor. The second memory cell includes a second selector body 24, a second conductor 26, and a second MTJ body 27 provided on the upper surface of the second conductor. The upper surface of the first conductor is flattened.

Provided are a reconfigurable neuron device based on ion gate regulation and a method of preparing the same. The device includes: a synthetic antiferromagnetic layer, a metal oxide layer, an ionic liquid layer and a top electrode layer which are sequentially stacked from bottom to top. A left boundary antiferromagnetic layer and a right boundary antiferromagnetic layer having opposite magnetization directions are provided on two opposite edges of a bottom end of the synthetic antiferromagnetic layer, and a magnetic tunnel junction configured to output a spike signal is further provided in a middle portion of the bottom end of the synthetic antiferromagnetic layer. The metal oxide layer, the ionic liquid layer and the top electrode layer constitute an ion gate, the ionic liquid layer includes a positive ion and a negative ion.

In a method of manufacturing a magnetic memory device, a temporary shift cancel layer including X metal atoms and Y metal atoms as free atoms may be formed. A magnetic tunnel junction layer may be formed on the temporary shift cancel layer. The magnetic tunnel junction layer and the temporary shift cancel layer may be etched to form a magnetic tunnel junction pattern and a temporary shift cancel pattern. The Y metal atoms redeposited between the magnetic tunnel junction pattern and the temporary shift cancel pattern may be oxidized to form metal oxide. The Y metal atoms of the temporary shift cancel pattern may be substituted with Z metal atoms to form a shift cancel pattern. The Y metal atoms may have higher oxidizing than the Z metal atoms. The Z metal atoms may have a higher reduction potential than the Y metal atoms.

A magnetic memory device includes a substrate, a base insulating film on the substrate, a magnetic tunnel junction element including first and second magnetic patterns and a tunnel barrier pattern therebetween on the base insulating film, an upper electrode pattern on an upper face of the magnetic tunnel junction element, a capping structure including a first to third capping films sequentially stacked on a side face of the magnetic tunnel junction element, and a conductive line on both the upper electrode pattern and the capping structure and connected to the upper electrode pattern. An uppermost end of the second capping film is higher than an uppermost end of the first capping film, an uppermost end of the third capping film is lower than the uppermost end of the first capping film, and the second capping film includes a material different from respective materials of the first and third capping films.

A spin orbit torque (SOT) magnetic tunnel junction (MTJ) device includes a substrate, a seed layer over the substrate, and a bismuth antimony (BiSb) layer having a (0120) orientation on the seed layer. The seed layer includes a silicide layer and a surface control layer. The silicide layer includes a material of NiSi, NiFeSi, NiFeTaSi, NiCuSi, CoSi, CoFeSi, CoFeTaSi, CoCuSi, or a combination thereof. The surface control layer includes a material of NiFe, NiFeTa, NiTa, NiW, NiFeW, NiCu, NiCuM, NiFeCu, CoTa, CoFeTa, NiCoTa, Co, CoM, CoNiM, CoNi, NiSi, CoSi, NiCoSi, Cu, CuAgM, CuM, or a combination thereof, where M is Fe, Cu, Co, Ta, Ag, Ni, Mn, Cr, V, Ti, or Si.

The application provides a MRAM storage device based on vertical 1T1M and a preparation method thereof. The device is composed of a field effect transistor (FET) vertically stacked on a magnetic tunnel junction (MTJ). The magnetic tunnel junction is composed of a multilayer stack of magnetic materials grown on a Si / SiO2 substrate, and each layer from bottom to top is sequentially a bottom electrode, a pinning layer, a reference layer, a barrier layer, a free layer and a top electrode, which are surrounded by a first passivation layer. The field effect transistor is a vertical channel FET in a surround channel around (CAA) configuration, and is vertically stacked from bottom to top by a first metal layer, an isolation layer and a second metal layer. The first metal layer of the field effect transistor is connected to the top electrode of the magnetic tunnel junction through an interconnection layer, thereby forming a 1T1M vertically stacked structure storage device, which can effectively improve the MRAM storage density.

The invention provides a preparation method of a magnetic storage unit, and the method comprises the steps: providing a substrate which is provided with a bottom electrode; forming a spin orbit moment providing layer, a magnetic tunnel junction lamination layer and a first mask layer on the substrate; patterning the first mask layer, and patterning the magnetic tunnel junction lamination layer and the spin orbit moment providing layer according to the patterned first mask layer to form a first intermediate structure; filling the first intermediate structure with a dielectric material and carrying out planarization processing to form a second intermediate structure; forming a second mask layer on the second intermediate structure; and carrying out patterning on the second mask layer, and carrying out patterning on the magnetic tunnel junction lamination according to the patterned second mask layer. According to the preparation method of the magnetic storage unit, the area of the metal film layer to be etched can be reduced in the etching process of the magnetic tunnel junction, the gas concentration of metal atoms is reduced, and the problem of metal redeposition in the etching process of the magnetic tunnel junction is relieved.

Embodiments of present invention provide a method of forming a MRAM structure. The method includes forming a dielectric layer on top of a bottom contact; creating an opening in the dielectric layer, the opening has a slant top edge; filling a bottom portion of the opening to form a bottom electrode; filling a top portion of the opening with a first ferromagnetic material to form a first ferromagnetic layer; forming a stack of blanket layers, including a blanket tunnel barrier layer, a blanket second ferromagnetic layer, and a blanket top electrode layer, on top of the first ferromagnetic layer; patterning the stack of blanket layers into a top portion of a magnetic tunnel junction stack that includes a tunnel barrier layer, a second ferromagnetic layer, and a top electrode; and forming a top contact in contact with the top electrode. A structure formed thereby is also provided.

A spin-orbit torque magnetoresistive random access memory (SOT MRAM) device is provided. Each SOT MRAM device uses a topological conductor (i.e., a topological metal or a topological semimetal) as both an interconnect layer and an SOT layer, which are integrated at the same metal layer. The SOT MRAM device also includes a magnetic tunnel junction (MTJ) structure contacting the SOT layer, and a contact structure contacting the MTJ structure.

Magnetic tunnel junction pillars including ordered alloy, bottom free layers are formed using simplified seed structures including textured magnesium oxide. The seed structures can have relatively small thicknesses, thereby reducing roughness of layers formed above the seed structures and facilitating magnetic tunnel junction pillar formation from multi-layer films including such seed structures.

A memory device and a manufacturing method thereof are provided. The memory device includes a magnetic tunneling junction (MTJ) and a spin Hall electrode (SHE). The MTJ includes a free layer, a reference layer and a barrier layer lying between the free layer and the reference layer. The SHE is in contact with the MTJ, and configured to convert a charge current to a spin current for programming the MTJ. The SHE is formed of an alloy comprising at least one heavy metal element and at least one light transition metal element. The heavy metal element is selected from metal elements with one or more valence electrons filling in 5d orbitals, and the light transition metal element is selected from transition metal elements with one or more valence electrons partially filling in 3d orbitals.

Disclosed in the embodiments of the present invention is a magnetic tunnel junction signal isolator with electric shielding layer. In the isolator, a coil is located between a magnetic shielding layer and an electric shielding layer; the electric shielding layer is located between the coil and a magnetoresistive sensor, the magnetoresistive sensor is composed of a plurality of magnetic tunnel junctions that are connected in a series-parallel way. The two ends of the coil are electrically connected to a circuit having a first reference ground used to send a signal; a signal is sent from the magnetoresistive sensor to a receiving circuit connected to a second reference ground. The magnetic shielding layer is electrically connected to the first reference ground in a single-point or multi-point mode, or it is completely electrically isolated from the first reference ground. The electric shielding layer may instead be electrically connected to the second reference ground in a single-point or multi-point mode, or it may be completely electrically isolated from the second reference ground. Or, the electric shielding layer and magnetic shielding layer are respectively electrically connected to any potential or potentials between the first reference ground and the second reference ground in a single-point or multi-point mode. The embodiments of the present invention, prevent the electric field from corrupting the magnetoresistive sensor signal, as such solving the problem of interference and damage caused to a magnetic tunnel junction in the magnetoresistive sensor by the coil.

An example memory includes a plurality of storage units and bit lines distributed in an array in a storage area of the memory, where each of the storage unit includes a transistor and a magnetic tunnel junction (MTJ) element connected to the transistor. The MTJ element is disposed on a current transmission path between a source or a drain of the transistor and the bit line. The MTJ element includes a pinning layer, a reference layer, a tunneling layer, and a free layer that are stacked in sequence, and a magnetization direction of the pinning layer is parallel to a stacking direction of layers in the MTJ. The example memory further includes a first magnetic structure disposed on the current transmission path and in contact with the MTJ element. An included angle between a magnetization direction of the first magnetic structure and the magnetization direction of the pinning layer is (90°, 180°].

The invention discloses a magnetic tunnel junction and a TMR sensor, and belongs to the technical field of magnetic sensing. The magnetic tunnel junction comprises a substrate layer, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer and an antiferromagnetic pinning layer, wherein the ferromagnetic free layer, the barrier layer, the ferromagnetic reference layer and the antiferromagnetic pinning layer are sequentially stacked on one side of the substrate layer; wherein the crystal face of the ferromagnetic free layer is a (110) crystal face. According to the embodiment of the invention, the linearity of the magnetic field sensing of the magnetic tunnel junction can be improved, the nonlinear error is reduced, and the TMR sensor can obtain a wider high-linearity measurement range.

A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.

The invention relates to a semiconductor device with a magnetic tunnel junction. A semiconductor device includes: a lower electrode; a selection element layer on the lower electrode; an intermediate electrode over the selection element layer; a carbon barrier element layer over the intermediate electrode; a variable resistance element layer over the carbon barrier element layer; and an upper electrode over the variable resistance element layer. The carbon blocking element layer includes a carbon absorbing layer for absorbing carbon atoms and a carbon barrier layer for blocking diffusion of the carbon atoms.

The invention provides a reconfigurable MRAM PUF unit, chip and method. The reconfigurable MRAM PUF unit comprises at least two magnetic tunnel junctions, the two magnetic tunnel junctions are connected in series to form a series structure, the two ends of the series structure are connected with a write-in circuit through bias tubes to form two voltage nodes, and the two voltage nodes are connected with power supply voltage and the ground through switches; a transistor VII and a transistor VIII are connected in series, and the input end of the transistor VIII and the output end of the transistor VII are respectively connected with a bit line and the ground; the inverter is connected with a power supply voltage and the ground, the output voltage of an intermediate node of the series structure is used as the control voltage of the inverter, the output voltage of the inverter is used as the control voltage of the seventh transistor, and the eighth transistor is controlled through a word line. According to the invention, the sub-threshold transistor and the magnetic tunnel junction are utilized to amplify the voltage deviation caused by the process deviation so as to generate reliable PUF response, the power consumption of the PUF unit is reduced through the sleep mode, and the reliability of the PUF can be improved through the reconstruction mode.

A magnetic memory device is provided. The magnetic memory device includes a first magnetic tunnel junction (MTJ) stack, a second MTJ stack, and a spin-orbit torque (SOT) electrode. The second MTJ stack is adjacent to the first MTJ stack. The SOT electrode is connected to the first MTJ stack and the second MTJ stack, wherein the SOT electrode has a first electrode section along a first axis and a second electrode section along a second axis, and the second axis is spaced apart from and parallel to the first axis.

A magnetic tunnel junction (MTJ) stack with a hammerhead profile, including vertically aligned layers of a top electrode, a free layer, a tunneling barrier, a reference layer and a bottom electrode, where the bottom electrode and the reference layer each include a first width, and the top electrode, the free layer and the tunneling barrier, each include a second width greater than the first width. Forming vertically aligned layers of a bottom electrode and a reference layer on the bottom electrode, of a magnetic tunnel junction (MTJ), where the bottom electrode, the reference layer and the hard mask, each include a first width, and separately forming vertically aligned layers of a tunneling barrier, a free layer and a top electrode on the free layer, where the tunneling barrier, the free layer and the top electrode each include a second width, where the second width is greater than the first width.

The application discloses a multi-state memory unit based on anti-ferromagnetic, and relates to the technical field of spintronic devices, and aims to solve the problems that multi-bit storage of a single device cannot be realized and data writing is difficult in the prior art.The application comprises a magnetic tunnel junction, a bottom electrode layer serving as a current writing line, the magnetic tunnel junction is used for storing data, and the bottom electrode layer is used for providing spin-orbit torque to write data; the magnetic tunnel junction at least comprises a fixed layer, a barrier layer and a free layer; the free layer is adjacent to an anti-ferromagnetic layer, and exchange bias is formed between the anti-ferromagnetic layer and the free layer; a current is applied on the corresponding bottom electrode to reverse the direction of the free layer and the exchange bias to a direction perpendicular to the current; and the free layer and the exchange bias are controlled to reverse the angle by applying the current in the current writing line at different angles, so that more intermediate states can be obtained in the whole magnetic resistance range. Not only can the application realize magnetic field-free writing of data, but also can realize extremely stable multi-bit storage.

A magnetic memory device includes a lower contact plug on a substrate, a magnetic tunnel junction pattern on the lower contact plug, a bottom electrode between the lower contact plug and the magnetic tunnel junction pattern and in contact with a bottom surface of the magnetic tunnel junction pattern, and a top electrode on a top surface of the magnetic tunnel junction pattern. Each of the bottom electrode, the magnetic tunnel junction pattern, and the top electrode has a thickness in a first direction perpendicular to a top surface of the substrate. A first thickness of the bottom electrode is about 0.6 to 1.1 times a second thickness of the magnetic tunnel junction pattern.