Capacitance measurement method and capacitance measurement circuit

Abstract

The present invention relates to the field of capacitance measurement technology, and in particular to a capacitance measurement method and a capacitance measurement circuit. The capacitance measurement method includes: providing a capacitance to be measured, wherein two ends of the capacitance to be measured are equivalently connected with a first parasitic capacitance and a second parasitic capacitance, charging the capacitance to be measured and timing the charging time to obtain a corresponding charging time, calculating and obtaining a corresponding capacitance value as a corresponding charging capacitance value based on the relationship between the capacitance and the charging time, discharging and charging the capacitance to be measured multiple times to obtain a corresponding charging capacitance value each time, and performing a joint calculation on the obtained corresponding charging capacitance values ​​to obtain the capacitance value of the capacitance to be measured, thereby completely eliminating the influence of the parasitic capacitance. The capacitance measurement method is simple, and can achieve the purpose of completely eliminating the influence of the parasitic capacitance, and is convenient for production and application.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitance measurement, and in particular to a capacitance measurement method and a capacitance measurement circuit. Background Art

[0002] With the rapid development of science and technology, capacitive sensors are widely used in humidity, displacement, angle, vibration, speed, pressure measurement and other fields. The capacitance values ​​of these sensors are generally small, usually in the pf (picofarad) level. However, in actual applications, the capacitance of capacitive sensors does not exist alone, but also has parasitic capacitance, such as Figure 1 As shown, the existing parasitic capacitance will affect the detection accuracy, sensitivity, resolution and measurement range of the capacitance of the capacitive sensor.

[0003] In order to eliminate the problem of parasitic capacitance, one method is to eliminate the influence of conventional parasitic capacitance by zero-point calibration, but this method of zero-point calibration increases the complexity of the production process, and in the actual application of products, not all products can be implemented; another method is to reduce the influence of parasitic capacitance by using a dual-port measurement method. This method can simultaneously consider the input port and output port of the capacitive sensor during the measurement process, reducing the influence of parasitic parameters on the measurement results, but this method requires a low-impedance voltage source and a high-gain operational amplifier, increases switch timing control, and the circuit is complex, and it cannot completely eliminate the influence of parasitic capacitance. Therefore, providing an effective circuit for eliminating parasitic capacitance is still a key problem that needs to be solved in the field of capacitance measurement technology. Summary of the invention

[0004] The present invention provides a capacitance measurement method and a capacitance measurement circuit to eliminate the influence of parasitic capacitance.

[0005] To achieve the above object, the present invention provides a capacitance measurement method, comprising:

[0006] Providing a capacitor to be measured, wherein two ends of the capacitor to be measured are equivalently connected to a first parasitic capacitor and a second parasitic capacitor;

[0007] Connecting both ends of the capacitor to be measured to a low level and completing the discharge, connecting the first end of the capacitor to be measured to a low level, charging the second end of the capacitor to be measured through a charging unit until a high level is output, acquiring a corresponding first charging time, and calculating a first charging capacitance value based on a relationship between capacitance and charging time, wherein the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance;

[0008] Connecting two ends of the capacitor to be measured to a low level and completing the discharge, connecting the second end of the capacitor to be measured to a low level, charging the first end of the capacitor to be measured through the charging unit until a high level is output, acquiring a corresponding second charging time, and calculating a second charging capacitance value based on a relationship between capacitance and charging time, wherein the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance;

[0009] Connecting both ends of the capacitor to be tested to a low level and completing the discharge, leaving one end of the capacitor to be tested hanging, and charging the other end of the capacitor to be tested through one end of the corresponding charging unit until the charged end of the capacitor to be tested outputs a high level, obtaining a corresponding third charging time, and calculating a third charging capacitance value based on the relationship between the capacitance and the charging time, wherein the third charging capacitance value is the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be tested in series and the capacitance value of the second parasitic capacitance, or the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be tested in series and the capacitance value of the first parasitic capacitance;

[0010] Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, the capacitance value of the capacitor to be measured is obtained by calculation.

[0011] An embodiment of the present invention further provides a capacitance measurement circuit, which uses the above-mentioned capacitance measurement method, including:

[0012] Charging unit, first signal control unit, second signal control unit, timing unit;

[0013] The first end of the charging unit is connected to the first end of the first signal control unit and the first input end of the timing unit and is used as the first end of the capacitance measurement circuit to connect the first end of the capacitance to be measured, and the second end of the charging unit is connected to the first end of the second signal control unit and the second input end of the timing unit and is used as the second end of the capacitance measurement circuit to connect the second end of the capacitance to be measured, wherein the two ends of the capacitance to be measured are equivalently connected to a first parasitic capacitor and a second parasitic capacitor;

[0014] Connecting two ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, connecting the first end of the capacitor to be measured to a low level, and charging the second end of the capacitor to be measured through the second end of the charging unit until a high level is output to the timing unit, the timing unit obtains a corresponding first charging time, and calculates a first charging capacitance value based on a relationship between capacitance and charging time, wherein the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance;

[0015] Connecting two ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, connecting the second end of the capacitor to be measured to a low level, charging the first end of the capacitor to be measured through the first end of the charging unit until a high level is output to the timing unit, the timing unit obtains a corresponding second charging time, and calculates a second charging capacitance value based on a relationship between capacitance and charging time, the second charging capacitance value being the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance;

[0016] Connecting both ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, leaving one end of the capacitor to be measured suspended, and charging the other end of the capacitor to be measured through one end of the corresponding charging unit until the charged end of the capacitor to be measured outputs a high level to the timing unit, the timing unit obtains a corresponding third charging time, and calculates a third charging capacitance value based on the relationship between the capacitance and the charging time, the third charging capacitance value being the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be measured in series and the capacitance value of the second parasitic capacitance, or being the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be measured in series and the capacitance value of the first parasitic capacitance;

[0017] Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, the capacitance value of the capacitor to be measured is obtained by calculation.

[0018] In summary, the advantages and beneficial effects of the present invention are:

[0019] The present invention provides a capacitance measurement method and a capacitance measurement circuit. The capacitance measurement method includes: providing a capacitance to be measured, wherein two ends of the capacitance to be measured are equivalently connected with a first parasitic capacitance and a second parasitic capacitance, discharging the capacitance to be measured first and then charging it, and timing the charging process to obtain a corresponding charging time, calculating and obtaining a corresponding capacitance value as a corresponding charging capacitance value based on the relationship between the capacitance and the charging time, discharging and charging the capacitance to be measured multiple times to obtain a corresponding charging capacitance value each time, and performing a joint calculation on the corresponding charging capacitance value obtained each time to obtain the capacitance value of the capacitance to be measured, thereby completely eliminating the influence of the parasitic capacitance. The capacitance measurement method is simple, and can achieve the purpose of completely eliminating the influence of the parasitic capacitance, and is convenient for production and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Shown is an equivalent schematic diagram of the capacitor to be measured;

[0021] Figure 2FIG. 1 is a flow chart of a capacitance measurement method provided by an embodiment of the present invention;

[0022] Figure 3~Figure 9 FIG. 1 is a schematic diagram of a capacitance measurement circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in combination with the specific implementation methods of the present invention and the corresponding drawings. Obviously, the described implementation methods are only part of the implementation methods of the present invention, not all implementation methods. Based on the implementation methods of the present invention, all other implementation methods obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0024] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0025] The present invention provides a capacitance measurement method, such as Figure 2 As shown, including:

[0026] Step S10, providing a capacitor to be measured, wherein two ends of the capacitor to be measured are equivalently connected to a first parasitic capacitor and a second parasitic capacitor;

[0027] Step S20, connecting the two ends of the capacitor to be measured to a low level and completing the discharge, connecting the first end of the capacitor to be measured to a low level, charging the second end of the capacitor to be measured through a charging unit until a high level is output, obtaining a corresponding first charging time, and calculating a first charging capacitance value based on a relationship between capacitance and charging time, wherein the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance;

[0028] Step S30, connecting the two ends of the capacitor to be measured to a low level and completing the discharge, connecting the second end of the capacitor to be measured to a low level, charging the first end of the capacitor to be measured through the charging unit until a high level is output, obtaining a corresponding second charging time, and calculating a second charging capacitance value based on the relationship between the capacitance and the charging time, wherein the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance;

[0029] Step S40, connecting the two ends of the capacitor to be tested to a low level and completing the discharge, leaving the first end of the capacitor to be tested suspended, charging the second end of the capacitor to be tested through the corresponding second end of the charging unit until the second end of the capacitor to be tested outputs a high level, obtaining a corresponding third charging time, and calculating a third charging capacitance value based on the relationship between the capacitance and the charging time, wherein the third charging capacitance value is the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be tested in series and the capacitance value of the second parasitic capacitance;

[0030] Step S50, obtaining the capacitance value of the capacitor to be measured by calculation based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time.

[0031] Specifically, step S10 is performed to provide a capacitor to be measured Cx, wherein two ends of the capacitor to be measured Cx are equivalently connected to a first parasitic capacitor C P1 and the second parasitic capacitance C P2 .

[0032] In practical applications, the measured capacitance Cx does not exist alone. For example, chip packaging and PCB leads will generate parasitic capacitance. Parasitic capacitance varies randomly in many applications, seriously affecting the measurement accuracy of capacitive sensors. Therefore, the influence of parasitic capacitance needs to be eliminated.

[0033] Step S20 is executed to connect the two ends of the capacitor to be measured Cx to a low level and complete the discharge, connect the first end P10 of the capacitor to be measured to a low level, and charge the second end P11 of the capacitor to be measured through a charging unit until a high level is output, and obtain a corresponding first charging time, and calculate a first charging capacitance value Cx1 based on the relationship between capacitance and charging time, wherein the first charging capacitance value Cx1 is the capacitance value of the capacitor to be measured Cx and the second parasitic capacitance C P2 The sum of the capacitance values.

[0034] In the embodiment of the present invention, the first charging time T1 corresponds to the first charging of the capacitor to be measured Cx, which is recorded as the first charging of the capacitor to be measured, and the discharge of the capacitor to be measured Cx before the first charging is recorded as the first discharge of the capacitor to be measured.

[0035] In an embodiment of the present invention, the first charging capacitance value is: …… (1),

[0036] in, , Cx1=Cx+C p2 , Cx1 is the first charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p2is the capacitance value of the second parasitic capacitor, T1 is the first charging time, VDD2 is the operating voltage of the charging unit corresponding to the first charging time, Vt2 is the charging voltage value of the high level output by the second end P11 of the capacitor to be measured, R2 is the resistance value of the charging unit corresponding to the first charging time, and VL1 is the equivalent level value before the first charging.

[0037] In the embodiment of the present invention, the equivalent level value VL1 of the capacitor to be measured before the first charge is a voltage value corresponding to the first discharge of the capacitor to be measured Cx.

[0038] In the embodiment of the present invention, both ends of the capacitor to be measured are grounded, and the equivalent voltage level value of the first end P10 of the capacitor to be measured is 0V.

[0039] In other embodiments, the equivalent level value VL1 of the capacitor to be tested before the first charging is not greater than 0.3 times the operating voltage VDD2 corresponding to the charging unit at the first charging time, and the charging voltage value Vt2 of the high level output by the second end P11 of the capacitor to be tested is not less than 0.7 times the operating voltage VDD2 corresponding to the charging unit at the first charging time.

[0040] Step S30 is executed, the two ends of the capacitor to be measured Cx are connected to a low level and discharge is completed, the second end P11 of the capacitor to be measured is connected to a low level, the first end P10 of the capacitor to be measured is charged by the charging unit until a high level is output, and the corresponding second charging time is obtained. The second charging capacitance value is calculated based on the relationship between the capacitance and the charging time. The second charging capacitance value is the capacitance value of the capacitor to be measured Cx and the first parasitic capacitance C P1 The sum of the capacitance values.

[0041] In the embodiment of the present invention, the second charging time T2 corresponds to the second charging of the capacitor to be measured Cx, which is recorded as the second charging of the capacitor to be measured, and the discharge of the capacitor to be measured Cx after the first charging is recorded as the second discharge of the capacitor to be measured Cx.

[0042] In an embodiment of the present invention, the second charging capacitance value is: …… (2),

[0043] in, , Cx2=Cx+C p1 , Cx2 is the second charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, T2 is the second charging time, VDD1 is the operating voltage of the charging unit corresponding to the second charging time, Vt1 is the charging voltage value of the high level output by the first end P10 of the capacitor to be tested, R1 is the resistance value of the charging unit corresponding to the second charging time, and VL2 is the equivalent level value before the second charging.

[0044] In the embodiment of the present invention, the equivalent level value VL2 of the capacitor to be measured before the second charging is a voltage value corresponding to the second discharge of the capacitor to be measured Cx.

[0045] In the embodiment of the present invention, both ends of the capacitor to be measured are grounded, and the equivalent level value of the second end P11 of the capacitor to be measured is 0V.

[0046] In other embodiments, the equivalent level value VL2 of the capacitor to be tested before the second charging is not greater than 0.3 times the operating voltage VDD1 corresponding to the charging unit at the second charging time, and the charging voltage value Vt1 of the high level output by the first end P10 of the capacitor to be tested is not less than 0.7 times the operating voltage VDD1 corresponding to the charging unit at the second charging time.

[0047] Step S40 is executed to connect the two ends of the capacitor to be tested Cx to a low level and complete the discharge, and the first end P10 of the capacitor to be tested is suspended, and the second end P11 of the capacitor to be tested is charged through the corresponding second end of the charging unit 20 until the second end P11 of the capacitor to be tested outputs a high level, and the corresponding third charging time T3 is obtained. The third charging capacitance value is calculated based on the relationship between the capacitance and the charging time. The third charging capacitance value is the first parasitic capacitance C P1 The capacitance of the capacitor to be measured Cx, the capacitance value Cs1 obtained by connecting them in series, and the second parasitic capacitance C P2 The sum of the capacitance values.

[0048] In the embodiment of the present invention, the third charging time T3 corresponds to the third charging of the capacitor to be tested Cx, which is recorded as the third charging of the capacitor to be tested, and the discharge of the capacitor to be tested Cx after the second charging is recorded as the third discharge of the capacitor to be tested Cx.

[0049] In an embodiment of the present invention, the third charging capacitance value is: ... (3), where: , Cx3 is the third charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, C p2 is the capacitance value of the second parasitic capacitor, T3 is the third charging time, Cs1 is the capacitance value obtained by connecting the first parasitic capacitor and the capacitor to be measured in series.

[0050] In other embodiments, the two ends of the capacitor to be measured Cx are connected to a low level and the discharge is completed, the second end P11 of the capacitor to be measured is suspended, and the first end P10 of the capacitor to be measured is charged through the first end of the corresponding charging unit 10 until the first end P10 of the capacitor to be measured outputs a high level, and the corresponding third charging time is obtained. The third charging capacitance value is calculated based on the relationship between the capacitance and the charging time. The third charging capacitance value is the second parasitic capacitance C P2 , the capacitance value Cs1 obtained by connecting the capacitor to be measured Cx in series and the first parasitic capacitor C P1 The sum of the capacitance values.

[0051] Step S50 is executed to calculate and obtain the capacitance value of the capacitor to be measured Cx based on the first charging capacitance value Cx1 to the third charging capacitance value Cx3 and the first charging time T1 to the third charging time T2.

[0052] In the embodiment of the present invention, the capacitance value of the capacitor Cx to be measured is obtained by calculation according to equations (1) to (3): ……(4).

[0053] In the embodiment of the present invention, the operating voltage VDD1 of the charging unit 20 corresponding to the first charging time T1 is equal to the operating voltage VDD2 of the charging unit 20 corresponding to the second charging time T2.

[0054] In other embodiments, the operating voltage of the charging unit corresponding to the first charging time is not equal to the operating voltage of the charging unit corresponding to the second charging time.

[0055] In an embodiment of the present invention, the equivalent level value VL1 before the first charging of the capacitor to be measured Cx and the equivalent level value VL2 before the second charging of the capacitor to be measured Cx are equal and equal to 0V, and the charging voltage value Vt1 of the high level output by the first end P10 of the capacitor to be measured Cx and the charging voltage value Vt2 of the high level output by the second end P11 of the capacitor to be measured Cx are equal.

[0056] In other embodiments, the equivalent level value VL1 of the capacitor to be measured before the first charge is not equal to the equivalent level value VL2 of the capacitor to be measured before the second charge, and the charging voltage value Vt1 of the high level output by the first end of the capacitor to be measured is not equal to the charging voltage value Vt2 of the high level output by the second end of the capacitor to be measured.

[0057] From equation (4), we can know that: P1 The second parasitic capacitance C P2The measured result of the capacitance Cx to be measured is only related to the first charging time T1 to the third charging time T3 and the constants K1 to K2, thereby eliminating the first parasitic capacitance C P1 The second parasitic capacitance C p2 For the purpose of, the constant terms K1~K2 are related to the size of the resistance R1 of the charging unit corresponding to the first charging time T1, the size of the resistance R2 of the charging unit corresponding to the second charging time T2, the charging voltage value Vt1 of the first terminal P10 of the capacitor to be measured outputting a high level, the charging voltage value Vt2 of the second terminal P11 of the capacitor to be measured outputting a high level, the equivalent value VL1 of the capacitor to be measured before the first charging, and the equivalent level value VL2 of the capacitor to be measured before the second charging, and are known quantities.

[0058] In other embodiments, the order of step 2, step 3, and step 4 in the capacitance measurement method is adjustable.

[0059] In an embodiment of the present invention, the capacitor to be measured is a capacitive sensor.

[0060] In other embodiments, the capacitor to be measured is a small capacitance sensor or other suitable capacitors.

[0061] In practical applications, the two ends of the capacitor Cx to be measured are equivalently connected to a first parasitic capacitor C p1 and the second parasitic capacitance C P2 , the first parasitic capacitance C P1 and the second parasitic capacitance C P2 The measurement accuracy of the capacitive sensor is seriously affected, so it is necessary to eliminate the influence of parasitic capacitance on the measurement accuracy. The capacitor Cx to be measured is discharged first and then charged, and the charging process is timed to obtain the corresponding charging time. The corresponding capacitance value is calculated based on the relationship between the capacitance and the charging time as the corresponding charging capacitance value. The capacitor Cx to be measured is discharged and charged multiple times to obtain the corresponding charging capacitance value each time. The capacitance value of the capacitor Cx to be measured can be obtained by performing a joint calculation on the corresponding charging capacitance values ​​obtained, thereby completely eliminating the influence of the parasitic capacitance. The capacitance measurement method is simple and can achieve the purpose of completely eliminating the influence of the parasitic capacitance. It is convenient for production application and has universal applicability.

[0062] The embodiment of the present invention further provides a capacitance measurement circuit, which applies the above capacitance measurement method, such as Figure 3 As shown, including:

[0063] Charging unit 20, first signal control unit 30, second signal control unit 40, timing unit 50;

[0064] The first end of the charging unit 20 is connected to the first end of the first signal control unit 30 and the first input end P10IN of the timing unit 50 and is used as the first end of the capacitance measurement circuit to connect the first end P10 of the capacitance to be measured. The second end of the charging unit 20 is connected to the first end of the second signal control unit 40 and the second input end P11IN of the timing unit 50 and is used as the second end of the capacitance measurement circuit to connect the second end P11 of the capacitance to be measured, wherein the two ends of the capacitance to be measured Cx are equivalently connected to the first parasitic capacitance C P1 and the second parasitic capacitance C P2 ;

[0065] Connect the two ends of the capacitor Cx to a low level, use the first signal control unit 30 and the second signal control unit 40 to discharge the capacitor Cx to be measured, connect the first end P10 of the capacitor to be measured to a low level, and charge the second end P11 of the capacitor to be measured through the second end of the charging unit 20 until a high level is output to the timing unit 50, the timing unit 50 obtains the corresponding first charging time T1, and calculates a first charging capacitance value Cx1 based on the relationship between capacitance and charging time, the first charging capacitance value Cx1 being the capacitance value of the capacitor Cx to be measured and the second parasitic capacitance C P2 The sum of the capacitance values;

[0066] Connect the two ends of the capacitor Cx to a low level, use the first signal control unit 30 and the second signal control unit 40 to discharge the capacitor Cx to be measured, connect the second end P11 of the capacitor to be measured to a low level, and charge the first end P10 of the capacitor to be measured through the first end of the charging unit 20 until a high level is output to the timing unit 50, and the timing unit 50 obtains the corresponding second charging time T2, and calculates and obtains a second charging capacitance value Cx2 based on the relationship between capacitance and charging time, and the second charging capacitance value Cx2 is the capacitance value of the capacitor Cx to be measured and the first parasitic capacitance C P1 The sum of the capacitance values;

[0067] Connect the two ends of the capacitor to be measured Cx to a low level, use the first signal control unit 30 and the second signal control unit 40 to discharge the capacitor to be measured Cx, suspend the first end P10 of the capacitor to be measured, and charge the second end of the capacitor to be measured Cx through the corresponding second end of the charging unit 20 until the second end P11 of the capacitor to be measured outputs a high level to the timing unit 50, and the timing unit 50 obtains the corresponding third charging time T3, and calculates and obtains a third charging capacitance value Cx3 based on the relationship between capacitance and charging time, and the third charging capacitance value Cx3 is the first parasitic capacitance C P1, the capacitance value obtained by connecting the capacitor to be measured Cx in series and the second parasitic capacitor C P2 The sum of the capacitance values;

[0068] Based on the first charging capacitance value Cx1 to the third charging capacitance value Cx3 and the first charging time T1 to the third charging time T3, the capacitance value of the capacitor to be measured Cx is obtained by calculation.

[0069] In an embodiment of the present invention, the first signal control unit 30 and the second signal control unit 40 are used to discharge the capacitor to be measured Cx. The first signal control unit 30 and the second signal control unit 40 cooperate with the charging unit 20 to charge the capacitor to be measured Cx. At the same time, the timing unit 50 is used to time the charging process. The capacitor to be measured Cx is discharged and charged multiple times by the capacitance measurement circuit to obtain the corresponding first charging time T1 to the third charging time T3. The corresponding capacitance value is calculated based on the relationship between the capacitance and the charging time as the corresponding charging capacitance value, that is, the first charging capacitance value Cx1 to the third charging capacitance value Cx3. The first charging capacitance value Cx1 to the third charging capacitance value Cx3 are calculated jointly to obtain the capacitance value of the capacitor to be measured Cx, thereby completely eliminating the influence of the parasitic capacitance.

[0070] In the embodiment of the present invention, Figure 4 As shown, the charging unit 20 includes a first charging structure 201 and a second charging structure 202; the first charging structure 201 includes a first resistor R1 and a first switch K1, the first resistor R1 and the first switch K1 are connected in series to form a first series structure, one end of the first series structure serves as one end of the first charging structure 201, and the other end of the first series structure serves as the other end of the first charging structure 201, one end of the first charging structure 201 is connected to the first end of the first signal control unit 30, the first input end P10IN of the timing unit 50, and the first end of the capacitor to be measured Cx, and the other end of the first charging structure 201 is connected to the first end of the first signal control unit 30, the first input end P10IN of the timing unit 50, and the first end of the capacitor to be measured Cx, and the other end of the first charging structure 201 is connected to the The working voltage end of the first charging structure 201; the second charging structure 202 includes a second resistor R2 and a second switch K2, the second resistor R2 and the second switch K2 are connected in series to form a second series structure, one end of the second series structure serves as one end of the second charging structure 202, and the other end of the second series structure serves as the other end of the second charging structure 202; one end of the second charging structure 202 is connected to the first end of the second signal control unit 40, the second input end P11IN of the timing unit 50, and the second end of the capacitor to be measured Cx, and the other end of the second charging structure 202 is the working voltage end of the second charging structure 202;

[0071] When the first signal control unit 30 is turned off, the second signal control unit 40 is turned off, the first switch K1 in the first charging structure 201 is closed, and the second switch K2 in the second charging structure 202 is opened, the first end P10 of the capacitor to be measured is charged through the first charging structure 201;

[0072] When the first signal control unit 30 is turned off, the second signal control unit 40 is turned off, the first switch K1 in the first charging structure 201 is opened, and the second switch K2 in the second charging structure 202 is closed, the second end P11 of the capacitor to be measured is charged through the second charging structure 202 .

[0073] In the embodiment of the present invention, the working voltage of the working voltage end of the first charging structure 201 is VDD1, the working voltage of the working voltage end of the second charging structure 202 is VDD2, and the working voltage VDD1 of the first charging structure 201 is equal to the working voltage VDD2 of the second charging structure 202.

[0074] In other embodiments, the operating voltage VDD1 of the first charging structure is not equal to the operating voltage VDD2 of the second charging structure.

[0075] In the embodiment of the present invention, the first charging structure 201 and the second charging structure 202 are the same.

[0076] In other embodiments, the first charging structure and the second charging structure are constant current sources.

[0077] In other embodiments, Figure 5 As shown, the charging unit includes a third charging substructure 203, a third switch K3 and a fourth switch K4, one end of the third charging substructure 203 is connected to one end of the third switch K3 and one end of the fourth switch K4, the other end of the third switch K3 serves as the first end of the charging unit, and is connected to the first end of the first signal control unit 30, the first input end P10IN of the timing unit 50, and the first end of the capacitor to be measured Cx, and the other end of the fourth switch K4 serves as the second end of the charging unit, and is connected to the first end of the second signal control unit 40, the second input end P11IN of the timing unit 50, and the second end of the capacitor to be measured Cx;

[0078] When the first signal control unit 30 is turned off, the second signal control unit 40 is turned off, the third switch K3 is closed, and the fourth switch K4 is opened, the first end P10 of the capacitor Cx to be measured is charged through the third charging substructure 203; when the first signal control unit 30 is turned off, the second signal control unit 40 is turned off, the third switch K3 is opened, and the fourth switch K4 is closed, the second end P11 of the capacitor Cx to be measured is charged through the third charging substructure 203.

[0079] In the embodiment of the present invention, Figure 6 As shown, the first signal control unit 30 includes a first tri-state gate 301, the output terminal OUT1 of the first tri-state gate 301 is connected to one end of the first charging structure 201, the first end P10 of the capacitor to be measured, and the first input terminal P10IN of the timing unit 50, the enable terminal P10OUTEN of the first tri-state gate 301 is used to receive an enable signal, and the input terminal P10OUT of the first tri-state gate 301 is used to input a control signal;

[0080] The second signal control unit 40 includes a second three-state gate 401, the output terminal OUT2 of the second three-state gate 401 is connected to one end of the second charging structure 202, the second end P11 of the capacitor to be measured, and the second input terminal P11IN of the timing unit 50, the enable terminal P11OUTEN of the second three-state gate 401 is used to receive an enable signal, and the input terminal P11OUT of the second three-state gate 401 is used to input a control signal.

[0081] In the embodiment of the present invention, the enable terminal P10OUTEN of the first tri-state gate 301 is used to receive an enable signal. When the enable signal P10OUTEN of the enable terminal P10OUTEN of the first tri-state gate 301 is 0, the first tri-state gate 301 outputs a high impedance state, and the first tri-state gate 301 is in a cut-off state; when the enable signal P10OUTEN of the enable terminal P10OUTEN of the first tri-state gate 301 is 1, the first tri-state gate 301 is in a conducting state, and the input terminal P10OUT of the first tri-state gate 301 is The input signal is the output signal of the output end of the first tri-state gate 301, that is, when the enable signal P10OUTEN received by the enable end P10OUTEN of the first tri-state gate 301 is 1, and the input signal P10OUT of the input end P10OUT of the first tri-state gate 301 is 0, the output end OUT1 of the first tri-state gate 301 outputs a low level, so that the first end P10 of the capacitor to be measured Cx connected to the output end OUT1 of the first tri-state gate 301 is at a low level, so as to achieve the purpose of discharging the first end of the capacitor to be measured Cx;

[0082] The enable terminal P11OUTEN of the second three-state gate 401 is used to receive an enable signal. When the enable signal P11OUTEN of the enable terminal P11OUTEN of the second three-state gate 401 is 0, the second three-state gate 401 outputs a high impedance state, and the second three-state gate 401 is in a cut-off state; when the enable signal P11OUTEN of the enable terminal P11OUTEN of the second three-state gate 401 is 1, the second three-state gate 401 is in a conducting state, and the input signal of the input terminal P11OUT of the second three-state gate 401 is the second three-state gate 4 01 output terminal, that is, when the enable signal P11OUTEN received by the enable terminal P11OUTEN of the second three-state gate 401 is 1, and the input signal P11OUT of the input terminal P11OUT of the second three-state gate 401 is 0, the output terminal OUT2 of the second three-state gate 401 outputs a low level, so that the second terminal P11 of the capacitor to be measured Cx connected to the output terminal OUT2 of the second three-state gate 401 is a low level, so as to achieve the purpose of discharging the second terminal of the capacitor to be measured Cx, wherein the signal 1 is a high level and the signal 0 is a low level.

[0083] In the embodiment of the present invention, Figure 6 As shown, when the first signal control unit 30 is the first three-state gate 301 and the second signal control unit 40 is the second three-state gate 401:

[0084] The first switch K1 in the first charging structure 201 is set to be disconnected, and the second switch K2 in the second charging structure 202 is set to be disconnected. The enable end P10OUTEN of the first three-state gate 301 controls the first three-state gate 301 to be in a conducting state. The input end P10OUT of the first three-state gate 301 is set to a low level. The output end OUT1 of the first three-state gate 301 outputs a low level. The first end P10 of the capacitor Cx to be measured outputs a low level. The enable end P11OUTEN of the second three-state gate 401 controls the second three-state gate 401 to be in a conducting state. The input end P11OUT of the second three-state gate 401 is set to a low level. The output end OUT2 of the second three-state gate 401 outputs a low level. The second end P11 of the capacitor Cx to be measured outputs a low level, so that the capacitor Cx to be measured is discharged. The enable end P10OUTEN of the first three-state gate 301 is set to control the The first tri-state gate 301 is in the on state, the input terminal P10OUT of the first tri-state gate 301 is set to a low level, the output terminal OUT1 of the first tri-state gate 301 outputs a low level, the first terminal P10 of the capacitor to be measured outputs a low level, the enable terminal P11OUTEN of the second tri-state gate 401 controls the second tri-state gate 401 to be in the off state, the first switch K1 in the first charging structure 201 is disconnected, and the second switch K2 in the second charging structure 202 is closed, and the second terminal P11 of the capacitor to be measured is charged through the second charging structure 202 until a high level is output to the second input terminal P11IN of the timing unit 50, and the timing unit 50 obtains the corresponding first charging time T1, and calculates and obtains a first charging capacitance value Cx1 based on the relationship between capacitance and charging time, and the first charging capacitance value Cx1 is the capacitance value of the capacitor to be measured and the second parasitic capacitance C P2 The sum of the capacitance values, that is:

[0085] The first charging capacitance value is: ... (1), where , Cx1=Cx+C p2 , Cx1 is the first charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p2 is the second parasitic capacitance C P2 The capacitance value is T1, the first charging time, VDD2 is the operating voltage of the second charging structure 202, Vt2 is the charging voltage value of the second end P11 of the capacitor Cx to be measured outputting a high level, R2 is the resistance value of the second charging structure 202, and VL1 is the equivalent level value before the first charging.

[0086] In the embodiment of the present invention, the first charging time T1 corresponds to the first charging of the capacitor to be measured Cx, which is recorded as the first charging of the capacitor to be measured, and the discharge of the capacitor to be measured Cx before the first charging is recorded as the first discharge of the capacitor to be measured.

[0087] In the embodiment of the present invention, the equivalent level value VL1 of the capacitor to be measured before the first charging is a voltage value corresponding to the first discharge of the capacitor to be measured Cx.

[0088] In the embodiment of the present invention, the input terminal P10OUT of the first tri-state gate is grounded, and the input terminal P11OUT of the second tri-state gate is grounded, so that the potential across the capacitor Cx to be measured is 0V.

[0089] In other embodiments, the low level value VL1 of the input terminal P10OUT of the first tri-state gate is not greater than 0.3 times the operating voltage VDD2 of the second charging structure 202, and the high level value Vt2 output by the second terminal P11 of the capacitor to be measured is not less than 0.7 times the operating voltage VDD2 of the second charging structure 202.

[0090] The first switch K1 in the first charging structure 201 is set to be disconnected, and the second switch K2 in the second charging structure 202 is set to be disconnected, the enable end P10OUTEN of the first three-state gate 301 controls the first three-state gate 301 to be in a conducting state, the input end P10OUT of the first three-state gate 301 is set to a low level, the output end OUT1 of the first three-state gate 301 outputs a low level, the first end P10 of the capacitor to be measured outputs a low level, the enable end P11OUTEN of the second three-state gate 302 controls the second three-state gate 401 to be in a conducting state, the input end P11OUT of the second three-state gate 401 is set to a low level, the output end OUT2 of the second three-state gate 401 outputs a low level, and the second end P11 of the capacitor to be measured outputs a low level, so as to discharge the capacitor Cx to be measured; the enable end P11OUTEN of the second three-state gate 401 is set to control the first ... The second three-state gate 401 is in the on state, the input terminal P11OUT of the second three-state gate 401 is set to a low level, the output terminal OUT2 of the second three-state gate 401 outputs a low level, the second terminal P11 of the capacitor to be measured outputs a low level, the enable terminal P10OUTEN of the first three-state gate 301 controls the first three-state gate 301 to be in the off state, the first switch K1 in the first charging structure 201 is closed, and the second switch K2 in the second charging structure 202 is disconnected, and the first terminal P10 of the capacitor to be measured Cx is charged through the first charging structure 201 until a high level is output to the first input terminal P10IN of the timing unit 50, and the timing unit 50 obtains the corresponding second charging time T2, and calculates and obtains a second charging capacitance value Cx2 based on the relationship between capacitance and charging time, and the second charging capacitance value Cx2 is the capacitance value of the capacitor to be measured Cx and the first parasitic capacitance C P1 The sum of the capacitance values, that is:

[0091] The second charging capacitance value is: ... (2), where: , Cx2=Cx+C p1 , Cx2 is the second charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, T2 is the second charging time, VDD1 is the operating voltage of the first second charging structure 201, Vt1 is the charging voltage value of the high level output by the first end P10 of the capacitor to be tested, R1 is the resistance value of the first charging structure 201, and VL2 is the equivalent level value before the second charging.

[0092] In the embodiment of the present invention, the second charging time T2 corresponds to the second charging of the capacitor to be measured Cx, which is recorded as the second charging of the capacitor to be measured, and the discharge of the capacitor to be measured Cx after the first charging is recorded as the second discharge of the capacitor to be measured Cx.

[0093] In the embodiment of the present invention, the equivalent level value VL2 of the capacitor to be measured before the second charging is a voltage value corresponding to the second discharge of the capacitor to be measured Cx.

[0094] In the embodiment of the present invention, the input terminal P10OUT of the first tri-state gate is grounded, and the input terminal P11OUT of the second tri-state gate is grounded, so that the potential across the capacitor Cx to be measured is 0V.

[0095] In other embodiments, the low level value VL1 of the input terminal P10OUT of the first tri-state gate is not greater than 0.3 times the operating voltage VDD1 of the first second charging structure 201, and the high level value Vt1 output by the first terminal P10 of the capacitor to be measured Cx is not less than 0.7 times the operating voltage VDD1 of the first second charging structure 201.

[0096] Set the first switch K1 in the first charging structure 201 to be disconnected, and the second switch K2 in the second charging structure 202 to be disconnected, the enable terminal P10OUTEN of the first three-state gate 301 controls the first three-state gate 301 to be in the on state, the input terminal P10OUT of the first three-state gate 301 is set to a low level, the output terminal OUT1 of the first three-state gate 301 outputs a low level, the first terminal P10 of the capacitor to be measured outputs a low level, the enable terminal P11OUTEN of the second three-state gate 401 controls the second three-state gate 401 to be in the on state, the input terminal P11OUT of the second three-state gate 401 is set to a low level, the output terminal OUT2 of the second three-state gate 401 outputs a low level, and the second terminal P11 of the capacitor to be measured outputs a low level, so as to discharge the capacitor Cx to be measured; Set The enable terminal P10OUTEN of the first three-state gate 301 controls the first three-state gate 301 to be in the off state, the enable terminal P11OUTEN of the second three-state gate 401 controls the second three-state gate 401 to be in the off state, the first switch K1 in the first charging structure 201 is disconnected, and the second switch K2 in the second charging structure 202 is closed, the first terminal P10 of the capacitor to be measured Cx is suspended, and the second terminal P11 of the capacitor to be measured Cx is charged through the second charging structure 202 until the second terminal of the capacitor to be measured outputs a high level to the second input terminal P11IN of the timing unit 50, and the timing unit 50 obtains the corresponding third charging time T3, and calculates and obtains a third charging capacitance value Cx3 based on the relationship between the capacitance and the charging time, and the third charging capacitance value Cx3 is the first parasitic capacitance C P1 , the capacitance value Cs1 obtained by connecting the capacitor to be measured Cx in series and the second parasitic capacitance C P2 The sum of the capacitance values, that is:

[0097] The third charging capacitance value is: ... (3), where: , Cx3 is the third charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, C p2 is the capacitance value of the second parasitic capacitor, T3 is the third charging time, Cs1 is the capacitance value obtained by connecting the first parasitic capacitor and the capacitor to be measured in series.

[0098] In the embodiment of the present invention, the third charging time T3 corresponds to the third charging of the capacitor to be tested Cx, which is recorded as the third charging of the capacitor to be tested, and the discharge of the capacitor to be tested Cx after the second charging is recorded as the third discharge of the capacitor to be tested Cx.

[0099] In the embodiment of the present invention, based on the first charging capacitance value Cx1 to the third charging capacitance value Cx3 and the first charging time T1 to the third charging time T3, the capacitance value of the capacitor to be measured Cx is obtained by calculation, that is, the capacitance value of the capacitor to be measured Cx is obtained by calculation according to formula (1) to formula (3): ……(4).

[0100] In the embodiment of the present invention, the operating voltage VDD1 of the first charging structure 201 corresponding to the first charging time is equal to the operating voltage VDD2 of the second charging structure 202 corresponding to the second charging time.

[0101] In other embodiments, the operating voltage VDD1 of the first charging structure 201 corresponding to the first charging time is not equal to the operating voltage VDD2 of the second charging structure 202 corresponding to the second charging time.

[0102] In an embodiment of the present invention, the equivalent level value VL1 before the first charging of the capacitor to be measured Cx and the equivalent level value VL2 before the second charging of the capacitor to be measured Cx are equal and equal to 0V, and the charging voltage value Vt1 of the high level output by the first end P10 of the capacitor to be measured Cx and the charging voltage value Vt2 of the high level output by the second end P11 of the capacitor to be measured Cx are equal.

[0103] In other embodiments, the equivalent level value of the capacitor to be measured before the first charge is not equal to the equivalent level value of the capacitor to be measured before the second charge, and the charging voltage value of the high level output by the first end of the capacitor to be measured is not equal to the charging voltage value of the high level output by the second end of the capacitor to be measured.

[0104] From equation (4), we can know that: P1 The second parasitic capacitance C P2The measured result of the capacitance Cx to be measured is only related to the first charging time to the third charging time and the constant terms K1 to K2, thereby eliminating the first parasitic capacitance C P1 The second parasitic capacitance C p2 For the purpose of, the constant terms K1~K2 are related to the size of the resistance R1 of the first charging structure 201 corresponding to the first charging time, the size of the resistance R2 of the second charging structure 202 corresponding to the second charging time, the charging voltage value Vt1 of the first terminal P10 of the capacitor to be measured outputting a high level, the charging voltage value Vt2 of the second terminal P11 of the capacitor to be measured outputting a high level, the equivalent level value VL1 of the capacitor to be measured before the first charging, and the equivalent level value VL2 of the capacitor to be measured before the second charging and are known quantities.

[0105] In other embodiments, the enable terminal P11OUTEN of the second tri-state gate 401 is set to control the second tri-state gate 401 to be in an off state, the enable terminal P10OUTEN of the first tri-state gate 301 controls the first tri-state gate 301 to be in an off state, the second end of the capacitor Cx to be measured is suspended, and the first end of the capacitor Cx to be measured is charged by the corresponding first charging structure. Since the capacitance measurement circuit is symmetrical, the embodiment of the present invention is only described by taking the first end of the capacitor Cx to be measured as suspended, and the second end of the capacitor Cx to be measured as charged by the corresponding second charging structure as an example.

[0106] In other embodiments, Figure 7 As shown, the first signal control unit 30 includes a fifth switch K5, one end of the fifth switch K5 is used as the first end of the first signal control unit 30, and is connected to the first end of the charging unit 20, the first end P10 of the capacitor to be measured, and the first input end P10IN of the timing unit 50, and the other end of the fifth switch K5 is the working voltage end V1 of the first signal control unit 30; the second signal control unit 40 includes a sixth switch K6, one end of the sixth switch K6 is used as the first end of the second signal control unit 40, and is connected to the second end of the charging unit 20, the second end P20 of the capacitor to be measured, and the second input end P11IN of the timing unit 50, and the other end of the sixth switch K6 is the working voltage end V2 of the second signal control unit 40, wherein the working voltage of the working end V1 of the first signal control unit 30 and the working voltage of the working end V2 of the second signal control unit 40 are both low level;

[0107] The fifth switch K5 is closed and the sixth switch K6 is closed so that the capacitor Cx to be measured is discharged. The fifth switch K5 is closed and the sixth switch K6 is opened. The first terminal P10 of the capacitor Cx to be measured is connected to a low level. The second terminal P11 of the capacitor Cx to be measured is charged by the charging unit 20 until a high level is output to the timing unit 50. The timing unit 20 obtains a corresponding first charging time and obtains a first charging capacitance value based on a relationship between capacitance and charging time. The first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance.

[0108] The fifth switch K5 is closed and the sixth switch K6 is closed so that the capacitor Cx to be measured is discharged, the fifth switch K5 is opened and the sixth switch K6 is closed, the second end P11 of the capacitor Cx to be measured is connected to a low level, and the first end P10 of the capacitor Cx to be measured is charged by the charging unit 20 until a high level is output to the timing unit 50, the timing unit 50 obtains the corresponding second charging time, and calculates and obtains a second charging capacitance value based on the relationship between the capacitance and the charging time, and the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance;

[0109] The fifth switch K5 is closed and the sixth switch K6 is closed so that the capacitor Cx to be measured is discharged, the fifth switch K5 is opened and the sixth switch K6 is opened, the first end P10 of the capacitor Cx to be measured is suspended, and the second end P11 of the capacitor Cx to be measured is charged by the corresponding charging unit 20 until the second end P11 of the capacitor Cx to be measured outputs a high level to the timing unit 50, the timing unit 20 obtains the corresponding third charging time, and calculates and obtains a third charging capacitance value based on the relationship between the capacitance and the charging time, and the third charging capacitance value is the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be measured in series and the capacitance value of the second parasitic capacitor; or the fifth switch K5 is disconnected, the sixth switch K5 is disconnected, the second end P11 of the capacitor to be measured Cx is suspended, and the first end P10 of the capacitor to be measured Cx is charged by the corresponding charging unit 20, until the first end P10 of the capacitor to be measured Cx outputs a high level to the timing unit 20, the timing unit 20 obtains the corresponding third charging time, and calculates the third charging capacitance value based on the relationship between the capacitance and the charging time, the third charging capacitance value is the sum of the capacitance value obtained by connecting the second parasitic capacitor and the capacitor to be measured in series and the capacitance value of the first parasitic capacitor;

[0110] Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, the capacitance value of the capacitor to be measured is obtained by calculation.

[0111] In the embodiment of the present invention, the low level of the working terminal V1 of the first signal control unit 30 is equal to the low level of the working terminal V2 of the second signal control unit 40 .

[0112] In other embodiments, the low level of the working end of the first signal control unit is not equal to the low level of the working end of the second signal control unit.

[0113] In an embodiment of the present invention, the timing unit 50 is used to time the charging process of the capacitor to be measured Cx. Each time the capacitor to be measured Cx starts to be charged, the timing unit 50 starts timing. Each time the capacitor to be measured Cx outputs a high level, the timing unit 50 stops timing to obtain the corresponding charging time of the capacitor to be measured Cx.

[0114] In other embodiments, Figure 8 As shown, the timing unit 50 includes a MUX (Multiplexer) unit 501 and a counting unit 502, the first input end of the MUX unit 501 serves as the first input end P10IN of the timing unit 50, the second input end of the MUX unit 501 serves as the second input end P11IN of the timing unit 50, and the output end of the MUX unit 501 is connected to the input end of the counting unit; the charging signal of the capacitor Cx to be measured is output to the counting unit 502 through the MUX unit 501, and the counting unit 502 times the charging process of the capacitor Cx to be measured.

[0115] In the embodiment of the present invention, Fig. 9 As shown, the capacitance measurement circuit further includes: a first buffer gate 60 and a second buffer gate 70;

[0116] The input end of the first buffer gate 60 is connected to the first end of the first signal control unit 30, the first end of the charging unit 20, and the first end P10 of the capacitor to be measured, and the output end of the first buffer gate 60 is connected to the first input end P10IN of the timing unit 50; the input end of the second buffer gate 70 is connected to the first end of the second signal control unit 40, the second end P11 of the capacitor to be measured, and the second end of the charging unit 20, and the output end of the second buffer gate 70 is connected to the second input end P11IN of the timing unit 50; when the voltage output from the first end P10 of the capacitor to be measured Cx reaches the threshold value of the first buffer gate 60, The first buffer gate 60 outputs a high level signal to the timing unit 50, and the timing unit 50 stops timing to obtain the corresponding charging time; when the voltage output by the second end P11 of the capacitor Cx to be measured reaches the threshold value of the second buffer gate 70, the second buffer gate 70 outputs a high level signal to the timing unit 50, and the timing unit 50 stops timing to obtain the corresponding charging time, wherein the threshold value of the first buffer gate 60 is set according to the working voltage VDD1 corresponding to the second charging time corresponding to the charging unit 20, and the threshold value of the second buffer gate 70 is set according to the working voltage VDD2 corresponding to the first charging time corresponding to the charging unit 20.

[0117] In other embodiments, the first buffer gate is a first comparator, and the second buffer gate is a second comparator. When the voltage output by the first terminal P10 of the capacitor to be measured Cx exceeds the comparison voltage of the first comparator, the first comparator outputs a high-level signal to the timing unit, and the timing unit stops timing to obtain the corresponding charging time. When the voltage output by the second terminal P11 of the capacitor to be measured Cx exceeds the comparison voltage of the second comparator, the second comparator outputs a high-level signal to the timing unit, and the timing unit stops timing to obtain the corresponding charging time.

[0118] The capacitance measurement circuit provided by the present invention is simple in design, does not require a specially designed circuit, can completely eliminate the influence of parasitic capacitance, and is easy to produce and apply.

[0119] Finally, it is to be noted that any modification or equivalent replacement of part or all of the technical features based on the device structure of the present invention and the technical solution of the described embodiment, which does not deviate from the essence of the corresponding technical solution of the present invention, belongs to the patent scope of the device structure of the present invention and the described implementation scheme.

Claims

1. A capacitance measurement method, characterized in that: include: Providing a capacitor to be measured, wherein two ends of the capacitor to be measured are equivalently connected to a first parasitic capacitor and a second parasitic capacitor; Connecting both ends of the capacitor to be measured to a low level and completing the discharge, connecting the first end of the capacitor to be measured to a low level, charging the second end of the capacitor to be measured through a charging unit until a high level is output, acquiring a corresponding first charging time, and calculating a first charging capacitance value based on a relationship between capacitance and charging time, wherein the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance; Connecting two ends of the capacitor to be measured to a low level and completing the discharge, connecting the second end of the capacitor to be measured to a low level, charging the first end of the capacitor to be measured through the charging unit until a high level is output, acquiring a corresponding second charging time, and calculating a second charging capacitance value based on a relationship between capacitance and charging time, wherein the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance; Connecting both ends of the capacitor to be tested to a low level and completing the discharge, leaving one end of the capacitor to be tested hanging, and charging the other end of the capacitor to be tested through one end of the corresponding charging unit until the charged end of the capacitor to be tested outputs a high level, obtaining a corresponding third charging time, and calculating a third charging capacitance value based on the relationship between the capacitance and the charging time, wherein the third charging capacitance value is the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be tested in series and the capacitance value of the second parasitic capacitance, or the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be tested in series and the capacitance value of the first parasitic capacitance; Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, calculating and obtaining the capacitance value of the capacitor to be measured; Wherein, the first end of the capacitor to be measured is suspended, and the second end of the capacitor to be measured is charged through one end of the corresponding charging unit until the second end of the capacitor to be measured outputs a high level, and the corresponding third charging time is obtained. The third charging capacitance value is calculated based on the relationship between the capacitance and the charging time, and the third charging capacitance value is the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be measured in series and the capacitance value of the second parasitic capacitance; The first charging capacitance value is: ,in, , Cx1=Cx+C p2 , Cx1 is the first charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p2 is the capacitance value of the second parasitic capacitor, T1 is the first charging time, VDD2 is the working voltage of the charging unit corresponding to the first charging time, Vt2 is the charging voltage value of the second end of the capacitor to be tested outputting a high level, R2 is the resistance value of the charging unit corresponding to the first charging time, and VL1 is the equivalent level value before the first charging; The second charging capacitance value is: ,in, , Cx2=Cx+C p1 , Cx2 is the second charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, T2 is the second charging time, VDD1 is the working voltage of the charging unit corresponding to the second charging time, Vt1 is the charging voltage value of the first end of the capacitor to be tested outputting a high level, R1 is the resistance value of the charging unit corresponding to the second charging time, and VL2 is the equivalent level value before the second charging; The third charging capacitance value is: ,in, , Cx3 is the third charging capacitance value, Cx is the capacitance value of the capacitor to be tested, C p1 is the capacitance value of the first parasitic capacitor, C p2 is the capacitance value of the second parasitic capacitor, T3 is the third charging time, Cs1 is the capacitance value obtained by connecting the first parasitic capacitor and the capacitor to be measured in series; The capacitance value of the capacitor to be measured is obtained according to the calculation formula of the first charging capacitance value to the third charging capacitance value and the first charging time to the third charging time: .

2. A capacitance measurement method as claimed in claim 1, characterized in that: The capacitor to be measured is a capacitive sensor.

3. A capacitance measurement circuit, characterized in that: A capacitance measurement method according to claim 1, comprising: Charging unit, first signal control unit, second signal control unit, timing unit; The first end of the charging unit is connected to the first end of the first signal control unit and the first input end of the timing unit and is used as the first end of the capacitance measurement circuit to connect the first end of the capacitance to be measured, and the second end of the charging unit is connected to the first end of the second signal control unit and the second input end of the timing unit and is used as the second end of the capacitance measurement circuit to connect the second end of the capacitance to be measured, wherein the two ends of the capacitance to be measured are equivalently connected to a first parasitic capacitor and a second parasitic capacitor; Connecting two ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, connecting the first end of the capacitor to be measured to a low level, and charging the second end of the capacitor to be measured through the second end of the charging unit until a high level is output to the timing unit, the timing unit obtains a corresponding first charging time, and calculates a first charging capacitance value based on a relationship between capacitance and charging time, wherein the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance; Connecting two ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, connecting the second end of the capacitor to be measured to a low level, charging the first end of the capacitor to be measured through the first end of the charging unit until a high level is output to the timing unit, the timing unit obtains a corresponding second charging time, and calculates a second charging capacitance value based on a relationship between capacitance and charging time, the second charging capacitance value being the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance; Connecting both ends of the capacitor to be measured to a low level, using the first signal control unit and the second signal control unit to discharge the capacitor to be measured, leaving one end of the capacitor to be measured suspended, and charging the other end of the capacitor to be measured through one end of the corresponding charging unit until the charged end of the capacitor to be measured outputs a high level to the timing unit, the timing unit obtains a corresponding third charging time, and calculates a third charging capacitance value based on the relationship between the capacitance and the charging time, the third charging capacitance value being the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be measured in series and the capacitance value of the second parasitic capacitance, or being the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be measured in series and the capacitance value of the first parasitic capacitance; Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, the capacitance value of the capacitor to be measured is obtained by calculation.

4. A capacitance measuring circuit as claimed in claim 3, characterized in that: The charging unit includes a first charging structure and a second charging structure, the first charging structure includes a first resistor and a first switch, the first resistor and the first switch are connected in series to form a first series structure, one end of the first series structure serves as one end of the first charging structure, and the other end of the first series structure serves as the other end of the first charging structure, one end of the first charging structure is connected to the first end of the first signal control unit, the first input end of the timing unit, and the first end of the capacitor to be measured, and the other end of the first charging structure is the working voltage end of the first charging structure; the second charging structure includes a second resistor and a second switch, the second resistor and the second switch are connected in series to form a second series structure, one end of the second series structure serves as one end of the second charging structure, and the other end of the second series structure serves as the other end of the second charging structure, one end of the second charging structure is connected to the first end of the second signal control unit, the second input end of the timing unit, and the second end of the capacitor to be measured, and the other end of the second charging structure is the working voltage end of the second charging structure; When the first signal control unit is turned off and the second signal control unit is turned off, the first switch in the first charging structure is closed and the second switch in the second charging structure is opened, the first end of the capacitor to be measured is charged through the first charging structure; when the first signal control unit is turned off and the second signal control unit is turned off, the first switch in the first charging structure is opened and the second switch in the second charging structure is closed, the second end of the capacitor to be measured is charged through the second charging structure.

5. A capacitance measuring circuit as claimed in claim 3, characterized in that: The charging unit includes a third charging substructure, a third switch and a fourth switch, one end of the third charging substructure is connected to one end of the third switch and one end of the fourth switch, the other end of the third switch serves as the first end of the charging unit, and is connected to the first end of the first signal control unit, the first input end of the timing unit, and the first end of the capacitor to be measured, and the other end of the fourth switch serves as the second end of the charging unit, and is connected to the first end of the second signal control unit, the second input end of the timing unit, and the second end of the capacitor to be measured; When the first signal control unit is turned off, the second signal control unit is turned off, the third switch is closed, and the fourth switch is opened, the first end of the capacitor to be measured is charged through the third charging substructure; when the third switch is opened and the fourth switch is closed, the second end of the capacitor to be measured is charged through the third charging substructure.

6. A capacitance measuring circuit as claimed in claim 3, characterized in that: The first signal control unit includes a first tri-state gate, the output end of the first tri-state gate is connected to the first end of the charging unit, the first end of the capacitor to be measured, and the first input end of the timing unit, the output end of the first tri-state gate serves as the first end of the first signal control unit, the enable end of the first tri-state gate is used to receive an enable signal, and the input end of the first tri-state gate is used to input a control signal; The second signal control unit includes a second three-state gate, the output end of the second three-state gate is connected to the second end of the charging unit, the second end of the capacitor to be measured, and the second input end of the timing unit, the output end of the second three-state gate serves as the first end of the second signal control unit, the enable end of the second three-state gate is used to receive an enable signal, and the input end of the second three-state gate is used to input a control signal; Connecting the two ends of the capacitor to be measured to a low level, and using the first three-state gate and the second three-state gate to discharge the capacitor to be measured; setting the enable end of the first three-state gate to control the first three-state gate to be in an on state, the input end of the first three-state gate is set to a low level, the output end of the first three-state gate outputs a low level, the first end of the capacitor to be measured outputs a low level, the enable end of the second three-state gate controls the second three-state gate to be in an off state, the second end of the capacitor to be measured is charged through the second end of the charging unit until a high level is output to the second input end of the timing unit, the timing unit obtains the corresponding first charging time, and calculates a first charging capacitance value based on the relationship between the capacitance and the charging time, the first charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance; Connecting the two ends of the capacitor to be measured to a low level, and using the first three-state gate and the second three-state gate to discharge the capacitor to be measured; setting the enable end of the second three-state gate to control the second three-state gate to be in an on state, the input end of the second three-state gate is set to a low level, the output end of the second three-state gate outputs a low level, the second end of the capacitor to be measured outputs a low level, the enable end of the first three-state gate controls the first three-state gate to be in an off state, the first end of the capacitor to be measured is charged through the first end of the charging unit until a high level is output to the first input end of the timing unit, the timing unit obtains the corresponding second charging time, and calculates a second charging capacitance value based on the relationship between the capacitance and the charging time, the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance; Connecting the two ends of the capacitor to be measured to a low level, using the first three-state gate and the second three-state gate to discharge the capacitor to be measured; setting the enable end of the first three-state gate to control the first three-state gate to be in an off state, and setting the enable end of the second three-state gate to control the second three-state gate to be in an off state, the first end of the capacitor to be measured is suspended, and the second end of the capacitor to be measured is charged through the corresponding second end of the charging unit until the second end of the capacitor to be measured outputs a high level to the second input end of the timing unit, the timing unit obtains the corresponding third charging time, and calculates the third charging capacitance value based on the relationship between the capacitance and the charging time, and the third charging capacitance value is obtained by connecting the first parasitic capacitance and the capacitor to be measured in series the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitor; or setting the enable end of the first three-state gate to control the first three-state gate to be in the off state, the enable end of the second three-state gate to control the second three-state gate to be in the off state, the second end of the capacitor to be measured is suspended, and the first end of the capacitor to be measured is charged through the corresponding first end of the charging unit until the first end of the capacitor to be measured outputs a high level to the first input end of the timing unit, the timing unit obtains the corresponding third charging time, and calculates the third charging capacitance value based on the relationship between the capacitance and the charging time, the third charging capacitance value is the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be measured in series and the capacitance value of the first parasitic capacitance.

7. A capacitance measuring circuit as claimed in claim 3, characterized in that: The first signal control unit includes a fifth switch, one end of the fifth switch is the first end of the first signal control unit, connected to the first end of the charging unit, the first end of the capacitor to be measured, and the first input end of the timing unit, and the other end of the fifth switch is the working voltage end of the first signal control unit; the second signal control unit includes a sixth switch, one end of the sixth switch is the first end of the second signal control unit, connected to the second end of the charging unit, the second end of the capacitor to be measured, and the second input end of the timing unit, and the other end of the sixth switch is the working voltage end of the second signal control unit, wherein the working voltage of the working end of the first signal control unit and the working voltage of the working end of the second signal control unit are both low level; The fifth switch is closed and the sixth switch is closed so that the capacitor to be measured is discharged, the fifth switch is closed and the sixth switch is opened, the first end of the capacitor to be measured is connected to a low level, and the second end of the capacitor to be measured is charged by the charging unit until a high level is output to the timing unit, the timing unit obtains a corresponding first charging time, and calculates a first charging capacitance value based on a relationship between capacitance and charging time, the first charging capacitance value being the sum of the capacitance value of the capacitor to be measured and the capacitance value of the second parasitic capacitance; The fifth switch is closed and the sixth switch is closed so that the capacitor to be measured is discharged, the fifth switch is opened and the sixth switch is closed, the second end of the capacitor to be measured is connected to a low level, and the first end of the capacitor to be measured is charged by the charging unit until a high level is output to the timing unit, the timing unit obtains the corresponding second charging time, and calculates a second charging capacitance value based on the relationship between the capacitance and the charging time, the second charging capacitance value is the sum of the capacitance value of the capacitor to be measured and the capacitance value of the first parasitic capacitance; The fifth switch is set to be closed and the sixth switch is set to be closed so that the capacitor to be tested is discharged, the fifth switch is opened and the sixth switch is opened, the first end of the capacitor to be tested is suspended, and the second end of the capacitor to be tested is charged by the corresponding charging unit until the second end of the capacitor to be tested outputs a high level to the timing unit, the timing unit obtains the corresponding third charging time, and calculates the third charging capacitance value based on the relationship between capacitance and charging time, the third charging capacitance value is the sum of the capacitance value obtained by connecting the first parasitic capacitance and the capacitor to be tested in series and the capacitance value of the second parasitic capacitance; or the fifth switch is opened and the sixth switch is opened, the second end of the capacitor to be tested is suspended, and the first end of the capacitor to be tested is charged by the corresponding charging unit until the first end of the capacitor to be tested outputs a high level to the timing unit, the timing unit obtains the corresponding third charging time, and calculates the third charging capacitance value based on the relationship between capacitance and charging time, the third charging capacitance value is the sum of the capacitance value obtained by connecting the second parasitic capacitance and the capacitor to be tested in series and the capacitance value of the first parasitic capacitance; Based on the first charging capacitance value~the third charging capacitance value and the first charging time~the third charging time, the capacitance value of the capacitor to be measured is obtained by calculation.

8. A capacitance measuring circuit as claimed in claim 3, characterized in that: The capacitance measurement circuit further includes: a first buffer gate and a second buffer gate; The input end of the first buffer gate is connected to the first end of the first signal control unit, the first end of the charging unit, and the first end of the capacitor to be measured, and the output end of the first buffer gate is connected to the first input end of the timing unit; the input end of the second buffer gate is connected to the first end of the second signal control unit, the second end of the charging unit, and the second end of the capacitor to be measured, and the output end of the second buffer gate is connected to the second input end of the timing unit; When the voltage outputted by the first terminal of the capacitor to be tested reaches the threshold value of the first buffer gate, the first buffer gate outputs a high level signal to the timing unit, and the timing unit stops timing to obtain the corresponding charging time; When the voltage outputted from the second end of the capacitor to be measured reaches the threshold of the second buffer gate, the second buffer gate outputs a high level signal to the timing unit, and the timing unit stops timing to obtain the corresponding charging time.

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