Diode structure and method for preparing diode structure

Abstract

The present application discloses a diode structure and a method for preparing the diode structure. The diode structure includes a first epitaxial layer and a second epitaxial layer arranged in a stacked manner, wherein the second epitaxial layer includes a first sub-epitaxial portion and a second sub-epitaxial portion arranged alternately in a first direction and having different doping types, the first direction being a direction parallel to the surface where the first epitaxial layer and the second epitaxial layer contact, and the diode structure further includes: an injection region, the injection region being arranged on a surface of the first sub-epitaxial portion away from the first epitaxial layer, wherein the doping type of the first sub-epitaxial portion is the same as the doping type of the first epitaxial layer, and the doping type of the injection region is the same as the doping type of the second sub-epitaxial portion. The invention solves the problem in the related art that the diode device structure has no obvious product performance advantage in terms of parameters, a complex process flow, and high production costs.

Description

Technical Field

[0001] The present application relates to the field of semiconductors, and in particular to a diode structure and a method for preparing the diode structure. Background Art

[0002] At present, with the development of microelectronic devices towards low power consumption, high voltage resistance and high reliability, the requirements for semiconductor materials are gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency and high power. In order to meet the application of microelectronic devices in the fields of high temperature resistance and radiation resistance, new semiconductor materials need to be developed to maximize the performance of microelectronic devices. Traditional silicon devices and gallium arsenide devices limit the improvement of device and system performance. The third-generation semiconductor materials represented by silicon carbide (SiC) and gallium nitride (GaN) have become ideal semiconductor materials for making high temperature resistant, high power and radiation resistant electronic devices due to the advantages of the wide bandgap and high critical breakdown electric field of the materials themselves. The SiC-based devices currently under study include high temperature and power SiC devices, microwave and high frequency SiC devices, SiC optoelectronic devices, radiation resistant devices, etc. The critical breakdown field strength of SiC materials is 10 times that of Si materials, the bandgap and thermal conductivity of SiC are both 3 times that of Si materials, and the concentration of intrinsic carriers is only one-tenth of that of silicon materials. These excellent physical properties make semiconductor power devices made of SiC materials have great advantages in high frequency, high temperature, high power and high radiation environments. SiC can form different crystal structures under different environments. The three commonly used crystal structures are 3C-SiC, 4H-SiC and 6H-SiC. 4H-SiC material has become the mainstream material for manufacturing semiconductor devices due to its higher bandgap width and hole mobility and lower intrinsic carrier concentration.

[0003] At present, the SiC diode device structure has not been optimized according to the material characteristics of SiC, resulting in no obvious performance advantage over Si devices in some parameters. In terms of process flow, SiC diodes have adopted the traditional process of Si diodes. Affected by the characteristics of SiC materials, the process flow is complicated and requires the use of special equipment (for Al ion implantation, special implantation equipment is required), resulting in high production costs. Summary of the invention

[0004] The present application provides a diode structure and a method for preparing the diode structure to solve the problems in the related art that the diode device structure has no obvious product performance advantage in terms of parameters, a complex process flow and high production cost.

[0005] According to one aspect of the present application, a diode structure is provided, comprising a first epitaxial layer and a second epitaxial layer arranged in a stacked manner, wherein the second epitaxial layer comprises a first sub-epitaxial portion and a second sub-epitaxial portion which are alternately arranged in a first direction and have different doping types, and the first direction is a direction parallel to a surface where the first epitaxial layer contacts the second epitaxial layer, and the diode structure further comprises: an injection region, wherein the injection region is arranged on a surface of the first sub-epitaxial portion which is away from the first epitaxial layer, wherein the doping type of the first sub-epitaxial portion is the same as the doping type of the first epitaxial layer, and the doping type of the injection region is the same as the doping type of the second sub-epitaxial portion.

[0006] Optionally, a doping concentration of the first epitaxial layer is greater than a doping concentration of the first sub-epitaxial portion.

[0007] Optionally, a doping concentration of the implanted region is greater than a doping concentration of the second sub-epitaxial portion.

[0008] Optionally, the diode structure further includes: a first conductive layer, the first conductive layer is located on a surface of the first epitaxial layer facing away from the second epitaxial layer; and a second conductive layer, the second conductive layer is located on a surface of the second epitaxial layer facing away from the first epitaxial layer.

[0009] Optionally, the material of the first epitaxial layer and the second epitaxial layer includes silicon carbide material.

[0010] According to another aspect of the present application, a method for preparing any one of the diode structures is provided, comprising: providing a substrate; forming a second epitaxial layer on the substrate, the second epitaxial layer comprising a first sub-epitaxial portion and a second sub-epitaxial portion having different doping types arranged alternately; forming a first epitaxial layer on the second epitaxial layer, the doping type of the first epitaxial layer being the same as the doping type of the first sub-epitaxial portion; forming an injection region on a surface of the first sub-epitaxial portion facing away from the first epitaxial layer, the injection region having the same doping type as the doping type of the second sub-epitaxial portion.

[0011] Optionally, the step of forming the second epitaxial layer includes: forming a first sub-epitaxial film layer on the substrate; using an etching process to form a plurality of grooves on a side of the first sub-epitaxial film layer away from the substrate; using a filling process to fill the grooves with semiconductor material to form a second sub-epitaxial part, the unetched first sub-epitaxial film layer constitutes the first sub-epitaxial part, and the first sub-epitaxial part and the second sub-epitaxial part constitute the second epitaxial layer.

[0012] Optionally, the preparation method also includes the following steps: using a grinding process to remove the substrate and part of the second epitaxial layer respectively, so that the surface of the second sub-epitaxial portion facing away from the first epitaxial layer is exposed; or using a grinding process to remove the substrate, so that the surface of the second sub-epitaxial portion facing away from the first epitaxial layer is exposed.

[0013] Optionally, the step of forming the implantation region includes: forming the implantation region on a surface of the first sub-epitaxial portion away from the first epitaxial layer by an ion implantation process, so that the doping concentration of the implantation region is greater than the doping concentration of the second sub-epitaxial portion.

[0014] Optionally, the preparation method further includes the following steps: forming a first conductive layer on a surface of the first epitaxial layer facing away from the second epitaxial layer by a deposition process; forming a second conductive layer on a surface of the second epitaxial layer facing away from the first epitaxial layer.

[0015] Through the technical solution of the present application, a diode structure is provided. The diode structure adopts a multiple epitaxial scheme based on the traditional SIC JBS structure to form a double-layer epitaxial of the first epitaxial layer and the second epitaxial layer, and forms a second sub-epitaxial portion and an injection region with a different doping type from the epitaxial layer, thereby improving the device's high-voltage resistance and reducing the forward voltage drop. In addition, the epitaxial layer in the above diode structure has undergone a thinning process and the substrate has been removed, thereby improving the device's heat dissipation capacity and reducing the forward voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 is a schematic cross-sectional structure diagram of a diode structure provided according to an embodiment of the present application;

[0018] Figure 2 is a schematic cross-sectional structure diagram of another diode structure provided according to an embodiment of the present application;

[0019] Figure 3 is a flow chart of a method for preparing a diode structure provided according to an embodiment of the present application;

[0020] Figure 4 It is a schematic diagram of a cross-sectional structure of a substrate provided in a method for preparing a diode structure provided in an embodiment of the present application;

[0021] Figure 5 is Figure 4 A schematic cross-sectional structure diagram of a first sub-epitaxial film layer formed on a substrate shown;

[0022] Figure 6 According to an embodiment of the present application, Figure 5 A schematic cross-sectional structure diagram of a groove formed on the first sub-epitaxial film layer is shown;

[0023] Figure 7 Another embodiment of the present application provides Figure 5 A schematic cross-sectional structure diagram of a groove formed on the first sub-epitaxial film layer is shown;

[0024] Figure 8 is Figure 6 A schematic cross-sectional structure diagram of a second sub-epitaxial portion formed by filling a semiconductor material in a trench shown;

[0025] Fig. 9 is Figure 7 The schematic cross-sectional structure diagram of the second sub-epitaxial portion formed by filling the trench with semiconductor material is shown;

[0026] Fig.10 is Figure 8 A schematic cross-sectional structure diagram of forming a first epitaxial layer on a second epitaxial layer is shown;

[0027] Fig.11 is Fig. 9 A schematic cross-sectional structure diagram of forming a first epitaxial layer on a second epitaxial layer is shown;

[0028] Fig.12 It is flip Fig.10 A schematic diagram of a cross-sectional structure after the structure shown;

[0029] Fig.13 It is flip Fig.11 A schematic diagram of a cross-sectional structure after the structure shown;

[0030] Fig.14 Yes Fig.12 The substrate shown or removed Fig.13 The schematic cross-sectional structure diagram of a part of the substrate after the first sub-epitaxial film layer is shown;

[0031] Fig.15 is Fig.14 A schematic cross-sectional structure diagram of an implantation region formed in the first sub-epitaxial portion shown;

[0032] Fig.16 is Fig.15 A schematic cross-sectional structure diagram of a first conductive layer and a second conductive layer formed on the structure shown.

[0033] The above drawings include the following reference numerals:

[0034] 10. First epitaxial layer; 20. Second epitaxial layer; 21. First sub-epitaxial part; 22. Second sub-epitaxial part; 23. First sub-epitaxial part film layer; 231. Part of first sub-epitaxial part film layer; 24. Groove; 30. Injection region; 41. First conductive layer; 42. Second conductive layer; 50. Substrate. DETAILED DESCRIPTION

[0035] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0036] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0037] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0038] As described in the background technology, the current SiC diode device structure has not been optimized for the material properties of SiC, resulting in no obvious performance advantage in some parameters compared to Si devices. The SiC diode uses the traditional process of Si diodes in terms of process flow. Affected by the characteristics of SiC materials, the process flow is complex and requires the use of special equipment (for Al ion implantation, special implantation equipment is required), resulting in high production costs. In order to solve the above technical problems, the present application provides a diode structure and a method for preparing the diode structure.

[0039] According to one aspect of the present application, a diode structure is provided, such as Figure 1As shown, it includes a first epitaxial layer 10 and a second epitaxial layer 20 arranged in a stacked manner, wherein the second epitaxial layer 20 includes a first sub-epitaxial portion 21 and a second sub-epitaxial portion 22 alternately arranged in a first direction A and having different doping types, and the first direction A is a direction parallel to the surface of the first epitaxial layer 10 and the second epitaxial layer 20 in contact, and the diode structure further includes: an injection region 30, which is arranged on the surface of the first sub-epitaxial portion 21 away from the first epitaxial layer 10, wherein the doping type of the first sub-epitaxial portion 21 is the same as the doping type of the first epitaxial layer 10, and the doping type of the injection region 30 is the same as the doping type of the second sub-epitaxial portion 22. The above diode structure, based on the traditional SiC JBS structure, adopts a multiple epitaxial scheme to form a double-layer epitaxy of the first epitaxial layer 10 and the second epitaxial layer 20, and forms a second sub-epitaxial portion 22 and an injection region with a different doping type from the epitaxial layer, so as to improve the high voltage resistance of the device and reduce the forward voltage drop. In addition, the epitaxial structure of the diode has been thinned to remove the substrate, thereby improving the heat dissipation capacity of the device and reducing the forward voltage drop.

[0040] In some optional embodiments, the doping concentration of the first epitaxial layer 10 is greater than the doping concentration of the first sub-epitaxial portion 21 .

[0041] Specifically, the materials of the first sub-epitaxial portion 21 and the first epitaxial layer 10 may include silicon carbide, silicon, quartz, silicon nitride, gallium nitride, gallium oxide, aluminum oxide, aluminum nitride and the like.

[0042] In an optional embodiment, the material of the first sub-epitaxial portion 21 and the first epitaxial layer 10 includes silicon carbide material.

[0043] Specifically, silicon carbide (SiC) has become an ideal semiconductor material for making high-temperature, high-power and radiation-resistant electronic devices due to its advantages such as wide bandgap and high critical breakdown electric field. However, since the device structure is not optimized for the material properties of SiC, the structure of Si diode is used instead, so that the performance advantages of SiC diode devices in some parameters compared with Si devices are not obvious. Among them, Si diode devices use a single-layer epitaxial structure, that is, a PN junction structure is formed on a Si single-layer epitaxial layer. The first epitaxial layer and the second epitaxial layer used in the SiC diode structure in this application use silicon carbide materials to form a double-layer SiC epitaxial structure of the first SiC epitaxial layer and the second SiC epitaxial layer, and form a second sub-epitaxial portion and an injection region with a different doping type from the SiC epitaxial layer, so as to improve the device's high-voltage resistance and reduce the forward voltage drop.

[0044] In the above embodiment, the first sub-epitaxial portion 21 and the first epitaxial layer 10 form an epitaxial variable doping structure, that is, a doping gradient is formed between the first epitaxial layer 10 and the first sub-epitaxial portion 21, which slows down the transition barrier of carriers, promotes the movement of carriers, reduces the forward voltage drop of the device, increases the withstand voltage of the device, and improves the reliability and stability of the device. At the same time, the electric field distribution in the diode structure can also be optimized, the performance of the device can be improved, and the efficiency and performance indicators of the device can be improved. By designing the doping concentration of the first epitaxial layer and the first sub-epitaxial portion, precise control of the electric field can also be achieved, thereby improving the performance and characteristics of the device.

[0045] In some optional embodiments, the doping concentration of the injection region 30 is greater than the doping concentration of the second sub-epitaxial portion 22. Specifically, the injection region 30 has the same doping type as the second sub-epitaxial portion 22, and the injection region 30 has a different doping type from the first sub-epitaxial portion 21, that is, the injection region 30 and the first sub-epitaxial portion constitute a homojunction diode structure, and the second sub-epitaxial portion 22 and the first epitaxial layer 10 also constitute a homojunction diode structure. The doping concentration of the injection region 30 is higher than the doping concentration of the second sub-epitaxial portion 22, and the injection region 30 has a larger doping concentration, which is conducive to forming an ohmic contact. Because the ohmic contact has strong stability and can provide a smaller contact resistance, the surge capability of the diode device is improved and the forward voltage drop is reduced under the premise of ensuring the withstand voltage performance.

[0046] In other optional embodiments, the depth of the injection region in the second direction is less than the depth of the second sub-epitaxial portion, wherein the second direction is perpendicular to the surface where the first epitaxial layer contacts the second epitaxial layer, which is beneficial to improving the surge capability of the diode device.

[0047] In some optional embodiments, such as Figure 2 As shown, the diode structure further includes: a first conductive layer 41 , which is located on the surface of the first epitaxial layer 10 away from the second epitaxial layer 20 ; and a second conductive layer 42 , which is located on the surface of the second epitaxial layer 20 away from the first epitaxial layer 10 .

[0048] In the above optional embodiments, the first conductive layer 41 and the second conductive layer 42 include, but are not limited to, alloy materials composed of any one or more of silver, copper, aluminum, gold, titanium, nickel, platinum and palladium metals. The metal material has good electrical conductivity and can improve the current transmission efficiency of the diode structure. The second conductive layer 42 forms a Schottky contact with the second sub-epitaxial portion 22 to form a Schottky barrier diode. The Schottky contact has a fast response time and good conduction characteristics, can reduce energy consumption and provide stable current output, and the Schottky contact also has high reliability and durability, and has good temperature characteristics. While improving the service life, it can work stably in a wide temperature range to improve the performance parameters and performance advantages of the diode device, that is, under the premise of ensuring the withstand voltage performance, the device surge capacity is improved and the forward voltage drop is reduced. The second conductive layer 42 forms an ohmic contact with the injection region 30, which reduces the contact resistance. Under the premise of ensuring the withstand voltage performance, the surge capacity of the diode device is improved and the forward voltage drop is reduced.

[0049] Specifically, the first conductive layer may include multiple conductive material layers, and the second conductive layer may also include multiple conductive material layers. The synergistic effect between different conductive layers can enhance the conductivity of the conductive layers.

[0050] According to another aspect of the present application, a method for preparing any diode structure is provided, such as Figure 3 As shown, including:

[0051] Step S101: providing a substrate;

[0052] Step S102: forming a second epitaxial layer on the substrate, the second epitaxial layer comprising a first sub-epitaxial portion and a second sub-epitaxial portion having different doping types in alternating manner;

[0053] Step S103: forming a first epitaxial layer on the second epitaxial layer, wherein the doping type of the first epitaxial layer is the same as the doping type of the first sub-epitaxial portion;

[0054] Step S104: forming an implantation region on a surface of the first sub-epitaxial portion away from the first epitaxial layer, wherein the doping type of the implantation region is the same as the doping type of the second sub-epitaxial portion.

[0055] The above-mentioned preparation method of the embodiment of the present application is adopted, on the basis of the traditional diode structure, multiple epitaxial processes are adopted to form a double-layer epitaxial of the first epitaxial layer and the second epitaxial layer, which reduces the number of ion implantations, simplifies the process, and reduces the production cost. At the same time, a second sub-epitaxial portion and an injection region with a different doping type from the epitaxial layer are formed in the double-layer epitaxial layer structure, which improves the device's ability to withstand high voltage and reduces the forward voltage drop. The multi-layer epitaxial and substrate thinning process completely removes the substrate, improves the device's heat dissipation capacity, and reduces the forward voltage drop.

[0056] The following will describe in more detail the exemplary embodiments of the method for preparing the diode structure provided by the present application in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of the present application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0057] First, proceed to step S101: Figure 4 As shown, a substrate 50 is provided.

[0058] Specifically, the material of the substrate 50 may include silicon carbide, silicon, quartz, silicon nitride, gallium nitride, gallium oxide, aluminum oxide, aluminum nitride and the like. Personnel skilled in the art may make reasonable selections based on actual needs, and no specific limitation is imposed without application.

[0059] After the step of providing a substrate, step S102 is performed to form a second epitaxial layer on the substrate.

[0060] In some optional implementations, the specific steps of step S102 include:

[0061] Step S1021, as Figure 5 As shown, a first sub-epitaxial film layer 23 is formed on the substrate 50;

[0062] Specifically, the first sub-epitaxial film layer 23 may include materials such as silicon carbide, silicon, quartz, silicon nitride, gallium nitride, gallium oxide, aluminum oxide, and aluminum nitride. Personnel in the art may make reasonable selections according to actual needs, and no specific limitation is made without application. Exemplarily, the first sub-epitaxial film layer 23 is made of silicon carbide material to solve the problem that the product performance advantage of SiC diode devices in some parameters is not obvious.

[0063] Step S1022, as Figure 6 As shown, a plurality of grooves 24 are formed on the side of the first sub-epitaxial film layer 23 away from the substrate 50 by using an etching process;

[0064] Specifically, the etching process includes but is not limited to dry etching, wet etching, deep etching, ion beam etching (IBE) and electrolytic etching, among which dry etching includes physical etching, chemical vapor etching and plasma etching, and deep etching includes deep reactive ion etching and laser etching. Those skilled in the art can make reasonable selections according to actual needs, and this application does not make specific limitations.

[0065] In another optional embodiment, Figure 7As shown, in the second direction B, the depth of the groove 24 is less than the depth of the first sub-epitaxial film layer 23 , that is, the groove 24 does not penetrate the first sub-epitaxial film layer 23 .

[0066] Step S1023, as Figure 8 As shown, the filling process is used in Figure 6 The trench 24 shown in the figure is filled with semiconductor material to form a second sub-epitaxial portion 22 , the unetched first sub-epitaxial portion film layer constitutes a first sub-epitaxial portion 21 , and the first sub-epitaxial portion 21 and the second sub-epitaxial portion 22 constitute a second epitaxial layer 20 .

[0067] Specifically, the semiconductor material includes a doped epitaxial material, and the semiconductor material has a different doping type from the first sub-epitaxial portion 21. If the first sub-epitaxial portion 21 is a P-type epitaxial material, the trench is filled with an N-type epitaxial material, and if the first sub-epitaxial portion 21 is an N-type epitaxial material, the trench is filled with a P-type epitaxial material. In addition, the depth of the first sub-epitaxial portion can be deepened by using an etching and filling process, and the deepening of the depth of the first sub-epitaxial portion reduces the forward voltage drop of the device.

[0068] Among them, the second sub-epitaxial portion 22 is formed at the groove, and the unetched first sub-epitaxial portion film layer is the first sub-epitaxial portion 21, so as to form a second epitaxial layer 20 including first sub-epitaxial portions 21 and second sub-epitaxial portions 22 alternately arranged in the first direction A and having different doping types.

[0069] In another optional embodiment, Fig. 9 As shown, the filling process is used in Figure 7 The trench 24 shown in the figure is filled with semiconductor material to form a second sub-epitaxial portion 22. In the second direction B, the depth of the second sub-epitaxial portion 22 is less than the depth of the first sub-epitaxial portion film layer 23. Between the second epitaxial layer 20 and the substrate 50 is a portion of the first sub-epitaxial portion film layer 231.

[0070] After step S1023, proceed to step S103. Fig.10 and Fig.11 As shown, the first epitaxial layer 10 is formed on the side of the second epitaxial layer 20 facing away from the substrate 50 .

[0071] Specifically, the process of forming the first epitaxial layer 10 and the first sub-epitaxial film layer 23 includes but is not limited to a deposition process and an epitaxial growth process. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control, and the activation rate is relatively fixed, and the target doping distribution is easy to achieve. It is not only suitable for silicon-based power devices, but also can avoid the difficulty of injection doping of silicon carbide power devices and improve the efficiency of its terminal structure. The deposition process is relatively mature, simple to operate, and has a low cost. Among them, the deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD). Among them, physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal organic chemical vapor deposition (MOCVD), laser induced chemical vapor deposition (LCVD), and those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0072] Specifically, the first epitaxial layer 10 and the second sub-epitaxial portion 22 have different doping types, so the first epitaxial layer and the second sub-epitaxial portion form a PN junction structure, so that the diode structure has a unidirectional conductive effect.

[0073] In an optional embodiment, the doping concentration of the first epitaxial layer is greater than the doping concentration of the first sub-epitaxial portion, and the first epitaxial layer and the first sub-epitaxial portion form a doping gradient, which slows down the transition barrier of carriers, promotes the movement of carriers, and helps to reduce the forward voltage drop of the device.

[0074] In some optional embodiments, after step S103, step S1031 is performed to remove the substrate and part of the second epitaxial layer 20 respectively by a grinding process, so that the surface of the second sub-epitaxial portion 22 away from the first epitaxial layer 10 is exposed; or the substrate is removed by a grinding process, so that the surface of the second sub-epitaxial portion 22 away from the first epitaxial layer 10 is exposed, and the following is obtained: Figure 1 The structure shown.

[0075] Specifically, the diode structure prepared in step S103 is flipped, such as Figure 12 to Figure 13 As shown, a grinding process is used to expose the surface of the second sub-epitaxial portion 22 away from the first epitaxial layer 10, as shown in FIG. Fig.14 As shown. In a specific embodiment, as Fig.12 As shown, the second epitaxial layer 20 is in contact with the substrate 50. In this case, the substrate 50 can be removed by grinding. Fig.14 In the illustrated second partial epitaxial portion 22 , the surface facing away from the first epitaxial layer 10 is exposed.

[0076] Specifically, during the grinding process, the substrate 50 is removed with the double epitaxial layer consisting of the first epitaxial layer 10 and the second epitaxial layer 20 as a support, and the diode structure is thinned to improve the heat dissipation capacity of the device.

[0077] In another specific embodiment, Fig.13 As shown, part of the first sub-epitaxial film layer 231 is provided between the second epitaxial layer 20 and the substrate 50. In this case, the substrate 50 and part of the first sub-epitaxial film layer 231 are removed by grinding, so as to achieve the following Fig.14 In the illustrated second partial epitaxial portion 22 , the surface facing away from the first epitaxial layer 10 is exposed.

[0078] After step S1031, proceed to step S104. Fig.15 As shown, an implantation region 30 is formed on a surface of the first sub-epitaxial portion 21 facing away from the first epitaxial layer 10 .

[0079] Specifically, the implantation region 30 and the first sub-epitaxial portion 21 have different doping types, that is, the implantation region 30 forms a PN junction structure, so that the diode structure has a unidirectional conductive effect.

[0080] In an optional embodiment, an implantation region is formed on a surface of the first sub-epitaxial portion away from the first epitaxial layer by an ion implantation process, so that the doping concentration of the implantation region is greater than the doping concentration of the second sub-epitaxial portion.

[0081] Specifically, the ion implantation process does not require high temperature treatment, that is, it can achieve precise control of the concentration and depth of the implanted ions, and while achieving precise doping, it can avoid damage and deformation of the material structure. In addition, the doping concentration of the implantation region is greater than the doping concentration of the second sub-epitaxial portion, and the depth of the implantation region is less than the depth of the first sub-epitaxial portion. The ion implantation process can accurately control the doping concentration and depth of the implantation region. In addition, for the carbon-silicon bond energy in the silicon carbide material is high, it is difficult for impurity atoms to diffuse in the silicon carbide material. The ion implantation process is a method of adding a certain amount and type of impurities to the semiconductor material to change the electrical properties. The ion implantation process has a low injection temperature, and can flexibly and accurately control the doping distribution, which can reduce the damage of high temperature to the silicon carbide material and improve the doping efficiency. However, the ion implantation cost is relatively expensive and the cost is high. The diode structure of the present application uses a double-layer epitaxial material to form the first epitaxial layer and the second epitaxial layer, which can reduce the number of ion implantations, simplify the process, and reduce the production cost.

[0082] In some optional implementations, step S105 is also included, such as Fig.16 As shown, a first conductive layer 41 is formed on a surface of the first epitaxial layer 10 facing away from the second epitaxial layer 20 by a deposition process; and a second conductive layer 42 is formed on a surface of the second epitaxial layer 20 facing away from the first epitaxial layer 10 .

[0083] Specifically, the deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD), among which physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal organic compound chemical vapor deposition (MOCVD), laser induced chemical vapor deposition (LCVD), and technicians in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0084] Among them, the material of the first conductive layer and the material of the second conductive layer include but are not limited to alloy materials composed of any one or more of silver, copper, aluminum, gold, titanium, nickel, platinum and palladium metals. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0085] In some optional embodiments, the first conductive layer includes multiple layers of conductive materials, each layer has a different conductive material, and / or the second conductive layer includes multiple layers of conductive materials, each layer has a different conductive material, and the different conductive layers work synergistically to enhance the conductivity of the conductive layer.

[0086] Specifically, since the first sub-epitaxial portion has a higher doping concentration, when the first sub-epitaxial portion contacts the first conductive layer, an ohmic contact is formed, thereby reducing the forward voltage drop of the diode. When the second sub-epitaxial portion contacts the first conductive layer, a Schottky contact is formed, thereby improving the surge capability of the device and reducing the forward voltage drop of the diode.

[0087] The diode structure formed by the method for preparing the diode structure of the present application will be described below in conjunction with an embodiment.

[0088] Example 1

[0089] The method for preparing the diode structure provided in this embodiment comprises the following steps:

[0090] Provide an N-type SiC substrate 50, such as Figure 4 As shown;

[0091] A P-type SiC film layer is formed on the N-type SiC substrate 50 by using an epitaxial growth process to form a P-type first epitaxial sub-part film layer 23. Figure 5 As shown;

[0092] The P-type first sub-epitaxial film layer 23 is etched by dry etching process to form a plurality of grooves 24, the depth of the grooves 24 is the same as the depth of the first sub-epitaxial film layer 23, such as Figure 6 As shown;

[0093] The N-type SiC material is filled in the trench 24 by a filling process to form an N-type second sub-epitaxial portion 22. The unetched P-type first sub-epitaxial portion film layer 23 is a P-type first sub-epitaxial portion 21. The P-type first sub-epitaxial portion 21 and the N-type second sub-epitaxial portion 22 constitute a second epitaxial layer 20. Figure 8 As shown;

[0094] The P-type first epitaxial layer 10 is formed on the second epitaxial layer 20 by using an epitaxial growth process. Fig.10 As shown;

[0095] Flip the diode structure, such as Fig.12 As shown;

[0096] The N-type SIC substrate 50 is removed by mechanical grinding, so that the surface of the N-type second sub-epitaxial portion 22 away from the P-type first epitaxial layer 10 is exposed. Fig.14 As shown;

[0097] By using an ion implantation process, an N-type implantation region 30 is formed on the surface of the P-type first epitaxial sub-portion 21 away from the first epitaxial layer 10, and the doping concentration of the N-type implantation region 30 is greater than the doping concentration of the N-type second epitaxial sub-portion 22. Fig.15 As shown;

[0098] A first conductive layer 41 is formed on a surface of the P-type first epitaxial layer 10 facing away from the second epitaxial layer 20 by a deposition process, and a second conductive layer 42 is formed on a surface of the second epitaxial layer 20 facing away from the P-type first epitaxial layer 10. Fig.16 shown.

[0099] Example 2

[0100] The method for preparing the diode structure provided in this embodiment comprises the following steps:

[0101] Provide an N-type SiC substrate 50, such as Figure 4 As shown;

[0102] A P-type SiC film layer is formed on the N-type SiC substrate 50 by using an epitaxial growth process to form a P-type first epitaxial sub-part film layer 23. Figure 5 As shown;

[0103] The P-type first sub-epitaxial film layer 23 is etched by dry etching process to form a plurality of grooves 24, wherein the depth of the grooves 24 is less than the depth of the first sub-epitaxial film layer 23. Figure 7 As shown;

[0104] The N-type epitaxial layer is filled in the trench 24 by a filling process to form an N-type second sub-epitaxial portion 22. The unetched P-type first sub-epitaxial portion film layer 23 is the P-type first sub-epitaxial portion 21. The P-type first sub-epitaxial portion 21 and the N-type second sub-epitaxial portion 22 constitute the second epitaxial layer 20. A portion of the first sub-epitaxial portion film layer 231 is provided between the second epitaxial layer 20 and the N-type SiC substrate 50. Fig. 9 As shown;

[0105] The P-type first epitaxial layer 10 is formed on the second epitaxial layer 20 by using an epitaxial growth process. Fig.11 As shown;

[0106] Flip the diode structure, such as Fig.13 As shown;

[0107] The N-type SIC substrate 50 and part of the first sub-epitaxial film layer 231 are removed by mechanical grinding, so that the surface of the N-type second sub-epitaxial portion 22 away from the P-type first epitaxial layer 10 is exposed. Fig.14 As shown;

[0108] By using an ion implantation process, an N-type implantation region 30 is formed on the surface of the P-type first epitaxial sub-portion 21 away from the first epitaxial layer 10, and the doping concentration of the N-type implantation region 30 is greater than the doping concentration of the N-type second epitaxial sub-portion 22. Fig.15 As shown;

[0109] A first conductive layer 41 is formed on a surface of the P-type first epitaxial layer 10 facing away from the second epitaxial layer 20 by a deposition process, and a second conductive layer 42 is formed on a surface of the second epitaxial layer 20 facing away from the P-type first epitaxial layer 10. Fig.16 shown.

[0110] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0111] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A diode structure, characterized in that: The diode structure comprises a first epitaxial layer and a second epitaxial layer arranged in a stacked manner, wherein the second epitaxial layer comprises a first sub-epitaxial portion and a second sub-epitaxial portion which are alternately arranged in a first direction and have different doping types, the first direction is a direction parallel to a surface of the first epitaxial layer in contact with the second epitaxial layer, the material of the first epitaxial layer and the second epitaxial layer is silicon carbide material, and the diode structure further comprises: an implantation region, the implantation region being arranged on a surface of the first sub-epitaxial portion away from the first epitaxial layer, wherein the doping type of the first sub-epitaxial portion is the same as the doping type of the first epitaxial layer, and the doping type of the implantation region is the same as the doping type of the second sub-epitaxial portion; The doping concentration of the implanted region is greater than the doping concentration of the second sub-epitaxial portion; A second conductive layer is provided, wherein the second conductive layer is located on a surface of the second epitaxial layer which is away from the first epitaxial layer, and the injection region forms an ohmic contact with the second conductive layer.

2. The diode structure according to claim 1, characterized in that: The doping concentration of the first epitaxial layer is greater than the doping concentration of the first sub-epitaxial portion.

3. The diode structure according to claim 1, characterized in that: Also includes: A first conductive layer is located on a surface of the first epitaxial layer that is away from the second epitaxial layer.

4. A method for preparing a diode structure according to any one of claims 1 to 3, characterized in that: include: providing a substrate; forming a second epitaxial layer on the substrate, the second epitaxial layer comprising a first sub-epitaxial portion and a second sub-epitaxial portion having different doping types in alternating manner; forming a first epitaxial layer on the second epitaxial layer, wherein the doping type of the first epitaxial layer is the same as the doping type of the first sub-epitaxial portion, and the material of the first epitaxial layer and the second epitaxial layer is silicon carbide material; forming an implantation region on a surface of the first sub-epitaxial portion away from the first epitaxial layer, wherein the doping type of the implantation region is the same as the doping type of the second sub-epitaxial portion; The doping concentration of the implanted region is greater than the doping concentration of the second sub-epitaxial portion; A second conductive layer is formed, where the second conductive layer is located on a surface of the second epitaxial layer that is away from the first epitaxial layer, and the injection region forms an ohmic contact with the second conductive layer.

5. The preparation method according to claim 4, characterized in that: The step of forming the second epitaxial layer comprises: forming a first sub-epitaxial film layer on the substrate; Using an etching process to form a plurality of grooves on a side of the first sub-epitaxial film layer away from the substrate; A semiconductor material is filled in the trench using a filling process to form a second sub-epitaxial portion, the unetched first sub-epitaxial portion film layer constitutes the first sub-epitaxial portion, and the first sub-epitaxial portion and the second sub-epitaxial portion constitute the second epitaxial layer.

6. The preparation method according to claim 4, characterized in that: The following steps are also included: Using a grinding process to remove the substrate and a portion of the second epitaxial layer respectively, so that a surface of the second sub-epitaxial portion away from the first epitaxial layer is exposed; or The substrate is removed by a grinding process, so that a surface of the second sub-epitaxial portion facing away from the first epitaxial layer is exposed.

7. The preparation method according to claim 4, characterized in that: The step of forming the implantation region comprises: An ion implantation process is used to form an implantation region on a surface of the first sub-epitaxial portion away from the first epitaxial layer, so that the doping concentration of the implantation region is greater than the doping concentration of the second sub-epitaxial portion.

8. The preparation method according to claim 4, characterized in that: The following steps are also included: forming a first conductive layer on a surface of the first epitaxial layer facing away from the second epitaxial layer by a deposition process; A second conductive layer is formed on a surface of the second epitaxial layer facing away from the first epitaxial layer.

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