A control method and system for surface treatment of semiconductor parts

Abstract

The present invention discloses a control method and system for the surface treatment of semiconductor parts and components, and relates to the technical field of semiconductor processing data processing, including: classifying and processing a plurality of processing methods; using a processing feature extraction method to analyze the addition processing method and the removal processing method respectively, and obtaining the addition feature area, the removal processing line and the removal relative distance based on the analysis results; and controlling the surface treatment of semiconductor parts and components. The present invention is used to solve the problem that the prior art lacks improvement in controlling the surface treatment process when the surface treatment of semiconductor parts and components is carried out, and the control of the surface treatment process is not intelligent and reasonable enough, resulting in low yield and production efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor processing data processing, and in particular to a control method and system for surface processing of semiconductor parts. Background Art

[0002] The main functions of surface treatment of semiconductor parts include improving the surface flatness of parts, improving adhesion, improving electrical properties and preventing pollution; common methods for surface treatment of semiconductors include chemical mechanical polishing, dry etching, ion implantation, photolithography and optical vapor deposition, etc.; by adopting different surface treatment methods, the flatness and adhesion of the wafer surface can be improved, the electrical properties can be improved and pollution can be prevented, so as to achieve efficient chip manufacturing.

[0003] Existing improvements in the control of semiconductor parts processing are usually based on the aging degree of semiconductor parts. For example, in the Chinese patent application publication number CN115032182A, a data processing method and system for qualitative change detection of semiconductor process parts are disclosed. The scheme is to obtain multiple Raman spectrum data of a semiconductor process part, and obtain a first qualitative change state simulation parameter for indicating the aging degree of the semiconductor process part and a second qualitative change state simulation parameter for indicating the degree of internal molecular structure variation of the semiconductor process part after performing multiple operations on the Raman spectrum data. Other technologies for the control of semiconductor parts processing are usually improvements in thermal processing or production. Existing control methods for the surface treatment of semiconductor parts cannot timely control the surface treatment process based on the surface treatment data during the surface treatment process, and cannot timely discover problems in the surface treatment process, thereby causing irreversible damage to the surface of the semiconductor parts and affecting the overall semiconductor processing process, causing property losses and affecting production efficiency. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems in the prior art to a certain extent. By proposing a control method and system for the surface treatment of semiconductor components, the present invention is used to solve the problems in the prior art that there is a lack of improvement in the control of the surface treatment process, the surface treatment process cannot be timely controlled based on the surface treatment data during the surface treatment process, and problems in the surface treatment process cannot be discovered in time, thereby causing irreversible damage to the surface of the semiconductor component and affecting the overall semiconductor processing process. The control of the surface treatment process is not intelligent and reasonable, resulting in low yield and production efficiency.

[0005] To achieve the above objectives, in a first aspect, the present invention provides a control method for surface treatment of semiconductor parts, comprising:

[0006] Acquire multiple processing methods for surface treatment of semiconductor parts, and classify the multiple processing methods into adding processing methods and removing processing methods;

[0007] The addition processing method and the elimination processing method are analyzed respectively by using a processing feature extraction method, and based on the analysis results, an addition feature area of ​​the addition processing method and a elimination processing line and a elimination relative distance of the elimination processing method are obtained;

[0008] Control the surface treatment of semiconductor parts based on adding feature areas, rejecting processing lines and rejecting relative distances.

[0009] Furthermore, a plurality of processing methods for surface treatment of semiconductor parts are obtained, and the plurality of processing methods are classified and processed, and are respectively recorded as adding processing methods and removing processing methods, including:

[0010] Acquire multiple processing methods for surface treatment of semiconductor parts, which are sequentially recorded as processing method 1 to processing method N;

[0011] For any one of the processing methods N1 from the processing methods 1 to N, when the weight of the semiconductor component is reduced after the semiconductor component is processed by the processing method N1, the processing method N1 is recorded as a rejection processing method;

[0012] When the weight of a semiconductor component increases after the semiconductor component is treated with treatment method N1, treatment method N1 is recorded as an addition treatment method;

[0013] The processing methods recorded as addition processing methods among processing methods 1 to processing methods N are recorded as addition processing methods 1 to addition processing methods N1 in sequence; the processing methods recorded as elimination processing methods among processing methods 1 to processing methods N are recorded as elimination processing methods 1 to elimination processing methods N2 in sequence, wherein the sum of N1 plus N2 is less than or equal to N.

[0014] Furthermore, the addition processing method and the removal processing method are analyzed respectively using the processing feature extraction method, and based on the analysis results, the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method are obtained, including:

[0015] The additive processing method is analyzed using a processing feature extraction method, and an additive feature area is obtained based on the analysis result;

[0016] The processing feature extraction method is used to analyze the elimination processing method, and the elimination processing line and the elimination relative distance are obtained based on the analysis results.

[0017] Further, when the addition processing method is analyzed using the processing feature extraction method, the processing feature extraction method includes:

[0018] For any one of the addition processing methods N3 from the addition processing methods 1 to the addition processing methods N1, semiconductor components that can be processed using the addition processing method N3 are obtained and recorded as addition processing components N3-1 to addition processing components N3-J in sequence;

[0019] For any one of the additive processing parts N3-1 to the additive processing parts N3-J1, when the additive processing method N3 is used to process the additive processing part N3-J1, the processed surface of the additive processing part N3-J1 is recorded as the additive surface;

[0020] Obtain the area of ​​the added surface, record it as the added area, and record the material consumed by the added treatment method N3 during the treatment as the treatment consumed material;

[0021] The value of the processing consumable material consumed when the surface of the added surface is treated using the addition treatment method N3 is recorded as the treatment consumption value; the addition area and the treatment consumption value are recorded as the addition characteristic value of the addition treatment parts N3 to J1;

[0022] The added feature values ​​of all the added processing parts of the added processing method N3 are obtained.

[0023] Further, when the processing feature extraction method is used to analyze the addition processing method, the processing feature extraction method also includes:

[0024] Establish a plane rectangular coordinate system, which is recorded as an additive processing coordinate system, wherein the unit of the X-axis of the additive processing coordinate system is area, and the unit of the Y-axis of the additive processing coordinate system is a unit used for statistical processing of consumable materials;

[0025] For any one of the additive processing parts N3-J1 of all the additive processing parts of the additive processing method N3, the additive processing parts N3-J1 are marked in the additive coordinate system based on the additive characteristic value, wherein the additive area in the additive characteristic value corresponds to the value of the X axis in the additive processing coordinate system, and the processing consumption value in the additive characteristic value corresponds to the value of the Y axis in the additive processing coordinate system;

[0026] The added feature values ​​corresponding to all the added processing parts of the addition processing method N3 are marked in the addition coordinate system, and are recorded from small to large as addition point 1 to addition point J based on the distance from the origin of the addition coordinate system;

[0027] Connect the added point 1 and the added point J, and record the connecting line as the added through line, obtain the distance from the added point 2 to the added point J-1 to the added through line, and record it as the vertical line length 1 to the vertical line length J-2, and record the added points corresponding to the larger two vertical line lengths from the vertical line length 1 to the vertical line length J-2 as the added corner point 1 and the added corner point 2; record the quadrilateral formed by the added point 1, the added point J, the added corner point 1 and the added corner point 2 as the characteristic quadrilateral;

[0028] Two adjacent sides of the characteristic quadrilateral are recorded as first adjacent sides, and the other two adjacent sides of the characteristic quadrilateral are recorded as second adjacent sides, and a fitting curve corresponding to the first adjacent side is obtained, which is recorded as curve 1; a fitting curve corresponding to the second adjacent side is obtained, which is recorded as curve 2, and a closed area enclosed by curve 1 and curve 2 is recorded as an added feature area of ​​the addition processing method N3;

[0029] Gets the added feature area for all add processing methods.

[0030] Further, when the elimination processing method is analyzed using the processing feature extraction method, the processing feature extraction method includes:

[0031] For any one of the rejection processing methods N4 from the rejection processing method 1 to the rejection processing method N4, semiconductor components that can be processed by the rejection processing method N4 are obtained and recorded as the rejection processing components N4-1 to the rejection processing components N4-K in sequence;

[0032] For any one of the rejected processing parts N4-1 to the rejected processing parts N4-K1, the processing data of any one of the rejected processing parts N4-K1 using the rejection processing method N4 for surface treatment is obtained, and the time when the rejected processing part N4-K1 starts to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection start time; the time when the rejected processing part N4-K1 ends to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection end time;

[0033] The time period consisting of the rejection start time and the rejection end time is recorded as the rejection time period, and the rejection time period is evenly divided into standard rejection quantity portions, and each portion is recorded in sequence as rejection sub-segment 1 to rejection sub-segment F based on the time sequence;

[0034] For any one of the rejection sub-segments F1 from the rejection sub-segments 1 to the rejection sub-segment F, the time node corresponding to the center point of the rejection sub-segment F1 is recorded as the characteristic time point of the rejection sub-segment F1, and the weight of the rejection processing parts N4 to K1 when the rejection processing method N4 is used to perform surface processing on the rejection processing parts N4 to the characteristic time point of the rejection sub-segment F1 in the processing data is recorded as the characteristic weight of the rejection sub-segment;

[0035] Get the characteristic time points and characteristic weights of all excluded sub-segments.

[0036] Further, when the elimination processing method is analyzed using the processing feature extraction method, the processing feature extraction method also includes:

[0037] Establish a plane rectangular coordinate system, which is recorded as a removal processing coordinate system, wherein the unit of the X-axis of the removal processing coordinate system is time, and the unit of the Y-axis of the removal processing coordinate system is weight;

[0038] Mark the characteristic time points of all the eliminated sub-segments and their corresponding characteristic weights in the elimination processing coordinate system and record them as elimination point 1 to elimination point L in sequence;

[0039] Obtain the fitting curve corresponding to the rejection point 1 to the rejection point L, record it as the rejection feature line of the rejection processing method N4, obtain the minimum distance from the rejection point 1 to the rejection point L to the rejection feature line, record them as the rejection short distance 1 to the rejection short distance L, and record the maximum value from the rejection short distance 1 to the rejection short distance L as the rejection relative distance;

[0040] Get the rejection feature lines and relative rejection distances of all rejection processing methods.

[0041] Further, the control of surface treatment of semiconductor parts based on adding feature areas, removing processing lines and removing relative distances includes:

[0042] When semiconductor component B is surface treated using processing method A and the processing method is an additive processing method, an additive feature area corresponding to processing method A is obtained, an additive feature value B of semiconductor component B is obtained during the surface treatment process based on a processing feature extraction method, and point marking is performed in an additive processing coordinate system based on the additive feature value B, and the marked point is recorded as additive feature point B. When the additive feature point B is within the additive feature area corresponding to processing method A, surface treatment continues; when the additive feature point B is outside the additive feature area corresponding to additive processing method A, surface treatment is stopped and an abnormality warning is issued.

[0043] Furthermore, the control of surface treatment of semiconductor parts based on adding feature areas, removing processing lines and removing relative distances also includes:

[0044] When semiconductor component B is surface treated using processing method A and the processing method is a rejection processing method, the rejection feature line and rejection relative distance corresponding to processing method A are obtained, and the feature time points and feature weights of semiconductor component B are obtained one by one during the surface treatment process based on the processing feature extraction method, and each feature time point and feature weight obtained are marked in the rejection coordinate system. When the minimum distance between the marked point and the rejection feature line of processing method A is less than or equal to the rejection relative distance of processing method A, the surface treatment continues; when the minimum distance between any marked point and the rejection feature line of processing method A is greater than the rejection relative distance of processing method A, the surface treatment is stopped and an abnormality warning is issued.

[0045] In a second aspect, the present invention also provides a control system for surface treatment of semiconductor parts, including a treatment method classification module, a treatment feature extraction module and a treatment control module;

[0046] The processing method classification module is used to obtain multiple processing methods for surface treatment of semiconductor parts and components, and classify the multiple processing methods into adding processing methods and removing processing methods respectively;

[0047] The processing feature extraction module is used to analyze the addition processing method and the removal processing method respectively using the processing feature extraction method, and obtain the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method based on the analysis results;

[0048] The processing control module is used for controlling the surface processing of semiconductor parts based on adding feature areas, removing processing lines and removing relative distances.

[0049] Beneficial effects of the present invention: The present invention first obtains multiple processing methods for surface treatment of semiconductor parts and components, and classifies the multiple processing methods, recording them as addition processing methods and removal processing methods respectively, then uses a processing feature extraction method to analyze the addition processing method and the removal processing method respectively, and obtains the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method based on the analysis results, and finally controls the surface treatment of semiconductor parts and components based on the addition feature area, the removal processing line and the removal relative distance. The advantage of this is that by classifying multiple processing methods and using the processing feature extraction method to obtain the addition feature area, the removal processing line and the removal relative distance, it is helpful to timely control the surface treatment process based on the addition feature area, the removal processing line and the removal relative distance in the actual surface treatment of semiconductor parts and components. When the surface treatment data cannot correspond to the addition feature area, the removal processing line or the removal relative distance, the surface treatment process can be timely controlled, thereby timely protecting the surface of the semiconductor parts and components from the influence of abnormal surface treatment, and further reducing the property loss of semiconductor parts and components when a failure occurs.

[0050] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 is a functional block diagram of the system of the present invention;

[0052] Figure 2 is a flow chart of the steps of the method of the present invention;

[0053] Figure 3 A schematic diagram of obtaining the added feature area of ​​the present invention;

[0054] Figure 4 It is a schematic diagram of obtaining the removal processing line and the removal relative distance of the removal coordinate system of the present invention. DETAILED DESCRIPTION

[0055] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0056] Example 1, please refer to Figure 1 As shown, in a first aspect, the present application provides a control system for surface treatment of semiconductor parts, including a treatment method classification module, a treatment feature extraction module and a treatment control module;

[0057] The processing method classification module is used to obtain multiple processing methods for surface treatment of semiconductor parts and components, and classify the multiple processing methods into adding processing methods and removing processing methods respectively;

[0058] In the specific implementation process, by distinguishing between the addition processing method and the removal processing method, the processing methods that increase the weight of semiconductor components and reduce the weight of semiconductor components during the processing process can be separated and analyzed separately, which helps to obtain the corresponding characteristics of the addition processing method and the removal processing method that can better reflect their own characteristics. For example, the addition processing method may include chemical vapor deposition, plasma enhanced chemical vapor deposition, photolithography, and ion implantation, and the removal processing method may include cleaning, pickling, and corrosion. In this embodiment, it is assumed that all processing methods will cause the weight of semiconductor components to change. When a processing method that does not change the weight of semiconductor components appears in the specific implementation, it can be analyzed separately.

[0059] The processing method classification module is configured with a method classification strategy, and the method classification strategy includes: obtaining a plurality of processing methods for surface treatment of semiconductor parts, which are sequentially recorded as processing method 1 to processing method N;

[0060] For any one of the processing methods N1 from the processing methods 1 to N, when the weight of the semiconductor component is reduced after the semiconductor component is processed by the processing method N1, the processing method N1 is recorded as a rejection processing method;

[0061] When the weight of a semiconductor component increases after the semiconductor component is treated with treatment method N1, treatment method N1 is recorded as an addition treatment method;

[0062] The processing methods recorded as adding processing methods among processing methods 1 to processing methods N are recorded as adding processing methods 1 to adding processing methods N1 in sequence; the processing methods recorded as removing processing methods among processing methods 1 to processing methods N are recorded as removing processing methods 1 to removing processing methods N2 in sequence, wherein the sum of N1 plus N2 is less than or equal to N;

[0063] The processing feature extraction module is used to analyze the addition processing method and the removal processing method respectively using the processing feature extraction method, and obtain the addition feature area of ​​the addition processing method and the removal processing line and removal relative distance of the removal processing method based on the analysis results.

[0064] The processing feature extraction module is configured with an addition processing extraction strategy and a removal processing extraction strategy;

[0065] The additive processing extraction strategy includes: for any additive processing method N3 from the additive processing methods 1 to the additive processing methods N1, obtaining semiconductor components that can be processed using the additive processing method N3, and recording them as additive processing components N3-1 to additive processing components N3-J in sequence;

[0066] For any one of the additive processing parts N3-J1 from the additive processing parts N3-1 to the additive processing parts N3-J, when the additive processing method N3 is used to process the additive processing part N3-J1, the processed surface of the additive processing part N3-J1 is recorded as the additive surface; when the additive processing part contains multiple processed surfaces, the processed surfaces can be recorded as additive surfaces and analyzed respectively, and the additive feature areas corresponding to the multiple processed surfaces can be obtained respectively;

[0067] Obtain the area of ​​the added surface, record it as the added area, and record the material consumed by the added treatment method N3 during the treatment as the treatment consumed material;

[0068] The value of the processing consumable material consumed when the surface of the added surface is treated using the addition treatment method N3 is recorded as the treatment consumption value; the addition area and the treatment consumption value are recorded as the addition characteristic value of the addition treatment parts N3 to J1;

[0069] The added feature values ​​of all the added processing parts of the added processing method N3 are obtained.

[0070] The additive processing extraction strategy also includes: establishing a plane rectangular coordinate system, recorded as the additive processing coordinate system, wherein the unit of the X-axis of the additive processing coordinate system is area, and the unit of the Y-axis of the additive processing coordinate system is the unit used for statistical processing consumable materials; please refer to Figure 3 As shown, the points corresponding to BB1 to BB8 are added points 1 to 8 respectively, the straight line corresponding to EE9 is the added through line, and through analysis, BB5 and BB6 can be recorded as added corner point 1 and added corner point 2 respectively, the quadrilateral corresponding to BB0 is the characteristic quadrilateral, BB10 and BB11 are the first adjacent side and the second adjacent side corresponding to the characteristic quadrilateral BB0 respectively, and BB12 is the closed area surrounded by the curves corresponding to the first adjacent side BB10 and the second adjacent side BB11, that is, the added characteristic area;

[0071] For any one of the additive processing parts N3-J1 of all the additive processing parts of the additive processing method N3, the additive processing parts N3-J1 are marked in the additive coordinate system based on the additive characteristic value, wherein the additive area in the additive characteristic value corresponds to the value of the X axis in the additive processing coordinate system, and the processing consumption value in the additive characteristic value corresponds to the value of the Y axis in the additive processing coordinate system;

[0072] The added feature values ​​corresponding to all the added processing parts of the addition processing method N3 are marked in the addition coordinate system, and are recorded from small to large as addition point 1 to addition point J based on the distance from the origin of the addition coordinate system;

[0073] Connect the added point 1 and the added point J, and record the connecting line as the added through line, obtain the distance from the added point 2 to the added point J-1 to the added through line, and record it as the vertical line length 1 to the vertical line length J-2, and record the added points corresponding to the larger two vertical line lengths from the vertical line length 1 to the vertical line length J-2 as the added corner point 1 and the added corner point 2; record the quadrilateral formed by the added point 1, the added point J, the added corner point 1 and the added corner point 2 as the characteristic quadrilateral;

[0074] Two adjacent sides of the characteristic quadrilateral are recorded as first adjacent sides, and the other two adjacent sides of the characteristic quadrilateral are recorded as second adjacent sides, and a fitting curve corresponding to the first adjacent side is obtained, which is recorded as curve 1; a fitting curve corresponding to the second adjacent side is obtained, which is recorded as curve 2, and a closed area enclosed by curve 1 and curve 2 is recorded as an added feature area of ​​the addition processing method N3;

[0075] Gets the added feature area for all add processing methods.

[0076] The rejection processing extraction strategy includes: for any one of the rejection processing methods N4 from the rejection processing method 1 to the rejection processing method N4, obtaining semiconductor components that can be processed using the rejection processing method N4, and recording them as the rejection processing components N4-1 to the rejection processing components N4-K in sequence;

[0077] For any one of the rejected processing parts N4-1 to the rejected processing parts N4-K1, the processing data of any one of the rejected processing parts N4-K1 using the rejection processing method N4 for surface treatment is obtained, and the time when the rejected processing part N4-K1 starts to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection start time; the time when the rejected processing part N4-K1 ends to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection end time;

[0078] The time period consisting of the rejection start time and the rejection end time is recorded as the rejection time period, and the rejection time period is evenly divided into standard rejection quantity portions, and each portion is recorded in sequence as rejection sub-segment 1 to rejection sub-segment F based on the time sequence;

[0079] In the specific implementation process, the standard elimination number is determined by the length of the specific elimination period. When the elimination period is long, the standard elimination number can be increased to obtain more accurate data. When the elimination period is short, the standard elimination number can be reduced to reduce data processing, thereby improving the overall analysis efficiency.

[0080] For any one of the rejection sub-segments F1 from the rejection sub-segments 1 to the rejection sub-segment F, the time node corresponding to the center point of the rejection sub-segment F1 is recorded as the characteristic time point of the rejection sub-segment F1, and the weight of the rejection processing parts N4 to K1 when the rejection processing method N4 is used to perform surface processing on the rejection processing parts N4 to the characteristic time point of the rejection sub-segment F1 in the processing data is recorded as the characteristic weight of the rejection sub-segment;

[0081] Get the characteristic time points and characteristic weights of all excluded sub-segments.

[0082] The elimination processing extraction strategy also includes: establishing a plane rectangular coordinate system, recorded as the elimination processing coordinate system, wherein the unit of the X-axis of the elimination processing coordinate system is time, and the unit of the Y-axis of the elimination processing coordinate system is weight;

[0083] See also Figure 4 As shown, the points corresponding to GG1 to GG7 are respectively the rejection points 1 to 7, and the curve corresponding to GG8 is the rejection feature line. Through analysis, it is found that the rejection shortest distance corresponding to the rejection point GG4 is the largest among all the rejection shortest distances. Therefore, the rejection shortest distance corresponding to the rejection point GG4 is recorded as the rejection relative distance, that is, the straight line corresponding to GG9;

[0084] Mark the characteristic time points of all the eliminated sub-segments and their corresponding characteristic weights in the elimination processing coordinate system and record them as elimination point 1 to elimination point L in sequence;

[0085] Obtain the fitting curve corresponding to the rejection point 1 to the rejection point L, record it as the rejection feature line of the rejection processing method N4, obtain the minimum distance from the rejection point 1 to the rejection point L to the rejection feature line, record them as the rejection short distance 1 to the rejection short distance L, and record the maximum value from the rejection short distance 1 to the rejection short distance L as the rejection relative distance;

[0086] Get the rejection feature lines and relative rejection distances of all rejection processing methods.

[0087] The processing control module is used to control the surface processing of semiconductor parts based on adding feature areas, removing processing lines and removing relative distances;

[0088] The processing control module is configured with a processing method control strategy, and the processing method control strategy includes: when the processing method A is used to perform surface treatment on the semiconductor component B and the processing method is an additive processing method, the additive feature area corresponding to the processing method A is obtained, the additive feature value B of the semiconductor component B is obtained during the surface treatment process based on the processing feature extraction method, and the point is marked in the additive processing coordinate system based on the additive feature value B, and the marked point is recorded as the additive feature point B. When the additive feature point B is in the additive feature area corresponding to the processing method A, the surface treatment is continued; when the additive feature point B is outside the additive feature area corresponding to the additive processing method A, the surface treatment is stopped and an abnormal warning is issued;

[0089] During the specific implementation process, when the added feature value B of semiconductor component B is outside the added feature area in the added coordinate system, it means that the value of the processing consumption value of semiconductor component B during the surface treatment process is relatively abnormal. More processing materials may be used, resulting in material waste or excessive processing, or less processing materials may be used, resulting in incomplete processing. Therefore, the processing should be stopped in time and an abnormal warning should be issued to the staff so that the staff can intervene in time to prevent damage to the semiconductor components.

[0090] The treatment control strategy also includes:

[0091] When the semiconductor component B is surface treated using processing method A and the processing method is a rejection processing method, the rejection feature line and the rejection relative distance corresponding to processing method A are obtained, and the feature time points and feature weights of the semiconductor component B are obtained one by one during the surface treatment process based on the processing feature extraction method, and the feature time points and feature weights obtained each time are marked in the rejection coordinate system. When the minimum distance between the marked point and the rejection feature line of processing method A is less than or equal to the rejection relative distance of processing method A, the surface treatment is continued; when the minimum distance between any marked point and the rejection feature line of processing method A is greater than the rejection relative distance of processing method A, the surface treatment is stopped and an abnormality warning is issued;

[0092] In the specific implementation process, the rejection feature line can reflect the different feature weights corresponding to different feature time points in the normal processing process, and the rejection relative distance is the maximum tolerance for the deviation between the feature time point and the feature weight and the rejection feature line. Therefore, when the minimum distance between the marking point of the semiconductor component and the rejection feature line of processing method A is greater than the rejection relative distance of processing method A, it means that the deviation between the marking point corresponding to the semiconductor component and the rejection feature line is large, and excessive corrosion and excessive pickling may occur during the surface treatment process. Therefore, the processing should be stopped in time and an alarm should be sent to the staff.

[0093] Example 2, please refer to Figure 2 As shown, in a second aspect, the present invention further provides a control method for surface treatment of semiconductor parts, comprising:

[0094] Step S1, obtaining multiple processing methods for surface treatment of semiconductor parts, and classifying the multiple processing methods into adding processing methods and removing processing methods;

[0095] Step S1 includes: Step S101, obtaining a plurality of processing methods for surface processing of semiconductor components, which are sequentially recorded as processing method 1 to processing method N;

[0096] Step S102, for any one of the processing methods 1 to N, when the weight of the semiconductor component is reduced after the processing method N1 is used to process the semiconductor component, the processing method N1 is recorded as a discarding processing method;

[0097] When the weight of a semiconductor component increases after the semiconductor component is treated with treatment method N1, treatment method N1 is recorded as an addition treatment method;

[0098] In step S103, the processing methods recorded as adding processing methods among processing methods 1 to processing methods N are recorded as adding processing methods 1 to adding processing methods N1 in sequence; the processing methods recorded as eliminating processing methods among processing methods 1 to processing methods N are recorded as eliminating processing methods 1 to eliminating processing methods N2 in sequence, wherein the sum of N1 plus N2 is less than or equal to N.

[0099] Step S2, using a processing feature extraction method to analyze the addition processing method and the removal processing method respectively, and based on the analysis results, obtain the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method;

[0100] Step S2 includes: step S201, using a processing feature extraction method to analyze the addition processing method, and obtaining an addition feature area based on the analysis result;

[0101] When the additive treatment method is analyzed using the treatment characterization method, the treatment characterization method includes:

[0102] Step S2011, for any one of the additive processing methods N3 from the additive processing method 1 to the additive processing method N1, obtain semiconductor components that can be processed using the additive processing method N3, and record them as additive processing components N3-1 to additive processing components N3-J in sequence;

[0103] Step S2012, for any one of the additive processing parts N3-1 to the additive processing parts N3-J1, when the additive processing method N3 is used to process the additive processing part N3-J1, the processed surface of the additive processing part N3-J1 is recorded as an additive surface;

[0104] Step S2013, obtaining the area of ​​the added surface, recorded as the added area, and recording the material consumed during the processing of the added processing method N3 as the processing consumable material;

[0105] Step S2014, recording the value of the processing consumable material consumed when the surface is treated by the additive treatment method N3 as the processing consumption value; recording the additive area and the processing consumption value as the additive characteristic value of the additive treatment parts N3-J1;

[0106] Step S2015, obtaining the added feature values ​​of all added processing parts of the added processing method N3;

[0107] Step S2016, establishing a plane rectangular coordinate system, recorded as an additive processing coordinate system, wherein the unit of the X-axis of the additive processing coordinate system is area, and the unit of the Y-axis of the additive processing coordinate system is a unit used for statistical processing of consumable materials;

[0108] Step S2017, for any one of the additive processing parts N3-J1 of all the additive processing parts of the additive processing method N3, mark them in the additive coordinate system based on the additive characteristic value of the additive processing parts N3-J1, wherein the additive area in the additive characteristic value corresponds to the value of the X-axis in the additive processing coordinate system, and the processing consumption value in the additive characteristic value corresponds to the value of the Y-axis in the additive processing coordinate system;

[0109] Step S2018, marking the added feature values ​​corresponding to all the added processing parts of the addition processing method N3 in the addition coordinate system, and recording them from small to large as added point 1 to added point J based on the distance from the origin of the addition coordinate system;

[0110] Connect the added point 1 and the added point J, and record the connecting line as the added through line, obtain the distance from the added point 2 to the added point J-1 to the added through line, and record it as the vertical line length 1 to the vertical line length J-2, and record the added points corresponding to the larger two vertical line lengths from the vertical line length 1 to the vertical line length J-2 as the added corner point 1 and the added corner point 2; record the quadrilateral formed by the added point 1, the added point J, the added corner point 1 and the added corner point 2 as the characteristic quadrilateral;

[0111] Step S2019, record two adjacent sides of the feature quadrilateral as first adjacent sides, record the other two adjacent sides of the feature quadrilateral as second adjacent sides, obtain the fitting curve corresponding to the first adjacent side, record it as curve 1; obtain the fitting curve corresponding to the second adjacent side, record it as curve 2, and record the closed area enclosed by curve 1 and curve 2 as the added feature area of ​​the addition processing method N3;

[0112] Gets the added feature area for all add processing methods.

[0113] Step S202, using a processing feature extraction method to analyze the elimination processing method, and obtaining a elimination processing line and a elimination relative distance based on the analysis result;

[0114] When the culling process is analyzed using process feature extraction, the process feature extraction method includes:

[0115] Step S2021, for any one of the rejection processing methods N4 from the rejection processing method 1 to the rejection processing method N4, obtain semiconductor components that can be processed using the rejection processing method N4, and record them as the rejection processing component N4-1 to the rejection processing component N4-K in sequence;

[0116] Step S2022, for any one of the rejected parts N4-1 to the rejected parts N4-K, obtain the processing data of any one of the rejected parts N4-K1 using the rejection processing method N4 for surface processing, record the time when the rejected parts N4-K1 starts to perform surface processing using the rejection processing method N4 in the processing data as the rejection start time; record the time when the rejected parts N4-K1 ends to perform surface processing using the rejection processing method N4 in the processing data as the rejection end time;

[0117] Step S2023, record the time period consisting of the elimination start time and the elimination end time as the elimination time period, evenly divide the elimination time period into standard elimination quantity portions, and record each portion in sequence as elimination sub-segment 1 to elimination sub-segment F based on the time sequence;

[0118] Step S2024, for any one of the rejection sub-segments F1 from the rejection sub-segments 1 to the rejection sub-segment F, the time node corresponding to the center point of the rejection sub-segment F1 is recorded as the characteristic time point of the rejection sub-segment F1, and the weight of the rejection processing parts N4-K1 when the rejection processing method N4 is used to perform surface processing on the rejection processing parts N4-K1 in the processing data to the characteristic time point of the rejection sub-segment F1 is recorded as the characteristic weight of the rejection sub-segment;

[0119] Step S2025, obtaining characteristic time points and characteristic weights of all eliminated sub-segments;

[0120] Step S2026, establishing a plane rectangular coordinate system, recorded as a removal processing coordinate system, wherein the unit of the X-axis of the removal processing coordinate system is time, and the unit of the Y-axis of the removal processing coordinate system is weight;

[0121] Step S2027, marking the characteristic time points of all the eliminated sub-segments and their corresponding characteristic weights in the elimination processing coordinate system, and recording them as elimination point 1 to elimination point L in sequence;

[0122] Step S2028, obtaining the fitting curve corresponding to the rejection point 1 to the rejection point L, recording it as the rejection feature line of the rejection processing method N4, obtaining the minimum distance from the rejection point 1 to the rejection point L to the rejection feature line, recording them as the rejection short distance 1 to the rejection short distance L in sequence, and recording the maximum value among the rejection short distance 1 to the rejection short distance L as the rejection relative distance;

[0123] Step S2029, obtaining the rejection feature lines and rejection relative distances of all rejection processing methods.

[0124] Step S3, controlling the surface treatment of the semiconductor parts based on the added feature area, the removed processing line and the removed relative distance;

[0125] Step S3 includes: step S301, when the semiconductor component B is surface treated by the treatment method A and the treatment method is an additive treatment method, the additive feature area corresponding to the treatment method A is obtained, the additive feature value B of the semiconductor component B is obtained during the surface treatment process based on the treatment feature extraction method, and the point is marked in the additive treatment coordinate system based on the additive feature value B, and the marked point is recorded as the additive feature point B, and when the additive feature point B is in the additive feature area corresponding to the treatment method A, the surface treatment is continued; when the additive feature point B is outside the additive feature area corresponding to the additive treatment method A, the surface treatment is stopped and an abnormal warning is issued;

[0126] Step S302, when the semiconductor component B is surface treated using processing method A and the processing method is a rejection processing method, the rejection feature line and rejection relative distance corresponding to processing method A are obtained, and the feature time points and feature weights of the semiconductor component B are obtained one by one during the surface treatment process based on the processing feature extraction method, and each feature time point and feature weight obtained are marked in the rejection coordinate system. When the minimum distance between the marked point and the rejection feature line of processing method A is less than or equal to the rejection relative distance of processing method A, the surface treatment continues; when the minimum distance between any marked point and the rejection feature line of processing method A is greater than the rejection relative distance of processing method A, the surface treatment is stopped and an abnormality warning is issued.

[0127] Working principle: First, multiple processing methods for surface treatment of semiconductor components are obtained, and the multiple processing methods are classified and recorded as additive processing methods and eliminative processing methods respectively. Then, the additive processing methods and eliminative processing methods are analyzed respectively using the processing feature extraction method, and the additive feature area of ​​the additive processing method and the eliminative processing line and eliminative relative distance of the eliminative processing method are obtained based on the analysis results. Finally, the surface treatment of semiconductor components is controlled based on the additive feature area, the eliminative processing line and the eliminative relative distance.

[0128] In the above embodiments of the present application, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0129] It should be understood by those skilled in the art that the embodiments of the present invention can be provided as methods, systems or computer program products. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. Among them, the storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (Static Random Access Memory, referred to as SRAM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, referred to as EEPROM), erasable programmable read-only memory (Erasable Programmable Read Only Memory, referred to as EPROM), programmable read-only memory (Programmable Read-Only Memory, referred to as PROM), read-only memory (Read-Only Memory, referred to as ROM), magnetic memory, flash memory, disk or optical disk. These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0130] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

Claims

1. A control method for surface treatment of semiconductor parts, characterized in that: include: Acquire multiple processing methods for surface treatment of semiconductor parts, and classify the multiple processing methods into adding processing methods and removing processing methods; The addition processing method and the elimination processing method are analyzed respectively by using a processing feature extraction method, and based on the analysis results, an addition feature area of ​​the addition processing method and a elimination processing line and a elimination relative distance of the elimination processing method are obtained; Controlling the surface treatment of semiconductor parts based on adding feature areas, rejecting processing lines and rejecting relative distances; A plurality of processing methods for surface treatment of semiconductor parts are obtained, and the plurality of processing methods are classified and processed, and are recorded as adding processing methods and removing processing methods, respectively, including: Acquire multiple processing methods for surface treatment of semiconductor parts, which are sequentially recorded as processing method 1 to processing method N; For any one of the processing methods N1 from the processing methods 1 to N, when the weight of the semiconductor component is reduced after the semiconductor component is processed by the processing method N1, the processing method N1 is recorded as a rejection processing method; When the weight of a semiconductor component increases after the semiconductor component is treated with treatment method N1, treatment method N1 is recorded as an addition treatment method; The processing methods recorded as adding processing methods among processing methods 1 to processing methods N are recorded as adding processing methods 1 to adding processing methods N1 in sequence; the processing methods recorded as removing processing methods among processing methods 1 to processing methods N are recorded as removing processing methods 1 to removing processing methods N2 in sequence, wherein the sum of N1 plus N2 is less than or equal to N; The addition processing method and the removal processing method are analyzed respectively using the processing feature extraction method, and based on the analysis results, the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method are obtained, including: The additive processing method is analyzed using a processing feature extraction method, and an additive feature area is obtained based on the analysis result; The processing feature extraction method is used to analyze the elimination processing method, and the elimination processing line and the elimination relative distance are obtained based on the analysis results.

2. A control method for surface treatment of semiconductor parts according to claim 1, characterized in that: When the additive treatment method is analyzed using the treatment characterization method, the treatment characterization method includes: For any one of the addition processing methods N3 from the addition processing methods 1 to the addition processing methods N1, semiconductor components that can be processed using the addition processing method N3 are obtained and recorded as addition processing components N3-1 to addition processing components N3-J in sequence; For any one of the additive processing parts N3-1 to the additive processing parts N3-J1, when the additive processing method N3 is used to process the additive processing part N3-J1, the processed surface of the additive processing part N3-J1 is recorded as the additive surface; Obtain the area of ​​the added surface, record it as the added area, and record the material consumed by the added treatment method N3 during the treatment as the treatment consumed material; The value of the processing consumable material consumed when the surface of the added surface is treated using the addition treatment method N3 is recorded as the treatment consumption value; the addition area and the treatment consumption value are recorded as the addition characteristic value of the addition treatment parts N3 to J1; The added feature values ​​of all the added processing parts of the added processing method N3 are obtained.

3. A control method for surface treatment of semiconductor parts according to claim 2, characterized in that: When the additive treatment method is analyzed using the treatment signature extraction method, the treatment signature extraction method also includes: Establish a plane rectangular coordinate system, which is recorded as an additive processing coordinate system, wherein the unit of the X-axis of the additive processing coordinate system is area, and the unit of the Y-axis of the additive processing coordinate system is a unit used for statistical processing of consumable materials; For any one of the additive processing parts N3-J1 of all the additive processing parts of the additive processing method N3, the additive processing parts N3-J1 are marked in the additive coordinate system based on the additive characteristic value, wherein the additive area in the additive characteristic value corresponds to the value of the X axis in the additive processing coordinate system, and the processing consumption value in the additive characteristic value corresponds to the value of the Y axis in the additive processing coordinate system; The added feature values ​​corresponding to all the added processing parts of the addition processing method N3 are marked in the addition coordinate system, and are recorded from small to large as addition point 1 to addition point J based on the distance from the origin of the addition coordinate system; Connect the added point 1 and the added point J, and record the connecting line as the added through line, obtain the distance from the added point 2 to the added point J-1 to the added through line, and record it as the vertical line length 1 to the vertical line length J-2, and record the added points corresponding to the larger two vertical line lengths from the vertical line length 1 to the vertical line length J-2 as the added corner point 1 and the added corner point 2; record the quadrilateral formed by the added point 1, the added point J, the added corner point 1 and the added corner point 2 as the characteristic quadrilateral; Two adjacent sides of the characteristic quadrilateral are recorded as first adjacent sides, and the other two adjacent sides of the characteristic quadrilateral are recorded as second adjacent sides, and a fitting curve corresponding to the first adjacent side is obtained, which is recorded as curve 1; a fitting curve corresponding to the second adjacent side is obtained, which is recorded as curve 2, and a closed area enclosed by curve 1 and curve 2 is recorded as an added feature area of ​​the addition processing method N3; Gets the added feature area for all add processing methods.

4. A control method for surface treatment of semiconductor parts according to claim 3, characterized in that: When the culling process is analyzed using process feature extraction, the process feature extraction method includes: For any one of the rejection processing methods N4 from the rejection processing method 1 to the rejection processing method N4, semiconductor components that can be processed by the rejection processing method N4 are obtained and recorded as the rejection processing components N4-1 to the rejection processing components N4-K in sequence; For any one of the rejected processing parts N4-1 to the rejected processing parts N4-K1, the processing data of any one of the rejected processing parts N4-K1 using the rejection processing method N4 for surface treatment is obtained, and the time when the rejected processing part N4-K1 starts to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection start time; the time when the rejected processing part N4-K1 ends to perform surface treatment using the rejection processing method N4 in the processing data is recorded as the rejection end time; The time period consisting of the rejection start time and the rejection end time is recorded as the rejection time period, and the rejection time period is evenly divided into standard rejection quantity portions, and each portion is recorded in sequence as rejection sub-segment 1 to rejection sub-segment F based on the time sequence; For any one of the rejection sub-segments F1 from the rejection sub-segments 1 to the rejection sub-segment F, the time node corresponding to the center point of the rejection sub-segment F1 is recorded as the characteristic time point of the rejection sub-segment F1, and the weight of the rejection processing parts N4 to K1 when the rejection processing method N4 is used to perform surface processing on the rejection processing parts N4 to the characteristic time point of the rejection sub-segment F1 in the processing data is recorded as the characteristic weight of the rejection sub-segment; Get the characteristic time points and characteristic weights of all excluded sub-segments.

5. A control method for surface treatment of semiconductor parts according to claim 4, characterized in that: When the process feature extraction method is used to analyze the elimination process, the process feature extraction method also includes: Establish a plane rectangular coordinate system, which is recorded as a removal processing coordinate system, wherein the unit of the X-axis of the removal processing coordinate system is time, and the unit of the Y-axis of the removal processing coordinate system is weight; Mark the characteristic time points of all the eliminated sub-segments and their corresponding characteristic weights in the elimination processing coordinate system and record them as elimination point 1 to elimination point L in sequence; Obtain the fitting curve corresponding to the rejection point 1 to the rejection point L, record it as the rejection feature line of the rejection processing method N4, obtain the minimum distance from the rejection point 1 to the rejection point L to the rejection feature line, record them as the rejection short distance 1 to the rejection short distance L, and record the maximum value from the rejection short distance 1 to the rejection short distance L as the rejection relative distance; Get the rejection feature lines and relative rejection distances of all rejection processing methods.

6. A control method for surface treatment of semiconductor parts according to claim 5, characterized in that: Control of surface treatment of semiconductor parts based on adding feature areas, rejecting processing lines and rejecting relative distances includes: When semiconductor component B is surface treated using processing method A and the processing method is an additive processing method, an additive feature area corresponding to processing method A is obtained, an additive feature value B of semiconductor component B is obtained during the surface treatment process based on a processing feature extraction method, and point marking is performed in an additive processing coordinate system based on the additive feature value B, and the marked point is recorded as additive feature point B. When the additive feature point B is within the additive feature area corresponding to processing method A, surface treatment continues; when the additive feature point B is outside the additive feature area corresponding to additive processing method A, surface treatment is stopped and an abnormality warning is issued.

7. A control method for surface treatment of semiconductor parts according to claim 6, characterized in that: Controlling the surface treatment of semiconductor parts based on adding feature areas, rejecting processing lines and rejecting relative distances also includes: When semiconductor component B is surface treated using processing method A and the processing method is a rejection processing method, the rejection feature line and rejection relative distance corresponding to processing method A are obtained, and the feature time points and feature weights of semiconductor component B are obtained one by one during the surface treatment process based on the processing feature extraction method, and each feature time point and feature weight obtained are marked in the rejection coordinate system. When the minimum distance between the marked point and the rejection feature line of processing method A is less than or equal to the rejection relative distance of processing method A, the surface treatment continues; when the minimum distance between any marked point and the rejection feature line of processing method A is greater than the rejection relative distance of processing method A, the surface treatment is stopped and an abnormality warning is issued.

8. A control system for surface treatment of semiconductor parts, applicable to a control method for surface treatment of semiconductor parts according to any one of claims 1 to 7, characterized in that: It includes a processing method classification module, a processing feature extraction module and a processing control module; The processing method classification module is used to obtain multiple processing methods for surface treatment of semiconductor parts and components, and classify the multiple processing methods into adding processing methods and removing processing methods respectively; The processing feature extraction module is used to analyze the addition processing method and the removal processing method respectively using the processing feature extraction method, and obtain the addition feature area of ​​the addition processing method and the removal processing line and the removal relative distance of the removal processing method based on the analysis results; The processing control module is used for controlling the surface processing of semiconductor parts based on adding feature areas, removing processing lines and removing relative distances.

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